2 /* drivers/atm/firestream.c - FireStream 155 (MB86697) and
3 * FireStream 50 (MB86695) device driver
6 /* Written & (C) 2000 by R.E.Wolff@BitWizard.nl
7 * Copied snippets from zatm.c by Werner Almesberger, EPFL LRC/ICA
8 * and ambassador.c Copyright (C) 1995-1999 Madge Networks Ltd
12 This program is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 2 of the License, or
15 (at your option) any later version.
17 This program is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
22 You should have received a copy of the GNU General Public License
23 along with this program; if not, write to the Free Software
24 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
26 The GNU GPL is contained in /usr/doc/copyright/GPL on a Debian
27 system and in the file COPYING in the Linux kernel source.
31 #include <linux/module.h>
32 #include <linux/sched.h>
33 #include <linux/kernel.h>
35 #include <linux/pci.h>
36 #include <linux/poison.h>
37 #include <linux/errno.h>
38 #include <linux/atm.h>
39 #include <linux/atmdev.h>
40 #include <linux/sonet.h>
41 #include <linux/skbuff.h>
42 #include <linux/netdevice.h>
43 #include <linux/delay.h>
44 #include <linux/ioport.h> /* for request_region */
45 #include <linux/uio.h>
46 #include <linux/init.h>
47 #include <linux/capability.h>
48 #include <linux/bitops.h>
49 #include <asm/byteorder.h>
50 #include <asm/system.h>
51 #include <asm/string.h>
53 #include <asm/atomic.h>
54 #include <asm/uaccess.h>
55 #include <linux/wait.h>
57 #include "firestream.h"
59 static int loopback
= 0;
62 /* According to measurements (but they look suspicious to me!) done in
63 * '97, 37% of the packets are one cell in size. So it pays to have
64 * buffers allocated at that size. A large jump in percentage of
65 * packets occurs at packets around 536 bytes in length. So it also
66 * pays to have those pre-allocated. Unfortunately, we can't fully
67 * take advantage of this as the majority of the packets is likely to
68 * be TCP/IP (As where obviously the measurement comes from) There the
69 * link would be opened with say a 1500 byte MTU, and we can't handle
70 * smaller buffers more efficiently than the larger ones. -- REW
73 /* Due to the way Linux memory management works, specifying "576" as
74 * an allocation size here isn't going to help. They are allocated
75 * from 1024-byte regions anyway. With the size of the sk_buffs (quite
76 * large), it doesn't pay to allocate the smallest size (64) -- REW */
78 /* This is all guesswork. Hard numbers to back this up or disprove this,
79 * are appreciated. -- REW */
81 /* The last entry should be about 64k. However, the "buffer size" is
82 * passed to the chip in a 16 bit field. I don't know how "65536"
83 * would be interpreted. -- REW */
85 #define NP FS_NR_FREE_POOLS
86 static int rx_buf_sizes
[NP
] = {128, 256, 512, 1024, 2048, 4096, 16384, 65520};
87 /* log2: 7 8 9 10 11 12 14 16 */
90 static int rx_pool_sizes
[NP
] = {1024, 1024, 512, 256, 128, 64, 32, 32};
93 static int rx_pool_sizes
[NP
] = {128, 128, 128, 64, 64, 64, 32, 32};
95 /* log2: 10 10 9 8 7 6 5 5 */
96 /* sumlog2: 17 18 18 18 18 18 19 21 */
97 /* mem allocated: 128k 256k 256k 256k 256k 256k 512k 2M */
98 /* tot mem: almost 4M */
100 /* NP is shorter, so that it fits on a single line. */
104 /* Small hardware gotcha:
106 The FS50 CAM (VP/VC match registers) always take the lowest channel
107 number that matches. This is not a problem.
109 However, they also ignore whether the channel is enabled or
110 not. This means that if you allocate channel 0 to 1.2 and then
111 channel 1 to 0.0, then disabeling channel 0 and writing 0 to the
112 match channel for channel 0 will "steal" the traffic from channel
113 1, even if you correctly disable channel 0.
117 - When disabling channels, write an invalid VP/VC value to the
118 match register. (We use 0xffffffff, which in the worst case
119 matches VP/VC = <maxVP>/<maxVC>, but I expect it not to match
120 anything as some "when not in use, program to 0" bits are now
123 - Don't initialize the match registers to 0, as 0.0 is a valid
128 /* Optimization hints and tips.
130 The FireStream chips are very capable of reducing the amount of
131 "interrupt-traffic" for the CPU. This driver requests an interrupt on EVERY
132 action. You could try to minimize this a bit.
134 Besides that, the userspace->kernel copy and the PCI bus are the
135 performance limiting issues for this driver.
137 You could queue up a bunch of outgoing packets without telling the
138 FireStream. I'm not sure that's going to win you much though. The
139 Linux layer won't tell us in advance when it's not going to give us
140 any more packets in a while. So this is tricky to implement right without
141 introducing extra delays.
149 /* The strings that define what the RX queue entry is all about. */
150 /* Fujitsu: Please tell me which ones can have a pointer to a
151 freepool descriptor! */
152 static char *res_strings
[] = {
153 "RX OK: streaming not EOP",
154 "RX OK: streaming EOP",
155 "RX OK: Single buffer packet",
156 "RX OK: packet mode",
157 "RX OK: F4 OAM (end to end)",
158 "RX OK: F4 OAM (Segment)",
159 "RX OK: F5 OAM (end to end)",
160 "RX OK: F5 OAM (Segment)",
162 "RX OK: TRANSP cell",
163 "RX OK: TRANSPC cell",
170 "reassemby abort: AAL5 abort",
172 "packet ageing timeout",
173 "channel ageing timeout",
174 "calculated length error",
175 "programmed length limit error",
177 "oam transp or transpc crc10 error",
184 "reassembly abort: no buffers",
185 "receive buffer overflow",
187 "receive buffer full",
188 "low priority discard - no receive descriptor",
189 "low priority discard - missing end of packet",
215 static char *irq_bitname
[] = {
247 #define PHY_CLEARALL -2
249 struct reginit_item
{
254 static struct reginit_item PHY_NTC_INIT
[] __devinitdata
= {
255 { PHY_CLEARALL
, 0x40 },
261 { 0x39, 0x0006 }, /* changed here to make loopback */
265 { PHY_EOF
, 0}, /* -1 signals end of list */
269 /* Safetyfeature: If the card interrupts more than this number of times
270 in a jiffy (1/100th of a second) then we just disable the interrupt and
271 print a message. This prevents the system from hanging.
273 150000 packets per second is close to the limit a PC is going to have
274 anyway. We therefore have to disable this for production. -- REW */
275 #undef IRQ_RATE_LIMIT // 100
277 /* Interrupts work now. Unlike serial cards, ATM cards don't work all
278 that great without interrupts. -- REW */
279 #undef FS_POLL_FREQ // 100
282 This driver can spew a whole lot of debugging output at you. If you
283 need maximum performance, you should disable the DEBUG define. To
284 aid in debugging in the field, I'm leaving the compile-time debug
285 features enabled, and disable them "runtime". That allows me to
286 instruct people with problems to enable debugging without requiring
287 them to recompile... -- REW
292 #define fs_dprintk(f, str...) if (fs_debug & f) printk (str)
294 #define fs_dprintk(f, str...) /* nothing */
298 static int fs_keystream
= 0;
301 /* I didn't forget to set this to zero before shipping. Hit me with a stick
302 if you get this with the debug default not set to zero again. -- REW */
303 static int fs_debug
= 0;
310 module_param(fs_debug
, int, 0644);
312 module_param(loopback
, int, 0);
313 module_param(num
, int, 0);
314 module_param(fs_keystream
, int, 0);
315 /* XXX Add rx_buf_sizes, and rx_pool_sizes As per request Amar. -- REW */
319 #define FS_DEBUG_FLOW 0x00000001
320 #define FS_DEBUG_OPEN 0x00000002
321 #define FS_DEBUG_QUEUE 0x00000004
322 #define FS_DEBUG_IRQ 0x00000008
323 #define FS_DEBUG_INIT 0x00000010
324 #define FS_DEBUG_SEND 0x00000020
325 #define FS_DEBUG_PHY 0x00000040
326 #define FS_DEBUG_CLEANUP 0x00000080
327 #define FS_DEBUG_QOS 0x00000100
328 #define FS_DEBUG_TXQ 0x00000200
329 #define FS_DEBUG_ALLOC 0x00000400
330 #define FS_DEBUG_TXMEM 0x00000800
331 #define FS_DEBUG_QSIZE 0x00001000
334 #define func_enter() fs_dprintk(FS_DEBUG_FLOW, "fs: enter %s\n", __func__)
335 #define func_exit() fs_dprintk(FS_DEBUG_FLOW, "fs: exit %s\n", __func__)
338 static struct fs_dev
*fs_boards
= NULL
;
342 static void my_hd (void *addr
, int len
)
345 unsigned char *ptr
= addr
;
349 for (j
=0;j
< ((len
< 16)?len
:16);j
++) {
350 printk ("%02x %s", ptr
[j
], (j
==7)?" ":"");
353 printk (" %s", (j
==7)?" ":"");
355 for (j
=0;j
< ((len
< 16)?len
:16);j
++) {
357 printk ("%c", (ch
< 0x20)?'.':((ch
> 0x7f)?'.':ch
));
365 static void my_hd (void *addr
, int len
){}
368 /********** free an skb (as per ATM device driver documentation) **********/
370 /* Hmm. If this is ATM specific, why isn't there an ATM routine for this?
371 * I copied it over from the ambassador driver. -- REW */
373 static inline void fs_kfree_skb (struct sk_buff
* skb
)
375 if (ATM_SKB(skb
)->vcc
->pop
)
376 ATM_SKB(skb
)->vcc
->pop (ATM_SKB(skb
)->vcc
, skb
);
378 dev_kfree_skb_any (skb
);
384 /* It seems the ATM forum recommends this horribly complicated 16bit
385 * floating point format. Turns out the Ambassador uses the exact same
386 * encoding. I just copied it over. If Mitch agrees, I'll move it over
387 * to the atm_misc file or something like that. (and remove it from
388 * here and the ambassador driver) -- REW
391 /* The good thing about this format is that it is monotonic. So,
392 a conversion routine need not be very complicated. To be able to
393 round "nearest" we need to take along a few extra bits. Lets
394 put these after 16 bits, so that we can just return the top 16
395 bits of the 32bit number as the result:
397 int mr (unsigned int rate, int r)
400 static int round[4]={0, 0, 0xffff, 0x8000};
402 while (rate & 0xfc000000) {
406 while (! (rate & 0xfe000000)) {
411 // Now the mantissa is in positions bit 16-25. Excepf for the "hidden 1" that's in bit 26.
413 // Next add in the exponent
415 // And perform the rounding:
416 return (rate + round[r]) >> 16;
419 14 lines-of-code. Compare that with the 120 that the Ambassador
420 guys needed. (would be 8 lines shorter if I'd try to really reduce
423 int mr (unsigned int rate, int r)
426 static int round[4]={0, 0, 0xffff, 0x8000};
428 for (; rate & 0xfc000000 ;rate >>= 1, e++);
429 for (;!(rate & 0xfe000000);rate <<= 1, e--);
430 return ((rate & ~0x02000000) | (e << (16+9)) + round[r]) >> 16;
433 Exercise for the reader: Remove one more line-of-code, without
434 cheating. (Just joining two lines is cheating). (I know it's
435 possible, don't think you've beat me if you found it... If you
436 manage to lose two lines or more, keep me updated! ;-)
443 #define ROUND_NEAREST 3
444 /********** make rate (not quite as much fun as Horizon) **********/
446 static unsigned int make_rate (unsigned int rate
, int r
,
447 u16
* bits
, unsigned int * actual
)
449 unsigned char exp
= -1; /* hush gcc */
450 unsigned int man
= -1; /* hush gcc */
452 fs_dprintk (FS_DEBUG_QOS
, "make_rate %u", rate
);
454 /* rates in cells per second, ITU format (nasty 16-bit floating-point)
455 given 5-bit e and 9-bit m:
456 rate = EITHER (1+m/2^9)*2^e OR 0
457 bits = EITHER 1<<14 | e<<9 | m OR 0
458 (bit 15 is "reserved", bit 14 "non-zero")
459 smallest rate is 0 (special representation)
460 largest rate is (1+511/512)*2^31 = 4290772992 (< 2^32-1)
461 smallest non-zero rate is (1+0/512)*2^0 = 1 (> 0)
463 find position of top bit, this gives e
464 remove top bit and shift (rounding if feeling clever) by 9-e
466 /* Ambassador ucode bug: please don't set bit 14! so 0 rate not
467 representable. // This should move into the ambassador driver
468 when properly merged. -- REW */
470 if (rate
> 0xffc00000U
) {
471 /* larger than largest representable rate */
481 /* representable rate */
486 /* invariant: rate = man*2^(exp-31) */
487 while (!(man
& (1<<31))) {
492 /* man has top bit set
493 rate = (2^31+(man-2^31))*2^(exp-31)
494 rate = (1+(man-2^31)/2^31)*2^exp
497 man
&= 0xffffffffU
; /* a nop on 32-bit systems */
498 /* rate = (1+man/2^32)*2^exp
500 exp is in the range 0 to 31, man is in the range 0 to 2^32-1
501 time to lose significance... we want m in the range 0 to 2^9-1
502 rounding presents a minor problem... we first decide which way
503 we are rounding (based on given rounding direction and possibly
504 the bits of the mantissa that are to be discarded).
514 /* check all bits that we are discarding */
515 if (man
& (~0U>>9)) {
516 man
= (man
>>(32-9)) + 1;
518 /* no need to check for round up outside of range */
527 case ROUND_NEAREST
: {
528 /* check msb that we are discarding */
529 if (man
& (1<<(32-9-1))) {
530 man
= (man
>>(32-9)) + 1;
532 /* no need to check for round up outside of range */
544 /* zero rate - not representable */
546 if (r
== ROUND_DOWN
) {
554 fs_dprintk (FS_DEBUG_QOS
, "rate: man=%u, exp=%hu", man
, exp
);
557 *bits
= /* (1<<14) | */ (exp
<<9) | man
;
561 ? (1 << exp
) + (man
<< (exp
-9))
562 : (1 << exp
) + ((man
+ (1<<(9-exp
-1))) >> (9-exp
));
570 /* FireStream access routines */
571 /* For DEEP-DOWN debugging these can be rigged to intercept accesses to
572 certain registers or to just log all accesses. */
574 static inline void write_fs (struct fs_dev
*dev
, int offset
, u32 val
)
576 writel (val
, dev
->base
+ offset
);
580 static inline u32
read_fs (struct fs_dev
*dev
, int offset
)
582 return readl (dev
->base
+ offset
);
587 static inline struct FS_QENTRY
*get_qentry (struct fs_dev
*dev
, struct queue
*q
)
589 return bus_to_virt (read_fs (dev
, Q_WP(q
->offset
)) & Q_ADDR_MASK
);
593 static void submit_qentry (struct fs_dev
*dev
, struct queue
*q
, struct FS_QENTRY
*qe
)
596 struct FS_QENTRY
*cqe
;
598 /* XXX Sanity check: the write pointer can be checked to be
599 still the same as the value passed as qe... -- REW */
601 while ((wp
= read_fs (dev
, Q_WP (q
->offset
))) & Q_FULL
) {
602 fs_dprintk (FS_DEBUG_TXQ
, "Found queue at %x full. Waiting.\n",
608 cqe
= bus_to_virt (wp
);
610 fs_dprintk (FS_DEBUG_TXQ
, "q mismatch! %p %p\n", qe
, cqe
);
613 write_fs (dev
, Q_WP(q
->offset
), Q_INCWRAP
);
620 rp
= read_fs (dev
, Q_RP(q
->offset
));
621 wp
= read_fs (dev
, Q_WP(q
->offset
));
622 fs_dprintk (FS_DEBUG_TXQ
, "q at %d: %x-%x: %x entries.\n",
623 q
->offset
, rp
, wp
, wp
-rp
);
629 static struct FS_QENTRY pq
[60];
632 static struct FS_BPENTRY dq
[60];
637 static void submit_queue (struct fs_dev
*dev
, struct queue
*q
,
638 u32 cmd
, u32 p1
, u32 p2
, u32 p3
)
640 struct FS_QENTRY
*qe
;
642 qe
= get_qentry (dev
, q
);
647 submit_qentry (dev
, q
, qe
);
655 if (qp
>= 60) qp
= 0;
659 /* Test the "other" way one day... -- REW */
661 #define submit_command submit_queue
664 static void submit_command (struct fs_dev
*dev
, struct queue
*q
,
665 u32 cmd
, u32 p1
, u32 p2
, u32 p3
)
667 write_fs (dev
, CMDR0
, cmd
);
668 write_fs (dev
, CMDR1
, p1
);
669 write_fs (dev
, CMDR2
, p2
);
670 write_fs (dev
, CMDR3
, p3
);
676 static void process_return_queue (struct fs_dev
*dev
, struct queue
*q
)
679 struct FS_QENTRY
*qe
;
682 while (!((rq
= read_fs (dev
, Q_RP(q
->offset
))) & Q_EMPTY
)) {
683 fs_dprintk (FS_DEBUG_QUEUE
, "reaping return queue entry at %lx\n", rq
);
684 qe
= bus_to_virt (rq
);
686 fs_dprintk (FS_DEBUG_QUEUE
, "queue entry: %08x %08x %08x %08x. (%d)\n",
687 qe
->cmd
, qe
->p0
, qe
->p1
, qe
->p2
, STATUS_CODE (qe
));
689 switch (STATUS_CODE (qe
)) {
691 tc
= bus_to_virt (qe
->p0
);
692 fs_dprintk (FS_DEBUG_ALLOC
, "Free tc: %p\n", tc
);
697 write_fs (dev
, Q_RP(q
->offset
), Q_INCWRAP
);
702 static void process_txdone_queue (struct fs_dev
*dev
, struct queue
*q
)
706 struct FS_QENTRY
*qe
;
708 struct FS_BPENTRY
*td
;
710 while (!((rq
= read_fs (dev
, Q_RP(q
->offset
))) & Q_EMPTY
)) {
711 fs_dprintk (FS_DEBUG_QUEUE
, "reaping txdone entry at %lx\n", rq
);
712 qe
= bus_to_virt (rq
);
714 fs_dprintk (FS_DEBUG_QUEUE
, "queue entry: %08x %08x %08x %08x: %d\n",
715 qe
->cmd
, qe
->p0
, qe
->p1
, qe
->p2
, STATUS_CODE (qe
));
717 if (STATUS_CODE (qe
) != 2)
718 fs_dprintk (FS_DEBUG_TXMEM
, "queue entry: %08x %08x %08x %08x: %d\n",
719 qe
->cmd
, qe
->p0
, qe
->p1
, qe
->p2
, STATUS_CODE (qe
));
722 switch (STATUS_CODE (qe
)) {
723 case 0x01: /* This is for AAL0 where we put the chip in streaming mode */
726 /* Process a real txdone entry. */
729 printk (KERN_WARNING
"td not aligned: %ld\n", tmp
);
731 td
= bus_to_virt (tmp
);
733 fs_dprintk (FS_DEBUG_QUEUE
, "Pool entry: %08x %08x %08x %08x %p.\n",
734 td
->flags
, td
->next
, td
->bsa
, td
->aal_bufsize
, td
->skb
);
737 if (skb
== FS_VCC (ATM_SKB(skb
)->vcc
)->last_skb
) {
738 wake_up_interruptible (& FS_VCC (ATM_SKB(skb
)->vcc
)->close_wait
);
739 FS_VCC (ATM_SKB(skb
)->vcc
)->last_skb
= NULL
;
747 fs_dprintk (FS_DEBUG_QSIZE
, "[%d]", td
->dev
->ntxpckts
);
751 atomic_inc(&ATM_SKB(skb
)->vcc
->stats
->tx
);
753 fs_dprintk (FS_DEBUG_TXMEM
, "i");
754 fs_dprintk (FS_DEBUG_ALLOC
, "Free t-skb: %p\n", skb
);
757 fs_dprintk (FS_DEBUG_ALLOC
, "Free trans-d: %p\n", td
);
758 memset (td
, ATM_POISON_FREE
, sizeof(struct FS_BPENTRY
));
762 /* Here we get the tx purge inhibit command ... */
763 /* Action, I believe, is "don't do anything". -- REW */
767 write_fs (dev
, Q_RP(q
->offset
), Q_INCWRAP
);
772 static void process_incoming (struct fs_dev
*dev
, struct queue
*q
)
775 struct FS_QENTRY
*qe
;
776 struct FS_BPENTRY
*pe
;
779 struct atm_vcc
*atm_vcc
;
781 while (!((rq
= read_fs (dev
, Q_RP(q
->offset
))) & Q_EMPTY
)) {
782 fs_dprintk (FS_DEBUG_QUEUE
, "reaping incoming queue entry at %lx\n", rq
);
783 qe
= bus_to_virt (rq
);
785 fs_dprintk (FS_DEBUG_QUEUE
, "queue entry: %08x %08x %08x %08x. ",
786 qe
->cmd
, qe
->p0
, qe
->p1
, qe
->p2
);
788 fs_dprintk (FS_DEBUG_QUEUE
, "-> %x: %s\n",
790 res_strings
[STATUS_CODE(qe
)]);
792 pe
= bus_to_virt (qe
->p0
);
793 fs_dprintk (FS_DEBUG_QUEUE
, "Pool entry: %08x %08x %08x %08x %p %p.\n",
794 pe
->flags
, pe
->next
, pe
->bsa
, pe
->aal_bufsize
,
797 channo
= qe
->cmd
& 0xffff;
799 if (channo
< dev
->nchannels
)
800 atm_vcc
= dev
->atm_vccs
[channo
];
804 /* Single buffer packet */
805 switch (STATUS_CODE (qe
)) {
807 /* Fall through for streaming mode */
808 case 0x2:/* Packet received OK.... */
813 fs_dprintk (FS_DEBUG_QUEUE
, "Got skb: %p\n", skb
);
814 if (FS_DEBUG_QUEUE
& fs_debug
) my_hd (bus_to_virt (pe
->bsa
), 0x20);
816 skb_put (skb
, qe
->p1
& 0xffff);
817 ATM_SKB(skb
)->vcc
= atm_vcc
;
818 atomic_inc(&atm_vcc
->stats
->rx
);
819 __net_timestamp(skb
);
820 fs_dprintk (FS_DEBUG_ALLOC
, "Free rec-skb: %p (pushed)\n", skb
);
821 atm_vcc
->push (atm_vcc
, skb
);
822 fs_dprintk (FS_DEBUG_ALLOC
, "Free rec-d: %p\n", pe
);
825 printk (KERN_ERR
"Got a receive on a non-open channel %d.\n", channo
);
828 case 0x17:/* AAL 5 CRC32 error. IFF the length field is nonzero, a buffer
829 has been consumed and needs to be processed. -- REW */
830 if (qe
->p1
& 0xffff) {
831 pe
= bus_to_virt (qe
->p0
);
833 fs_dprintk (FS_DEBUG_ALLOC
, "Free rec-skb: %p\n", pe
->skb
);
834 dev_kfree_skb_any (pe
->skb
);
835 fs_dprintk (FS_DEBUG_ALLOC
, "Free rec-d: %p\n", pe
);
839 atomic_inc(&atm_vcc
->stats
->rx_drop
);
841 case 0x1f: /* Reassembly abort: no buffers. */
842 /* Silently increment error counter. */
844 atomic_inc(&atm_vcc
->stats
->rx_drop
);
846 default: /* Hmm. Haven't written the code to handle the others yet... -- REW */
847 printk (KERN_WARNING
"Don't know what to do with RX status %x: %s.\n",
848 STATUS_CODE(qe
), res_strings
[STATUS_CODE (qe
)]);
850 write_fs (dev
, Q_RP(q
->offset
), Q_INCWRAP
);
856 #define DO_DIRECTION(tp) ((tp)->traffic_class != ATM_NONE)
858 static int fs_open(struct atm_vcc
*atm_vcc
)
862 struct fs_transmit_config
*tc
;
863 struct atm_trafprm
* txtp
;
864 struct atm_trafprm
* rxtp
;
865 /* struct fs_receive_config *rc;*/
866 /* struct FS_QENTRY *qe; */
871 short vpi
= atm_vcc
->vpi
;
872 int vci
= atm_vcc
->vci
;
876 dev
= FS_DEV(atm_vcc
->dev
);
877 fs_dprintk (FS_DEBUG_OPEN
, "fs: open on dev: %p, vcc at %p\n",
880 if (vci
!= ATM_VPI_UNSPEC
&& vpi
!= ATM_VCI_UNSPEC
)
881 set_bit(ATM_VF_ADDR
, &atm_vcc
->flags
);
883 if ((atm_vcc
->qos
.aal
!= ATM_AAL5
) &&
884 (atm_vcc
->qos
.aal
!= ATM_AAL2
))
885 return -EINVAL
; /* XXX AAL0 */
887 fs_dprintk (FS_DEBUG_OPEN
, "fs: (itf %d): open %d.%d\n",
888 atm_vcc
->dev
->number
, atm_vcc
->vpi
, atm_vcc
->vci
);
890 /* XXX handle qos parameters (rate limiting) ? */
892 vcc
= kmalloc(sizeof(struct fs_vcc
), GFP_KERNEL
);
893 fs_dprintk (FS_DEBUG_ALLOC
, "Alloc VCC: %p(%Zd)\n", vcc
, sizeof(struct fs_vcc
));
895 clear_bit(ATM_VF_ADDR
, &atm_vcc
->flags
);
899 atm_vcc
->dev_data
= vcc
;
900 vcc
->last_skb
= NULL
;
902 init_waitqueue_head (&vcc
->close_wait
);
904 txtp
= &atm_vcc
->qos
.txtp
;
905 rxtp
= &atm_vcc
->qos
.rxtp
;
907 if (!test_bit(ATM_VF_PARTIAL
, &atm_vcc
->flags
)) {
909 /* Increment the channel numer: take a free one next time. */
910 for (to
=33;to
;to
--, dev
->channo
++) {
911 /* We only have 32 channels */
912 if (dev
->channo
>= 32)
914 /* If we need to do RX, AND the RX is inuse, try the next */
915 if (DO_DIRECTION(rxtp
) && dev
->atm_vccs
[dev
->channo
])
917 /* If we need to do TX, AND the TX is inuse, try the next */
918 if (DO_DIRECTION(txtp
) && test_bit (dev
->channo
, dev
->tx_inuse
))
920 /* Ok, both are free! (or not needed) */
924 printk ("No more free channels for FS50..\n");
927 vcc
->channo
= dev
->channo
;
928 dev
->channo
&= dev
->channel_mask
;
931 vcc
->channo
= (vpi
<< FS155_VCI_BITS
) | (vci
);
932 if (((DO_DIRECTION(rxtp
) && dev
->atm_vccs
[vcc
->channo
])) ||
933 ( DO_DIRECTION(txtp
) && test_bit (vcc
->channo
, dev
->tx_inuse
))) {
934 printk ("Channel is in use for FS155.\n");
938 fs_dprintk (FS_DEBUG_OPEN
, "OK. Allocated channel %x(%d).\n",
939 vcc
->channo
, vcc
->channo
);
942 if (DO_DIRECTION (txtp
)) {
943 tc
= kmalloc (sizeof (struct fs_transmit_config
), GFP_KERNEL
);
944 fs_dprintk (FS_DEBUG_ALLOC
, "Alloc tc: %p(%Zd)\n",
945 tc
, sizeof (struct fs_transmit_config
));
947 fs_dprintk (FS_DEBUG_OPEN
, "fs: can't alloc transmit_config.\n");
951 /* Allocate the "open" entry from the high priority txq. This makes
952 it most likely that the chip will notice it. It also prevents us
953 from having to wait for completion. On the other hand, we may
954 need to wait for completion anyway, to see if it completed
957 switch (atm_vcc
->qos
.aal
) {
961 | TC_FLAGS_TRANSPARENT_PAYLOAD
964 | TC_FLAGS_TYPE_UBR
/* XXX Change to VBR -- PVDL */
970 | TC_FLAGS_PACKET
/* ??? */
975 printk ("Unknown aal: %d\n", atm_vcc
->qos
.aal
);
978 /* Docs are vague about this atm_hdr field. By the way, the FS
979 * chip makes odd errors if lower bits are set.... -- REW */
980 tc
->atm_hdr
= (vpi
<< 20) | (vci
<< 4);
983 int pcr
= atm_pcr_goal (txtp
);
985 fs_dprintk (FS_DEBUG_OPEN
, "pcr = %d.\n", pcr
);
987 /* XXX Hmm. officially we're only allowed to do this if rounding
988 is round_down -- REW */
990 if (pcr
> 51840000/53/8) pcr
= 51840000/53/8;
992 if (pcr
> 155520000/53/8) pcr
= 155520000/53/8;
996 tmc0
= IS_FS50(dev
)?0x61BE:0x64c9; /* Just copied over the bits from Fujitsu -- REW */
1005 error
= make_rate (pcr
, r
, &tmc0
, NULL
);
1011 fs_dprintk (FS_DEBUG_OPEN
, "pcr = %d.\n", pcr
);
1014 tc
->TMC
[0] = tmc0
| 0x4000;
1015 tc
->TMC
[1] = 0; /* Unused */
1016 tc
->TMC
[2] = 0; /* Unused */
1017 tc
->TMC
[3] = 0; /* Unused */
1019 tc
->spec
= 0; /* UTOPIA address, UDF, HEC: Unused -> 0 */
1020 tc
->rtag
[0] = 0; /* What should I do with routing tags???
1021 -- Not used -- AS -- Thanks -- REW*/
1025 if (fs_debug
& FS_DEBUG_OPEN
) {
1026 fs_dprintk (FS_DEBUG_OPEN
, "TX config record:\n");
1027 my_hd (tc
, sizeof (*tc
));
1030 /* We now use the "submit_command" function to submit commands to
1031 the firestream. There is a define up near the definition of
1032 that routine that switches this routine between immediate write
1033 to the immediate comamnd registers and queuing the commands in
1034 the HPTXQ for execution. This last technique might be more
1035 efficient if we know we're going to submit a whole lot of
1036 commands in one go, but this driver is not setup to be able to
1037 use such a construct. So it probably doen't matter much right
1040 /* The command is IMMediate and INQueue. The parameters are out-of-line.. */
1041 submit_command (dev
, &dev
->hp_txq
,
1042 QE_CMD_CONFIG_TX
| QE_CMD_IMM_INQ
| vcc
->channo
,
1043 virt_to_bus (tc
), 0, 0);
1045 submit_command (dev
, &dev
->hp_txq
,
1046 QE_CMD_TX_EN
| QE_CMD_IMM_INQ
| vcc
->channo
,
1048 set_bit (vcc
->channo
, dev
->tx_inuse
);
1051 if (DO_DIRECTION (rxtp
)) {
1052 dev
->atm_vccs
[vcc
->channo
] = atm_vcc
;
1054 for (bfp
= 0;bfp
< FS_NR_FREE_POOLS
; bfp
++)
1055 if (atm_vcc
->qos
.rxtp
.max_sdu
<= dev
->rx_fp
[bfp
].bufsize
) break;
1056 if (bfp
>= FS_NR_FREE_POOLS
) {
1057 fs_dprintk (FS_DEBUG_OPEN
, "No free pool fits sdu: %d.\n",
1058 atm_vcc
->qos
.rxtp
.max_sdu
);
1059 /* XXX Cleanup? -- Would just calling fs_close work??? -- REW */
1061 /* XXX clear tx inuse. Close TX part? */
1062 dev
->atm_vccs
[vcc
->channo
] = NULL
;
1067 switch (atm_vcc
->qos
.aal
) {
1070 submit_command (dev
, &dev
->hp_txq
,
1071 QE_CMD_CONFIG_RX
| QE_CMD_IMM_INQ
| vcc
->channo
,
1073 RC_FLAGS_BFPS_BFP
* bfp
|
1074 RC_FLAGS_RXBM_PSB
, 0, 0);
1077 submit_command (dev
, &dev
->hp_txq
,
1078 QE_CMD_CONFIG_RX
| QE_CMD_IMM_INQ
| vcc
->channo
,
1080 RC_FLAGS_BFPS_BFP
* bfp
|
1081 RC_FLAGS_RXBM_PSB
, 0, 0);
1084 if (IS_FS50 (dev
)) {
1085 submit_command (dev
, &dev
->hp_txq
,
1086 QE_CMD_REG_WR
| QE_CMD_IMM_INQ
,
1088 (vpi
<< 16) | vci
, 0 ); /* XXX -- Use defines. */
1090 submit_command (dev
, &dev
->hp_txq
,
1091 QE_CMD_RX_EN
| QE_CMD_IMM_INQ
| vcc
->channo
,
1095 /* Indicate we're done! */
1096 set_bit(ATM_VF_READY
, &atm_vcc
->flags
);
1103 static void fs_close(struct atm_vcc
*atm_vcc
)
1105 struct fs_dev
*dev
= FS_DEV (atm_vcc
->dev
);
1106 struct fs_vcc
*vcc
= FS_VCC (atm_vcc
);
1107 struct atm_trafprm
* txtp
;
1108 struct atm_trafprm
* rxtp
;
1112 clear_bit(ATM_VF_READY
, &atm_vcc
->flags
);
1114 fs_dprintk (FS_DEBUG_QSIZE
, "--==**[%d]**==--", dev
->ntxpckts
);
1115 if (vcc
->last_skb
) {
1116 fs_dprintk (FS_DEBUG_QUEUE
, "Waiting for skb %p to be sent.\n",
1118 /* We're going to wait for the last packet to get sent on this VC. It would
1119 be impolite not to send them don't you think?
1121 We don't know which packets didn't get sent. So if we get interrupted in
1122 this sleep_on, we'll lose any reference to these packets. Memory leak!
1123 On the other hand, it's awfully convenient that we can abort a "close" that
1124 is taking too long. Maybe just use non-interruptible sleep on? -- REW */
1125 interruptible_sleep_on (& vcc
->close_wait
);
1128 txtp
= &atm_vcc
->qos
.txtp
;
1129 rxtp
= &atm_vcc
->qos
.rxtp
;
1132 /* See App note XXX (Unpublished as of now) for the reason for the
1133 removal of the "CMD_IMM_INQ" part of the TX_PURGE_INH... -- REW */
1135 if (DO_DIRECTION (txtp
)) {
1136 submit_command (dev
, &dev
->hp_txq
,
1137 QE_CMD_TX_PURGE_INH
| /*QE_CMD_IMM_INQ|*/ vcc
->channo
, 0,0,0);
1138 clear_bit (vcc
->channo
, dev
->tx_inuse
);
1141 if (DO_DIRECTION (rxtp
)) {
1142 submit_command (dev
, &dev
->hp_txq
,
1143 QE_CMD_RX_PURGE_INH
| QE_CMD_IMM_INQ
| vcc
->channo
, 0,0,0);
1144 dev
->atm_vccs
[vcc
->channo
] = NULL
;
1146 /* This means that this is configured as a receive channel */
1147 if (IS_FS50 (dev
)) {
1148 /* Disable the receive filter. Is 0/0 indeed an invalid receive
1149 channel? -- REW. Yes it is. -- Hang. Ok. I'll use -1
1150 (0xfff...) -- REW */
1151 submit_command (dev
, &dev
->hp_txq
,
1152 QE_CMD_REG_WR
| QE_CMD_IMM_INQ
,
1153 0x80 + vcc
->channo
, -1, 0 );
1157 fs_dprintk (FS_DEBUG_ALLOC
, "Free vcc: %p\n", vcc
);
1164 static int fs_send (struct atm_vcc
*atm_vcc
, struct sk_buff
*skb
)
1166 struct fs_dev
*dev
= FS_DEV (atm_vcc
->dev
);
1167 struct fs_vcc
*vcc
= FS_VCC (atm_vcc
);
1168 struct FS_BPENTRY
*td
;
1172 fs_dprintk (FS_DEBUG_TXMEM
, "I");
1173 fs_dprintk (FS_DEBUG_SEND
, "Send: atm_vcc %p skb %p vcc %p dev %p\n",
1174 atm_vcc
, skb
, vcc
, dev
);
1176 fs_dprintk (FS_DEBUG_ALLOC
, "Alloc t-skb: %p (atm_send)\n", skb
);
1178 ATM_SKB(skb
)->vcc
= atm_vcc
;
1180 vcc
->last_skb
= skb
;
1182 td
= kmalloc (sizeof (struct FS_BPENTRY
), GFP_ATOMIC
);
1183 fs_dprintk (FS_DEBUG_ALLOC
, "Alloc transd: %p(%Zd)\n", td
, sizeof (struct FS_BPENTRY
));
1185 /* Oops out of mem */
1189 fs_dprintk (FS_DEBUG_SEND
, "first word in buffer: %x\n",
1190 *(int *) skb
->data
);
1192 td
->flags
= TD_EPI
| TD_DATA
| skb
->len
;
1194 td
->bsa
= virt_to_bus (skb
->data
);
1201 dq
[qd
].flags
= td
->flags
;
1202 dq
[qd
].next
= td
->next
;
1203 dq
[qd
].bsa
= td
->bsa
;
1204 dq
[qd
].skb
= td
->skb
;
1205 dq
[qd
].dev
= td
->dev
;
1207 if (qd
>= 60) qd
= 0;
1210 submit_queue (dev
, &dev
->hp_txq
,
1211 QE_TRANSMIT_DE
| vcc
->channo
,
1212 virt_to_bus (td
), 0,
1215 fs_dprintk (FS_DEBUG_QUEUE
, "in send: txq %d txrq %d\n",
1216 read_fs (dev
, Q_EA (dev
->hp_txq
.offset
)) -
1217 read_fs (dev
, Q_SA (dev
->hp_txq
.offset
)),
1218 read_fs (dev
, Q_EA (dev
->tx_relq
.offset
)) -
1219 read_fs (dev
, Q_SA (dev
->tx_relq
.offset
)));
1226 /* Some function placeholders for functions we don't yet support. */
1229 static int fs_ioctl(struct atm_dev
*dev
,unsigned int cmd
,void __user
*arg
)
1233 return -ENOIOCTLCMD
;
1237 static int fs_getsockopt(struct atm_vcc
*vcc
,int level
,int optname
,
1238 void __user
*optval
,int optlen
)
1246 static int fs_setsockopt(struct atm_vcc
*vcc
,int level
,int optname
,
1247 void __user
*optval
,int optlen
)
1255 static void fs_phy_put(struct atm_dev
*dev
,unsigned char value
,
1263 static unsigned char fs_phy_get(struct atm_dev
*dev
,unsigned long addr
)
1271 static int fs_change_qos(struct atm_vcc
*vcc
,struct atm_qos
*qos
,int flags
)
1281 static const struct atmdev_ops ops
= {
1285 .owner
= THIS_MODULE
,
1286 /* ioctl: fs_ioctl, */
1287 /* getsockopt: fs_getsockopt, */
1288 /* setsockopt: fs_setsockopt, */
1289 /* change_qos: fs_change_qos, */
1291 /* For now implement these internally here... */
1292 /* phy_put: fs_phy_put, */
1293 /* phy_get: fs_phy_get, */
1297 static void __devinit
undocumented_pci_fix (struct pci_dev
*pdev
)
1301 /* The Windows driver says: */
1302 /* Switch off FireStream Retry Limit Threshold
1305 /* The register at 0x28 is documented as "reserved", no further
1308 pci_read_config_dword (pdev
, 0x28, &tint
);
1311 pci_write_config_dword (pdev
, 0x28, tint
);
1317 /**************************************************************************
1319 **************************************************************************/
1321 static void __devinit
write_phy (struct fs_dev
*dev
, int regnum
, int val
)
1323 submit_command (dev
, &dev
->hp_txq
, QE_CMD_PRP_WR
| QE_CMD_IMM_INQ
,
1327 static int __devinit
init_phy (struct fs_dev
*dev
, struct reginit_item
*reginit
)
1332 while (reginit
->reg
!= PHY_EOF
) {
1333 if (reginit
->reg
== PHY_CLEARALL
) {
1334 /* "PHY_CLEARALL means clear all registers. Numregisters is in "val". */
1335 for (i
=0;i
<reginit
->val
;i
++) {
1336 write_phy (dev
, i
, 0);
1339 write_phy (dev
, reginit
->reg
, reginit
->val
);
1347 static void reset_chip (struct fs_dev
*dev
)
1351 write_fs (dev
, SARMODE0
, SARMODE0_SRTS0
);
1353 /* Undocumented delay */
1356 /* The "internal registers are documented to all reset to zero, but
1357 comments & code in the Windows driver indicates that the pools are
1359 for (i
=0;i
< FS_NR_FREE_POOLS
;i
++) {
1360 write_fs (dev
, FP_CNF (RXB_FP(i
)), 0);
1361 write_fs (dev
, FP_SA (RXB_FP(i
)), 0);
1362 write_fs (dev
, FP_EA (RXB_FP(i
)), 0);
1363 write_fs (dev
, FP_CNT (RXB_FP(i
)), 0);
1364 write_fs (dev
, FP_CTU (RXB_FP(i
)), 0);
1367 /* The same goes for the match channel registers, although those are
1368 NOT documented that way in the Windows driver. -- REW */
1369 /* The Windows driver DOES write 0 to these registers somewhere in
1370 the init sequence. However, a small hardware-feature, will
1371 prevent reception of data on VPI/VCI = 0/0 (Unless the channel
1372 allocated happens to have no disabled channels that have a lower
1375 /* Clear the match channel registers. */
1376 if (IS_FS50 (dev
)) {
1377 for (i
=0;i
<FS50_NR_CHANNELS
;i
++) {
1378 write_fs (dev
, 0x200 + i
* 4, -1);
1383 static void __devinit
*aligned_kmalloc (int size
, gfp_t flags
, int alignment
)
1387 if (alignment
<= 0x10) {
1388 t
= kmalloc (size
, flags
);
1389 if ((unsigned long)t
& (alignment
-1)) {
1390 printk ("Kmalloc doesn't align things correctly! %p\n", t
);
1392 return aligned_kmalloc (size
, flags
, alignment
* 4);
1396 printk (KERN_ERR
"Request for > 0x10 alignment not yet implemented (hard!)\n");
1400 static int __devinit
init_q (struct fs_dev
*dev
,
1401 struct queue
*txq
, int queue
, int nentries
, int is_rq
)
1403 int sz
= nentries
* sizeof (struct FS_QENTRY
);
1404 struct FS_QENTRY
*p
;
1408 fs_dprintk (FS_DEBUG_INIT
, "Inititing queue at %x: %d entries:\n",
1411 p
= aligned_kmalloc (sz
, GFP_KERNEL
, 0x10);
1412 fs_dprintk (FS_DEBUG_ALLOC
, "Alloc queue: %p(%d)\n", p
, sz
);
1416 write_fs (dev
, Q_SA(queue
), virt_to_bus(p
));
1417 write_fs (dev
, Q_EA(queue
), virt_to_bus(p
+nentries
-1));
1418 write_fs (dev
, Q_WP(queue
), virt_to_bus(p
));
1419 write_fs (dev
, Q_RP(queue
), virt_to_bus(p
));
1421 /* Configuration for the receive queue: 0: interrupt immediately,
1422 no pre-warning to empty queues: We do our best to keep the
1423 queue filled anyway. */
1424 write_fs (dev
, Q_CNF(queue
), 0 );
1429 txq
->offset
= queue
;
1436 static int __devinit
init_fp (struct fs_dev
*dev
,
1437 struct freepool
*fp
, int queue
, int bufsize
, int nr_buffers
)
1441 fs_dprintk (FS_DEBUG_INIT
, "Inititing free pool at %x:\n", queue
);
1443 write_fs (dev
, FP_CNF(queue
), (bufsize
* RBFP_RBS
) | RBFP_RBSVAL
| RBFP_CME
);
1444 write_fs (dev
, FP_SA(queue
), 0);
1445 write_fs (dev
, FP_EA(queue
), 0);
1446 write_fs (dev
, FP_CTU(queue
), 0);
1447 write_fs (dev
, FP_CNT(queue
), 0);
1450 fp
->bufsize
= bufsize
;
1451 fp
->nr_buffers
= nr_buffers
;
1458 static inline int nr_buffers_in_freepool (struct fs_dev
*dev
, struct freepool
*fp
)
1461 /* This seems to be unreliable.... */
1462 return read_fs (dev
, FP_CNT (fp
->offset
));
1469 /* Check if this gets going again if a pool ever runs out. -- Yes, it
1470 does. I've seen "receive abort: no buffers" and things started
1471 working again after that... -- REW */
1473 static void top_off_fp (struct fs_dev
*dev
, struct freepool
*fp
,
1476 struct FS_BPENTRY
*qe
, *ne
;
1477 struct sk_buff
*skb
;
1481 fs_dprintk (FS_DEBUG_QUEUE
, "Topping off queue at %x (%d-%d/%d)\n",
1482 fp
->offset
, read_fs (dev
, FP_CNT (fp
->offset
)), fp
->n
,
1484 while (nr_buffers_in_freepool(dev
, fp
) < fp
->nr_buffers
) {
1486 skb
= alloc_skb (fp
->bufsize
, gfp_flags
);
1487 fs_dprintk (FS_DEBUG_ALLOC
, "Alloc rec-skb: %p(%d)\n", skb
, fp
->bufsize
);
1489 ne
= kmalloc (sizeof (struct FS_BPENTRY
), gfp_flags
);
1490 fs_dprintk (FS_DEBUG_ALLOC
, "Alloc rec-d: %p(%Zd)\n", ne
, sizeof (struct FS_BPENTRY
));
1492 fs_dprintk (FS_DEBUG_ALLOC
, "Free rec-skb: %p\n", skb
);
1493 dev_kfree_skb_any (skb
);
1497 fs_dprintk (FS_DEBUG_QUEUE
, "Adding skb %p desc %p -> %p(%p) ",
1498 skb
, ne
, skb
->data
, skb
->head
);
1500 ne
->flags
= FP_FLAGS_EPI
| fp
->bufsize
;
1501 ne
->next
= virt_to_bus (NULL
);
1502 ne
->bsa
= virt_to_bus (skb
->data
);
1503 ne
->aal_bufsize
= fp
->bufsize
;
1508 * FIXME: following code encodes and decodes
1509 * machine pointers (could be 64-bit) into a
1513 qe_tmp
= read_fs (dev
, FP_EA(fp
->offset
));
1514 fs_dprintk (FS_DEBUG_QUEUE
, "link at %x\n", qe_tmp
);
1516 qe
= bus_to_virt ((long) qe_tmp
);
1517 qe
->next
= virt_to_bus(ne
);
1518 qe
->flags
&= ~FP_FLAGS_EPI
;
1520 write_fs (dev
, FP_SA(fp
->offset
), virt_to_bus(ne
));
1522 write_fs (dev
, FP_EA(fp
->offset
), virt_to_bus (ne
));
1523 fp
->n
++; /* XXX Atomic_inc? */
1524 write_fs (dev
, FP_CTU(fp
->offset
), 1);
1527 fs_dprintk (FS_DEBUG_QUEUE
, "Added %d entries. \n", n
);
1530 static void __devexit
free_queue (struct fs_dev
*dev
, struct queue
*txq
)
1534 write_fs (dev
, Q_SA(txq
->offset
), 0);
1535 write_fs (dev
, Q_EA(txq
->offset
), 0);
1536 write_fs (dev
, Q_RP(txq
->offset
), 0);
1537 write_fs (dev
, Q_WP(txq
->offset
), 0);
1538 /* Configuration ? */
1540 fs_dprintk (FS_DEBUG_ALLOC
, "Free queue: %p\n", txq
->sa
);
1546 static void __devexit
free_freepool (struct fs_dev
*dev
, struct freepool
*fp
)
1550 write_fs (dev
, FP_CNF(fp
->offset
), 0);
1551 write_fs (dev
, FP_SA (fp
->offset
), 0);
1552 write_fs (dev
, FP_EA (fp
->offset
), 0);
1553 write_fs (dev
, FP_CNT(fp
->offset
), 0);
1554 write_fs (dev
, FP_CTU(fp
->offset
), 0);
1561 static irqreturn_t
fs_irq (int irq
, void *dev_id
)
1565 struct fs_dev
*dev
= dev_id
;
1567 status
= read_fs (dev
, ISR
);
1573 #ifdef IRQ_RATE_LIMIT
1574 /* Aaargh! I'm ashamed. This costs more lines-of-code than the actual
1575 interrupt routine!. (Well, used to when I wrote that comment) -- REW */
1580 if (lastjif
== jiffies
) {
1581 if (++nintr
> IRQ_RATE_LIMIT
) {
1582 free_irq (dev
->irq
, dev_id
);
1583 printk (KERN_ERR
"fs: Too many interrupts. Turning off interrupt %d.\n",
1592 fs_dprintk (FS_DEBUG_QUEUE
, "in intr: txq %d txrq %d\n",
1593 read_fs (dev
, Q_EA (dev
->hp_txq
.offset
)) -
1594 read_fs (dev
, Q_SA (dev
->hp_txq
.offset
)),
1595 read_fs (dev
, Q_EA (dev
->tx_relq
.offset
)) -
1596 read_fs (dev
, Q_SA (dev
->tx_relq
.offset
)));
1598 /* print the bits in the ISR register. */
1599 if (fs_debug
& FS_DEBUG_IRQ
) {
1600 /* The FS_DEBUG things are unnecessary here. But this way it is
1601 clear for grep that these are debug prints. */
1602 fs_dprintk (FS_DEBUG_IRQ
, "IRQ status:");
1604 if (status
& (1 << i
))
1605 fs_dprintk (FS_DEBUG_IRQ
, " %s", irq_bitname
[i
]);
1606 fs_dprintk (FS_DEBUG_IRQ
, "\n");
1609 if (status
& ISR_RBRQ0_W
) {
1610 fs_dprintk (FS_DEBUG_IRQ
, "Iiiin-coming (0)!!!!\n");
1611 process_incoming (dev
, &dev
->rx_rq
[0]);
1612 /* items mentioned on RBRQ0 are from FP 0 or 1. */
1613 top_off_fp (dev
, &dev
->rx_fp
[0], GFP_ATOMIC
);
1614 top_off_fp (dev
, &dev
->rx_fp
[1], GFP_ATOMIC
);
1617 if (status
& ISR_RBRQ1_W
) {
1618 fs_dprintk (FS_DEBUG_IRQ
, "Iiiin-coming (1)!!!!\n");
1619 process_incoming (dev
, &dev
->rx_rq
[1]);
1620 top_off_fp (dev
, &dev
->rx_fp
[2], GFP_ATOMIC
);
1621 top_off_fp (dev
, &dev
->rx_fp
[3], GFP_ATOMIC
);
1624 if (status
& ISR_RBRQ2_W
) {
1625 fs_dprintk (FS_DEBUG_IRQ
, "Iiiin-coming (2)!!!!\n");
1626 process_incoming (dev
, &dev
->rx_rq
[2]);
1627 top_off_fp (dev
, &dev
->rx_fp
[4], GFP_ATOMIC
);
1628 top_off_fp (dev
, &dev
->rx_fp
[5], GFP_ATOMIC
);
1631 if (status
& ISR_RBRQ3_W
) {
1632 fs_dprintk (FS_DEBUG_IRQ
, "Iiiin-coming (3)!!!!\n");
1633 process_incoming (dev
, &dev
->rx_rq
[3]);
1634 top_off_fp (dev
, &dev
->rx_fp
[6], GFP_ATOMIC
);
1635 top_off_fp (dev
, &dev
->rx_fp
[7], GFP_ATOMIC
);
1638 if (status
& ISR_CSQ_W
) {
1639 fs_dprintk (FS_DEBUG_IRQ
, "Command executed ok!\n");
1640 process_return_queue (dev
, &dev
->st_q
);
1643 if (status
& ISR_TBRQ_W
) {
1644 fs_dprintk (FS_DEBUG_IRQ
, "Data tramsitted!\n");
1645 process_txdone_queue (dev
, &dev
->tx_relq
);
1654 static void fs_poll (unsigned long data
)
1656 struct fs_dev
*dev
= (struct fs_dev
*) data
;
1659 dev
->timer
.expires
= jiffies
+ FS_POLL_FREQ
;
1660 add_timer (&dev
->timer
);
1664 static int __devinit
fs_init (struct fs_dev
*dev
)
1666 struct pci_dev
*pci_dev
;
1671 pci_dev
= dev
->pci_dev
;
1673 printk (KERN_INFO
"found a FireStream %d card, base %16llx, irq%d.\n",
1674 IS_FS50(dev
)?50:155,
1675 (unsigned long long)pci_resource_start(pci_dev
, 0),
1678 if (fs_debug
& FS_DEBUG_INIT
)
1679 my_hd ((unsigned char *) dev
, sizeof (*dev
));
1681 undocumented_pci_fix (pci_dev
);
1683 dev
->hw_base
= pci_resource_start(pci_dev
, 0);
1685 dev
->base
= ioremap(dev
->hw_base
, 0x1000);
1689 write_fs (dev
, SARMODE0
, 0
1690 | (0 * SARMODE0_SHADEN
) /* We don't use shadow registers. */
1691 | (1 * SARMODE0_INTMODE_READCLEAR
)
1692 | (1 * SARMODE0_CWRE
)
1693 | IS_FS50(dev
)?SARMODE0_PRPWT_FS50_5
:
1694 SARMODE0_PRPWT_FS155_3
1695 | (1 * SARMODE0_CALSUP_1
)
1698 | SARMODE0_ABRVCS_32
1699 | SARMODE0_TXVCS_32
):
1702 | SARMODE0_ABRVCS_1k
1703 | SARMODE0_TXVCS_1k
));
1705 /* 10ms * 100 is 1 second. That should be enough, as AN3:9 says it takes
1709 isr
= read_fs (dev
, ISR
);
1711 /* This bit is documented as "RESERVED" */
1712 if (isr
& ISR_INIT_ERR
) {
1713 printk (KERN_ERR
"Error initializing the FS... \n");
1716 if (isr
& ISR_INIT
) {
1717 fs_dprintk (FS_DEBUG_INIT
, "Ha! Initialized OK!\n");
1721 /* Try again after 10ms. */
1726 printk (KERN_ERR
"timeout initializing the FS... \n");
1730 /* XXX fix for fs155 */
1731 dev
->channel_mask
= 0x1f;
1735 write_fs (dev
, SARMODE1
, 0
1736 | (fs_keystream
* SARMODE1_DEFHEC
) /* XXX PHY */
1737 | ((loopback
== 1) * SARMODE1_TSTLP
) /* XXX Loopback mode enable... */
1738 | (1 * SARMODE1_DCRM
)
1739 | (1 * SARMODE1_DCOAM
)
1740 | (0 * SARMODE1_OAMCRC
)
1741 | (0 * SARMODE1_DUMPE
)
1742 | (0 * SARMODE1_GPLEN
)
1743 | (0 * SARMODE1_GNAM
)
1744 | (0 * SARMODE1_GVAS
)
1745 | (0 * SARMODE1_GPAS
)
1746 | (1 * SARMODE1_GPRI
)
1747 | (0 * SARMODE1_PMS
)
1748 | (0 * SARMODE1_GFCR
)
1749 | (1 * SARMODE1_HECM2
)
1750 | (1 * SARMODE1_HECM1
)
1751 | (1 * SARMODE1_HECM0
)
1752 | (1 << 12) /* That's what hang's driver does. Program to 0 */
1753 | (0 * 0xff) /* XXX FS155 */);
1756 /* Cal prescale etc */
1759 write_fs (dev
, TMCONF
, 0x0000000f);
1760 write_fs (dev
, CALPRESCALE
, 0x01010101 * num
);
1761 write_fs (dev
, 0x80, 0x000F00E4);
1764 write_fs (dev
, CELLOSCONF
, 0
1765 | ( 0 * CELLOSCONF_CEN
)
1767 | (0x80 * CELLOSCONF_COBS
)
1768 | (num
* CELLOSCONF_COPK
) /* Changed from 0xff to 0x5a */
1769 | (num
* CELLOSCONF_COST
));/* after a hint from Hang.
1770 * performance jumped 50->70... */
1772 /* Magic value by Hang */
1773 write_fs (dev
, CELLOSCONF_COST
, 0x0B809191);
1775 if (IS_FS50 (dev
)) {
1776 write_fs (dev
, RAS0
, RAS0_DCD_XHLT
);
1777 dev
->atm_dev
->ci_range
.vpi_bits
= 12;
1778 dev
->atm_dev
->ci_range
.vci_bits
= 16;
1779 dev
->nchannels
= FS50_NR_CHANNELS
;
1781 write_fs (dev
, RAS0
, RAS0_DCD_XHLT
1782 | (((1 << FS155_VPI_BITS
) - 1) * RAS0_VPSEL
)
1783 | (((1 << FS155_VCI_BITS
) - 1) * RAS0_VCSEL
));
1784 /* We can chose the split arbitarily. We might be able to
1785 support more. Whatever. This should do for now. */
1786 dev
->atm_dev
->ci_range
.vpi_bits
= FS155_VPI_BITS
;
1787 dev
->atm_dev
->ci_range
.vci_bits
= FS155_VCI_BITS
;
1789 /* Address bits we can't use should be compared to 0. */
1790 write_fs (dev
, RAC
, 0);
1792 /* Manual (AN9, page 6) says ASF1=0 means compare Utopia address
1793 * too. I can't find ASF1 anywhere. Anyway, we AND with just the
1794 * other bits, then compare with 0, which is exactly what we
1796 write_fs (dev
, RAM
, (1 << (28 - FS155_VPI_BITS
- FS155_VCI_BITS
)) - 1);
1797 dev
->nchannels
= FS155_NR_CHANNELS
;
1799 dev
->atm_vccs
= kcalloc (dev
->nchannels
, sizeof (struct atm_vcc
*),
1801 fs_dprintk (FS_DEBUG_ALLOC
, "Alloc atmvccs: %p(%Zd)\n",
1802 dev
->atm_vccs
, dev
->nchannels
* sizeof (struct atm_vcc
*));
1804 if (!dev
->atm_vccs
) {
1805 printk (KERN_WARNING
"Couldn't allocate memory for VCC buffers. Woops!\n");
1806 /* XXX Clean up..... */
1810 dev
->tx_inuse
= kzalloc (dev
->nchannels
/ 8 /* bits/byte */ , GFP_KERNEL
);
1811 fs_dprintk (FS_DEBUG_ALLOC
, "Alloc tx_inuse: %p(%d)\n",
1812 dev
->atm_vccs
, dev
->nchannels
/ 8);
1814 if (!dev
->tx_inuse
) {
1815 printk (KERN_WARNING
"Couldn't allocate memory for tx_inuse bits!\n");
1816 /* XXX Clean up..... */
1819 /* -- RAS1 : FS155 and 50 differ. Default (0) should be OK for both */
1820 /* -- RAS2 : FS50 only: Default is OK. */
1822 /* DMAMODE, default should be OK. -- REW */
1823 write_fs (dev
, DMAMR
, DMAMR_TX_MODE_FULL
);
1825 init_q (dev
, &dev
->hp_txq
, TX_PQ(TXQ_HP
), TXQ_NENTRIES
, 0);
1826 init_q (dev
, &dev
->lp_txq
, TX_PQ(TXQ_LP
), TXQ_NENTRIES
, 0);
1827 init_q (dev
, &dev
->tx_relq
, TXB_RQ
, TXQ_NENTRIES
, 1);
1828 init_q (dev
, &dev
->st_q
, ST_Q
, TXQ_NENTRIES
, 1);
1830 for (i
=0;i
< FS_NR_FREE_POOLS
;i
++) {
1831 init_fp (dev
, &dev
->rx_fp
[i
], RXB_FP(i
),
1832 rx_buf_sizes
[i
], rx_pool_sizes
[i
]);
1833 top_off_fp (dev
, &dev
->rx_fp
[i
], GFP_KERNEL
);
1837 for (i
=0;i
< FS_NR_RX_QUEUES
;i
++)
1838 init_q (dev
, &dev
->rx_rq
[i
], RXB_RQ(i
), RXRQ_NENTRIES
, 1);
1840 dev
->irq
= pci_dev
->irq
;
1841 if (request_irq (dev
->irq
, fs_irq
, IRQF_SHARED
, "firestream", dev
)) {
1842 printk (KERN_WARNING
"couldn't get irq %d for firestream.\n", pci_dev
->irq
);
1843 /* XXX undo all previous stuff... */
1846 fs_dprintk (FS_DEBUG_INIT
, "Grabbed irq %d for dev at %p.\n", dev
->irq
, dev
);
1848 /* We want to be notified of most things. Just the statistics count
1849 overflows are not interesting */
1850 write_fs (dev
, IMR
, 0
1858 write_fs (dev
, SARMODE0
, 0
1859 | (0 * SARMODE0_SHADEN
) /* We don't use shadow registers. */
1860 | (1 * SARMODE0_GINT
)
1861 | (1 * SARMODE0_INTMODE_READCLEAR
)
1862 | (0 * SARMODE0_CWRE
)
1863 | (IS_FS50(dev
)?SARMODE0_PRPWT_FS50_5
:
1864 SARMODE0_PRPWT_FS155_3
)
1865 | (1 * SARMODE0_CALSUP_1
)
1868 | SARMODE0_ABRVCS_32
1869 | SARMODE0_TXVCS_32
):
1872 | SARMODE0_ABRVCS_1k
1873 | SARMODE0_TXVCS_1k
))
1874 | (1 * SARMODE0_RUN
));
1876 init_phy (dev
, PHY_NTC_INIT
);
1878 if (loopback
== 2) {
1879 write_phy (dev
, 0x39, 0x000e);
1883 init_timer (&dev
->timer
);
1884 dev
->timer
.data
= (unsigned long) dev
;
1885 dev
->timer
.function
= fs_poll
;
1886 dev
->timer
.expires
= jiffies
+ FS_POLL_FREQ
;
1887 add_timer (&dev
->timer
);
1890 dev
->atm_dev
->dev_data
= dev
;
1899 static int __devinit
firestream_init_one (struct pci_dev
*pci_dev
,
1900 const struct pci_device_id
*ent
)
1902 struct atm_dev
*atm_dev
;
1903 struct fs_dev
*fs_dev
;
1905 if (pci_enable_device(pci_dev
))
1908 fs_dev
= kzalloc (sizeof (struct fs_dev
), GFP_KERNEL
);
1909 fs_dprintk (FS_DEBUG_ALLOC
, "Alloc fs-dev: %p(%Zd)\n",
1910 fs_dev
, sizeof (struct fs_dev
));
1913 atm_dev
= atm_dev_register("fs", &ops
, -1, NULL
);
1915 goto err_out_free_fs_dev
;
1917 fs_dev
->pci_dev
= pci_dev
;
1918 fs_dev
->atm_dev
= atm_dev
;
1919 fs_dev
->flags
= ent
->driver_data
;
1921 if (fs_init(fs_dev
))
1922 goto err_out_free_atm_dev
;
1924 fs_dev
->next
= fs_boards
;
1928 err_out_free_atm_dev
:
1929 atm_dev_deregister(atm_dev
);
1930 err_out_free_fs_dev
:
1936 static void __devexit
firestream_remove_one (struct pci_dev
*pdev
)
1939 struct fs_dev
*dev
, *nxtdev
;
1941 struct FS_BPENTRY
*fp
, *nxt
;
1946 printk ("hptxq:\n");
1947 for (i
=0;i
<60;i
++) {
1948 printk ("%d: %08x %08x %08x %08x \n",
1949 i
, pq
[qp
].cmd
, pq
[qp
].p0
, pq
[qp
].p1
, pq
[qp
].p2
);
1951 if (qp
>= 60) qp
= 0;
1954 printk ("descriptors:\n");
1955 for (i
=0;i
<60;i
++) {
1956 printk ("%d: %p: %08x %08x %p %p\n",
1957 i
, da
[qd
], dq
[qd
].flags
, dq
[qd
].bsa
, dq
[qd
].skb
, dq
[qd
].dev
);
1959 if (qd
>= 60) qd
= 0;
1963 for (dev
= fs_boards
;dev
!= NULL
;dev
=nxtdev
) {
1964 fs_dprintk (FS_DEBUG_CLEANUP
, "Releasing resources for dev at %p.\n", dev
);
1966 /* XXX Hit all the tx channels too! */
1968 for (i
=0;i
< dev
->nchannels
;i
++) {
1969 if (dev
->atm_vccs
[i
]) {
1970 vcc
= FS_VCC (dev
->atm_vccs
[i
]);
1971 submit_command (dev
, &dev
->hp_txq
,
1972 QE_CMD_TX_PURGE_INH
| QE_CMD_IMM_INQ
| vcc
->channo
, 0,0,0);
1973 submit_command (dev
, &dev
->hp_txq
,
1974 QE_CMD_RX_PURGE_INH
| QE_CMD_IMM_INQ
| vcc
->channo
, 0,0,0);
1979 /* XXX Wait a while for the chip to release all buffers. */
1981 for (i
=0;i
< FS_NR_FREE_POOLS
;i
++) {
1982 for (fp
=bus_to_virt (read_fs (dev
, FP_SA(dev
->rx_fp
[i
].offset
)));
1983 !(fp
->flags
& FP_FLAGS_EPI
);fp
= nxt
) {
1984 fs_dprintk (FS_DEBUG_ALLOC
, "Free rec-skb: %p\n", fp
->skb
);
1985 dev_kfree_skb_any (fp
->skb
);
1986 nxt
= bus_to_virt (fp
->next
);
1987 fs_dprintk (FS_DEBUG_ALLOC
, "Free rec-d: %p\n", fp
);
1990 fs_dprintk (FS_DEBUG_ALLOC
, "Free rec-skb: %p\n", fp
->skb
);
1991 dev_kfree_skb_any (fp
->skb
);
1992 fs_dprintk (FS_DEBUG_ALLOC
, "Free rec-d: %p\n", fp
);
1996 /* Hang the chip in "reset", prevent it clobbering memory that is
2000 fs_dprintk (FS_DEBUG_CLEANUP
, "Freeing irq%d.\n", dev
->irq
);
2001 free_irq (dev
->irq
, dev
);
2002 del_timer (&dev
->timer
);
2004 atm_dev_deregister(dev
->atm_dev
);
2005 free_queue (dev
, &dev
->hp_txq
);
2006 free_queue (dev
, &dev
->lp_txq
);
2007 free_queue (dev
, &dev
->tx_relq
);
2008 free_queue (dev
, &dev
->st_q
);
2010 fs_dprintk (FS_DEBUG_ALLOC
, "Free atmvccs: %p\n", dev
->atm_vccs
);
2011 kfree (dev
->atm_vccs
);
2013 for (i
=0;i
< FS_NR_FREE_POOLS
;i
++)
2014 free_freepool (dev
, &dev
->rx_fp
[i
]);
2016 for (i
=0;i
< FS_NR_RX_QUEUES
;i
++)
2017 free_queue (dev
, &dev
->rx_rq
[i
]);
2020 fs_dprintk (FS_DEBUG_ALLOC
, "Free fs-dev: %p\n", dev
);
2028 static struct pci_device_id firestream_pci_tbl
[] = {
2029 { PCI_VENDOR_ID_FUJITSU_ME
, PCI_DEVICE_ID_FUJITSU_FS50
,
2030 PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, FS_IS50
},
2031 { PCI_VENDOR_ID_FUJITSU_ME
, PCI_DEVICE_ID_FUJITSU_FS155
,
2032 PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, FS_IS155
},
2036 MODULE_DEVICE_TABLE(pci
, firestream_pci_tbl
);
2038 static struct pci_driver firestream_driver
= {
2039 .name
= "firestream",
2040 .id_table
= firestream_pci_tbl
,
2041 .probe
= firestream_init_one
,
2042 .remove
= __devexit_p(firestream_remove_one
),
2045 static int __init
firestream_init_module (void)
2050 error
= pci_register_driver(&firestream_driver
);
2055 static void __exit
firestream_cleanup_module(void)
2057 pci_unregister_driver(&firestream_driver
);
2060 module_init(firestream_init_module
);
2061 module_exit(firestream_cleanup_module
);
2063 MODULE_LICENSE("GPL");