drivers/scsi/ipr.h

   1 /*
   2  * ipr.h -- driver for IBM Power Linux RAID adapters
   3  *
   4  * Written By: Brian King <brking@us.ibm.com>, IBM Corporation
   5  *
   6  * Copyright (C) 2003, 2004 IBM Corporation
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  21  *
  22  * Alan Cox <alan@redhat.com> - Removed several careless u32/dma_addr_t errors
  23  *                              that broke 64bit platforms.
  24  */
  25
  26 #ifndef _IPR_H
  27 #define _IPR_H
  28
  29 #include <linux/types.h>
  30 #include <linux/completion.h>
  31 #include <linux/list.h>
  32 #include <linux/kref.h>
  33 #include <scsi/scsi.h>
  34 #include <scsi/scsi_cmnd.h>
  35
  36 /*
  37  * Literals
  38  */
  39 #define IPR_DRIVER_VERSION "2.1.4"
  40 #define IPR_DRIVER_DATE "(August 2, 2006)"
  41
  42 /*
  43  * IPR_MAX_CMD_PER_LUN: This defines the maximum number of outstanding
  44  *      ops per device for devices not running tagged command queuing.
  45  *      This can be adjusted at runtime through sysfs device attributes.
  46  */
  47 #define IPR_MAX_CMD_PER_LUN                             6
  48 #define IPR_MAX_CMD_PER_ATA_LUN                 1
  49
  50 /*
  51  * IPR_NUM_BASE_CMD_BLKS: This defines the maximum number of
  52  *      ops the mid-layer can send to the adapter.
  53  */
  54 #define IPR_NUM_BASE_CMD_BLKS                           100
  55
  56 #define IPR_SUBS_DEV_ID_2780    0x0264
  57 #define IPR_SUBS_DEV_ID_5702    0x0266
  58 #define IPR_SUBS_DEV_ID_5703    0x0278
  59 #define IPR_SUBS_DEV_ID_572E  0x028D
  60 #define IPR_SUBS_DEV_ID_573E  0x02D3
  61 #define IPR_SUBS_DEV_ID_573D  0x02D4
  62 #define IPR_SUBS_DEV_ID_571A    0x02C0
  63 #define IPR_SUBS_DEV_ID_571B    0x02BE
  64 #define IPR_SUBS_DEV_ID_571E  0x02BF
  65 #define IPR_SUBS_DEV_ID_571F    0x02D5
  66 #define IPR_SUBS_DEV_ID_572A    0x02C1
  67 #define IPR_SUBS_DEV_ID_572B    0x02C2
  68 #define IPR_SUBS_DEV_ID_575B    0x030D
  69
  70 #define IPR_NAME                                "ipr"
  71
  72 /*
  73  * Return codes
  74  */
  75 #define IPR_RC_JOB_CONTINUE             1
  76 #define IPR_RC_JOB_RETURN               2
  77
  78 /*
  79  * IOASCs
  80  */
  81 #define IPR_IOASC_NR_INIT_CMD_REQUIRED          0x02040200
  82 #define IPR_IOASC_SYNC_REQUIRED                 0x023f0000
  83 #define IPR_IOASC_MED_DO_NOT_REALLOC            0x03110C00
  84 #define IPR_IOASC_HW_SEL_TIMEOUT                        0x04050000
  85 #define IPR_IOASC_HW_DEV_BUS_STATUS                     0x04448500
  86 #define IPR_IOASC_IOASC_MASK                    0xFFFFFF00
  87 #define IPR_IOASC_SCSI_STATUS_MASK              0x000000FF
  88 #define IPR_IOASC_IR_INVALID_REQ_TYPE_OR_PKT    0x05240000
  89 #define IPR_IOASC_IR_RESOURCE_HANDLE            0x05250000
  90 #define IPR_IOASC_IR_NO_CMDS_TO_2ND_IOA         0x05258100
  91 #define IPR_IOASA_IR_DUAL_IOA_DISABLED          0x052C8000
  92 #define IPR_IOASC_BUS_WAS_RESET                 0x06290000
  93 #define IPR_IOASC_BUS_WAS_RESET_BY_OTHER                0x06298000
  94 #define IPR_IOASC_ABORTED_CMD_TERM_BY_HOST      0x0B5A0000
  95
  96 #define IPR_FIRST_DRIVER_IOASC                  0x10000000
  97 #define IPR_IOASC_IOA_WAS_RESET                 0x10000001
  98 #define IPR_IOASC_PCI_ACCESS_ERROR                      0x10000002
  99
 100 #define IPR_NUM_LOG_HCAMS                               2
 101 #define IPR_NUM_CFG_CHG_HCAMS                           2
 102 #define IPR_NUM_HCAMS   (IPR_NUM_LOG_HCAMS + IPR_NUM_CFG_CHG_HCAMS)
 103 #define IPR_MAX_NUM_TARGETS_PER_BUS                     256
 104 #define IPR_MAX_NUM_LUNS_PER_TARGET                     256
 105 #define IPR_MAX_NUM_VSET_LUNS_PER_TARGET        8
 106 #define IPR_VSET_BUS                                    0xff
 107 #define IPR_IOA_BUS                                             0xff
 108 #define IPR_IOA_TARGET                                  0xff
 109 #define IPR_IOA_LUN                                             0xff
 110 #define IPR_MAX_NUM_BUSES                               16
 111 #define IPR_MAX_BUS_TO_SCAN                             IPR_MAX_NUM_BUSES
 112
 113 #define IPR_NUM_RESET_RELOAD_RETRIES            3
 114
 115 /* We need resources for HCAMS, IOA reset, IOA bringdown, and ERP */
 116 #define IPR_NUM_INTERNAL_CMD_BLKS       (IPR_NUM_HCAMS + \
 117                                      ((IPR_NUM_RESET_RELOAD_RETRIES + 1) * 2) + 3)
 118
 119 #define IPR_MAX_COMMANDS                IPR_NUM_BASE_CMD_BLKS
 120 #define IPR_NUM_CMD_BLKS                (IPR_NUM_BASE_CMD_BLKS + \
 121                                                 IPR_NUM_INTERNAL_CMD_BLKS)
 122
 123 #define IPR_MAX_PHYSICAL_DEVS                           192
 124
 125 #define IPR_MAX_SGLIST                                  64
 126 #define IPR_IOA_MAX_SECTORS                             32767
 127 #define IPR_VSET_MAX_SECTORS                            512
 128 #define IPR_MAX_CDB_LEN                                 16
 129
 130 #define IPR_DEFAULT_BUS_WIDTH                           16
 131 #define IPR_80MBs_SCSI_RATE             ((80 * 10) / (IPR_DEFAULT_BUS_WIDTH / 8))
 132 #define IPR_U160_SCSI_RATE      ((160 * 10) / (IPR_DEFAULT_BUS_WIDTH / 8))
 133 #define IPR_U320_SCSI_RATE      ((320 * 10) / (IPR_DEFAULT_BUS_WIDTH / 8))
 134 #define IPR_MAX_SCSI_RATE(width) ((320 * 10) / ((width) / 8))
 135
 136 #define IPR_IOA_RES_HANDLE                              0xffffffff
 137 #define IPR_INVALID_RES_HANDLE                  0
 138 #define IPR_IOA_RES_ADDR                                0x00ffffff
 139
 140 /*
 141  * Adapter Commands
 142  */
 143 #define IPR_QUERY_RSRC_STATE                            0xC2
 144 #define IPR_RESET_DEVICE                                0xC3
 145 #define IPR_RESET_TYPE_SELECT                           0x80
 146 #define IPR_LUN_RESET                                   0x40
 147 #define IPR_TARGET_RESET                                        0x20
 148 #define IPR_BUS_RESET                                   0x10
 149 #define IPR_ATA_PHY_RESET                                       0x80
 150 #define IPR_ID_HOST_RR_Q                                0xC4
 151 #define IPR_QUERY_IOA_CONFIG                            0xC5
 152 #define IPR_CANCEL_ALL_REQUESTS                 0xCE
 153 #define IPR_HOST_CONTROLLED_ASYNC                       0xCF
 154 #define IPR_HCAM_CDB_OP_CODE_CONFIG_CHANGE      0x01
 155 #define IPR_HCAM_CDB_OP_CODE_LOG_DATA           0x02
 156 #define IPR_SET_SUPPORTED_DEVICES                       0xFB
 157 #define IPR_IOA_SHUTDOWN                                0xF7
 158 #define IPR_WR_BUF_DOWNLOAD_AND_SAVE                    0x05
 159
 160 /*
 161  * Timeouts
 162  */
 163 #define IPR_SHUTDOWN_TIMEOUT                    (ipr_fastfail ? 60 * HZ : 10 * 60 * HZ)
 164 #define IPR_VSET_RW_TIMEOUT                     (ipr_fastfail ? 30 * HZ : 2 * 60 * HZ)
 165 #define IPR_ABBREV_SHUTDOWN_TIMEOUT             (10 * HZ)
 166 #define IPR_DEVICE_RESET_TIMEOUT                (ipr_fastfail ? 10 * HZ : 30 * HZ)
 167 #define IPR_CANCEL_ALL_TIMEOUT          (ipr_fastfail ? 10 * HZ : 30 * HZ)
 168 #define IPR_ABORT_TASK_TIMEOUT          (ipr_fastfail ? 10 * HZ : 30 * HZ)
 169 #define IPR_INTERNAL_TIMEOUT                    (ipr_fastfail ? 10 * HZ : 30 * HZ)
 170 #define IPR_WRITE_BUFFER_TIMEOUT                (10 * 60 * HZ)
 171 #define IPR_SET_SUP_DEVICE_TIMEOUT              (2 * 60 * HZ)
 172 #define IPR_REQUEST_SENSE_TIMEOUT               (10 * HZ)
 173 #define IPR_OPERATIONAL_TIMEOUT         (5 * 60)
 174 #define IPR_WAIT_FOR_RESET_TIMEOUT              (2 * HZ)
 175 #define IPR_CHECK_FOR_RESET_TIMEOUT             (HZ / 10)
 176 #define IPR_WAIT_FOR_BIST_TIMEOUT               (2 * HZ)
 177 #define IPR_DUMP_TIMEOUT                        (15 * HZ)
 178
 179 /*
 180  * SCSI Literals
 181  */
 182 #define IPR_VENDOR_ID_LEN                       8
 183 #define IPR_PROD_ID_LEN                         16
 184 #define IPR_SERIAL_NUM_LEN                      8
 185
 186 /*
 187  * Hardware literals
 188  */
 189 #define IPR_FMT2_MBX_ADDR_MASK                          0x0fffffff
 190 #define IPR_FMT2_MBX_BAR_SEL_MASK                       0xf0000000
 191 #define IPR_FMT2_MKR_BAR_SEL_SHIFT                      28
 192 #define IPR_GET_FMT2_BAR_SEL(mbx) \
 193 (((mbx) & IPR_FMT2_MBX_BAR_SEL_MASK) >> IPR_FMT2_MKR_BAR_SEL_SHIFT)
 194 #define IPR_SDT_FMT2_BAR0_SEL                           0x0
 195 #define IPR_SDT_FMT2_BAR1_SEL                           0x1
 196 #define IPR_SDT_FMT2_BAR2_SEL                           0x2
 197 #define IPR_SDT_FMT2_BAR3_SEL                           0x3
 198 #define IPR_SDT_FMT2_BAR4_SEL                           0x4
 199 #define IPR_SDT_FMT2_BAR5_SEL                           0x5
 200 #define IPR_SDT_FMT2_EXP_ROM_SEL                        0x8
 201 #define IPR_FMT2_SDT_READY_TO_USE                       0xC4D4E3F2
 202 #define IPR_DOORBELL                                    0x82800000
 203 #define IPR_RUNTIME_RESET                               0x40000000
 204
 205 #define IPR_PCII_IOA_TRANS_TO_OPER                      (0x80000000 >> 0)
 206 #define IPR_PCII_IOARCB_XFER_FAILED                     (0x80000000 >> 3)
 207 #define IPR_PCII_IOA_UNIT_CHECKED                       (0x80000000 >> 4)
 208 #define IPR_PCII_NO_HOST_RRQ                            (0x80000000 >> 5)
 209 #define IPR_PCII_CRITICAL_OPERATION                     (0x80000000 >> 6)
 210 #define IPR_PCII_IO_DEBUG_ACKNOWLEDGE           (0x80000000 >> 7)
 211 #define IPR_PCII_IOARRIN_LOST                           (0x80000000 >> 27)
 212 #define IPR_PCII_MMIO_ERROR                             (0x80000000 >> 28)
 213 #define IPR_PCII_PROC_ERR_STATE                 (0x80000000 >> 29)
 214 #define IPR_PCII_HRRQ_UPDATED                           (0x80000000 >> 30)
 215 #define IPR_PCII_CORE_ISSUED_RST_REQ            (0x80000000 >> 31)
 216
 217 #define IPR_PCII_ERROR_INTERRUPTS \
 218 (IPR_PCII_IOARCB_XFER_FAILED | IPR_PCII_IOA_UNIT_CHECKED | \
 219 IPR_PCII_NO_HOST_RRQ | IPR_PCII_IOARRIN_LOST | IPR_PCII_MMIO_ERROR)
 220
 221 #define IPR_PCII_OPER_INTERRUPTS \
 222 (IPR_PCII_ERROR_INTERRUPTS | IPR_PCII_HRRQ_UPDATED | IPR_PCII_IOA_TRANS_TO_OPER)
 223
 224 #define IPR_UPROCI_RESET_ALERT                  (0x80000000 >> 7)
 225 #define IPR_UPROCI_IO_DEBUG_ALERT                       (0x80000000 >> 9)
 226
 227 #define IPR_LDUMP_MAX_LONG_ACK_DELAY_IN_USEC            200000  /* 200 ms */
 228 #define IPR_LDUMP_MAX_SHORT_ACK_DELAY_IN_USEC           200000  /* 200 ms */
 229
 230 /*
 231  * Dump literals
 232  */
 233 #define IPR_MAX_IOA_DUMP_SIZE                           (4 * 1024 * 1024)
 234 #define IPR_NUM_SDT_ENTRIES                             511
 235 #define IPR_MAX_NUM_DUMP_PAGES  ((IPR_MAX_IOA_DUMP_SIZE / PAGE_SIZE) + 1)
 236
 237 /*
 238  * Misc literals
 239  */
 240 #define IPR_NUM_IOADL_ENTRIES                   IPR_MAX_SGLIST
 241
 242 /*
 243  * Adapter interface types
 244  */
 245
 246 struct ipr_res_addr {
 247         u8 reserved;
 248         u8 bus;
 249         u8 target;
 250         u8 lun;
 251 #define IPR_GET_PHYS_LOC(res_addr) \
 252         (((res_addr).bus << 16) | ((res_addr).target << 8) | (res_addr).lun)
 253 }__attribute__((packed, aligned (4)));
 254
 255 struct ipr_std_inq_vpids {
 256         u8 vendor_id[IPR_VENDOR_ID_LEN];
 257         u8 product_id[IPR_PROD_ID_LEN];
 258 }__attribute__((packed));
 259
 260 struct ipr_vpd {
 261         struct ipr_std_inq_vpids vpids;
 262         u8 sn[IPR_SERIAL_NUM_LEN];
 263 }__attribute__((packed));
 264
 265 struct ipr_ext_vpd {
 266         struct ipr_vpd vpd;
 267         __be32 wwid[2];
 268 }__attribute__((packed));
 269
 270 struct ipr_std_inq_data {
 271         u8 peri_qual_dev_type;
 272 #define IPR_STD_INQ_PERI_QUAL(peri) ((peri) >> 5)
 273 #define IPR_STD_INQ_PERI_DEV_TYPE(peri) ((peri) & 0x1F)
 274
 275         u8 removeable_medium_rsvd;
 276 #define IPR_STD_INQ_REMOVEABLE_MEDIUM 0x80
 277
 278 #define IPR_IS_DASD_DEVICE(std_inq) \
 279 ((IPR_STD_INQ_PERI_DEV_TYPE((std_inq).peri_qual_dev_type) == TYPE_DISK) && \
 280 !(((std_inq).removeable_medium_rsvd) & IPR_STD_INQ_REMOVEABLE_MEDIUM))
 281
 282 #define IPR_IS_SES_DEVICE(std_inq) \
 283 (IPR_STD_INQ_PERI_DEV_TYPE((std_inq).peri_qual_dev_type) == TYPE_ENCLOSURE)
 284
 285         u8 version;
 286         u8 aen_naca_fmt;
 287         u8 additional_len;
 288         u8 sccs_rsvd;
 289         u8 bq_enc_multi;
 290         u8 sync_cmdq_flags;
 291
 292         struct ipr_std_inq_vpids vpids;
 293
 294         u8 ros_rsvd_ram_rsvd[4];
 295
 296         u8 serial_num[IPR_SERIAL_NUM_LEN];
 297 }__attribute__ ((packed));
 298
 299 struct ipr_config_table_entry {
 300         u8 proto;
 301 #define IPR_PROTO_SATA                  0x02
 302 #define IPR_PROTO_SATA_ATAPI            0x03
 303 #define IPR_PROTO_SAS_STP               0x06
 304 #define IPR_PROTO_SAS_STP_ATAPI 0x07
 305         u8 array_id;
 306         u8 flags;
 307 #define IPR_IS_IOA_RESOURCE     0x80
 308 #define IPR_IS_ARRAY_MEMBER 0x20
 309 #define IPR_IS_HOT_SPARE        0x10
 310
 311         u8 rsvd_subtype;
 312 #define IPR_RES_SUBTYPE(res) (((res)->cfgte.rsvd_subtype) & 0x0f)
 313 #define IPR_SUBTYPE_AF_DASD                     0
 314 #define IPR_SUBTYPE_GENERIC_SCSI        1
 315 #define IPR_SUBTYPE_VOLUME_SET          2
 316 #define IPR_SUBTYPE_GENERIC_ATA 4
 317
 318 #define IPR_QUEUEING_MODEL(res) ((((res)->cfgte.flags) & 0x70) >> 4)
 319 #define IPR_QUEUE_FROZEN_MODEL  0
 320 #define IPR_QUEUE_NACA_MODEL            1
 321
 322         struct ipr_res_addr res_addr;
 323         __be32 res_handle;
 324         __be32 reserved4[2];
 325         struct ipr_std_inq_data std_inq_data;
 326 }__attribute__ ((packed, aligned (4)));
 327
 328 struct ipr_config_table_hdr {
 329         u8 num_entries;
 330         u8 flags;
 331 #define IPR_UCODE_DOWNLOAD_REQ  0x10
 332         __be16 reserved;
 333 }__attribute__((packed, aligned (4)));
 334
 335 struct ipr_config_table {
 336         struct ipr_config_table_hdr hdr;
 337         struct ipr_config_table_entry dev[IPR_MAX_PHYSICAL_DEVS];
 338 }__attribute__((packed, aligned (4)));
 339
 340 struct ipr_hostrcb_cfg_ch_not {
 341         struct ipr_config_table_entry cfgte;
 342         u8 reserved[936];
 343 }__attribute__((packed, aligned (4)));
 344
 345 struct ipr_supported_device {
 346         __be16 data_length;
 347         u8 reserved;
 348         u8 num_records;
 349         struct ipr_std_inq_vpids vpids;
 350         u8 reserved2[16];
 351 }__attribute__((packed, aligned (4)));
 352
 353 /* Command packet structure */
 354 struct ipr_cmd_pkt {
 355         __be16 reserved;                /* Reserved by IOA */
 356         u8 request_type;
 357 #define IPR_RQTYPE_SCSICDB              0x00
 358 #define IPR_RQTYPE_IOACMD               0x01
 359 #define IPR_RQTYPE_HCAM                 0x02
 360 #define IPR_RQTYPE_ATA_PASSTHRU 0x04
 361
 362         u8 luntar_luntrn;
 363
 364         u8 flags_hi;
 365 #define IPR_FLAGS_HI_WRITE_NOT_READ             0x80
 366 #define IPR_FLAGS_HI_NO_ULEN_CHK                0x20
 367 #define IPR_FLAGS_HI_SYNC_OVERRIDE              0x10
 368 #define IPR_FLAGS_HI_SYNC_COMPLETE              0x08
 369 #define IPR_FLAGS_HI_NO_LINK_DESC               0x04
 370
 371         u8 flags_lo;
 372 #define IPR_FLAGS_LO_ALIGNED_BFR                0x20
 373 #define IPR_FLAGS_LO_DELAY_AFTER_RST    0x10
 374 #define IPR_FLAGS_LO_UNTAGGED_TASK              0x00
 375 #define IPR_FLAGS_LO_SIMPLE_TASK                0x02
 376 #define IPR_FLAGS_LO_ORDERED_TASK               0x04
 377 #define IPR_FLAGS_LO_HEAD_OF_Q_TASK             0x06
 378 #define IPR_FLAGS_LO_ACA_TASK                   0x08
 379
 380         u8 cdb[16];
 381         __be16 timeout;
 382 }__attribute__ ((packed, aligned(4)));
 383
 384 struct ipr_ioarcb_ata_regs {
 385         u8 flags;
 386 #define IPR_ATA_FLAG_PACKET_CMD                 0x80
 387 #define IPR_ATA_FLAG_XFER_TYPE_DMA                      0x40
 388 #define IPR_ATA_FLAG_STATUS_ON_GOOD_COMPLETION  0x20
 389         u8 reserved[3];
 390
 391         __be16 data;
 392         u8 feature;
 393         u8 nsect;
 394         u8 lbal;
 395         u8 lbam;
 396         u8 lbah;
 397         u8 device;
 398         u8 command;
 399         u8 reserved2[3];
 400         u8 hob_feature;
 401         u8 hob_nsect;
 402         u8 hob_lbal;
 403         u8 hob_lbam;
 404         u8 hob_lbah;
 405         u8 ctl;
 406 }__attribute__ ((packed, aligned(4)));
 407
 408 struct ipr_ioarcb_add_data {
 409         union {
 410                 struct ipr_ioarcb_ata_regs regs;
 411                 __be32 add_cmd_parms[10];
 412         }u;
 413 }__attribute__ ((packed, aligned(4)));
 414
 415 /* IOA Request Control Block    128 bytes  */
 416 struct ipr_ioarcb {
 417         __be32 ioarcb_host_pci_addr;
 418         __be32 reserved;
 419         __be32 res_handle;
 420         __be32 host_response_handle;
 421         __be32 reserved1;
 422         __be32 reserved2;
 423         __be32 reserved3;
 424
 425         __be32 write_data_transfer_length;
 426         __be32 read_data_transfer_length;
 427         __be32 write_ioadl_addr;
 428         __be32 write_ioadl_len;
 429         __be32 read_ioadl_addr;
 430         __be32 read_ioadl_len;
 431
 432         __be32 ioasa_host_pci_addr;
 433         __be16 ioasa_len;
 434         __be16 reserved4;
 435
 436         struct ipr_cmd_pkt cmd_pkt;
 437
 438         __be32 add_cmd_parms_len;
 439         struct ipr_ioarcb_add_data add_data;
 440 }__attribute__((packed, aligned (4)));
 441
 442 struct ipr_ioadl_desc {
 443         __be32 flags_and_data_len;
 444 #define IPR_IOADL_FLAGS_MASK            0xff000000
 445 #define IPR_IOADL_GET_FLAGS(x) (be32_to_cpu(x) & IPR_IOADL_FLAGS_MASK)
 446 #define IPR_IOADL_DATA_LEN_MASK         0x00ffffff
 447 #define IPR_IOADL_GET_DATA_LEN(x) (be32_to_cpu(x) & IPR_IOADL_DATA_LEN_MASK)
 448 #define IPR_IOADL_FLAGS_READ            0x48000000
 449 #define IPR_IOADL_FLAGS_READ_LAST       0x49000000
 450 #define IPR_IOADL_FLAGS_WRITE           0x68000000
 451 #define IPR_IOADL_FLAGS_WRITE_LAST      0x69000000
 452 #define IPR_IOADL_FLAGS_LAST            0x01000000
 453
 454         __be32 address;
 455 }__attribute__((packed, aligned (8)));
 456
 457 struct ipr_ioasa_vset {
 458         __be32 failing_lba_hi;
 459         __be32 failing_lba_lo;
 460         __be32 reserved;
 461 }__attribute__((packed, aligned (4)));
 462
 463 struct ipr_ioasa_af_dasd {
 464         __be32 failing_lba;
 465         __be32 reserved[2];
 466 }__attribute__((packed, aligned (4)));
 467
 468 struct ipr_ioasa_gpdd {
 469         u8 end_state;
 470         u8 bus_phase;
 471         __be16 reserved;
 472         __be32 ioa_data[2];
 473 }__attribute__((packed, aligned (4)));
 474
 475 struct ipr_ioasa_gata {
 476         u8 error;
 477         u8 nsect;               /* Interrupt reason */
 478         u8 lbal;
 479         u8 lbam;
 480         u8 lbah;
 481         u8 device;
 482         u8 status;
 483         u8 alt_status;  /* ATA CTL */
 484         u8 hob_nsect;
 485         u8 hob_lbal;
 486         u8 hob_lbam;
 487         u8 hob_lbah;
 488 }__attribute__((packed, aligned (4)));
 489
 490 struct ipr_auto_sense {
 491         __be16 auto_sense_len;
 492         __be16 ioa_data_len;
 493         __be32 data[SCSI_SENSE_BUFFERSIZE/sizeof(__be32)];
 494 };
 495
 496 struct ipr_ioasa {
 497         __be32 ioasc;
 498 #define IPR_IOASC_SENSE_KEY(ioasc) ((ioasc) >> 24)
 499 #define IPR_IOASC_SENSE_CODE(ioasc) (((ioasc) & 0x00ff0000) >> 16)
 500 #define IPR_IOASC_SENSE_QUAL(ioasc) (((ioasc) & 0x0000ff00) >> 8)
 501 #define IPR_IOASC_SENSE_STATUS(ioasc) ((ioasc) & 0x000000ff)
 502
 503         __be16 ret_stat_len;    /* Length of the returned IOASA */
 504
 505         __be16 avail_stat_len;  /* Total Length of status available. */
 506
 507         __be32 residual_data_len;       /* number of bytes in the host data */
 508         /* buffers that were not used by the IOARCB command. */
 509
 510         __be32 ilid;
 511 #define IPR_NO_ILID                     0
 512 #define IPR_DRIVER_ILID         0xffffffff
 513
 514         __be32 fd_ioasc;
 515
 516         __be32 fd_phys_locator;
 517
 518         __be32 fd_res_handle;
 519
 520         __be32 ioasc_specific;  /* status code specific field */
 521 #define IPR_ADDITIONAL_STATUS_FMT               0x80000000
 522 #define IPR_AUTOSENSE_VALID                     0x40000000
 523 #define IPR_ATA_DEVICE_WAS_RESET                0x20000000
 524 #define IPR_IOASC_SPECIFIC_MASK         0x00ffffff
 525 #define IPR_FIELD_POINTER_VALID         (0x80000000 >> 8)
 526 #define IPR_FIELD_POINTER_MASK          0x0000ffff
 527
 528         union {
 529                 struct ipr_ioasa_vset vset;
 530                 struct ipr_ioasa_af_dasd dasd;
 531                 struct ipr_ioasa_gpdd gpdd;
 532                 struct ipr_ioasa_gata gata;
 533         } u;
 534
 535         struct ipr_auto_sense auto_sense;
 536 }__attribute__((packed, aligned (4)));
 537
 538 struct ipr_mode_parm_hdr {
 539         u8 length;
 540         u8 medium_type;
 541         u8 device_spec_parms;
 542         u8 block_desc_len;
 543 }__attribute__((packed));
 544
 545 struct ipr_mode_pages {
 546         struct ipr_mode_parm_hdr hdr;
 547         u8 data[255 - sizeof(struct ipr_mode_parm_hdr)];
 548 }__attribute__((packed));
 549
 550 struct ipr_mode_page_hdr {
 551         u8 ps_page_code;
 552 #define IPR_MODE_PAGE_PS        0x80
 553 #define IPR_GET_MODE_PAGE_CODE(hdr) ((hdr)->ps_page_code & 0x3F)
 554         u8 page_length;
 555 }__attribute__ ((packed));
 556
 557 struct ipr_dev_bus_entry {
 558         struct ipr_res_addr res_addr;
 559         u8 flags;
 560 #define IPR_SCSI_ATTR_ENABLE_QAS                        0x80
 561 #define IPR_SCSI_ATTR_DISABLE_QAS                       0x40
 562 #define IPR_SCSI_ATTR_QAS_MASK                          0xC0
 563 #define IPR_SCSI_ATTR_ENABLE_TM                         0x20
 564 #define IPR_SCSI_ATTR_NO_TERM_PWR                       0x10
 565 #define IPR_SCSI_ATTR_TM_SUPPORTED                      0x08
 566 #define IPR_SCSI_ATTR_LVD_TO_SE_NOT_ALLOWED     0x04
 567
 568         u8 scsi_id;
 569         u8 bus_width;
 570         u8 extended_reset_delay;
 571 #define IPR_EXTENDED_RESET_DELAY        7
 572
 573         __be32 max_xfer_rate;
 574
 575         u8 spinup_delay;
 576         u8 reserved3;
 577         __be16 reserved4;
 578 }__attribute__((packed, aligned (4)));
 579
 580 struct ipr_mode_page28 {
 581         struct ipr_mode_page_hdr hdr;
 582         u8 num_entries;
 583         u8 entry_length;
 584         struct ipr_dev_bus_entry bus[0];
 585 }__attribute__((packed));
 586
 587 struct ipr_ioa_vpd {
 588         struct ipr_std_inq_data std_inq_data;
 589         u8 ascii_part_num[12];
 590         u8 reserved[40];
 591         u8 ascii_plant_code[4];
 592 }__attribute__((packed));
 593
 594 struct ipr_inquiry_page3 {
 595         u8 peri_qual_dev_type;
 596         u8 page_code;
 597         u8 reserved1;
 598         u8 page_length;
 599         u8 ascii_len;
 600         u8 reserved2[3];
 601         u8 load_id[4];
 602         u8 major_release;
 603         u8 card_type;
 604         u8 minor_release[2];
 605         u8 ptf_number[4];
 606         u8 patch_number[4];
 607 }__attribute__((packed));
 608
 609 #define IPR_INQUIRY_PAGE0_ENTRIES 20
 610 struct ipr_inquiry_page0 {
 611         u8 peri_qual_dev_type;
 612         u8 page_code;
 613         u8 reserved1;
 614         u8 len;
 615         u8 page[IPR_INQUIRY_PAGE0_ENTRIES];
 616 }__attribute__((packed));
 617
 618 struct ipr_hostrcb_device_data_entry {
 619         struct ipr_vpd vpd;
 620         struct ipr_res_addr dev_res_addr;
 621         struct ipr_vpd new_vpd;
 622         struct ipr_vpd ioa_last_with_dev_vpd;
 623         struct ipr_vpd cfc_last_with_dev_vpd;
 624         __be32 ioa_data[5];
 625 }__attribute__((packed, aligned (4)));
 626
 627 struct ipr_hostrcb_device_data_entry_enhanced {
 628         struct ipr_ext_vpd vpd;
 629         u8 ccin[4];
 630         struct ipr_res_addr dev_res_addr;
 631         struct ipr_ext_vpd new_vpd;
 632         u8 new_ccin[4];
 633         struct ipr_ext_vpd ioa_last_with_dev_vpd;
 634         struct ipr_ext_vpd cfc_last_with_dev_vpd;
 635 }__attribute__((packed, aligned (4)));
 636
 637 struct ipr_hostrcb_array_data_entry {
 638         struct ipr_vpd vpd;
 639         struct ipr_res_addr expected_dev_res_addr;
 640         struct ipr_res_addr dev_res_addr;
 641 }__attribute__((packed, aligned (4)));
 642
 643 struct ipr_hostrcb_array_data_entry_enhanced {
 644         struct ipr_ext_vpd vpd;
 645         u8 ccin[4];
 646         struct ipr_res_addr expected_dev_res_addr;
 647         struct ipr_res_addr dev_res_addr;
 648 }__attribute__((packed, aligned (4)));
 649
 650 struct ipr_hostrcb_type_ff_error {
 651         __be32 ioa_data[502];
 652 }__attribute__((packed, aligned (4)));
 653
 654 struct ipr_hostrcb_type_01_error {
 655         __be32 seek_counter;
 656         __be32 read_counter;
 657         u8 sense_data[32];
 658         __be32 ioa_data[236];
 659 }__attribute__((packed, aligned (4)));
 660
 661 struct ipr_hostrcb_type_02_error {
 662         struct ipr_vpd ioa_vpd;
 663         struct ipr_vpd cfc_vpd;
 664         struct ipr_vpd ioa_last_attached_to_cfc_vpd;
 665         struct ipr_vpd cfc_last_attached_to_ioa_vpd;
 666         __be32 ioa_data[3];
 667 }__attribute__((packed, aligned (4)));
 668
 669 struct ipr_hostrcb_type_12_error {
 670         struct ipr_ext_vpd ioa_vpd;
 671         struct ipr_ext_vpd cfc_vpd;
 672         struct ipr_ext_vpd ioa_last_attached_to_cfc_vpd;
 673         struct ipr_ext_vpd cfc_last_attached_to_ioa_vpd;
 674         __be32 ioa_data[3];
 675 }__attribute__((packed, aligned (4)));
 676
 677 struct ipr_hostrcb_type_03_error {
 678         struct ipr_vpd ioa_vpd;
 679         struct ipr_vpd cfc_vpd;
 680         __be32 errors_detected;
 681         __be32 errors_logged;
 682         u8 ioa_data[12];
 683         struct ipr_hostrcb_device_data_entry dev[3];
 684 }__attribute__((packed, aligned (4)));
 685
 686 struct ipr_hostrcb_type_13_error {
 687         struct ipr_ext_vpd ioa_vpd;
 688         struct ipr_ext_vpd cfc_vpd;
 689         __be32 errors_detected;
 690         __be32 errors_logged;
 691         struct ipr_hostrcb_device_data_entry_enhanced dev[3];
 692 }__attribute__((packed, aligned (4)));
 693
 694 struct ipr_hostrcb_type_04_error {
 695         struct ipr_vpd ioa_vpd;
 696         struct ipr_vpd cfc_vpd;
 697         u8 ioa_data[12];
 698         struct ipr_hostrcb_array_data_entry array_member[10];
 699         __be32 exposed_mode_adn;
 700         __be32 array_id;
 701         struct ipr_vpd incomp_dev_vpd;
 702         __be32 ioa_data2;
 703         struct ipr_hostrcb_array_data_entry array_member2[8];
 704         struct ipr_res_addr last_func_vset_res_addr;
 705         u8 vset_serial_num[IPR_SERIAL_NUM_LEN];
 706         u8 protection_level[8];
 707 }__attribute__((packed, aligned (4)));
 708
 709 struct ipr_hostrcb_type_14_error {
 710         struct ipr_ext_vpd ioa_vpd;
 711         struct ipr_ext_vpd cfc_vpd;
 712         __be32 exposed_mode_adn;
 713         __be32 array_id;
 714         struct ipr_res_addr last_func_vset_res_addr;
 715         u8 vset_serial_num[IPR_SERIAL_NUM_LEN];
 716         u8 protection_level[8];
 717         __be32 num_entries;
 718         struct ipr_hostrcb_array_data_entry_enhanced array_member[18];
 719 }__attribute__((packed, aligned (4)));
 720
 721 struct ipr_hostrcb_type_07_error {
 722         u8 failure_reason[64];
 723         struct ipr_vpd vpd;
 724         u32 data[222];
 725 }__attribute__((packed, aligned (4)));
 726
 727 struct ipr_hostrcb_type_17_error {
 728         u8 failure_reason[64];
 729         struct ipr_ext_vpd vpd;
 730         u32 data[476];
 731 }__attribute__((packed, aligned (4)));
 732
 733 struct ipr_hostrcb_error {
 734         __be32 failing_dev_ioasc;
 735         struct ipr_res_addr failing_dev_res_addr;
 736         __be32 failing_dev_res_handle;
 737         __be32 prc;
 738         union {
 739                 struct ipr_hostrcb_type_ff_error type_ff_error;
 740                 struct ipr_hostrcb_type_01_error type_01_error;
 741                 struct ipr_hostrcb_type_02_error type_02_error;
 742                 struct ipr_hostrcb_type_03_error type_03_error;
 743                 struct ipr_hostrcb_type_04_error type_04_error;
 744                 struct ipr_hostrcb_type_07_error type_07_error;
 745                 struct ipr_hostrcb_type_12_error type_12_error;
 746                 struct ipr_hostrcb_type_13_error type_13_error;
 747                 struct ipr_hostrcb_type_14_error type_14_error;
 748                 struct ipr_hostrcb_type_17_error type_17_error;
 749         } u;
 750 }__attribute__((packed, aligned (4)));
 751
 752 struct ipr_hostrcb_raw {
 753         __be32 data[sizeof(struct ipr_hostrcb_error)/sizeof(__be32)];
 754 }__attribute__((packed, aligned (4)));
 755
 756 struct ipr_hcam {
 757         u8 op_code;
 758 #define IPR_HOST_RCB_OP_CODE_CONFIG_CHANGE                      0xE1
 759 #define IPR_HOST_RCB_OP_CODE_LOG_DATA                           0xE2
 760
 761         u8 notify_type;
 762 #define IPR_HOST_RCB_NOTIF_TYPE_EXISTING_CHANGED        0x00
 763 #define IPR_HOST_RCB_NOTIF_TYPE_NEW_ENTRY                       0x01
 764 #define IPR_HOST_RCB_NOTIF_TYPE_REM_ENTRY                       0x02
 765 #define IPR_HOST_RCB_NOTIF_TYPE_ERROR_LOG_ENTRY         0x10
 766 #define IPR_HOST_RCB_NOTIF_TYPE_INFORMATION_ENTRY       0x11
 767
 768         u8 notifications_lost;
 769 #define IPR_HOST_RCB_NO_NOTIFICATIONS_LOST                      0
 770 #define IPR_HOST_RCB_NOTIFICATIONS_LOST                         0x80
 771
 772         u8 flags;
 773 #define IPR_HOSTRCB_INTERNAL_OPER       0x80
 774 #define IPR_HOSTRCB_ERR_RESP_SENT       0x40
 775
 776         u8 overlay_id;
 777 #define IPR_HOST_RCB_OVERLAY_ID_1                               0x01
 778 #define IPR_HOST_RCB_OVERLAY_ID_2                               0x02
 779 #define IPR_HOST_RCB_OVERLAY_ID_3                               0x03
 780 #define IPR_HOST_RCB_OVERLAY_ID_4                               0x04
 781 #define IPR_HOST_RCB_OVERLAY_ID_6                               0x06
 782 #define IPR_HOST_RCB_OVERLAY_ID_7                               0x07
 783 #define IPR_HOST_RCB_OVERLAY_ID_12                              0x12
 784 #define IPR_HOST_RCB_OVERLAY_ID_13                              0x13
 785 #define IPR_HOST_RCB_OVERLAY_ID_14                              0x14
 786 #define IPR_HOST_RCB_OVERLAY_ID_16                              0x16
 787 #define IPR_HOST_RCB_OVERLAY_ID_17                              0x17
 788 #define IPR_HOST_RCB_OVERLAY_ID_DEFAULT                 0xFF
 789
 790         u8 reserved1[3];
 791         __be32 ilid;
 792         __be32 time_since_last_ioa_reset;
 793         __be32 reserved2;
 794         __be32 length;
 795
 796         union {
 797                 struct ipr_hostrcb_error error;
 798                 struct ipr_hostrcb_cfg_ch_not ccn;
 799                 struct ipr_hostrcb_raw raw;
 800         } u;
 801 }__attribute__((packed, aligned (4)));
 802
 803 struct ipr_hostrcb {
 804         struct ipr_hcam hcam;
 805         dma_addr_t hostrcb_dma;
 806         struct list_head queue;
 807 };
 808
 809 /* IPR smart dump table structures */
 810 struct ipr_sdt_entry {
 811         __be32 bar_str_offset;
 812         __be32 end_offset;
 813         u8 entry_byte;
 814         u8 reserved[3];
 815
 816         u8 flags;
 817 #define IPR_SDT_ENDIAN          0x80
 818 #define IPR_SDT_VALID_ENTRY     0x20
 819
 820         u8 resv;
 821         __be16 priority;
 822 }__attribute__((packed, aligned (4)));
 823
 824 struct ipr_sdt_header {
 825         __be32 state;
 826         __be32 num_entries;
 827         __be32 num_entries_used;
 828         __be32 dump_size;
 829 }__attribute__((packed, aligned (4)));
 830
 831 struct ipr_sdt {
 832         struct ipr_sdt_header hdr;
 833         struct ipr_sdt_entry entry[IPR_NUM_SDT_ENTRIES];
 834 }__attribute__((packed, aligned (4)));
 835
 836 struct ipr_uc_sdt {
 837         struct ipr_sdt_header hdr;
 838         struct ipr_sdt_entry entry[1];
 839 }__attribute__((packed, aligned (4)));
 840
 841 /*
 842  * Driver types
 843  */
 844 struct ipr_bus_attributes {
 845         u8 bus;
 846         u8 qas_enabled;
 847         u8 bus_width;
 848         u8 reserved;
 849         u32 max_xfer_rate;
 850 };
 851
 852 struct ipr_resource_entry {
 853         struct ipr_config_table_entry cfgte;
 854         u8 needs_sync_complete:1;
 855         u8 in_erp:1;
 856         u8 add_to_ml:1;
 857         u8 del_from_ml:1;
 858         u8 resetting_device:1;
 859
 860         struct scsi_device *sdev;
 861         struct list_head queue;
 862 };
 863
 864 struct ipr_resource_hdr {
 865         u16 num_entries;
 866         u16 reserved;
 867 };
 868
 869 struct ipr_resource_table {
 870         struct ipr_resource_hdr hdr;
 871         struct ipr_resource_entry dev[IPR_MAX_PHYSICAL_DEVS];
 872 };
 873
 874 struct ipr_misc_cbs {
 875         struct ipr_ioa_vpd ioa_vpd;
 876         struct ipr_inquiry_page0 page0_data;
 877         struct ipr_inquiry_page3 page3_data;
 878         struct ipr_mode_pages mode_pages;
 879         struct ipr_supported_device supp_dev;
 880 };
 881
 882 struct ipr_interrupt_offsets {
 883         unsigned long set_interrupt_mask_reg;
 884         unsigned long clr_interrupt_mask_reg;
 885         unsigned long sense_interrupt_mask_reg;
 886         unsigned long clr_interrupt_reg;
 887
 888         unsigned long sense_interrupt_reg;
 889         unsigned long ioarrin_reg;
 890         unsigned long sense_uproc_interrupt_reg;
 891         unsigned long set_uproc_interrupt_reg;
 892         unsigned long clr_uproc_interrupt_reg;
 893 };
 894
 895 struct ipr_interrupts {
 896         void __iomem *set_interrupt_mask_reg;
 897         void __iomem *clr_interrupt_mask_reg;
 898         void __iomem *sense_interrupt_mask_reg;
 899         void __iomem *clr_interrupt_reg;
 900
 901         void __iomem *sense_interrupt_reg;
 902         void __iomem *ioarrin_reg;
 903         void __iomem *sense_uproc_interrupt_reg;
 904         void __iomem *set_uproc_interrupt_reg;
 905         void __iomem *clr_uproc_interrupt_reg;
 906 };
 907
 908 struct ipr_chip_cfg_t {
 909         u32 mailbox;
 910         u8 cache_line_size;
 911         struct ipr_interrupt_offsets regs;
 912 };
 913
 914 struct ipr_chip_t {
 915         u16 vendor;
 916         u16 device;
 917         const struct ipr_chip_cfg_t *cfg;
 918 };
 919
 920 enum ipr_shutdown_type {
 921         IPR_SHUTDOWN_NORMAL = 0x00,
 922         IPR_SHUTDOWN_PREPARE_FOR_NORMAL = 0x40,
 923         IPR_SHUTDOWN_ABBREV = 0x80,
 924         IPR_SHUTDOWN_NONE = 0x100
 925 };
 926
 927 struct ipr_trace_entry {
 928         u32 time;
 929
 930         u8 op_code;
 931         u8 type;
 932 #define IPR_TRACE_START                 0x00
 933 #define IPR_TRACE_FINISH                0xff
 934         u16 cmd_index;
 935
 936         __be32 res_handle;
 937         union {
 938                 u32 ioasc;
 939                 u32 add_data;
 940                 u32 res_addr;
 941         } u;
 942 };
 943
 944 struct ipr_sglist {
 945         u32 order;
 946         u32 num_sg;
 947         u32 num_dma_sg;
 948         u32 buffer_len;
 949         struct scatterlist scatterlist[1];
 950 };
 951
 952 enum ipr_sdt_state {
 953         INACTIVE,
 954         WAIT_FOR_DUMP,
 955         GET_DUMP,
 956         ABORT_DUMP,
 957         DUMP_OBTAINED
 958 };
 959
 960 enum ipr_cache_state {
 961         CACHE_NONE,
 962         CACHE_DISABLED,
 963         CACHE_ENABLED,
 964         CACHE_INVALID
 965 };
 966
 967 /* Per-controller data */
 968 struct ipr_ioa_cfg {
 969         char eye_catcher[8];
 970 #define IPR_EYECATCHER                  "iprcfg"
 971
 972         struct list_head queue;
 973
 974         u8 allow_interrupts:1;
 975         u8 in_reset_reload:1;
 976         u8 in_ioa_bringdown:1;
 977         u8 ioa_unit_checked:1;
 978         u8 ioa_is_dead:1;
 979         u8 dump_taken:1;
 980         u8 allow_cmds:1;
 981         u8 allow_ml_add_del:1;
 982         u8 needs_hard_reset:1;
 983
 984         enum ipr_cache_state cache_state;
 985         u16 type; /* CCIN of the card */
 986
 987         u8 log_level;
 988 #define IPR_MAX_LOG_LEVEL                       4
 989 #define IPR_DEFAULT_LOG_LEVEL           2
 990
 991 #define IPR_NUM_TRACE_INDEX_BITS        8
 992 #define IPR_NUM_TRACE_ENTRIES           (1 << IPR_NUM_TRACE_INDEX_BITS)
 993 #define IPR_TRACE_SIZE  (sizeof(struct ipr_trace_entry) * IPR_NUM_TRACE_ENTRIES)
 994         char trace_start[8];
 995 #define IPR_TRACE_START_LABEL                   "trace"
 996         struct ipr_trace_entry *trace;
 997         u32 trace_index:IPR_NUM_TRACE_INDEX_BITS;
 998
 999         /*
1000          * Queue for free command blocks
1001          */
1002         char ipr_free_label[8];
1003 #define IPR_FREEQ_LABEL                 "free-q"
1004         struct list_head free_q;
1005
1006         /*
1007          * Queue for command blocks outstanding to the adapter
1008          */
1009         char ipr_pending_label[8];
1010 #define IPR_PENDQ_LABEL                 "pend-q"
1011         struct list_head pending_q;
1012
1013         char cfg_table_start[8];
1014 #define IPR_CFG_TBL_START               "cfg"
1015         struct ipr_config_table *cfg_table;
1016         dma_addr_t cfg_table_dma;
1017
1018         char resource_table_label[8];
1019 #define IPR_RES_TABLE_LABEL             "res_tbl"
1020         struct ipr_resource_entry *res_entries;
1021         struct list_head free_res_q;
1022         struct list_head used_res_q;
1023
1024         char ipr_hcam_label[8];
1025 #define IPR_HCAM_LABEL                  "hcams"
1026         struct ipr_hostrcb *hostrcb[IPR_NUM_HCAMS];
1027         dma_addr_t hostrcb_dma[IPR_NUM_HCAMS];
1028         struct list_head hostrcb_free_q;
1029         struct list_head hostrcb_pending_q;
1030
1031         __be32 *host_rrq;
1032         dma_addr_t host_rrq_dma;
1033 #define IPR_HRRQ_REQ_RESP_HANDLE_MASK   0xfffffffc
1034 #define IPR_HRRQ_RESP_BIT_SET                   0x00000002
1035 #define IPR_HRRQ_TOGGLE_BIT                             0x00000001
1036 #define IPR_HRRQ_REQ_RESP_HANDLE_SHIFT  2
1037         volatile __be32 *hrrq_start;
1038         volatile __be32 *hrrq_end;
1039         volatile __be32 *hrrq_curr;
1040         volatile u32 toggle_bit;
1041
1042         struct ipr_bus_attributes bus_attr[IPR_MAX_NUM_BUSES];
1043
1044         const struct ipr_chip_cfg_t *chip_cfg;
1045
1046         void __iomem *hdw_dma_regs;     /* iomapped PCI memory space */
1047         unsigned long hdw_dma_regs_pci; /* raw PCI memory space */
1048         void __iomem *ioa_mailbox;
1049         struct ipr_interrupts regs;
1050
1051         u16 saved_pcix_cmd_reg;
1052         u16 reset_retries;
1053
1054         u32 errors_logged;
1055         u32 doorbell;
1056
1057         struct Scsi_Host *host;
1058         struct pci_dev *pdev;
1059         struct ipr_sglist *ucode_sglist;
1060         u8 saved_mode_page_len;
1061
1062         struct work_struct work_q;
1063
1064         wait_queue_head_t reset_wait_q;
1065
1066         struct ipr_dump *dump;
1067         enum ipr_sdt_state sdt_state;
1068
1069         struct ipr_misc_cbs *vpd_cbs;
1070         dma_addr_t vpd_cbs_dma;
1071
1072         struct pci_pool *ipr_cmd_pool;
1073
1074         struct ipr_cmnd *reset_cmd;
1075
1076         char ipr_cmd_label[8];
1077 #define IPR_CMD_LABEL           "ipr_cmnd"
1078         struct ipr_cmnd *ipr_cmnd_list[IPR_NUM_CMD_BLKS];
1079         u32 ipr_cmnd_list_dma[IPR_NUM_CMD_BLKS];
1080 };
1081
1082 struct ipr_cmnd {
1083         struct ipr_ioarcb ioarcb;
1084         struct ipr_ioasa ioasa;
1085         struct ipr_ioadl_desc ioadl[IPR_NUM_IOADL_ENTRIES];
1086         struct list_head queue;
1087         struct scsi_cmnd *scsi_cmd;
1088         struct completion completion;
1089         struct timer_list timer;
1090         void (*done) (struct ipr_cmnd *);
1091         int (*job_step) (struct ipr_cmnd *);
1092         int (*job_step_failed) (struct ipr_cmnd *);
1093         u16 cmd_index;
1094         u8 sense_buffer[SCSI_SENSE_BUFFERSIZE];
1095         dma_addr_t sense_buffer_dma;
1096         unsigned short dma_use_sg;
1097         dma_addr_t dma_handle;
1098         struct ipr_cmnd *sibling;
1099         union {
1100                 enum ipr_shutdown_type shutdown_type;
1101                 struct ipr_hostrcb *hostrcb;
1102                 unsigned long time_left;
1103                 unsigned long scratch;
1104                 struct ipr_resource_entry *res;
1105                 struct scsi_device *sdev;
1106         } u;
1107
1108         struct ipr_ioa_cfg *ioa_cfg;
1109 };
1110
1111 struct ipr_ses_table_entry {
1112         char product_id[17];
1113         char compare_product_id_byte[17];
1114         u32 max_bus_speed_limit;        /* MB/sec limit for this backplane */
1115 };
1116
1117 struct ipr_dump_header {
1118         u32 eye_catcher;
1119 #define IPR_DUMP_EYE_CATCHER            0xC5D4E3F2
1120         u32 len;
1121         u32 num_entries;
1122         u32 first_entry_offset;
1123         u32 status;
1124 #define IPR_DUMP_STATUS_SUCCESS                 0
1125 #define IPR_DUMP_STATUS_QUAL_SUCCESS            2
1126 #define IPR_DUMP_STATUS_FAILED                  0xffffffff
1127         u32 os;
1128 #define IPR_DUMP_OS_LINUX       0x4C4E5558
1129         u32 driver_name;
1130 #define IPR_DUMP_DRIVER_NAME    0x49505232
1131 }__attribute__((packed, aligned (4)));
1132
1133 struct ipr_dump_entry_header {
1134         u32 eye_catcher;
1135 #define IPR_DUMP_EYE_CATCHER            0xC5D4E3F2
1136         u32 len;
1137         u32 num_elems;
1138         u32 offset;
1139         u32 data_type;
1140 #define IPR_DUMP_DATA_TYPE_ASCII        0x41534349
1141 #define IPR_DUMP_DATA_TYPE_BINARY       0x42494E41
1142         u32 id;
1143 #define IPR_DUMP_IOA_DUMP_ID            0x494F4131
1144 #define IPR_DUMP_LOCATION_ID            0x4C4F4341
1145 #define IPR_DUMP_TRACE_ID               0x54524143
1146 #define IPR_DUMP_DRIVER_VERSION_ID      0x44525652
1147 #define IPR_DUMP_DRIVER_TYPE_ID 0x54595045
1148 #define IPR_DUMP_IOA_CTRL_BLK           0x494F4342
1149 #define IPR_DUMP_PEND_OPS               0x414F5053
1150         u32 status;
1151 }__attribute__((packed, aligned (4)));
1152
1153 struct ipr_dump_location_entry {
1154         struct ipr_dump_entry_header hdr;
1155         u8 location[BUS_ID_SIZE];
1156 }__attribute__((packed));
1157
1158 struct ipr_dump_trace_entry {
1159         struct ipr_dump_entry_header hdr;
1160         u32 trace[IPR_TRACE_SIZE / sizeof(u32)];
1161 }__attribute__((packed, aligned (4)));
1162
1163 struct ipr_dump_version_entry {
1164         struct ipr_dump_entry_header hdr;
1165         u8 version[sizeof(IPR_DRIVER_VERSION)];
1166 };
1167
1168 struct ipr_dump_ioa_type_entry {
1169         struct ipr_dump_entry_header hdr;
1170         u32 type;
1171         u32 fw_version;
1172 };
1173
1174 struct ipr_driver_dump {
1175         struct ipr_dump_header hdr;
1176         struct ipr_dump_version_entry version_entry;
1177         struct ipr_dump_location_entry location_entry;
1178         struct ipr_dump_ioa_type_entry ioa_type_entry;
1179         struct ipr_dump_trace_entry trace_entry;
1180 }__attribute__((packed));
1181
1182 struct ipr_ioa_dump {
1183         struct ipr_dump_entry_header hdr;
1184         struct ipr_sdt sdt;
1185         __be32 *ioa_data[IPR_MAX_NUM_DUMP_PAGES];
1186         u32 reserved;
1187         u32 next_page_index;
1188         u32 page_offset;
1189         u32 format;
1190 #define IPR_SDT_FMT2            2
1191 #define IPR_SDT_UNKNOWN         3
1192 }__attribute__((packed, aligned (4)));
1193
1194 struct ipr_dump {
1195         struct kref kref;
1196         struct ipr_ioa_cfg *ioa_cfg;
1197         struct ipr_driver_dump driver_dump;
1198         struct ipr_ioa_dump ioa_dump;
1199 };
1200
1201 struct ipr_error_table_t {
1202         u32 ioasc;
1203         int log_ioasa;
1204         int log_hcam;
1205         char *error;
1206 };
1207
1208 struct ipr_software_inq_lid_info {
1209         __be32 load_id;
1210         __be32 timestamp[3];
1211 }__attribute__((packed, aligned (4)));
1212
1213 struct ipr_ucode_image_header {
1214         __be32 header_length;
1215         __be32 lid_table_offset;
1216         u8 major_release;
1217         u8 card_type;
1218         u8 minor_release[2];
1219         u8 reserved[20];
1220         char eyecatcher[16];
1221         __be32 num_lids;
1222         struct ipr_software_inq_lid_info lid[1];
1223 }__attribute__((packed, aligned (4)));
1224
1225 /*
1226  * Macros
1227  */
1228 #define IPR_DBG_CMD(CMD) if (ipr_debug) { CMD; }
1229
1230 #ifdef CONFIG_SCSI_IPR_TRACE
1231 #define ipr_create_trace_file(kobj, attr) sysfs_create_bin_file(kobj, attr)
1232 #define ipr_remove_trace_file(kobj, attr) sysfs_remove_bin_file(kobj, attr)
1233 #else
1234 #define ipr_create_trace_file(kobj, attr) 0
1235 #define ipr_remove_trace_file(kobj, attr) do { } while(0)
1236 #endif
1237
1238 #ifdef CONFIG_SCSI_IPR_DUMP
1239 #define ipr_create_dump_file(kobj, attr) sysfs_create_bin_file(kobj, attr)
1240 #define ipr_remove_dump_file(kobj, attr) sysfs_remove_bin_file(kobj, attr)
1241 #else
1242 #define ipr_create_dump_file(kobj, attr) 0
1243 #define ipr_remove_dump_file(kobj, attr) do { } while(0)
1244 #endif
1245
1246 /*
1247  * Error logging macros
1248  */
1249 #define ipr_err(...) printk(KERN_ERR IPR_NAME ": "__VA_ARGS__)
1250 #define ipr_info(...) printk(KERN_INFO IPR_NAME ": "__VA_ARGS__)
1251 #define ipr_dbg(...) IPR_DBG_CMD(printk(KERN_INFO IPR_NAME ": "__VA_ARGS__))
1252
1253 #define ipr_ra_printk(level, ioa_cfg, ra, fmt, ...) \
1254         printk(level IPR_NAME ": %d:%d:%d:%d: " fmt, (ioa_cfg)->host->host_no, \
1255                 (ra).bus, (ra).target, (ra).lun, ##__VA_ARGS__)
1256
1257 #define ipr_ra_err(ioa_cfg, ra, fmt, ...) \
1258         ipr_ra_printk(KERN_ERR, ioa_cfg, ra, fmt, ##__VA_ARGS__)
1259
1260 #define ipr_res_err(ioa_cfg, res, fmt, ...) \
1261         ipr_ra_err(ioa_cfg, (res)->cfgte.res_addr, fmt, ##__VA_ARGS__)
1262
1263 #define ipr_phys_res_err(ioa_cfg, res, fmt, ...)                        \
1264 {                                                                       \
1265         if ((res).bus >= IPR_MAX_NUM_BUSES) {                           \
1266                 ipr_err(fmt": unknown\n", ##__VA_ARGS__);               \
1267         } else {                                                        \
1268                 ipr_err(fmt": %d:%d:%d:%d\n",                           \
1269                         ##__VA_ARGS__, (ioa_cfg)->host->host_no,        \
1270                         (res).bus, (res).target, (res).lun);            \
1271         }                                                               \
1272 }
1273
1274 #define ipr_trace ipr_dbg("%s: %s: Line: %d\n",\
1275         __FILE__, __FUNCTION__, __LINE__)
1276
1277 #define ENTER IPR_DBG_CMD(printk(KERN_INFO IPR_NAME": Entering %s\n", __FUNCTION__))
1278 #define LEAVE IPR_DBG_CMD(printk(KERN_INFO IPR_NAME": Leaving %s\n", __FUNCTION__))
1279
1280 #define ipr_err_separator \
1281 ipr_err("----------------------------------------------------------\n")
1282
1283
1284 /*
1285  * Inlines
1286  */
1287
1288 /**
1289  * ipr_is_ioa_resource - Determine if a resource is the IOA
1290  * @res:        resource entry struct
1291  *
1292  * Return value:
1293  *      1 if IOA / 0 if not IOA
1294  **/
1295 static inline int ipr_is_ioa_resource(struct ipr_resource_entry *res)
1296 {
1297         return (res->cfgte.flags & IPR_IS_IOA_RESOURCE) ? 1 : 0;
1298 }
1299
1300 /**
1301  * ipr_is_af_dasd_device - Determine if a resource is an AF DASD
1302  * @res:        resource entry struct
1303  *
1304  * Return value:
1305  *      1 if AF DASD / 0 if not AF DASD
1306  **/
1307 static inline int ipr_is_af_dasd_device(struct ipr_resource_entry *res)
1308 {
1309         if (IPR_IS_DASD_DEVICE(res->cfgte.std_inq_data) &&
1310             !ipr_is_ioa_resource(res) &&
1311             IPR_RES_SUBTYPE(res) == IPR_SUBTYPE_AF_DASD)
1312                 return 1;
1313         else
1314                 return 0;
1315 }
1316
1317 /**
1318  * ipr_is_vset_device - Determine if a resource is a VSET
1319  * @res:        resource entry struct
1320  *
1321  * Return value:
1322  *      1 if VSET / 0 if not VSET
1323  **/
1324 static inline int ipr_is_vset_device(struct ipr_resource_entry *res)
1325 {
1326         if (IPR_IS_DASD_DEVICE(res->cfgte.std_inq_data) &&
1327             !ipr_is_ioa_resource(res) &&
1328             IPR_RES_SUBTYPE(res) == IPR_SUBTYPE_VOLUME_SET)
1329                 return 1;
1330         else
1331                 return 0;
1332 }
1333
1334 /**
1335  * ipr_is_gscsi - Determine if a resource is a generic scsi resource
1336  * @res:        resource entry struct
1337  *
1338  * Return value:
1339  *      1 if GSCSI / 0 if not GSCSI
1340  **/
1341 static inline int ipr_is_gscsi(struct ipr_resource_entry *res)
1342 {
1343         if (!ipr_is_ioa_resource(res) &&
1344             IPR_RES_SUBTYPE(res) == IPR_SUBTYPE_GENERIC_SCSI)
1345                 return 1;
1346         else
1347                 return 0;
1348 }
1349
1350 /**
1351  * ipr_is_scsi_disk - Determine if a resource is a SCSI disk
1352  * @res:        resource entry struct
1353  *
1354  * Return value:
1355  *      1 if SCSI disk / 0 if not SCSI disk
1356  **/
1357 static inline int ipr_is_scsi_disk(struct ipr_resource_entry *res)
1358 {
1359         if (ipr_is_af_dasd_device(res) ||
1360             (ipr_is_gscsi(res) && IPR_IS_DASD_DEVICE(res->cfgte.std_inq_data)))
1361                 return 1;
1362         else
1363                 return 0;
1364 }
1365
1366 /**
1367  * ipr_is_gata - Determine if a resource is a generic ATA resource
1368  * @res:        resource entry struct
1369  *
1370  * Return value:
1371  *      1 if GATA / 0 if not GATA
1372  **/
1373 static inline int ipr_is_gata(struct ipr_resource_entry *res)
1374 {
1375         if (!ipr_is_ioa_resource(res) &&
1376             IPR_RES_SUBTYPE(res) == IPR_SUBTYPE_GENERIC_ATA)
1377                 return 1;
1378         else
1379                 return 0;
1380 }
1381
1382 /**
1383  * ipr_is_naca_model - Determine if a resource is using NACA queueing model
1384  * @res:        resource entry struct
1385  *
1386  * Return value:
1387  *      1 if NACA queueing model / 0 if not NACA queueing model
1388  **/
1389 static inline int ipr_is_naca_model(struct ipr_resource_entry *res)
1390 {
1391         if (ipr_is_gscsi(res) && IPR_QUEUEING_MODEL(res) == IPR_QUEUE_NACA_MODEL)
1392                 return 1;
1393         return 0;
1394 }
1395
1396 /**
1397  * ipr_is_device - Determine if resource address is that of a device
1398  * @res_addr:   resource address struct
1399  *
1400  * Return value:
1401  *      1 if AF / 0 if not AF
1402  **/
1403 static inline int ipr_is_device(struct ipr_res_addr *res_addr)
1404 {
1405         if ((res_addr->bus < IPR_MAX_NUM_BUSES) &&
1406             (res_addr->target < (IPR_MAX_NUM_TARGETS_PER_BUS - 1)))
1407                 return 1;
1408
1409         return 0;
1410 }
1411
1412 /**
1413  * ipr_sdt_is_fmt2 - Determine if a SDT address is in format 2
1414  * @sdt_word:   SDT address
1415  *
1416  * Return value:
1417  *      1 if format 2 / 0 if not
1418  **/
1419 static inline int ipr_sdt_is_fmt2(u32 sdt_word)
1420 {
1421         u32 bar_sel = IPR_GET_FMT2_BAR_SEL(sdt_word);
1422
1423         switch (bar_sel) {
1424         case IPR_SDT_FMT2_BAR0_SEL:
1425         case IPR_SDT_FMT2_BAR1_SEL:
1426         case IPR_SDT_FMT2_BAR2_SEL:
1427         case IPR_SDT_FMT2_BAR3_SEL:
1428         case IPR_SDT_FMT2_BAR4_SEL:
1429         case IPR_SDT_FMT2_BAR5_SEL:
1430         case IPR_SDT_FMT2_EXP_ROM_SEL:
1431                 return 1;
1432         };
1433
1434         return 0;
1435 }
1436
1437 #endif