2 * Driver for CS4231 sound chips found on Sparcs.
3 * Copyright (C) 2002 David S. Miller <davem@redhat.com>
5 * Based entirely upon drivers/sbus/audio/cs4231.c which is:
6 * Copyright (C) 1996, 1997, 1998 Derrick J Brashear (shadow@andrew.cmu.edu)
7 * and also sound/isa/cs423x/cs4231_lib.c which is:
8 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
11 #include <linux/module.h>
12 #include <linux/kernel.h>
13 #include <linux/slab.h>
14 #include <linux/delay.h>
15 #include <linux/init.h>
16 #include <linux/interrupt.h>
17 #include <linux/moduleparam.h>
18 #include <linux/irq.h>
22 #include <sound/driver.h>
23 #include <sound/core.h>
24 #include <sound/pcm.h>
25 #include <sound/info.h>
26 #include <sound/control.h>
27 #include <sound/timer.h>
28 #include <sound/initval.h>
29 #include <sound/pcm_params.h>
36 #if defined(CONFIG_PCI) && defined(CONFIG_SPARC64)
38 #include <linux/pci.h>
42 static int index
[SNDRV_CARDS
] = SNDRV_DEFAULT_IDX
; /* Index 0-MAX */
43 static char *id
[SNDRV_CARDS
] = SNDRV_DEFAULT_STR
; /* ID for this card */
44 /* Enable this card */
45 static int enable
[SNDRV_CARDS
] = SNDRV_DEFAULT_ENABLE_PNP
;
47 module_param_array(index
, int, NULL
, 0444);
48 MODULE_PARM_DESC(index
, "Index value for Sun CS4231 soundcard.");
49 module_param_array(id
, charp
, NULL
, 0444);
50 MODULE_PARM_DESC(id
, "ID string for Sun CS4231 soundcard.");
51 module_param_array(enable
, bool, NULL
, 0444);
52 MODULE_PARM_DESC(enable
, "Enable Sun CS4231 soundcard.");
53 MODULE_AUTHOR("Jaroslav Kysela, Derrick J. Brashear and David S. Miller");
54 MODULE_DESCRIPTION("Sun CS4231");
55 MODULE_LICENSE("GPL");
56 MODULE_SUPPORTED_DEVICE("{{Sun,CS4231}}");
59 struct sbus_dma_info
{
60 spinlock_t lock
; /* DMA access lock */
67 struct cs4231_dma_control
{
68 void (*prepare
)(struct cs4231_dma_control
*dma_cont
,
70 void (*enable
)(struct cs4231_dma_control
*dma_cont
, int on
);
71 int (*request
)(struct cs4231_dma_control
*dma_cont
,
72 dma_addr_t bus_addr
, size_t len
);
73 unsigned int (*address
)(struct cs4231_dma_control
*dma_cont
);
74 void (*preallocate
)(struct snd_cs4231
*chip
,
77 struct ebus_dma_info ebus_info
;
80 struct sbus_dma_info sbus_info
;
85 spinlock_t lock
; /* registers access lock */
88 struct cs4231_dma_control p_dma
;
89 struct cs4231_dma_control c_dma
;
92 #define CS4231_FLAG_EBUS 0x00000001
93 #define CS4231_FLAG_PLAYBACK 0x00000002
94 #define CS4231_FLAG_CAPTURE 0x00000004
96 struct snd_card
*card
;
98 struct snd_pcm_substream
*playback_substream
;
99 unsigned int p_periods_sent
;
100 struct snd_pcm_substream
*capture_substream
;
101 unsigned int c_periods_sent
;
102 struct snd_timer
*timer
;
105 #define CS4231_MODE_NONE 0x0000
106 #define CS4231_MODE_PLAY 0x0001
107 #define CS4231_MODE_RECORD 0x0002
108 #define CS4231_MODE_TIMER 0x0004
109 #define CS4231_MODE_OPEN (CS4231_MODE_PLAY | CS4231_MODE_RECORD | \
112 unsigned char image
[32]; /* registers image */
115 struct mutex mce_mutex
; /* mutex for mce register */
116 struct mutex open_mutex
; /* mutex for ALSA open/close */
120 struct sbus_dev
*sdev
;
123 struct pci_dev
*pdev
;
127 unsigned int regs_size
;
128 struct snd_cs4231
*next
;
131 static struct snd_cs4231
*cs4231_list
;
133 /* Eventually we can use sound/isa/cs423x/cs4231_lib.c directly, but for
139 #define CS4231P(chip, x) ((chip)->port + c_d_c_CS4231##x)
141 /* XXX offsets are different than PC ISA chips... */
142 #define c_d_c_CS4231REGSEL 0x0
143 #define c_d_c_CS4231REG 0x4
144 #define c_d_c_CS4231STATUS 0x8
145 #define c_d_c_CS4231PIO 0xc
147 /* codec registers */
149 #define CS4231_LEFT_INPUT 0x00 /* left input control */
150 #define CS4231_RIGHT_INPUT 0x01 /* right input control */
151 #define CS4231_AUX1_LEFT_INPUT 0x02 /* left AUX1 input control */
152 #define CS4231_AUX1_RIGHT_INPUT 0x03 /* right AUX1 input control */
153 #define CS4231_AUX2_LEFT_INPUT 0x04 /* left AUX2 input control */
154 #define CS4231_AUX2_RIGHT_INPUT 0x05 /* right AUX2 input control */
155 #define CS4231_LEFT_OUTPUT 0x06 /* left output control register */
156 #define CS4231_RIGHT_OUTPUT 0x07 /* right output control register */
157 #define CS4231_PLAYBK_FORMAT 0x08 /* clock and data format - playback - bits 7-0 MCE */
158 #define CS4231_IFACE_CTRL 0x09 /* interface control - bits 7-2 MCE */
159 #define CS4231_PIN_CTRL 0x0a /* pin control */
160 #define CS4231_TEST_INIT 0x0b /* test and initialization */
161 #define CS4231_MISC_INFO 0x0c /* miscellaneaous information */
162 #define CS4231_LOOPBACK 0x0d /* loopback control */
163 #define CS4231_PLY_UPR_CNT 0x0e /* playback upper base count */
164 #define CS4231_PLY_LWR_CNT 0x0f /* playback lower base count */
165 #define CS4231_ALT_FEATURE_1 0x10 /* alternate #1 feature enable */
166 #define CS4231_ALT_FEATURE_2 0x11 /* alternate #2 feature enable */
167 #define CS4231_LEFT_LINE_IN 0x12 /* left line input control */
168 #define CS4231_RIGHT_LINE_IN 0x13 /* right line input control */
169 #define CS4231_TIMER_LOW 0x14 /* timer low byte */
170 #define CS4231_TIMER_HIGH 0x15 /* timer high byte */
171 #define CS4231_LEFT_MIC_INPUT 0x16 /* left MIC input control register (InterWave only) */
172 #define CS4231_RIGHT_MIC_INPUT 0x17 /* right MIC input control register (InterWave only) */
173 #define CS4236_EXT_REG 0x17 /* extended register access */
174 #define CS4231_IRQ_STATUS 0x18 /* irq status register */
175 #define CS4231_LINE_LEFT_OUTPUT 0x19 /* left line output control register (InterWave only) */
176 #define CS4231_VERSION 0x19 /* CS4231(A) - version values */
177 #define CS4231_MONO_CTRL 0x1a /* mono input/output control */
178 #define CS4231_LINE_RIGHT_OUTPUT 0x1b /* right line output control register (InterWave only) */
179 #define CS4235_LEFT_MASTER 0x1b /* left master output control */
180 #define CS4231_REC_FORMAT 0x1c /* clock and data format - record - bits 7-0 MCE */
181 #define CS4231_PLY_VAR_FREQ 0x1d /* playback variable frequency */
182 #define CS4235_RIGHT_MASTER 0x1d /* right master output control */
183 #define CS4231_REC_UPR_CNT 0x1e /* record upper count */
184 #define CS4231_REC_LWR_CNT 0x1f /* record lower count */
186 /* definitions for codec register select port - CODECP( REGSEL ) */
188 #define CS4231_INIT 0x80 /* CODEC is initializing */
189 #define CS4231_MCE 0x40 /* mode change enable */
190 #define CS4231_TRD 0x20 /* transfer request disable */
192 /* definitions for codec status register - CODECP( STATUS ) */
194 #define CS4231_GLOBALIRQ 0x01 /* IRQ is active */
196 /* definitions for codec irq status - CS4231_IRQ_STATUS */
198 #define CS4231_PLAYBACK_IRQ 0x10
199 #define CS4231_RECORD_IRQ 0x20
200 #define CS4231_TIMER_IRQ 0x40
201 #define CS4231_ALL_IRQS 0x70
202 #define CS4231_REC_UNDERRUN 0x08
203 #define CS4231_REC_OVERRUN 0x04
204 #define CS4231_PLY_OVERRUN 0x02
205 #define CS4231_PLY_UNDERRUN 0x01
207 /* definitions for CS4231_LEFT_INPUT and CS4231_RIGHT_INPUT registers */
209 #define CS4231_ENABLE_MIC_GAIN 0x20
211 #define CS4231_MIXS_LINE 0x00
212 #define CS4231_MIXS_AUX1 0x40
213 #define CS4231_MIXS_MIC 0x80
214 #define CS4231_MIXS_ALL 0xc0
216 /* definitions for clock and data format register - CS4231_PLAYBK_FORMAT */
218 #define CS4231_LINEAR_8 0x00 /* 8-bit unsigned data */
219 #define CS4231_ALAW_8 0x60 /* 8-bit A-law companded */
220 #define CS4231_ULAW_8 0x20 /* 8-bit U-law companded */
221 #define CS4231_LINEAR_16 0x40 /* 16-bit twos complement data - little endian */
222 #define CS4231_LINEAR_16_BIG 0xc0 /* 16-bit twos complement data - big endian */
223 #define CS4231_ADPCM_16 0xa0 /* 16-bit ADPCM */
224 #define CS4231_STEREO 0x10 /* stereo mode */
225 /* bits 3-1 define frequency divisor */
226 #define CS4231_XTAL1 0x00 /* 24.576 crystal */
227 #define CS4231_XTAL2 0x01 /* 16.9344 crystal */
229 /* definitions for interface control register - CS4231_IFACE_CTRL */
231 #define CS4231_RECORD_PIO 0x80 /* record PIO enable */
232 #define CS4231_PLAYBACK_PIO 0x40 /* playback PIO enable */
233 #define CS4231_CALIB_MODE 0x18 /* calibration mode bits */
234 #define CS4231_AUTOCALIB 0x08 /* auto calibrate */
235 #define CS4231_SINGLE_DMA 0x04 /* use single DMA channel */
236 #define CS4231_RECORD_ENABLE 0x02 /* record enable */
237 #define CS4231_PLAYBACK_ENABLE 0x01 /* playback enable */
239 /* definitions for pin control register - CS4231_PIN_CTRL */
241 #define CS4231_IRQ_ENABLE 0x02 /* enable IRQ */
242 #define CS4231_XCTL1 0x40 /* external control #1 */
243 #define CS4231_XCTL0 0x80 /* external control #0 */
245 /* definitions for test and init register - CS4231_TEST_INIT */
247 #define CS4231_CALIB_IN_PROGRESS 0x20 /* auto calibrate in progress */
248 #define CS4231_DMA_REQUEST 0x10 /* DMA request in progress */
250 /* definitions for misc control register - CS4231_MISC_INFO */
252 #define CS4231_MODE2 0x40 /* MODE 2 */
253 #define CS4231_IW_MODE3 0x6c /* MODE 3 - InterWave enhanced mode */
254 #define CS4231_4236_MODE3 0xe0 /* MODE 3 - CS4236+ enhanced mode */
256 /* definitions for alternate feature 1 register - CS4231_ALT_FEATURE_1 */
258 #define CS4231_DACZ 0x01 /* zero DAC when underrun */
259 #define CS4231_TIMER_ENABLE 0x40 /* codec timer enable */
260 #define CS4231_OLB 0x80 /* output level bit */
262 /* SBUS DMA register defines. */
264 #define APCCSR 0x10UL /* APC DMA CSR */
265 #define APCCVA 0x20UL /* APC Capture DMA Address */
266 #define APCCC 0x24UL /* APC Capture Count */
267 #define APCCNVA 0x28UL /* APC Capture DMA Next Address */
268 #define APCCNC 0x2cUL /* APC Capture Next Count */
269 #define APCPVA 0x30UL /* APC Play DMA Address */
270 #define APCPC 0x34UL /* APC Play Count */
271 #define APCPNVA 0x38UL /* APC Play DMA Next Address */
272 #define APCPNC 0x3cUL /* APC Play Next Count */
274 /* Defines for SBUS DMA-routines */
276 #define APCVA 0x0UL /* APC DMA Address */
277 #define APCC 0x4UL /* APC Count */
278 #define APCNVA 0x8UL /* APC DMA Next Address */
279 #define APCNC 0xcUL /* APC Next Count */
280 #define APC_PLAY 0x30UL /* Play registers start at 0x30 */
281 #define APC_RECORD 0x20UL /* Record registers start at 0x20 */
285 #define APC_INT_PENDING 0x800000 /* Interrupt Pending */
286 #define APC_PLAY_INT 0x400000 /* Playback interrupt */
287 #define APC_CAPT_INT 0x200000 /* Capture interrupt */
288 #define APC_GENL_INT 0x100000 /* General interrupt */
289 #define APC_XINT_ENA 0x80000 /* General ext int. enable */
290 #define APC_XINT_PLAY 0x40000 /* Playback ext intr */
291 #define APC_XINT_CAPT 0x20000 /* Capture ext intr */
292 #define APC_XINT_GENL 0x10000 /* Error ext intr */
293 #define APC_XINT_EMPT 0x8000 /* Pipe empty interrupt (0 write to pva) */
294 #define APC_XINT_PEMP 0x4000 /* Play pipe empty (pva and pnva not set) */
295 #define APC_XINT_PNVA 0x2000 /* Playback NVA dirty */
296 #define APC_XINT_PENA 0x1000 /* play pipe empty Int enable */
297 #define APC_XINT_COVF 0x800 /* Cap data dropped on floor */
298 #define APC_XINT_CNVA 0x400 /* Capture NVA dirty */
299 #define APC_XINT_CEMP 0x200 /* Capture pipe empty (cva and cnva not set) */
300 #define APC_XINT_CENA 0x100 /* Cap. pipe empty int enable */
301 #define APC_PPAUSE 0x80 /* Pause the play DMA */
302 #define APC_CPAUSE 0x40 /* Pause the capture DMA */
303 #define APC_CDC_RESET 0x20 /* CODEC RESET */
304 #define APC_PDMA_READY 0x08 /* Play DMA Go */
305 #define APC_CDMA_READY 0x04 /* Capture DMA Go */
306 #define APC_CHIP_RESET 0x01 /* Reset the chip */
308 /* EBUS DMA register offsets */
310 #define EBDMA_CSR 0x00UL /* Control/Status */
311 #define EBDMA_ADDR 0x04UL /* DMA Address */
312 #define EBDMA_COUNT 0x08UL /* DMA Count */
318 static unsigned char freq_bits
[14] = {
319 /* 5510 */ 0x00 | CS4231_XTAL2
,
320 /* 6620 */ 0x0E | CS4231_XTAL2
,
321 /* 8000 */ 0x00 | CS4231_XTAL1
,
322 /* 9600 */ 0x0E | CS4231_XTAL1
,
323 /* 11025 */ 0x02 | CS4231_XTAL2
,
324 /* 16000 */ 0x02 | CS4231_XTAL1
,
325 /* 18900 */ 0x04 | CS4231_XTAL2
,
326 /* 22050 */ 0x06 | CS4231_XTAL2
,
327 /* 27042 */ 0x04 | CS4231_XTAL1
,
328 /* 32000 */ 0x06 | CS4231_XTAL1
,
329 /* 33075 */ 0x0C | CS4231_XTAL2
,
330 /* 37800 */ 0x08 | CS4231_XTAL2
,
331 /* 44100 */ 0x0A | CS4231_XTAL2
,
332 /* 48000 */ 0x0C | CS4231_XTAL1
335 static unsigned int rates
[14] = {
336 5510, 6620, 8000, 9600, 11025, 16000, 18900, 22050,
337 27042, 32000, 33075, 37800, 44100, 48000
340 static struct snd_pcm_hw_constraint_list hw_constraints_rates
= {
341 .count
= ARRAY_SIZE(rates
),
345 static int snd_cs4231_xrate(struct snd_pcm_runtime
*runtime
)
347 return snd_pcm_hw_constraint_list(runtime
, 0,
348 SNDRV_PCM_HW_PARAM_RATE
,
349 &hw_constraints_rates
);
352 static unsigned char snd_cs4231_original_image
[32] =
354 0x00, /* 00/00 - lic */
355 0x00, /* 01/01 - ric */
356 0x9f, /* 02/02 - la1ic */
357 0x9f, /* 03/03 - ra1ic */
358 0x9f, /* 04/04 - la2ic */
359 0x9f, /* 05/05 - ra2ic */
360 0xbf, /* 06/06 - loc */
361 0xbf, /* 07/07 - roc */
362 0x20, /* 08/08 - pdfr */
363 CS4231_AUTOCALIB
, /* 09/09 - ic */
364 0x00, /* 0a/10 - pc */
365 0x00, /* 0b/11 - ti */
366 CS4231_MODE2
, /* 0c/12 - mi */
367 0x00, /* 0d/13 - lbc */
368 0x00, /* 0e/14 - pbru */
369 0x00, /* 0f/15 - pbrl */
370 0x80, /* 10/16 - afei */
371 0x01, /* 11/17 - afeii */
372 0x9f, /* 12/18 - llic */
373 0x9f, /* 13/19 - rlic */
374 0x00, /* 14/20 - tlb */
375 0x00, /* 15/21 - thb */
376 0x00, /* 16/22 - la3mic/reserved */
377 0x00, /* 17/23 - ra3mic/reserved */
378 0x00, /* 18/24 - afs */
379 0x00, /* 19/25 - lamoc/version */
380 0x00, /* 1a/26 - mioc */
381 0x00, /* 1b/27 - ramoc/reserved */
382 0x20, /* 1c/28 - cdfr */
383 0x00, /* 1d/29 - res4 */
384 0x00, /* 1e/30 - cbru */
385 0x00, /* 1f/31 - cbrl */
388 static u8
__cs4231_readb(struct snd_cs4231
*cp
, void __iomem
*reg_addr
)
391 if (cp
->flags
& CS4231_FLAG_EBUS
)
392 return readb(reg_addr
);
396 return sbus_readb(reg_addr
);
400 static void __cs4231_writeb(struct snd_cs4231
*cp
, u8 val
,
401 void __iomem
*reg_addr
)
404 if (cp
->flags
& CS4231_FLAG_EBUS
)
405 return writeb(val
, reg_addr
);
409 return sbus_writeb(val
, reg_addr
);
414 * Basic I/O functions
417 static void snd_cs4231_ready(struct snd_cs4231
*chip
)
422 timeout
> 0 && (__cs4231_readb(chip
, CS4231P(chip
, REGSEL
)) & CS4231_INIT
);
427 static void snd_cs4231_dout(struct snd_cs4231
*chip
, unsigned char reg
,
430 snd_cs4231_ready(chip
);
431 #ifdef CONFIG_SND_DEBUG
432 if (__cs4231_readb(chip
, CS4231P(chip
, REGSEL
)) & CS4231_INIT
)
433 snd_printdd("out: auto calibration time out - reg = 0x%x, "
437 __cs4231_writeb(chip
, chip
->mce_bit
| reg
, CS4231P(chip
, REGSEL
));
439 __cs4231_writeb(chip
, value
, CS4231P(chip
, REG
));
443 static inline void snd_cs4231_outm(struct snd_cs4231
*chip
, unsigned char reg
,
444 unsigned char mask
, unsigned char value
)
446 unsigned char tmp
= (chip
->image
[reg
] & mask
) | value
;
448 chip
->image
[reg
] = tmp
;
449 if (!chip
->calibrate_mute
)
450 snd_cs4231_dout(chip
, reg
, tmp
);
453 static void snd_cs4231_out(struct snd_cs4231
*chip
, unsigned char reg
,
456 snd_cs4231_dout(chip
, reg
, value
);
457 chip
->image
[reg
] = value
;
461 static unsigned char snd_cs4231_in(struct snd_cs4231
*chip
, unsigned char reg
)
463 snd_cs4231_ready(chip
);
464 #ifdef CONFIG_SND_DEBUG
465 if (__cs4231_readb(chip
, CS4231P(chip
, REGSEL
)) & CS4231_INIT
)
466 snd_printdd("in: auto calibration time out - reg = 0x%x\n",
469 __cs4231_writeb(chip
, chip
->mce_bit
| reg
, CS4231P(chip
, REGSEL
));
471 return __cs4231_readb(chip
, CS4231P(chip
, REG
));
475 * CS4231 detection / MCE routines
478 static void snd_cs4231_busy_wait(struct snd_cs4231
*chip
)
482 /* looks like this sequence is proper for CS4231A chip (GUS MAX) */
483 for (timeout
= 5; timeout
> 0; timeout
--)
484 __cs4231_readb(chip
, CS4231P(chip
, REGSEL
));
486 /* end of cleanup sequence */
488 timeout
> 0 && (__cs4231_readb(chip
, CS4231P(chip
, REGSEL
)) & CS4231_INIT
);
493 static void snd_cs4231_mce_up(struct snd_cs4231
*chip
)
498 spin_lock_irqsave(&chip
->lock
, flags
);
499 snd_cs4231_ready(chip
);
500 #ifdef CONFIG_SND_DEBUG
501 if (__cs4231_readb(chip
, CS4231P(chip
, REGSEL
)) & CS4231_INIT
)
502 snd_printdd("mce_up - auto calibration time out (0)\n");
504 chip
->mce_bit
|= CS4231_MCE
;
505 timeout
= __cs4231_readb(chip
, CS4231P(chip
, REGSEL
));
507 snd_printdd("mce_up [%p]: serious init problem - "
508 "codec still busy\n",
510 if (!(timeout
& CS4231_MCE
))
511 __cs4231_writeb(chip
, chip
->mce_bit
| (timeout
& 0x1f), CS4231P(chip
, REGSEL
));
512 spin_unlock_irqrestore(&chip
->lock
, flags
);
515 static void snd_cs4231_mce_down(struct snd_cs4231
*chip
)
520 spin_lock_irqsave(&chip
->lock
, flags
);
521 snd_cs4231_busy_wait(chip
);
522 #ifdef CONFIG_SND_DEBUG
523 if (__cs4231_readb(chip
, CS4231P(chip
, REGSEL
)) & CS4231_INIT
)
524 snd_printdd("mce_down [%p] - auto calibration time out (0)\n", CS4231P(chip
, REGSEL
));
526 chip
->mce_bit
&= ~CS4231_MCE
;
527 timeout
= __cs4231_readb(chip
, CS4231P(chip
, REGSEL
));
528 __cs4231_writeb(chip
, chip
->mce_bit
| (timeout
& 0x1f), CS4231P(chip
, REGSEL
));
530 snd_printdd("mce_down [%p]: serious init problem - "
531 "codec still busy\n",
533 if ((timeout
& CS4231_MCE
) == 0) {
534 spin_unlock_irqrestore(&chip
->lock
, flags
);
537 snd_cs4231_busy_wait(chip
);
539 /* calibration process */
541 snd_cs4231_ready(chip
);
542 snd_cs4231_ready(chip
);
543 timeout
= snd_cs4231_in(chip
, CS4231_TEST_INIT
);
544 if ((timeout
& CS4231_CALIB_IN_PROGRESS
) == 0) {
545 snd_printd("cs4231_mce_down - auto calibration time out (1)\n");
546 spin_unlock_irqrestore(&chip
->lock
, flags
);
550 /* in 10ms increments, check condition, up to 250ms */
552 while (snd_cs4231_in(chip
, CS4231_TEST_INIT
) &
553 CS4231_CALIB_IN_PROGRESS
) {
555 spin_unlock_irqrestore(&chip
->lock
, flags
);
557 snd_printk("mce_down - "
558 "auto calibration time out (2)\n");
562 spin_lock_irqsave(&chip
->lock
, flags
);
565 /* in 10ms increments, check condition, up to 100ms */
567 while (__cs4231_readb(chip
, CS4231P(chip
, REGSEL
)) & CS4231_INIT
) {
568 spin_unlock_irqrestore(&chip
->lock
, flags
);
570 snd_printk("mce_down - "
571 "auto calibration time out (3)\n");
575 spin_lock_irqsave(&chip
->lock
, flags
);
577 spin_unlock_irqrestore(&chip
->lock
, flags
);
580 static void snd_cs4231_advance_dma(struct cs4231_dma_control
*dma_cont
,
581 struct snd_pcm_substream
*substream
,
582 unsigned int *periods_sent
)
584 struct snd_pcm_runtime
*runtime
= substream
->runtime
;
587 unsigned int period_size
= snd_pcm_lib_period_bytes(substream
);
588 unsigned int offset
= period_size
* (*periods_sent
);
590 BUG_ON(period_size
>= (1 << 24));
592 if (dma_cont
->request(dma_cont
,
593 runtime
->dma_addr
+ offset
, period_size
))
595 (*periods_sent
) = ((*periods_sent
) + 1) % runtime
->periods
;
599 static void cs4231_dma_trigger(struct snd_pcm_substream
*substream
,
600 unsigned int what
, int on
)
602 struct snd_cs4231
*chip
= snd_pcm_substream_chip(substream
);
603 struct cs4231_dma_control
*dma_cont
;
605 if (what
& CS4231_PLAYBACK_ENABLE
) {
606 dma_cont
= &chip
->p_dma
;
608 dma_cont
->prepare(dma_cont
, 0);
609 dma_cont
->enable(dma_cont
, 1);
610 snd_cs4231_advance_dma(dma_cont
,
611 chip
->playback_substream
,
612 &chip
->p_periods_sent
);
614 dma_cont
->enable(dma_cont
, 0);
617 if (what
& CS4231_RECORD_ENABLE
) {
618 dma_cont
= &chip
->c_dma
;
620 dma_cont
->prepare(dma_cont
, 1);
621 dma_cont
->enable(dma_cont
, 1);
622 snd_cs4231_advance_dma(dma_cont
,
623 chip
->capture_substream
,
624 &chip
->c_periods_sent
);
626 dma_cont
->enable(dma_cont
, 0);
631 static int snd_cs4231_trigger(struct snd_pcm_substream
*substream
, int cmd
)
633 struct snd_cs4231
*chip
= snd_pcm_substream_chip(substream
);
637 case SNDRV_PCM_TRIGGER_START
:
638 case SNDRV_PCM_TRIGGER_STOP
:
640 unsigned int what
= 0;
641 struct snd_pcm_substream
*s
;
644 snd_pcm_group_for_each_entry(s
, substream
) {
645 if (s
== chip
->playback_substream
) {
646 what
|= CS4231_PLAYBACK_ENABLE
;
647 snd_pcm_trigger_done(s
, substream
);
648 } else if (s
== chip
->capture_substream
) {
649 what
|= CS4231_RECORD_ENABLE
;
650 snd_pcm_trigger_done(s
, substream
);
654 spin_lock_irqsave(&chip
->lock
, flags
);
655 if (cmd
== SNDRV_PCM_TRIGGER_START
) {
656 cs4231_dma_trigger(substream
, what
, 1);
657 chip
->image
[CS4231_IFACE_CTRL
] |= what
;
659 cs4231_dma_trigger(substream
, what
, 0);
660 chip
->image
[CS4231_IFACE_CTRL
] &= ~what
;
662 snd_cs4231_out(chip
, CS4231_IFACE_CTRL
,
663 chip
->image
[CS4231_IFACE_CTRL
]);
664 spin_unlock_irqrestore(&chip
->lock
, flags
);
679 static unsigned char snd_cs4231_get_rate(unsigned int rate
)
683 for (i
= 0; i
< 14; i
++)
684 if (rate
== rates
[i
])
687 return freq_bits
[13];
690 static unsigned char snd_cs4231_get_format(struct snd_cs4231
*chip
, int format
,
693 unsigned char rformat
;
695 rformat
= CS4231_LINEAR_8
;
697 case SNDRV_PCM_FORMAT_MU_LAW
:
698 rformat
= CS4231_ULAW_8
;
700 case SNDRV_PCM_FORMAT_A_LAW
:
701 rformat
= CS4231_ALAW_8
;
703 case SNDRV_PCM_FORMAT_S16_LE
:
704 rformat
= CS4231_LINEAR_16
;
706 case SNDRV_PCM_FORMAT_S16_BE
:
707 rformat
= CS4231_LINEAR_16_BIG
;
709 case SNDRV_PCM_FORMAT_IMA_ADPCM
:
710 rformat
= CS4231_ADPCM_16
;
714 rformat
|= CS4231_STEREO
;
718 static void snd_cs4231_calibrate_mute(struct snd_cs4231
*chip
, int mute
)
723 spin_lock_irqsave(&chip
->lock
, flags
);
724 if (chip
->calibrate_mute
== mute
) {
725 spin_unlock_irqrestore(&chip
->lock
, flags
);
729 snd_cs4231_dout(chip
, CS4231_LEFT_INPUT
,
730 chip
->image
[CS4231_LEFT_INPUT
]);
731 snd_cs4231_dout(chip
, CS4231_RIGHT_INPUT
,
732 chip
->image
[CS4231_RIGHT_INPUT
]);
733 snd_cs4231_dout(chip
, CS4231_LOOPBACK
,
734 chip
->image
[CS4231_LOOPBACK
]);
736 snd_cs4231_dout(chip
, CS4231_AUX1_LEFT_INPUT
,
737 mute
? 0x80 : chip
->image
[CS4231_AUX1_LEFT_INPUT
]);
738 snd_cs4231_dout(chip
, CS4231_AUX1_RIGHT_INPUT
,
739 mute
? 0x80 : chip
->image
[CS4231_AUX1_RIGHT_INPUT
]);
740 snd_cs4231_dout(chip
, CS4231_AUX2_LEFT_INPUT
,
741 mute
? 0x80 : chip
->image
[CS4231_AUX2_LEFT_INPUT
]);
742 snd_cs4231_dout(chip
, CS4231_AUX2_RIGHT_INPUT
,
743 mute
? 0x80 : chip
->image
[CS4231_AUX2_RIGHT_INPUT
]);
744 snd_cs4231_dout(chip
, CS4231_LEFT_OUTPUT
,
745 mute
? 0x80 : chip
->image
[CS4231_LEFT_OUTPUT
]);
746 snd_cs4231_dout(chip
, CS4231_RIGHT_OUTPUT
,
747 mute
? 0x80 : chip
->image
[CS4231_RIGHT_OUTPUT
]);
748 snd_cs4231_dout(chip
, CS4231_LEFT_LINE_IN
,
749 mute
? 0x80 : chip
->image
[CS4231_LEFT_LINE_IN
]);
750 snd_cs4231_dout(chip
, CS4231_RIGHT_LINE_IN
,
751 mute
? 0x80 : chip
->image
[CS4231_RIGHT_LINE_IN
]);
752 snd_cs4231_dout(chip
, CS4231_MONO_CTRL
,
753 mute
? 0xc0 : chip
->image
[CS4231_MONO_CTRL
]);
754 chip
->calibrate_mute
= mute
;
755 spin_unlock_irqrestore(&chip
->lock
, flags
);
758 static void snd_cs4231_playback_format(struct snd_cs4231
*chip
,
759 struct snd_pcm_hw_params
*params
,
764 mutex_lock(&chip
->mce_mutex
);
765 snd_cs4231_calibrate_mute(chip
, 1);
767 snd_cs4231_mce_up(chip
);
769 spin_lock_irqsave(&chip
->lock
, flags
);
770 snd_cs4231_out(chip
, CS4231_PLAYBK_FORMAT
,
771 (chip
->image
[CS4231_IFACE_CTRL
] & CS4231_RECORD_ENABLE
) ?
772 (pdfr
& 0xf0) | (chip
->image
[CS4231_REC_FORMAT
] & 0x0f) :
774 spin_unlock_irqrestore(&chip
->lock
, flags
);
776 snd_cs4231_mce_down(chip
);
778 snd_cs4231_calibrate_mute(chip
, 0);
779 mutex_unlock(&chip
->mce_mutex
);
782 static void snd_cs4231_capture_format(struct snd_cs4231
*chip
,
783 struct snd_pcm_hw_params
*params
,
788 mutex_lock(&chip
->mce_mutex
);
789 snd_cs4231_calibrate_mute(chip
, 1);
791 snd_cs4231_mce_up(chip
);
793 spin_lock_irqsave(&chip
->lock
, flags
);
794 if (!(chip
->image
[CS4231_IFACE_CTRL
] & CS4231_PLAYBACK_ENABLE
)) {
795 snd_cs4231_out(chip
, CS4231_PLAYBK_FORMAT
,
796 ((chip
->image
[CS4231_PLAYBK_FORMAT
]) & 0xf0) |
798 spin_unlock_irqrestore(&chip
->lock
, flags
);
799 snd_cs4231_mce_down(chip
);
800 snd_cs4231_mce_up(chip
);
801 spin_lock_irqsave(&chip
->lock
, flags
);
803 snd_cs4231_out(chip
, CS4231_REC_FORMAT
, cdfr
);
804 spin_unlock_irqrestore(&chip
->lock
, flags
);
806 snd_cs4231_mce_down(chip
);
808 snd_cs4231_calibrate_mute(chip
, 0);
809 mutex_unlock(&chip
->mce_mutex
);
816 static unsigned long snd_cs4231_timer_resolution(struct snd_timer
*timer
)
818 struct snd_cs4231
*chip
= snd_timer_chip(timer
);
820 return chip
->image
[CS4231_PLAYBK_FORMAT
] & 1 ? 9969 : 9920;
823 static int snd_cs4231_timer_start(struct snd_timer
*timer
)
827 struct snd_cs4231
*chip
= snd_timer_chip(timer
);
829 spin_lock_irqsave(&chip
->lock
, flags
);
830 ticks
= timer
->sticks
;
831 if ((chip
->image
[CS4231_ALT_FEATURE_1
] & CS4231_TIMER_ENABLE
) == 0 ||
832 (unsigned char)(ticks
>> 8) != chip
->image
[CS4231_TIMER_HIGH
] ||
833 (unsigned char)ticks
!= chip
->image
[CS4231_TIMER_LOW
]) {
834 snd_cs4231_out(chip
, CS4231_TIMER_HIGH
,
835 chip
->image
[CS4231_TIMER_HIGH
] =
836 (unsigned char) (ticks
>> 8));
837 snd_cs4231_out(chip
, CS4231_TIMER_LOW
,
838 chip
->image
[CS4231_TIMER_LOW
] =
839 (unsigned char) ticks
);
840 snd_cs4231_out(chip
, CS4231_ALT_FEATURE_1
,
841 chip
->image
[CS4231_ALT_FEATURE_1
] |
842 CS4231_TIMER_ENABLE
);
844 spin_unlock_irqrestore(&chip
->lock
, flags
);
849 static int snd_cs4231_timer_stop(struct snd_timer
*timer
)
852 struct snd_cs4231
*chip
= snd_timer_chip(timer
);
854 spin_lock_irqsave(&chip
->lock
, flags
);
855 chip
->image
[CS4231_ALT_FEATURE_1
] &= ~CS4231_TIMER_ENABLE
;
856 snd_cs4231_out(chip
, CS4231_ALT_FEATURE_1
,
857 chip
->image
[CS4231_ALT_FEATURE_1
]);
858 spin_unlock_irqrestore(&chip
->lock
, flags
);
863 static void __init
snd_cs4231_init(struct snd_cs4231
*chip
)
867 snd_cs4231_mce_down(chip
);
869 #ifdef SNDRV_DEBUG_MCE
870 snd_printdd("init: (1)\n");
872 snd_cs4231_mce_up(chip
);
873 spin_lock_irqsave(&chip
->lock
, flags
);
874 chip
->image
[CS4231_IFACE_CTRL
] &= ~(CS4231_PLAYBACK_ENABLE
|
875 CS4231_PLAYBACK_PIO
|
876 CS4231_RECORD_ENABLE
|
879 chip
->image
[CS4231_IFACE_CTRL
] |= CS4231_AUTOCALIB
;
880 snd_cs4231_out(chip
, CS4231_IFACE_CTRL
, chip
->image
[CS4231_IFACE_CTRL
]);
881 spin_unlock_irqrestore(&chip
->lock
, flags
);
882 snd_cs4231_mce_down(chip
);
884 #ifdef SNDRV_DEBUG_MCE
885 snd_printdd("init: (2)\n");
888 snd_cs4231_mce_up(chip
);
889 spin_lock_irqsave(&chip
->lock
, flags
);
890 snd_cs4231_out(chip
, CS4231_ALT_FEATURE_1
,
891 chip
->image
[CS4231_ALT_FEATURE_1
]);
892 spin_unlock_irqrestore(&chip
->lock
, flags
);
893 snd_cs4231_mce_down(chip
);
895 #ifdef SNDRV_DEBUG_MCE
896 snd_printdd("init: (3) - afei = 0x%x\n",
897 chip
->image
[CS4231_ALT_FEATURE_1
]);
900 spin_lock_irqsave(&chip
->lock
, flags
);
901 snd_cs4231_out(chip
, CS4231_ALT_FEATURE_2
,
902 chip
->image
[CS4231_ALT_FEATURE_2
]);
903 spin_unlock_irqrestore(&chip
->lock
, flags
);
905 snd_cs4231_mce_up(chip
);
906 spin_lock_irqsave(&chip
->lock
, flags
);
907 snd_cs4231_out(chip
, CS4231_PLAYBK_FORMAT
,
908 chip
->image
[CS4231_PLAYBK_FORMAT
]);
909 spin_unlock_irqrestore(&chip
->lock
, flags
);
910 snd_cs4231_mce_down(chip
);
912 #ifdef SNDRV_DEBUG_MCE
913 snd_printdd("init: (4)\n");
916 snd_cs4231_mce_up(chip
);
917 spin_lock_irqsave(&chip
->lock
, flags
);
918 snd_cs4231_out(chip
, CS4231_REC_FORMAT
, chip
->image
[CS4231_REC_FORMAT
]);
919 spin_unlock_irqrestore(&chip
->lock
, flags
);
920 snd_cs4231_mce_down(chip
);
922 #ifdef SNDRV_DEBUG_MCE
923 snd_printdd("init: (5)\n");
927 static int snd_cs4231_open(struct snd_cs4231
*chip
, unsigned int mode
)
931 mutex_lock(&chip
->open_mutex
);
932 if ((chip
->mode
& mode
)) {
933 mutex_unlock(&chip
->open_mutex
);
936 if (chip
->mode
& CS4231_MODE_OPEN
) {
938 mutex_unlock(&chip
->open_mutex
);
941 /* ok. now enable and ack CODEC IRQ */
942 spin_lock_irqsave(&chip
->lock
, flags
);
943 snd_cs4231_out(chip
, CS4231_IRQ_STATUS
, CS4231_PLAYBACK_IRQ
|
946 snd_cs4231_out(chip
, CS4231_IRQ_STATUS
, 0);
947 __cs4231_writeb(chip
, 0, CS4231P(chip
, STATUS
)); /* clear IRQ */
948 __cs4231_writeb(chip
, 0, CS4231P(chip
, STATUS
)); /* clear IRQ */
950 snd_cs4231_out(chip
, CS4231_IRQ_STATUS
, CS4231_PLAYBACK_IRQ
|
953 snd_cs4231_out(chip
, CS4231_IRQ_STATUS
, 0);
955 spin_unlock_irqrestore(&chip
->lock
, flags
);
958 mutex_unlock(&chip
->open_mutex
);
962 static void snd_cs4231_close(struct snd_cs4231
*chip
, unsigned int mode
)
966 mutex_lock(&chip
->open_mutex
);
968 if (chip
->mode
& CS4231_MODE_OPEN
) {
969 mutex_unlock(&chip
->open_mutex
);
972 snd_cs4231_calibrate_mute(chip
, 1);
975 spin_lock_irqsave(&chip
->lock
, flags
);
976 snd_cs4231_out(chip
, CS4231_IRQ_STATUS
, 0);
977 __cs4231_writeb(chip
, 0, CS4231P(chip
, STATUS
)); /* clear IRQ */
978 __cs4231_writeb(chip
, 0, CS4231P(chip
, STATUS
)); /* clear IRQ */
980 /* now disable record & playback */
982 if (chip
->image
[CS4231_IFACE_CTRL
] &
983 (CS4231_PLAYBACK_ENABLE
| CS4231_PLAYBACK_PIO
|
984 CS4231_RECORD_ENABLE
| CS4231_RECORD_PIO
)) {
985 spin_unlock_irqrestore(&chip
->lock
, flags
);
986 snd_cs4231_mce_up(chip
);
987 spin_lock_irqsave(&chip
->lock
, flags
);
988 chip
->image
[CS4231_IFACE_CTRL
] &=
989 ~(CS4231_PLAYBACK_ENABLE
| CS4231_PLAYBACK_PIO
|
990 CS4231_RECORD_ENABLE
| CS4231_RECORD_PIO
);
991 snd_cs4231_out(chip
, CS4231_IFACE_CTRL
,
992 chip
->image
[CS4231_IFACE_CTRL
]);
993 spin_unlock_irqrestore(&chip
->lock
, flags
);
994 snd_cs4231_mce_down(chip
);
995 spin_lock_irqsave(&chip
->lock
, flags
);
998 /* clear IRQ again */
999 snd_cs4231_out(chip
, CS4231_IRQ_STATUS
, 0);
1000 __cs4231_writeb(chip
, 0, CS4231P(chip
, STATUS
)); /* clear IRQ */
1001 __cs4231_writeb(chip
, 0, CS4231P(chip
, STATUS
)); /* clear IRQ */
1002 spin_unlock_irqrestore(&chip
->lock
, flags
);
1004 snd_cs4231_calibrate_mute(chip
, 0);
1007 mutex_unlock(&chip
->open_mutex
);
1014 static int snd_cs4231_timer_open(struct snd_timer
*timer
)
1016 struct snd_cs4231
*chip
= snd_timer_chip(timer
);
1017 snd_cs4231_open(chip
, CS4231_MODE_TIMER
);
1021 static int snd_cs4231_timer_close(struct snd_timer
*timer
)
1023 struct snd_cs4231
*chip
= snd_timer_chip(timer
);
1024 snd_cs4231_close(chip
, CS4231_MODE_TIMER
);
1028 static struct snd_timer_hardware snd_cs4231_timer_table
= {
1029 .flags
= SNDRV_TIMER_HW_AUTO
,
1032 .open
= snd_cs4231_timer_open
,
1033 .close
= snd_cs4231_timer_close
,
1034 .c_resolution
= snd_cs4231_timer_resolution
,
1035 .start
= snd_cs4231_timer_start
,
1036 .stop
= snd_cs4231_timer_stop
,
1040 * ok.. exported functions..
1043 static int snd_cs4231_playback_hw_params(struct snd_pcm_substream
*substream
,
1044 struct snd_pcm_hw_params
*hw_params
)
1046 struct snd_cs4231
*chip
= snd_pcm_substream_chip(substream
);
1047 unsigned char new_pdfr
;
1050 err
= snd_pcm_lib_malloc_pages(substream
,
1051 params_buffer_bytes(hw_params
));
1054 new_pdfr
= snd_cs4231_get_format(chip
, params_format(hw_params
),
1055 params_channels(hw_params
)) |
1056 snd_cs4231_get_rate(params_rate(hw_params
));
1057 snd_cs4231_playback_format(chip
, hw_params
, new_pdfr
);
1062 static int snd_cs4231_playback_prepare(struct snd_pcm_substream
*substream
)
1064 struct snd_cs4231
*chip
= snd_pcm_substream_chip(substream
);
1065 struct snd_pcm_runtime
*runtime
= substream
->runtime
;
1066 unsigned long flags
;
1068 spin_lock_irqsave(&chip
->lock
, flags
);
1070 chip
->image
[CS4231_IFACE_CTRL
] &= ~(CS4231_PLAYBACK_ENABLE
|
1071 CS4231_PLAYBACK_PIO
);
1073 BUG_ON(runtime
->period_size
> 0xffff + 1);
1075 chip
->p_periods_sent
= 0;
1076 spin_unlock_irqrestore(&chip
->lock
, flags
);
1081 static int snd_cs4231_capture_hw_params(struct snd_pcm_substream
*substream
,
1082 struct snd_pcm_hw_params
*hw_params
)
1084 struct snd_cs4231
*chip
= snd_pcm_substream_chip(substream
);
1085 unsigned char new_cdfr
;
1088 err
= snd_pcm_lib_malloc_pages(substream
,
1089 params_buffer_bytes(hw_params
));
1092 new_cdfr
= snd_cs4231_get_format(chip
, params_format(hw_params
),
1093 params_channels(hw_params
)) |
1094 snd_cs4231_get_rate(params_rate(hw_params
));
1095 snd_cs4231_capture_format(chip
, hw_params
, new_cdfr
);
1100 static int snd_cs4231_capture_prepare(struct snd_pcm_substream
*substream
)
1102 struct snd_cs4231
*chip
= snd_pcm_substream_chip(substream
);
1103 unsigned long flags
;
1105 spin_lock_irqsave(&chip
->lock
, flags
);
1106 chip
->image
[CS4231_IFACE_CTRL
] &= ~(CS4231_RECORD_ENABLE
|
1110 chip
->c_periods_sent
= 0;
1111 spin_unlock_irqrestore(&chip
->lock
, flags
);
1116 static void snd_cs4231_overrange(struct snd_cs4231
*chip
)
1118 unsigned long flags
;
1121 spin_lock_irqsave(&chip
->lock
, flags
);
1122 res
= snd_cs4231_in(chip
, CS4231_TEST_INIT
);
1123 spin_unlock_irqrestore(&chip
->lock
, flags
);
1125 /* detect overrange only above 0dB; may be user selectable? */
1126 if (res
& (0x08 | 0x02))
1127 chip
->capture_substream
->runtime
->overrange
++;
1130 static void snd_cs4231_play_callback(struct snd_cs4231
*chip
)
1132 if (chip
->image
[CS4231_IFACE_CTRL
] & CS4231_PLAYBACK_ENABLE
) {
1133 snd_pcm_period_elapsed(chip
->playback_substream
);
1134 snd_cs4231_advance_dma(&chip
->p_dma
, chip
->playback_substream
,
1135 &chip
->p_periods_sent
);
1139 static void snd_cs4231_capture_callback(struct snd_cs4231
*chip
)
1141 if (chip
->image
[CS4231_IFACE_CTRL
] & CS4231_RECORD_ENABLE
) {
1142 snd_pcm_period_elapsed(chip
->capture_substream
);
1143 snd_cs4231_advance_dma(&chip
->c_dma
, chip
->capture_substream
,
1144 &chip
->c_periods_sent
);
1148 static snd_pcm_uframes_t
snd_cs4231_playback_pointer(
1149 struct snd_pcm_substream
*substream
)
1151 struct snd_cs4231
*chip
= snd_pcm_substream_chip(substream
);
1152 struct cs4231_dma_control
*dma_cont
= &chip
->p_dma
;
1155 if (!(chip
->image
[CS4231_IFACE_CTRL
] & CS4231_PLAYBACK_ENABLE
))
1157 ptr
= dma_cont
->address(dma_cont
);
1159 ptr
-= substream
->runtime
->dma_addr
;
1161 return bytes_to_frames(substream
->runtime
, ptr
);
1164 static snd_pcm_uframes_t
snd_cs4231_capture_pointer(
1165 struct snd_pcm_substream
*substream
)
1167 struct snd_cs4231
*chip
= snd_pcm_substream_chip(substream
);
1168 struct cs4231_dma_control
*dma_cont
= &chip
->c_dma
;
1171 if (!(chip
->image
[CS4231_IFACE_CTRL
] & CS4231_RECORD_ENABLE
))
1173 ptr
= dma_cont
->address(dma_cont
);
1175 ptr
-= substream
->runtime
->dma_addr
;
1177 return bytes_to_frames(substream
->runtime
, ptr
);
1180 static int __init
snd_cs4231_probe(struct snd_cs4231
*chip
)
1182 unsigned long flags
;
1188 for (i
= 0; i
< 50; i
++) {
1190 if (__cs4231_readb(chip
, CS4231P(chip
, REGSEL
)) & CS4231_INIT
)
1193 spin_lock_irqsave(&chip
->lock
, flags
);
1194 snd_cs4231_out(chip
, CS4231_MISC_INFO
, CS4231_MODE2
);
1195 id
= snd_cs4231_in(chip
, CS4231_MISC_INFO
) & 0x0f;
1196 vers
= snd_cs4231_in(chip
, CS4231_VERSION
);
1197 spin_unlock_irqrestore(&chip
->lock
, flags
);
1199 break; /* this is valid value */
1202 snd_printdd("cs4231: port = %p, id = 0x%x\n", chip
->port
, id
);
1204 return -ENODEV
; /* no valid device found */
1206 spin_lock_irqsave(&chip
->lock
, flags
);
1208 __cs4231_readb(chip
, CS4231P(chip
, STATUS
)); /* clear any pendings IRQ */
1209 __cs4231_writeb(chip
, 0, CS4231P(chip
, STATUS
));
1212 spin_unlock_irqrestore(&chip
->lock
, flags
);
1214 chip
->image
[CS4231_MISC_INFO
] = CS4231_MODE2
;
1215 chip
->image
[CS4231_IFACE_CTRL
] =
1216 chip
->image
[CS4231_IFACE_CTRL
] & ~CS4231_SINGLE_DMA
;
1217 chip
->image
[CS4231_ALT_FEATURE_1
] = 0x80;
1218 chip
->image
[CS4231_ALT_FEATURE_2
] = 0x01;
1220 chip
->image
[CS4231_ALT_FEATURE_2
] |= 0x02;
1222 ptr
= (unsigned char *) &chip
->image
;
1224 snd_cs4231_mce_down(chip
);
1226 spin_lock_irqsave(&chip
->lock
, flags
);
1228 for (i
= 0; i
< 32; i
++) /* ok.. fill all CS4231 registers */
1229 snd_cs4231_out(chip
, i
, *ptr
++);
1231 spin_unlock_irqrestore(&chip
->lock
, flags
);
1233 snd_cs4231_mce_up(chip
);
1235 snd_cs4231_mce_down(chip
);
1239 return 0; /* all things are ok.. */
1242 static struct snd_pcm_hardware snd_cs4231_playback
= {
1243 .info
= SNDRV_PCM_INFO_MMAP
|
1244 SNDRV_PCM_INFO_INTERLEAVED
|
1245 SNDRV_PCM_INFO_MMAP_VALID
|
1246 SNDRV_PCM_INFO_SYNC_START
,
1247 .formats
= SNDRV_PCM_FMTBIT_MU_LAW
|
1248 SNDRV_PCM_FMTBIT_A_LAW
|
1249 SNDRV_PCM_FMTBIT_IMA_ADPCM
|
1250 SNDRV_PCM_FMTBIT_U8
|
1251 SNDRV_PCM_FMTBIT_S16_LE
|
1252 SNDRV_PCM_FMTBIT_S16_BE
,
1253 .rates
= SNDRV_PCM_RATE_KNOT
|
1254 SNDRV_PCM_RATE_8000_48000
,
1259 .buffer_bytes_max
= 32 * 1024,
1260 .period_bytes_min
= 64,
1261 .period_bytes_max
= 32 * 1024,
1263 .periods_max
= 1024,
1266 static struct snd_pcm_hardware snd_cs4231_capture
= {
1267 .info
= SNDRV_PCM_INFO_MMAP
|
1268 SNDRV_PCM_INFO_INTERLEAVED
|
1269 SNDRV_PCM_INFO_MMAP_VALID
|
1270 SNDRV_PCM_INFO_SYNC_START
,
1271 .formats
= SNDRV_PCM_FMTBIT_MU_LAW
|
1272 SNDRV_PCM_FMTBIT_A_LAW
|
1273 SNDRV_PCM_FMTBIT_IMA_ADPCM
|
1274 SNDRV_PCM_FMTBIT_U8
|
1275 SNDRV_PCM_FMTBIT_S16_LE
|
1276 SNDRV_PCM_FMTBIT_S16_BE
,
1277 .rates
= SNDRV_PCM_RATE_KNOT
|
1278 SNDRV_PCM_RATE_8000_48000
,
1283 .buffer_bytes_max
= 32 * 1024,
1284 .period_bytes_min
= 64,
1285 .period_bytes_max
= 32 * 1024,
1287 .periods_max
= 1024,
1290 static int snd_cs4231_playback_open(struct snd_pcm_substream
*substream
)
1292 struct snd_cs4231
*chip
= snd_pcm_substream_chip(substream
);
1293 struct snd_pcm_runtime
*runtime
= substream
->runtime
;
1296 runtime
->hw
= snd_cs4231_playback
;
1298 err
= snd_cs4231_open(chip
, CS4231_MODE_PLAY
);
1300 snd_free_pages(runtime
->dma_area
, runtime
->dma_bytes
);
1303 chip
->playback_substream
= substream
;
1304 chip
->p_periods_sent
= 0;
1305 snd_pcm_set_sync(substream
);
1306 snd_cs4231_xrate(runtime
);
1311 static int snd_cs4231_capture_open(struct snd_pcm_substream
*substream
)
1313 struct snd_cs4231
*chip
= snd_pcm_substream_chip(substream
);
1314 struct snd_pcm_runtime
*runtime
= substream
->runtime
;
1317 runtime
->hw
= snd_cs4231_capture
;
1319 err
= snd_cs4231_open(chip
, CS4231_MODE_RECORD
);
1321 snd_free_pages(runtime
->dma_area
, runtime
->dma_bytes
);
1324 chip
->capture_substream
= substream
;
1325 chip
->c_periods_sent
= 0;
1326 snd_pcm_set_sync(substream
);
1327 snd_cs4231_xrate(runtime
);
1332 static int snd_cs4231_playback_close(struct snd_pcm_substream
*substream
)
1334 struct snd_cs4231
*chip
= snd_pcm_substream_chip(substream
);
1336 snd_cs4231_close(chip
, CS4231_MODE_PLAY
);
1337 chip
->playback_substream
= NULL
;
1342 static int snd_cs4231_capture_close(struct snd_pcm_substream
*substream
)
1344 struct snd_cs4231
*chip
= snd_pcm_substream_chip(substream
);
1346 snd_cs4231_close(chip
, CS4231_MODE_RECORD
);
1347 chip
->capture_substream
= NULL
;
1352 /* XXX We can do some power-management, in particular on EBUS using
1353 * XXX the audio AUXIO register...
1356 static struct snd_pcm_ops snd_cs4231_playback_ops
= {
1357 .open
= snd_cs4231_playback_open
,
1358 .close
= snd_cs4231_playback_close
,
1359 .ioctl
= snd_pcm_lib_ioctl
,
1360 .hw_params
= snd_cs4231_playback_hw_params
,
1361 .hw_free
= snd_pcm_lib_free_pages
,
1362 .prepare
= snd_cs4231_playback_prepare
,
1363 .trigger
= snd_cs4231_trigger
,
1364 .pointer
= snd_cs4231_playback_pointer
,
1367 static struct snd_pcm_ops snd_cs4231_capture_ops
= {
1368 .open
= snd_cs4231_capture_open
,
1369 .close
= snd_cs4231_capture_close
,
1370 .ioctl
= snd_pcm_lib_ioctl
,
1371 .hw_params
= snd_cs4231_capture_hw_params
,
1372 .hw_free
= snd_pcm_lib_free_pages
,
1373 .prepare
= snd_cs4231_capture_prepare
,
1374 .trigger
= snd_cs4231_trigger
,
1375 .pointer
= snd_cs4231_capture_pointer
,
1378 static int __init
snd_cs4231_pcm(struct snd_card
*card
)
1380 struct snd_cs4231
*chip
= card
->private_data
;
1381 struct snd_pcm
*pcm
;
1384 err
= snd_pcm_new(card
, "CS4231", 0, 1, 1, &pcm
);
1388 snd_pcm_set_ops(pcm
, SNDRV_PCM_STREAM_PLAYBACK
,
1389 &snd_cs4231_playback_ops
);
1390 snd_pcm_set_ops(pcm
, SNDRV_PCM_STREAM_CAPTURE
,
1391 &snd_cs4231_capture_ops
);
1394 pcm
->private_data
= chip
;
1395 pcm
->info_flags
= SNDRV_PCM_INFO_JOINT_DUPLEX
;
1396 strcpy(pcm
->name
, "CS4231");
1398 chip
->p_dma
.preallocate(chip
, pcm
);
1405 static int __init
snd_cs4231_timer(struct snd_card
*card
)
1407 struct snd_cs4231
*chip
= card
->private_data
;
1408 struct snd_timer
*timer
;
1409 struct snd_timer_id tid
;
1412 /* Timer initialization */
1413 tid
.dev_class
= SNDRV_TIMER_CLASS_CARD
;
1414 tid
.dev_sclass
= SNDRV_TIMER_SCLASS_NONE
;
1415 tid
.card
= card
->number
;
1418 err
= snd_timer_new(card
, "CS4231", &tid
, &timer
);
1421 strcpy(timer
->name
, "CS4231");
1422 timer
->private_data
= chip
;
1423 timer
->hw
= snd_cs4231_timer_table
;
1424 chip
->timer
= timer
;
1433 static int snd_cs4231_info_mux(struct snd_kcontrol
*kcontrol
,
1434 struct snd_ctl_elem_info
*uinfo
)
1436 static char *texts
[4] = {
1437 "Line", "CD", "Mic", "Mix"
1440 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_ENUMERATED
;
1442 uinfo
->value
.enumerated
.items
= 4;
1443 if (uinfo
->value
.enumerated
.item
> 3)
1444 uinfo
->value
.enumerated
.item
= 3;
1445 strcpy(uinfo
->value
.enumerated
.name
,
1446 texts
[uinfo
->value
.enumerated
.item
]);
1451 static int snd_cs4231_get_mux(struct snd_kcontrol
*kcontrol
,
1452 struct snd_ctl_elem_value
*ucontrol
)
1454 struct snd_cs4231
*chip
= snd_kcontrol_chip(kcontrol
);
1455 unsigned long flags
;
1457 spin_lock_irqsave(&chip
->lock
, flags
);
1458 ucontrol
->value
.enumerated
.item
[0] =
1459 (chip
->image
[CS4231_LEFT_INPUT
] & CS4231_MIXS_ALL
) >> 6;
1460 ucontrol
->value
.enumerated
.item
[1] =
1461 (chip
->image
[CS4231_RIGHT_INPUT
] & CS4231_MIXS_ALL
) >> 6;
1462 spin_unlock_irqrestore(&chip
->lock
, flags
);
1467 static int snd_cs4231_put_mux(struct snd_kcontrol
*kcontrol
,
1468 struct snd_ctl_elem_value
*ucontrol
)
1470 struct snd_cs4231
*chip
= snd_kcontrol_chip(kcontrol
);
1471 unsigned long flags
;
1472 unsigned short left
, right
;
1475 if (ucontrol
->value
.enumerated
.item
[0] > 3 ||
1476 ucontrol
->value
.enumerated
.item
[1] > 3)
1478 left
= ucontrol
->value
.enumerated
.item
[0] << 6;
1479 right
= ucontrol
->value
.enumerated
.item
[1] << 6;
1481 spin_lock_irqsave(&chip
->lock
, flags
);
1483 left
= (chip
->image
[CS4231_LEFT_INPUT
] & ~CS4231_MIXS_ALL
) | left
;
1484 right
= (chip
->image
[CS4231_RIGHT_INPUT
] & ~CS4231_MIXS_ALL
) | right
;
1485 change
= left
!= chip
->image
[CS4231_LEFT_INPUT
] ||
1486 right
!= chip
->image
[CS4231_RIGHT_INPUT
];
1487 snd_cs4231_out(chip
, CS4231_LEFT_INPUT
, left
);
1488 snd_cs4231_out(chip
, CS4231_RIGHT_INPUT
, right
);
1490 spin_unlock_irqrestore(&chip
->lock
, flags
);
1495 static int snd_cs4231_info_single(struct snd_kcontrol
*kcontrol
,
1496 struct snd_ctl_elem_info
*uinfo
)
1498 int mask
= (kcontrol
->private_value
>> 16) & 0xff;
1500 uinfo
->type
= (mask
== 1) ?
1501 SNDRV_CTL_ELEM_TYPE_BOOLEAN
: SNDRV_CTL_ELEM_TYPE_INTEGER
;
1503 uinfo
->value
.integer
.min
= 0;
1504 uinfo
->value
.integer
.max
= mask
;
1509 static int snd_cs4231_get_single(struct snd_kcontrol
*kcontrol
,
1510 struct snd_ctl_elem_value
*ucontrol
)
1512 struct snd_cs4231
*chip
= snd_kcontrol_chip(kcontrol
);
1513 unsigned long flags
;
1514 int reg
= kcontrol
->private_value
& 0xff;
1515 int shift
= (kcontrol
->private_value
>> 8) & 0xff;
1516 int mask
= (kcontrol
->private_value
>> 16) & 0xff;
1517 int invert
= (kcontrol
->private_value
>> 24) & 0xff;
1519 spin_lock_irqsave(&chip
->lock
, flags
);
1521 ucontrol
->value
.integer
.value
[0] = (chip
->image
[reg
] >> shift
) & mask
;
1523 spin_unlock_irqrestore(&chip
->lock
, flags
);
1526 ucontrol
->value
.integer
.value
[0] =
1527 (mask
- ucontrol
->value
.integer
.value
[0]);
1532 static int snd_cs4231_put_single(struct snd_kcontrol
*kcontrol
,
1533 struct snd_ctl_elem_value
*ucontrol
)
1535 struct snd_cs4231
*chip
= snd_kcontrol_chip(kcontrol
);
1536 unsigned long flags
;
1537 int reg
= kcontrol
->private_value
& 0xff;
1538 int shift
= (kcontrol
->private_value
>> 8) & 0xff;
1539 int mask
= (kcontrol
->private_value
>> 16) & 0xff;
1540 int invert
= (kcontrol
->private_value
>> 24) & 0xff;
1544 val
= (ucontrol
->value
.integer
.value
[0] & mask
);
1549 spin_lock_irqsave(&chip
->lock
, flags
);
1551 val
= (chip
->image
[reg
] & ~(mask
<< shift
)) | val
;
1552 change
= val
!= chip
->image
[reg
];
1553 snd_cs4231_out(chip
, reg
, val
);
1555 spin_unlock_irqrestore(&chip
->lock
, flags
);
1560 static int snd_cs4231_info_double(struct snd_kcontrol
*kcontrol
,
1561 struct snd_ctl_elem_info
*uinfo
)
1563 int mask
= (kcontrol
->private_value
>> 24) & 0xff;
1565 uinfo
->type
= mask
== 1 ?
1566 SNDRV_CTL_ELEM_TYPE_BOOLEAN
: SNDRV_CTL_ELEM_TYPE_INTEGER
;
1568 uinfo
->value
.integer
.min
= 0;
1569 uinfo
->value
.integer
.max
= mask
;
1574 static int snd_cs4231_get_double(struct snd_kcontrol
*kcontrol
,
1575 struct snd_ctl_elem_value
*ucontrol
)
1577 struct snd_cs4231
*chip
= snd_kcontrol_chip(kcontrol
);
1578 unsigned long flags
;
1579 int left_reg
= kcontrol
->private_value
& 0xff;
1580 int right_reg
= (kcontrol
->private_value
>> 8) & 0xff;
1581 int shift_left
= (kcontrol
->private_value
>> 16) & 0x07;
1582 int shift_right
= (kcontrol
->private_value
>> 19) & 0x07;
1583 int mask
= (kcontrol
->private_value
>> 24) & 0xff;
1584 int invert
= (kcontrol
->private_value
>> 22) & 1;
1586 spin_lock_irqsave(&chip
->lock
, flags
);
1588 ucontrol
->value
.integer
.value
[0] =
1589 (chip
->image
[left_reg
] >> shift_left
) & mask
;
1590 ucontrol
->value
.integer
.value
[1] =
1591 (chip
->image
[right_reg
] >> shift_right
) & mask
;
1593 spin_unlock_irqrestore(&chip
->lock
, flags
);
1596 ucontrol
->value
.integer
.value
[0] =
1597 (mask
- ucontrol
->value
.integer
.value
[0]);
1598 ucontrol
->value
.integer
.value
[1] =
1599 (mask
- ucontrol
->value
.integer
.value
[1]);
1605 static int snd_cs4231_put_double(struct snd_kcontrol
*kcontrol
,
1606 struct snd_ctl_elem_value
*ucontrol
)
1608 struct snd_cs4231
*chip
= snd_kcontrol_chip(kcontrol
);
1609 unsigned long flags
;
1610 int left_reg
= kcontrol
->private_value
& 0xff;
1611 int right_reg
= (kcontrol
->private_value
>> 8) & 0xff;
1612 int shift_left
= (kcontrol
->private_value
>> 16) & 0x07;
1613 int shift_right
= (kcontrol
->private_value
>> 19) & 0x07;
1614 int mask
= (kcontrol
->private_value
>> 24) & 0xff;
1615 int invert
= (kcontrol
->private_value
>> 22) & 1;
1617 unsigned short val1
, val2
;
1619 val1
= ucontrol
->value
.integer
.value
[0] & mask
;
1620 val2
= ucontrol
->value
.integer
.value
[1] & mask
;
1625 val1
<<= shift_left
;
1626 val2
<<= shift_right
;
1628 spin_lock_irqsave(&chip
->lock
, flags
);
1630 val1
= (chip
->image
[left_reg
] & ~(mask
<< shift_left
)) | val1
;
1631 val2
= (chip
->image
[right_reg
] & ~(mask
<< shift_right
)) | val2
;
1632 change
= val1
!= chip
->image
[left_reg
];
1633 change
|= val2
!= chip
->image
[right_reg
];
1634 snd_cs4231_out(chip
, left_reg
, val1
);
1635 snd_cs4231_out(chip
, right_reg
, val2
);
1637 spin_unlock_irqrestore(&chip
->lock
, flags
);
1642 #define CS4231_SINGLE(xname, xindex, reg, shift, mask, invert) \
1643 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), .index = (xindex), \
1644 .info = snd_cs4231_info_single, \
1645 .get = snd_cs4231_get_single, .put = snd_cs4231_put_single, \
1646 .private_value = (reg) | ((shift) << 8) | ((mask) << 16) | ((invert) << 24) }
1648 #define CS4231_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, \
1649 shift_right, mask, invert) \
1650 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), .index = (xindex), \
1651 .info = snd_cs4231_info_double, \
1652 .get = snd_cs4231_get_double, .put = snd_cs4231_put_double, \
1653 .private_value = (left_reg) | ((right_reg) << 8) | ((shift_left) << 16) | \
1654 ((shift_right) << 19) | ((mask) << 24) | ((invert) << 22) }
1656 static struct snd_kcontrol_new snd_cs4231_controls
[] __initdata
= {
1657 CS4231_DOUBLE("PCM Playback Switch", 0, CS4231_LEFT_OUTPUT
,
1658 CS4231_RIGHT_OUTPUT
, 7, 7, 1, 1),
1659 CS4231_DOUBLE("PCM Playback Volume", 0, CS4231_LEFT_OUTPUT
,
1660 CS4231_RIGHT_OUTPUT
, 0, 0, 63, 1),
1661 CS4231_DOUBLE("Line Playback Switch", 0, CS4231_LEFT_LINE_IN
,
1662 CS4231_RIGHT_LINE_IN
, 7, 7, 1, 1),
1663 CS4231_DOUBLE("Line Playback Volume", 0, CS4231_LEFT_LINE_IN
,
1664 CS4231_RIGHT_LINE_IN
, 0, 0, 31, 1),
1665 CS4231_DOUBLE("Aux Playback Switch", 0, CS4231_AUX1_LEFT_INPUT
,
1666 CS4231_AUX1_RIGHT_INPUT
, 7, 7, 1, 1),
1667 CS4231_DOUBLE("Aux Playback Volume", 0, CS4231_AUX1_LEFT_INPUT
,
1668 CS4231_AUX1_RIGHT_INPUT
, 0, 0, 31, 1),
1669 CS4231_DOUBLE("Aux Playback Switch", 1, CS4231_AUX2_LEFT_INPUT
,
1670 CS4231_AUX2_RIGHT_INPUT
, 7, 7, 1, 1),
1671 CS4231_DOUBLE("Aux Playback Volume", 1, CS4231_AUX2_LEFT_INPUT
,
1672 CS4231_AUX2_RIGHT_INPUT
, 0, 0, 31, 1),
1673 CS4231_SINGLE("Mono Playback Switch", 0, CS4231_MONO_CTRL
, 7, 1, 1),
1674 CS4231_SINGLE("Mono Playback Volume", 0, CS4231_MONO_CTRL
, 0, 15, 1),
1675 CS4231_SINGLE("Mono Output Playback Switch", 0, CS4231_MONO_CTRL
, 6, 1, 1),
1676 CS4231_SINGLE("Mono Output Playback Bypass", 0, CS4231_MONO_CTRL
, 5, 1, 0),
1677 CS4231_DOUBLE("Capture Volume", 0, CS4231_LEFT_INPUT
, CS4231_RIGHT_INPUT
, 0, 0,
1680 .iface
= SNDRV_CTL_ELEM_IFACE_MIXER
,
1681 .name
= "Capture Source",
1682 .info
= snd_cs4231_info_mux
,
1683 .get
= snd_cs4231_get_mux
,
1684 .put
= snd_cs4231_put_mux
,
1686 CS4231_DOUBLE("Mic Boost", 0, CS4231_LEFT_INPUT
, CS4231_RIGHT_INPUT
, 5, 5,
1688 CS4231_SINGLE("Loopback Capture Switch", 0, CS4231_LOOPBACK
, 0, 1, 0),
1689 CS4231_SINGLE("Loopback Capture Volume", 0, CS4231_LOOPBACK
, 2, 63, 1),
1690 /* SPARC specific uses of XCTL{0,1} general purpose outputs. */
1691 CS4231_SINGLE("Line Out Switch", 0, CS4231_PIN_CTRL
, 6, 1, 1),
1692 CS4231_SINGLE("Headphone Out Switch", 0, CS4231_PIN_CTRL
, 7, 1, 1)
1695 static int __init
snd_cs4231_mixer(struct snd_card
*card
)
1697 struct snd_cs4231
*chip
= card
->private_data
;
1700 snd_assert(chip
!= NULL
&& chip
->pcm
!= NULL
, return -EINVAL
);
1702 strcpy(card
->mixername
, chip
->pcm
->name
);
1704 for (idx
= 0; idx
< ARRAY_SIZE(snd_cs4231_controls
); idx
++) {
1705 err
= snd_ctl_add(card
,
1706 snd_ctl_new1(&snd_cs4231_controls
[idx
], chip
));
1715 static int __init
cs4231_attach_begin(struct snd_card
**rcard
)
1717 struct snd_card
*card
;
1718 struct snd_cs4231
*chip
;
1722 if (dev
>= SNDRV_CARDS
)
1730 card
= snd_card_new(index
[dev
], id
[dev
], THIS_MODULE
,
1731 sizeof(struct snd_cs4231
));
1735 strcpy(card
->driver
, "CS4231");
1736 strcpy(card
->shortname
, "Sun CS4231");
1738 chip
= card
->private_data
;
1745 static int __init
cs4231_attach_finish(struct snd_card
*card
)
1747 struct snd_cs4231
*chip
= card
->private_data
;
1750 err
= snd_cs4231_pcm(card
);
1754 err
= snd_cs4231_mixer(card
);
1758 err
= snd_cs4231_timer(card
);
1762 err
= snd_card_register(card
);
1766 chip
->next
= cs4231_list
;
1773 snd_card_free(card
);
1779 static irqreturn_t
snd_cs4231_sbus_interrupt(int irq
, void *dev_id
)
1781 unsigned long flags
;
1782 unsigned char status
;
1784 struct snd_cs4231
*chip
= dev_id
;
1786 /*This is IRQ is not raised by the cs4231*/
1787 if (!(__cs4231_readb(chip
, CS4231P(chip
, STATUS
)) & CS4231_GLOBALIRQ
))
1790 /* ACK the APC interrupt. */
1791 csr
= sbus_readl(chip
->port
+ APCCSR
);
1793 sbus_writel(csr
, chip
->port
+ APCCSR
);
1795 if ((csr
& APC_PDMA_READY
) &&
1796 (csr
& APC_PLAY_INT
) &&
1797 (csr
& APC_XINT_PNVA
) &&
1798 !(csr
& APC_XINT_EMPT
))
1799 snd_cs4231_play_callback(chip
);
1801 if ((csr
& APC_CDMA_READY
) &&
1802 (csr
& APC_CAPT_INT
) &&
1803 (csr
& APC_XINT_CNVA
) &&
1804 !(csr
& APC_XINT_EMPT
))
1805 snd_cs4231_capture_callback(chip
);
1807 status
= snd_cs4231_in(chip
, CS4231_IRQ_STATUS
);
1809 if (status
& CS4231_TIMER_IRQ
) {
1811 snd_timer_interrupt(chip
->timer
, chip
->timer
->sticks
);
1814 if ((status
& CS4231_RECORD_IRQ
) && (csr
& APC_CDMA_READY
))
1815 snd_cs4231_overrange(chip
);
1817 /* ACK the CS4231 interrupt. */
1818 spin_lock_irqsave(&chip
->lock
, flags
);
1819 snd_cs4231_outm(chip
, CS4231_IRQ_STATUS
, ~CS4231_ALL_IRQS
| ~status
, 0);
1820 spin_unlock_irqrestore(&chip
->lock
, flags
);
1829 static int sbus_dma_request(struct cs4231_dma_control
*dma_cont
,
1830 dma_addr_t bus_addr
, size_t len
)
1832 unsigned long flags
;
1835 struct sbus_dma_info
*base
= &dma_cont
->sbus_info
;
1837 if (len
>= (1 << 24))
1839 spin_lock_irqsave(&base
->lock
, flags
);
1840 csr
= sbus_readl(base
->regs
+ APCCSR
);
1842 test
= APC_CDMA_READY
;
1843 if (base
->dir
== APC_PLAY
)
1844 test
= APC_PDMA_READY
;
1848 test
= APC_XINT_CNVA
;
1849 if (base
->dir
== APC_PLAY
)
1850 test
= APC_XINT_PNVA
;
1854 sbus_writel(bus_addr
, base
->regs
+ base
->dir
+ APCNVA
);
1855 sbus_writel(len
, base
->regs
+ base
->dir
+ APCNC
);
1857 spin_unlock_irqrestore(&base
->lock
, flags
);
1861 static void sbus_dma_prepare(struct cs4231_dma_control
*dma_cont
, int d
)
1863 unsigned long flags
;
1865 struct sbus_dma_info
*base
= &dma_cont
->sbus_info
;
1867 spin_lock_irqsave(&base
->lock
, flags
);
1868 csr
= sbus_readl(base
->regs
+ APCCSR
);
1869 test
= APC_GENL_INT
| APC_PLAY_INT
| APC_XINT_ENA
|
1870 APC_XINT_PLAY
| APC_XINT_PEMP
| APC_XINT_GENL
|
1872 if (base
->dir
== APC_RECORD
)
1873 test
= APC_GENL_INT
| APC_CAPT_INT
| APC_XINT_ENA
|
1874 APC_XINT_CAPT
| APC_XINT_CEMP
| APC_XINT_GENL
;
1876 sbus_writel(csr
, base
->regs
+ APCCSR
);
1877 spin_unlock_irqrestore(&base
->lock
, flags
);
1880 static void sbus_dma_enable(struct cs4231_dma_control
*dma_cont
, int on
)
1882 unsigned long flags
;
1884 struct sbus_dma_info
*base
= &dma_cont
->sbus_info
;
1886 spin_lock_irqsave(&base
->lock
, flags
);
1888 sbus_writel(0, base
->regs
+ base
->dir
+ APCNC
);
1889 sbus_writel(0, base
->regs
+ base
->dir
+ APCNVA
);
1890 if (base
->dir
== APC_PLAY
) {
1891 sbus_writel(0, base
->regs
+ base
->dir
+ APCC
);
1892 sbus_writel(0, base
->regs
+ base
->dir
+ APCVA
);
1897 csr
= sbus_readl(base
->regs
+ APCCSR
);
1899 if (base
->dir
== APC_PLAY
)
1902 csr
&= ~(APC_CPAUSE
<< shift
);
1904 csr
|= (APC_CPAUSE
<< shift
);
1905 sbus_writel(csr
, base
->regs
+ APCCSR
);
1907 csr
|= (APC_CDMA_READY
<< shift
);
1909 csr
&= ~(APC_CDMA_READY
<< shift
);
1910 sbus_writel(csr
, base
->regs
+ APCCSR
);
1912 spin_unlock_irqrestore(&base
->lock
, flags
);
1915 static unsigned int sbus_dma_addr(struct cs4231_dma_control
*dma_cont
)
1917 struct sbus_dma_info
*base
= &dma_cont
->sbus_info
;
1919 return sbus_readl(base
->regs
+ base
->dir
+ APCVA
);
1922 static void sbus_dma_preallocate(struct snd_cs4231
*chip
, struct snd_pcm
*pcm
)
1924 snd_pcm_lib_preallocate_pages_for_all(pcm
, SNDRV_DMA_TYPE_SBUS
,
1925 snd_dma_sbus_data(chip
->dev_u
.sdev
),
1926 64 * 1024, 128 * 1024);
1930 * Init and exit routines
1933 static int snd_cs4231_sbus_free(struct snd_cs4231
*chip
)
1936 free_irq(chip
->irq
[0], chip
);
1939 sbus_iounmap(chip
->port
, chip
->regs_size
);
1944 static int snd_cs4231_sbus_dev_free(struct snd_device
*device
)
1946 struct snd_cs4231
*cp
= device
->device_data
;
1948 return snd_cs4231_sbus_free(cp
);
1951 static struct snd_device_ops snd_cs4231_sbus_dev_ops
= {
1952 .dev_free
= snd_cs4231_sbus_dev_free
,
1955 static int __init
snd_cs4231_sbus_create(struct snd_card
*card
,
1956 struct sbus_dev
*sdev
,
1959 struct snd_cs4231
*chip
= card
->private_data
;
1962 spin_lock_init(&chip
->lock
);
1963 spin_lock_init(&chip
->c_dma
.sbus_info
.lock
);
1964 spin_lock_init(&chip
->p_dma
.sbus_info
.lock
);
1965 mutex_init(&chip
->mce_mutex
);
1966 mutex_init(&chip
->open_mutex
);
1967 chip
->dev_u
.sdev
= sdev
;
1968 chip
->regs_size
= sdev
->reg_addrs
[0].reg_size
;
1969 memcpy(&chip
->image
, &snd_cs4231_original_image
,
1970 sizeof(snd_cs4231_original_image
));
1972 chip
->port
= sbus_ioremap(&sdev
->resource
[0], 0,
1973 chip
->regs_size
, "cs4231");
1975 snd_printdd("cs4231-%d: Unable to map chip registers.\n", dev
);
1979 chip
->c_dma
.sbus_info
.regs
= chip
->port
;
1980 chip
->p_dma
.sbus_info
.regs
= chip
->port
;
1981 chip
->c_dma
.sbus_info
.dir
= APC_RECORD
;
1982 chip
->p_dma
.sbus_info
.dir
= APC_PLAY
;
1984 chip
->p_dma
.prepare
= sbus_dma_prepare
;
1985 chip
->p_dma
.enable
= sbus_dma_enable
;
1986 chip
->p_dma
.request
= sbus_dma_request
;
1987 chip
->p_dma
.address
= sbus_dma_addr
;
1988 chip
->p_dma
.preallocate
= sbus_dma_preallocate
;
1990 chip
->c_dma
.prepare
= sbus_dma_prepare
;
1991 chip
->c_dma
.enable
= sbus_dma_enable
;
1992 chip
->c_dma
.request
= sbus_dma_request
;
1993 chip
->c_dma
.address
= sbus_dma_addr
;
1994 chip
->c_dma
.preallocate
= sbus_dma_preallocate
;
1996 if (request_irq(sdev
->irqs
[0], snd_cs4231_sbus_interrupt
,
1997 IRQF_SHARED
, "cs4231", chip
)) {
1998 snd_printdd("cs4231-%d: Unable to grab SBUS IRQ %d\n",
1999 dev
, sdev
->irqs
[0]);
2000 snd_cs4231_sbus_free(chip
);
2003 chip
->irq
[0] = sdev
->irqs
[0];
2005 if (snd_cs4231_probe(chip
) < 0) {
2006 snd_cs4231_sbus_free(chip
);
2009 snd_cs4231_init(chip
);
2011 if ((err
= snd_device_new(card
, SNDRV_DEV_LOWLEVEL
,
2012 chip
, &snd_cs4231_sbus_dev_ops
)) < 0) {
2013 snd_cs4231_sbus_free(chip
);
2020 static int __init
cs4231_sbus_attach(struct sbus_dev
*sdev
)
2022 struct resource
*rp
= &sdev
->resource
[0];
2023 struct snd_card
*card
;
2026 err
= cs4231_attach_begin(&card
);
2030 sprintf(card
->longname
, "%s at 0x%02lx:0x%016Lx, irq %d",
2033 (unsigned long long)rp
->start
,
2036 err
= snd_cs4231_sbus_create(card
, sdev
, dev
);
2038 snd_card_free(card
);
2042 return cs4231_attach_finish(card
);
2048 static void snd_cs4231_ebus_play_callback(struct ebus_dma_info
*p
, int event
,
2051 struct snd_cs4231
*chip
= cookie
;
2053 snd_cs4231_play_callback(chip
);
2056 static void snd_cs4231_ebus_capture_callback(struct ebus_dma_info
*p
,
2057 int event
, void *cookie
)
2059 struct snd_cs4231
*chip
= cookie
;
2061 snd_cs4231_capture_callback(chip
);
2068 static int _ebus_dma_request(struct cs4231_dma_control
*dma_cont
,
2069 dma_addr_t bus_addr
, size_t len
)
2071 return ebus_dma_request(&dma_cont
->ebus_info
, bus_addr
, len
);
2074 static void _ebus_dma_enable(struct cs4231_dma_control
*dma_cont
, int on
)
2076 ebus_dma_enable(&dma_cont
->ebus_info
, on
);
2079 static void _ebus_dma_prepare(struct cs4231_dma_control
*dma_cont
, int dir
)
2081 ebus_dma_prepare(&dma_cont
->ebus_info
, dir
);
2084 static unsigned int _ebus_dma_addr(struct cs4231_dma_control
*dma_cont
)
2086 return ebus_dma_addr(&dma_cont
->ebus_info
);
2089 static void _ebus_dma_preallocate(struct snd_cs4231
*chip
, struct snd_pcm
*pcm
)
2091 snd_pcm_lib_preallocate_pages_for_all(pcm
, SNDRV_DMA_TYPE_DEV
,
2092 snd_dma_pci_data(chip
->dev_u
.pdev
),
2097 * Init and exit routines
2100 static int snd_cs4231_ebus_free(struct snd_cs4231
*chip
)
2102 if (chip
->c_dma
.ebus_info
.regs
) {
2103 ebus_dma_unregister(&chip
->c_dma
.ebus_info
);
2104 iounmap(chip
->c_dma
.ebus_info
.regs
);
2106 if (chip
->p_dma
.ebus_info
.regs
) {
2107 ebus_dma_unregister(&chip
->p_dma
.ebus_info
);
2108 iounmap(chip
->p_dma
.ebus_info
.regs
);
2112 iounmap(chip
->port
);
2117 static int snd_cs4231_ebus_dev_free(struct snd_device
*device
)
2119 struct snd_cs4231
*cp
= device
->device_data
;
2121 return snd_cs4231_ebus_free(cp
);
2124 static struct snd_device_ops snd_cs4231_ebus_dev_ops
= {
2125 .dev_free
= snd_cs4231_ebus_dev_free
,
2128 static int __init
snd_cs4231_ebus_create(struct snd_card
*card
,
2129 struct linux_ebus_device
*edev
,
2132 struct snd_cs4231
*chip
= card
->private_data
;
2135 spin_lock_init(&chip
->lock
);
2136 spin_lock_init(&chip
->c_dma
.ebus_info
.lock
);
2137 spin_lock_init(&chip
->p_dma
.ebus_info
.lock
);
2138 mutex_init(&chip
->mce_mutex
);
2139 mutex_init(&chip
->open_mutex
);
2140 chip
->flags
|= CS4231_FLAG_EBUS
;
2141 chip
->dev_u
.pdev
= edev
->bus
->self
;
2142 memcpy(&chip
->image
, &snd_cs4231_original_image
,
2143 sizeof(snd_cs4231_original_image
));
2144 strcpy(chip
->c_dma
.ebus_info
.name
, "cs4231(capture)");
2145 chip
->c_dma
.ebus_info
.flags
= EBUS_DMA_FLAG_USE_EBDMA_HANDLER
;
2146 chip
->c_dma
.ebus_info
.callback
= snd_cs4231_ebus_capture_callback
;
2147 chip
->c_dma
.ebus_info
.client_cookie
= chip
;
2148 chip
->c_dma
.ebus_info
.irq
= edev
->irqs
[0];
2149 strcpy(chip
->p_dma
.ebus_info
.name
, "cs4231(play)");
2150 chip
->p_dma
.ebus_info
.flags
= EBUS_DMA_FLAG_USE_EBDMA_HANDLER
;
2151 chip
->p_dma
.ebus_info
.callback
= snd_cs4231_ebus_play_callback
;
2152 chip
->p_dma
.ebus_info
.client_cookie
= chip
;
2153 chip
->p_dma
.ebus_info
.irq
= edev
->irqs
[1];
2155 chip
->p_dma
.prepare
= _ebus_dma_prepare
;
2156 chip
->p_dma
.enable
= _ebus_dma_enable
;
2157 chip
->p_dma
.request
= _ebus_dma_request
;
2158 chip
->p_dma
.address
= _ebus_dma_addr
;
2159 chip
->p_dma
.preallocate
= _ebus_dma_preallocate
;
2161 chip
->c_dma
.prepare
= _ebus_dma_prepare
;
2162 chip
->c_dma
.enable
= _ebus_dma_enable
;
2163 chip
->c_dma
.request
= _ebus_dma_request
;
2164 chip
->c_dma
.address
= _ebus_dma_addr
;
2165 chip
->c_dma
.preallocate
= _ebus_dma_preallocate
;
2167 chip
->port
= ioremap(edev
->resource
[0].start
, 0x10);
2168 chip
->p_dma
.ebus_info
.regs
= ioremap(edev
->resource
[1].start
, 0x10);
2169 chip
->c_dma
.ebus_info
.regs
= ioremap(edev
->resource
[2].start
, 0x10);
2170 if (!chip
->port
|| !chip
->p_dma
.ebus_info
.regs
||
2171 !chip
->c_dma
.ebus_info
.regs
) {
2172 snd_cs4231_ebus_free(chip
);
2173 snd_printdd("cs4231-%d: Unable to map chip registers.\n", dev
);
2177 if (ebus_dma_register(&chip
->c_dma
.ebus_info
)) {
2178 snd_cs4231_ebus_free(chip
);
2179 snd_printdd("cs4231-%d: Unable to register EBUS capture DMA\n",
2183 if (ebus_dma_irq_enable(&chip
->c_dma
.ebus_info
, 1)) {
2184 snd_cs4231_ebus_free(chip
);
2185 snd_printdd("cs4231-%d: Unable to enable EBUS capture IRQ\n",
2190 if (ebus_dma_register(&chip
->p_dma
.ebus_info
)) {
2191 snd_cs4231_ebus_free(chip
);
2192 snd_printdd("cs4231-%d: Unable to register EBUS play DMA\n",
2196 if (ebus_dma_irq_enable(&chip
->p_dma
.ebus_info
, 1)) {
2197 snd_cs4231_ebus_free(chip
);
2198 snd_printdd("cs4231-%d: Unable to enable EBUS play IRQ\n", dev
);
2202 if (snd_cs4231_probe(chip
) < 0) {
2203 snd_cs4231_ebus_free(chip
);
2206 snd_cs4231_init(chip
);
2208 if ((err
= snd_device_new(card
, SNDRV_DEV_LOWLEVEL
,
2209 chip
, &snd_cs4231_ebus_dev_ops
)) < 0) {
2210 snd_cs4231_ebus_free(chip
);
2217 static int __init
cs4231_ebus_attach(struct linux_ebus_device
*edev
)
2219 struct snd_card
*card
;
2222 err
= cs4231_attach_begin(&card
);
2226 sprintf(card
->longname
, "%s at 0x%lx, irq %d",
2228 edev
->resource
[0].start
,
2231 err
= snd_cs4231_ebus_create(card
, edev
, dev
);
2233 snd_card_free(card
);
2237 return cs4231_attach_finish(card
);
2241 static int __init
cs4231_init(void)
2244 struct sbus_bus
*sbus
;
2245 struct sbus_dev
*sdev
;
2248 struct linux_ebus
*ebus
;
2249 struct linux_ebus_device
*edev
;
2256 for_all_sbusdev(sdev
, sbus
) {
2257 if (!strcmp(sdev
->prom_name
, "SUNW,CS4231")) {
2258 if (cs4231_sbus_attach(sdev
) == 0)
2264 for_each_ebus(ebus
) {
2265 for_each_ebusdev(edev
, ebus
) {
2268 if (!strcmp(edev
->prom_node
->name
, "SUNW,CS4231")) {
2270 } else if (!strcmp(edev
->prom_node
->name
, "audio")) {
2273 compat
= of_get_property(edev
->prom_node
,
2274 "compatible", NULL
);
2275 if (compat
&& !strcmp(compat
, "SUNW,CS4231"))
2280 cs4231_ebus_attach(edev
) == 0)
2287 return (found
> 0) ? 0 : -EIO
;
2290 static void __exit
cs4231_exit(void)
2292 struct snd_cs4231
*p
= cs4231_list
;
2295 struct snd_cs4231
*next
= p
->next
;
2297 snd_card_free(p
->card
);
2305 module_init(cs4231_init
);
2306 module_exit(cs4231_exit
);