2 * Low-Level PCI Support for PC -- Routing of Interrupts
4 * (c) 1999--2000 Martin Mares <mj@ucw.cz>
7 #include <linux/types.h>
8 #include <linux/kernel.h>
10 #include <linux/init.h>
11 #include <linux/slab.h>
12 #include <linux/interrupt.h>
13 #include <linux/dmi.h>
15 #include <linux/smp.h>
16 #include <asm/io_apic.h>
17 #include <linux/irq.h>
18 #include <linux/acpi.h>
22 #define PIRQ_SIGNATURE (('$' << 0) + ('P' << 8) + ('I' << 16) + ('R' << 24))
23 #define PIRQ_VERSION 0x0100
25 static int broken_hp_bios_irq9
;
26 static int acer_tm360_irqrouting
;
28 static struct irq_routing_table
*pirq_table
;
30 static int pirq_enable_irq(struct pci_dev
*dev
);
33 * Never use: 0, 1, 2 (timer, keyboard, and cascade)
34 * Avoid using: 13, 14 and 15 (FP error and IDE).
35 * Penalize: 3, 4, 6, 7, 12 (known ISA uses: serial, floppy, parallel and mouse)
37 unsigned int pcibios_irq_mask
= 0xfff8;
39 static int pirq_penalty
[16] = {
40 1000000, 1000000, 1000000, 1000, 1000, 0, 1000, 1000,
41 0, 0, 0, 0, 1000, 100000, 100000, 100000
47 int (*get
)(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
);
48 int (*set
)(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
,
52 struct irq_router_handler
{
54 int (*probe
)(struct irq_router
*r
, struct pci_dev
*router
, u16 device
);
57 int (*pcibios_enable_irq
)(struct pci_dev
*dev
) = NULL
;
58 void (*pcibios_disable_irq
)(struct pci_dev
*dev
) = NULL
;
61 * Check passed address for the PCI IRQ Routing Table signature
62 * and perform checksum verification.
65 static inline struct irq_routing_table
*pirq_check_routing_table(u8
*addr
)
67 struct irq_routing_table
*rt
;
71 rt
= (struct irq_routing_table
*) addr
;
72 if (rt
->signature
!= PIRQ_SIGNATURE
||
73 rt
->version
!= PIRQ_VERSION
||
75 rt
->size
< sizeof(struct irq_routing_table
))
78 for (i
= 0; i
< rt
->size
; i
++)
81 DBG(KERN_DEBUG
"PCI: Interrupt Routing Table found at 0x%p\n",
91 * Search 0xf0000 -- 0xfffff for the PCI IRQ Routing Table.
94 static struct irq_routing_table
* __init
pirq_find_routing_table(void)
97 struct irq_routing_table
*rt
;
99 if (pirq_table_addr
) {
100 rt
= pirq_check_routing_table((u8
*) __va(pirq_table_addr
));
103 printk(KERN_WARNING
"PCI: PIRQ table NOT found at pirqaddr\n");
105 for (addr
= (u8
*) __va(0xf0000); addr
< (u8
*) __va(0x100000);
107 rt
= pirq_check_routing_table(addr
);
115 * If we have a IRQ routing table, use it to search for peer host
116 * bridges. It's a gross hack, but since there are no other known
117 * ways how to get a list of buses, we have to go this way.
120 static void __init
pirq_peer_trick(void)
122 struct irq_routing_table
*rt
= pirq_table
;
127 memset(busmap
, 0, sizeof(busmap
));
128 for (i
= 0; i
< (rt
->size
- sizeof(struct irq_routing_table
)) /
129 sizeof(struct irq_info
); i
++) {
134 DBG(KERN_DEBUG
"%02x:%02x slot=%02x", e
->bus
,
135 e
->devfn
/8, e
->slot
);
136 for (j
= 0; j
< 4; j
++)
137 DBG(" %d:%02x/%04x", j
, e
->irq
[j
].link
,
144 for (i
= 1; i
< 256; i
++) {
146 if (!busmap
[i
] || pci_find_bus(0, i
))
148 node
= get_mp_bus_to_node(i
);
149 if (pci_scan_bus_on_node(i
, &pci_root_ops
, node
))
150 printk(KERN_INFO
"PCI: Discovered primary peer "
151 "bus %02x [IRQ]\n", i
);
153 pcibios_last_bus
= -1;
157 * Code for querying and setting of IRQ routes on various interrupt routers.
160 void eisa_set_level_irq(unsigned int irq
)
162 unsigned char mask
= 1 << (irq
& 7);
163 unsigned int port
= 0x4d0 + (irq
>> 3);
165 static u16 eisa_irq_mask
;
167 if (irq
>= 16 || (1 << irq
) & eisa_irq_mask
)
170 eisa_irq_mask
|= (1 << irq
);
171 printk(KERN_DEBUG
"PCI: setting IRQ %u as level-triggered\n", irq
);
174 DBG(KERN_DEBUG
" -> edge");
175 outb(val
| mask
, port
);
180 * Common IRQ routing practice: nibbles in config space,
181 * offset by some magic constant.
184 read_config_nybble(struct pci_dev
*router
, unsigned offset
, unsigned nr
)
187 unsigned reg
= offset
+ (nr
>> 1);
189 pci_read_config_byte(router
, reg
, &x
);
190 return (nr
& 1) ? (x
>> 4) : (x
& 0xf);
193 static void write_config_nybble(struct pci_dev
*router
, unsigned offset
,
194 unsigned nr
, unsigned int val
)
197 unsigned reg
= offset
+ (nr
>> 1);
199 pci_read_config_byte(router
, reg
, &x
);
200 x
= (nr
& 1) ? ((x
& 0x0f) | (val
<< 4)) : ((x
& 0xf0) | val
);
201 pci_write_config_byte(router
, reg
, x
);
205 * ALI pirq entries are damn ugly, and completely undocumented.
206 * This has been figured out from pirq tables, and it's not a pretty
209 static int pirq_ali_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
211 static const unsigned char irqmap
[16] = { 0, 9, 3, 10, 4, 5, 7, 6, 1,
212 11, 0, 12, 0, 14, 0, 15 };
214 WARN_ON_ONCE(pirq
> 16);
215 return irqmap
[read_config_nybble(router
, 0x48, pirq
-1)];
219 pirq_ali_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
221 static const unsigned char irqmap
[16] = { 0, 8, 0, 2, 4, 5, 7, 6, 0, 1,
222 3, 9, 11, 0, 13, 15 };
223 unsigned int val
= irqmap
[irq
];
225 WARN_ON_ONCE(pirq
> 16);
227 write_config_nybble(router
, 0x48, pirq
-1, val
);
234 * The Intel PIIX4 pirq rules are fairly simple: "pirq" is
235 * just a pointer to the config space.
237 static int pirq_piix_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
241 pci_read_config_byte(router
, pirq
, &x
);
242 return (x
< 16) ? x
: 0;
246 pirq_piix_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
248 pci_write_config_byte(router
, pirq
, irq
);
253 * The VIA pirq rules are nibble-based, like ALI,
254 * but without the ugly irq number munging.
255 * However, PIRQD is in the upper instead of lower 4 bits.
257 static int pirq_via_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
259 return read_config_nybble(router
, 0x55, pirq
== 4 ? 5 : pirq
);
263 pirq_via_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
265 write_config_nybble(router
, 0x55, pirq
== 4 ? 5 : pirq
, irq
);
270 * The VIA pirq rules are nibble-based, like ALI,
271 * but without the ugly irq number munging.
272 * However, for 82C586, nibble map is different .
275 pirq_via586_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
277 static const unsigned int pirqmap
[5] = { 3, 2, 5, 1, 1 };
279 WARN_ON_ONCE(pirq
> 5);
280 return read_config_nybble(router
, 0x55, pirqmap
[pirq
-1]);
284 pirq_via586_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
286 static const unsigned int pirqmap
[5] = { 3, 2, 5, 1, 1 };
288 WARN_ON_ONCE(pirq
> 5);
289 write_config_nybble(router
, 0x55, pirqmap
[pirq
-1], irq
);
294 * ITE 8330G pirq rules are nibble-based
295 * FIXME: pirqmap may be { 1, 0, 3, 2 },
296 * 2+3 are both mapped to irq 9 on my system
298 static int pirq_ite_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
300 static const unsigned char pirqmap
[4] = { 1, 0, 2, 3 };
302 WARN_ON_ONCE(pirq
> 4);
303 return read_config_nybble(router
, 0x43, pirqmap
[pirq
-1]);
307 pirq_ite_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
309 static const unsigned char pirqmap
[4] = { 1, 0, 2, 3 };
311 WARN_ON_ONCE(pirq
> 4);
312 write_config_nybble(router
, 0x43, pirqmap
[pirq
-1], irq
);
317 * OPTI: high four bits are nibble pointer..
318 * I wonder what the low bits do?
320 static int pirq_opti_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
322 return read_config_nybble(router
, 0xb8, pirq
>> 4);
326 pirq_opti_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
328 write_config_nybble(router
, 0xb8, pirq
>> 4, irq
);
333 * Cyrix: nibble offset 0x5C
334 * 0x5C bits 7:4 is INTB bits 3:0 is INTA
335 * 0x5D bits 7:4 is INTD bits 3:0 is INTC
337 static int pirq_cyrix_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
339 return read_config_nybble(router
, 0x5C, (pirq
-1)^1);
343 pirq_cyrix_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
345 write_config_nybble(router
, 0x5C, (pirq
-1)^1, irq
);
350 * PIRQ routing for SiS 85C503 router used in several SiS chipsets.
351 * We have to deal with the following issues here:
352 * - vendors have different ideas about the meaning of link values
353 * - some onboard devices (integrated in the chipset) have special
354 * links and are thus routed differently (i.e. not via PCI INTA-INTD)
355 * - different revision of the router have a different layout for
356 * the routing registers, particularly for the onchip devices
358 * For all routing registers the common thing is we have one byte
359 * per routeable link which is defined as:
360 * bit 7 IRQ mapping enabled (0) or disabled (1)
361 * bits [6:4] reserved (sometimes used for onchip devices)
362 * bits [3:0] IRQ to map to
363 * allowed: 3-7, 9-12, 14-15
364 * reserved: 0, 1, 2, 8, 13
366 * The config-space registers located at 0x41/0x42/0x43/0x44 are
367 * always used to route the normal PCI INT A/B/C/D respectively.
368 * Apparently there are systems implementing PCI routing table using
369 * link values 0x01-0x04 and others using 0x41-0x44 for PCI INTA..D.
370 * We try our best to handle both link mappings.
372 * Currently (2003-05-21) it appears most SiS chipsets follow the
373 * definition of routing registers from the SiS-5595 southbridge.
374 * According to the SiS 5595 datasheets the revision id's of the
375 * router (ISA-bridge) should be 0x01 or 0xb0.
377 * Furthermore we've also seen lspci dumps with revision 0x00 and 0xb1.
378 * Looks like these are used in a number of SiS 5xx/6xx/7xx chipsets.
379 * They seem to work with the current routing code. However there is
380 * some concern because of the two USB-OHCI HCs (original SiS 5595
381 * had only one). YMMV.
383 * Onchip routing for router rev-id 0x01/0xb0 and probably 0x00/0xb1:
386 * bits [6:5] must be written 01
387 * bit 4 channel-select primary (0), secondary (1)
390 * bit 6 OHCI function disabled (0), enabled (1)
392 * 0x6a: ACPI/SCI IRQ: bits 4-6 reserved
394 * 0x7e: Data Acq. Module IRQ - bits 4-6 reserved
396 * We support USBIRQ (in addition to INTA-INTD) and keep the
397 * IDE, ACPI and DAQ routing untouched as set by the BIOS.
399 * Currently the only reported exception is the new SiS 65x chipset
400 * which includes the SiS 69x southbridge. Here we have the 85C503
401 * router revision 0x04 and there are changes in the register layout
402 * mostly related to the different USB HCs with USB 2.0 support.
404 * Onchip routing for router rev-id 0x04 (try-and-error observation)
406 * 0x60/0x61/0x62/0x63: 1xEHCI and 3xOHCI (companion) USB-HCs
407 * bit 6-4 are probably unused, not like 5595
410 #define PIRQ_SIS_IRQ_MASK 0x0f
411 #define PIRQ_SIS_IRQ_DISABLE 0x80
412 #define PIRQ_SIS_USB_ENABLE 0x40
414 static int pirq_sis_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
420 if (reg
>= 0x01 && reg
<= 0x04)
422 pci_read_config_byte(router
, reg
, &x
);
423 return (x
& PIRQ_SIS_IRQ_DISABLE
) ? 0 : (x
& PIRQ_SIS_IRQ_MASK
);
427 pirq_sis_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
433 if (reg
>= 0x01 && reg
<= 0x04)
435 pci_read_config_byte(router
, reg
, &x
);
436 x
&= ~(PIRQ_SIS_IRQ_MASK
| PIRQ_SIS_IRQ_DISABLE
);
437 x
|= irq
? irq
: PIRQ_SIS_IRQ_DISABLE
;
438 pci_write_config_byte(router
, reg
, x
);
444 * VLSI: nibble offset 0x74 - educated guess due to routing table and
445 * config space of VLSI 82C534 PCI-bridge/router (1004:0102)
446 * Tested on HP OmniBook 800 covering PIRQ 1, 2, 4, 8 for onboard
447 * devices, PIRQ 3 for non-pci(!) soundchip and (untested) PIRQ 6
448 * for the busbridge to the docking station.
451 static int pirq_vlsi_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
453 WARN_ON_ONCE(pirq
>= 9);
455 printk(KERN_INFO
"VLSI router pirq escape (%d)\n", pirq
);
458 return read_config_nybble(router
, 0x74, pirq
-1);
462 pirq_vlsi_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
464 WARN_ON_ONCE(pirq
>= 9);
466 printk(KERN_INFO
"VLSI router pirq escape (%d)\n", pirq
);
469 write_config_nybble(router
, 0x74, pirq
-1, irq
);
474 * ServerWorks: PCI interrupts mapped to system IRQ lines through Index
475 * and Redirect I/O registers (0x0c00 and 0x0c01). The Index register
476 * format is (PCIIRQ## | 0x10), e.g.: PCIIRQ10=0x1a. The Redirect
477 * register is a straight binary coding of desired PIC IRQ (low nibble).
479 * The 'link' value in the PIRQ table is already in the correct format
480 * for the Index register. There are some special index values:
481 * 0x00 for ACPI (SCI), 0x01 for USB, 0x02 for IDE0, 0x04 for IDE1,
482 * and 0x03 for SMBus.
485 pirq_serverworks_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
488 return inb(0xc01) & 0xf;
491 static int pirq_serverworks_set(struct pci_dev
*router
, struct pci_dev
*dev
,
499 /* Support for AMD756 PCI IRQ Routing
500 * Jhon H. Caicedo <jhcaiced@osso.org.co>
501 * Jun/21/2001 0.2.0 Release, fixed to use "nybble" functions... (jhcaiced)
502 * Jun/19/2001 Alpha Release 0.1.0 (jhcaiced)
503 * The AMD756 pirq rules are nibble-based
504 * offset 0x56 0-3 PIRQA 4-7 PIRQB
505 * offset 0x57 0-3 PIRQC 4-7 PIRQD
508 pirq_amd756_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
513 irq
= read_config_nybble(router
, 0x56, pirq
- 1);
515 "AMD756: dev %04x:%04x, router pirq : %d get irq : %2d\n",
516 dev
->vendor
, dev
->device
, pirq
, irq
);
521 pirq_amd756_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
524 "AMD756: dev %04x:%04x, router pirq : %d SET irq : %2d\n",
525 dev
->vendor
, dev
->device
, pirq
, irq
);
527 write_config_nybble(router
, 0x56, pirq
- 1, irq
);
534 static int pirq_pico_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
536 outb(0x10 + ((pirq
- 1) >> 1), 0x24);
537 return ((pirq
- 1) & 1) ? (inb(0x26) >> 4) : (inb(0x26) & 0xf);
540 static int pirq_pico_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
,
544 outb(0x10 + ((pirq
- 1) >> 1), 0x24);
546 x
= ((pirq
- 1) & 1) ? ((x
& 0x0f) | (irq
<< 4)) : ((x
& 0xf0) | (irq
));
551 #ifdef CONFIG_PCI_BIOS
554 pirq_bios_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
556 struct pci_dev
*bridge
;
557 int pin
= pci_get_interrupt_pin(dev
, &bridge
);
558 return pcibios_set_irq_routing(bridge
, pin
, irq
);
564 intel_router_probe(struct irq_router
*r
, struct pci_dev
*router
, u16 device
)
566 static struct pci_device_id __initdata pirq_440gx
[] = {
567 { PCI_DEVICE(PCI_VENDOR_ID_INTEL
,
568 PCI_DEVICE_ID_INTEL_82443GX_0
) },
569 { PCI_DEVICE(PCI_VENDOR_ID_INTEL
,
570 PCI_DEVICE_ID_INTEL_82443GX_2
) },
574 /* 440GX has a proprietary PIRQ router -- don't use it */
575 if (pci_dev_present(pirq_440gx
))
579 case PCI_DEVICE_ID_INTEL_82371FB_0
:
580 case PCI_DEVICE_ID_INTEL_82371SB_0
:
581 case PCI_DEVICE_ID_INTEL_82371AB_0
:
582 case PCI_DEVICE_ID_INTEL_82371MX
:
583 case PCI_DEVICE_ID_INTEL_82443MX_0
:
584 case PCI_DEVICE_ID_INTEL_82801AA_0
:
585 case PCI_DEVICE_ID_INTEL_82801AB_0
:
586 case PCI_DEVICE_ID_INTEL_82801BA_0
:
587 case PCI_DEVICE_ID_INTEL_82801BA_10
:
588 case PCI_DEVICE_ID_INTEL_82801CA_0
:
589 case PCI_DEVICE_ID_INTEL_82801CA_12
:
590 case PCI_DEVICE_ID_INTEL_82801DB_0
:
591 case PCI_DEVICE_ID_INTEL_82801E_0
:
592 case PCI_DEVICE_ID_INTEL_82801EB_0
:
593 case PCI_DEVICE_ID_INTEL_ESB_1
:
594 case PCI_DEVICE_ID_INTEL_ICH6_0
:
595 case PCI_DEVICE_ID_INTEL_ICH6_1
:
596 case PCI_DEVICE_ID_INTEL_ICH7_0
:
597 case PCI_DEVICE_ID_INTEL_ICH7_1
:
598 case PCI_DEVICE_ID_INTEL_ICH7_30
:
599 case PCI_DEVICE_ID_INTEL_ICH7_31
:
600 case PCI_DEVICE_ID_INTEL_ESB2_0
:
601 case PCI_DEVICE_ID_INTEL_ICH8_0
:
602 case PCI_DEVICE_ID_INTEL_ICH8_1
:
603 case PCI_DEVICE_ID_INTEL_ICH8_2
:
604 case PCI_DEVICE_ID_INTEL_ICH8_3
:
605 case PCI_DEVICE_ID_INTEL_ICH8_4
:
606 case PCI_DEVICE_ID_INTEL_ICH9_0
:
607 case PCI_DEVICE_ID_INTEL_ICH9_1
:
608 case PCI_DEVICE_ID_INTEL_ICH9_2
:
609 case PCI_DEVICE_ID_INTEL_ICH9_3
:
610 case PCI_DEVICE_ID_INTEL_ICH9_4
:
611 case PCI_DEVICE_ID_INTEL_ICH9_5
:
612 case PCI_DEVICE_ID_INTEL_TOLAPAI_0
:
613 case PCI_DEVICE_ID_INTEL_ICH10_0
:
614 case PCI_DEVICE_ID_INTEL_ICH10_1
:
615 case PCI_DEVICE_ID_INTEL_ICH10_2
:
616 case PCI_DEVICE_ID_INTEL_ICH10_3
:
617 r
->name
= "PIIX/ICH";
618 r
->get
= pirq_piix_get
;
619 r
->set
= pirq_piix_set
;
625 static __init
int via_router_probe(struct irq_router
*r
,
626 struct pci_dev
*router
, u16 device
)
628 /* FIXME: We should move some of the quirk fixup stuff here */
631 * workarounds for some buggy BIOSes
633 if (device
== PCI_DEVICE_ID_VIA_82C586_0
) {
634 switch (router
->device
) {
635 case PCI_DEVICE_ID_VIA_82C686
:
637 * Asus k7m bios wrongly reports 82C686A
640 device
= PCI_DEVICE_ID_VIA_82C686
;
642 case PCI_DEVICE_ID_VIA_8235
:
644 * Asus a7v-x bios wrongly reports 8235
647 device
= PCI_DEVICE_ID_VIA_8235
;
649 case PCI_DEVICE_ID_VIA_8237
:
651 * Asus a7v600 bios wrongly reports 8237
654 device
= PCI_DEVICE_ID_VIA_8237
;
660 case PCI_DEVICE_ID_VIA_82C586_0
:
662 r
->get
= pirq_via586_get
;
663 r
->set
= pirq_via586_set
;
665 case PCI_DEVICE_ID_VIA_82C596
:
666 case PCI_DEVICE_ID_VIA_82C686
:
667 case PCI_DEVICE_ID_VIA_8231
:
668 case PCI_DEVICE_ID_VIA_8233A
:
669 case PCI_DEVICE_ID_VIA_8235
:
670 case PCI_DEVICE_ID_VIA_8237
:
671 /* FIXME: add new ones for 8233/5 */
673 r
->get
= pirq_via_get
;
674 r
->set
= pirq_via_set
;
681 vlsi_router_probe(struct irq_router
*r
, struct pci_dev
*router
, u16 device
)
684 case PCI_DEVICE_ID_VLSI_82C534
:
685 r
->name
= "VLSI 82C534";
686 r
->get
= pirq_vlsi_get
;
687 r
->set
= pirq_vlsi_set
;
694 static __init
int serverworks_router_probe(struct irq_router
*r
,
695 struct pci_dev
*router
, u16 device
)
698 case PCI_DEVICE_ID_SERVERWORKS_OSB4
:
699 case PCI_DEVICE_ID_SERVERWORKS_CSB5
:
700 r
->name
= "ServerWorks";
701 r
->get
= pirq_serverworks_get
;
702 r
->set
= pirq_serverworks_set
;
709 sis_router_probe(struct irq_router
*r
, struct pci_dev
*router
, u16 device
)
711 if (device
!= PCI_DEVICE_ID_SI_503
)
715 r
->get
= pirq_sis_get
;
716 r
->set
= pirq_sis_set
;
721 cyrix_router_probe(struct irq_router
*r
, struct pci_dev
*router
, u16 device
)
724 case PCI_DEVICE_ID_CYRIX_5520
:
726 r
->get
= pirq_cyrix_get
;
727 r
->set
= pirq_cyrix_set
;
734 opti_router_probe(struct irq_router
*r
, struct pci_dev
*router
, u16 device
)
737 case PCI_DEVICE_ID_OPTI_82C700
:
739 r
->get
= pirq_opti_get
;
740 r
->set
= pirq_opti_set
;
747 ite_router_probe(struct irq_router
*r
, struct pci_dev
*router
, u16 device
)
750 case PCI_DEVICE_ID_ITE_IT8330G_0
:
752 r
->get
= pirq_ite_get
;
753 r
->set
= pirq_ite_set
;
760 ali_router_probe(struct irq_router
*r
, struct pci_dev
*router
, u16 device
)
763 case PCI_DEVICE_ID_AL_M1533
:
764 case PCI_DEVICE_ID_AL_M1563
:
765 printk(KERN_DEBUG
"PCI: Using ALI IRQ Router\n");
767 r
->get
= pirq_ali_get
;
768 r
->set
= pirq_ali_set
;
775 amd_router_probe(struct irq_router
*r
, struct pci_dev
*router
, u16 device
)
778 case PCI_DEVICE_ID_AMD_VIPER_740B
:
781 case PCI_DEVICE_ID_AMD_VIPER_7413
:
784 case PCI_DEVICE_ID_AMD_VIPER_7443
:
790 r
->get
= pirq_amd756_get
;
791 r
->set
= pirq_amd756_set
;
796 pico_router_probe(struct irq_router
*r
, struct pci_dev
*router
, u16 device
)
799 case PCI_DEVICE_ID_PICOPOWER_PT86C523
:
800 r
->name
= "PicoPower PT86C523";
801 r
->get
= pirq_pico_get
;
802 r
->set
= pirq_pico_set
;
805 case PCI_DEVICE_ID_PICOPOWER_PT86C523BBP
:
806 r
->name
= "PicoPower PT86C523 rev. BB+";
807 r
->get
= pirq_pico_get
;
808 r
->set
= pirq_pico_set
;
814 static __initdata
struct irq_router_handler pirq_routers
[] = {
815 { PCI_VENDOR_ID_INTEL
, intel_router_probe
},
816 { PCI_VENDOR_ID_AL
, ali_router_probe
},
817 { PCI_VENDOR_ID_ITE
, ite_router_probe
},
818 { PCI_VENDOR_ID_VIA
, via_router_probe
},
819 { PCI_VENDOR_ID_OPTI
, opti_router_probe
},
820 { PCI_VENDOR_ID_SI
, sis_router_probe
},
821 { PCI_VENDOR_ID_CYRIX
, cyrix_router_probe
},
822 { PCI_VENDOR_ID_VLSI
, vlsi_router_probe
},
823 { PCI_VENDOR_ID_SERVERWORKS
, serverworks_router_probe
},
824 { PCI_VENDOR_ID_AMD
, amd_router_probe
},
825 { PCI_VENDOR_ID_PICOPOWER
, pico_router_probe
},
826 /* Someone with docs needs to add the ATI Radeon IGP */
829 static struct irq_router pirq_router
;
830 static struct pci_dev
*pirq_router_dev
;
834 * FIXME: should we have an option to say "generic for
838 static void __init
pirq_find_router(struct irq_router
*r
)
840 struct irq_routing_table
*rt
= pirq_table
;
841 struct irq_router_handler
*h
;
843 #ifdef CONFIG_PCI_BIOS
844 if (!rt
->signature
) {
845 printk(KERN_INFO
"PCI: Using BIOS for IRQ routing\n");
846 r
->set
= pirq_bios_set
;
852 /* Default unless a driver reloads it */
857 DBG(KERN_DEBUG
"PCI: Attempting to find IRQ router for %04x:%04x\n",
858 rt
->rtr_vendor
, rt
->rtr_device
);
860 pirq_router_dev
= pci_get_bus_and_slot(rt
->rtr_bus
, rt
->rtr_devfn
);
861 if (!pirq_router_dev
) {
862 DBG(KERN_DEBUG
"PCI: Interrupt router not found at "
863 "%02x:%02x\n", rt
->rtr_bus
, rt
->rtr_devfn
);
867 for (h
= pirq_routers
; h
->vendor
; h
++) {
868 /* First look for a router match */
869 if (rt
->rtr_vendor
== h
->vendor
&&
870 h
->probe(r
, pirq_router_dev
, rt
->rtr_device
))
872 /* Fall back to a device match */
873 if (pirq_router_dev
->vendor
== h
->vendor
&&
874 h
->probe(r
, pirq_router_dev
, pirq_router_dev
->device
))
877 printk(KERN_INFO
"PCI: Using IRQ router %s [%04x/%04x] at %s\n",
879 pirq_router_dev
->vendor
,
880 pirq_router_dev
->device
,
881 pci_name(pirq_router_dev
));
883 /* The device remains referenced for the kernel lifetime */
886 static struct irq_info
*pirq_get_info(struct pci_dev
*dev
)
888 struct irq_routing_table
*rt
= pirq_table
;
889 int entries
= (rt
->size
- sizeof(struct irq_routing_table
)) /
890 sizeof(struct irq_info
);
891 struct irq_info
*info
;
893 for (info
= rt
->slots
; entries
--; info
++)
894 if (info
->bus
== dev
->bus
->number
&&
895 PCI_SLOT(info
->devfn
) == PCI_SLOT(dev
->devfn
))
900 static int pcibios_lookup_irq(struct pci_dev
*dev
, int assign
)
903 struct irq_info
*info
;
907 struct irq_router
*r
= &pirq_router
;
908 struct pci_dev
*dev2
= NULL
;
912 pci_read_config_byte(dev
, PCI_INTERRUPT_PIN
, &pin
);
914 DBG(KERN_DEBUG
" -> no interrupt pin\n");
919 /* Find IRQ routing entry */
924 DBG(KERN_DEBUG
"IRQ for %s[%c]", pci_name(dev
), 'A' + pin
);
925 info
= pirq_get_info(dev
);
927 DBG(" -> not found in routing table\n" KERN_DEBUG
);
930 pirq
= info
->irq
[pin
].link
;
931 mask
= info
->irq
[pin
].bitmap
;
933 DBG(" -> not routed\n" KERN_DEBUG
);
936 DBG(" -> PIRQ %02x, mask %04x, excl %04x", pirq
, mask
,
937 pirq_table
->exclusive_irqs
);
938 mask
&= pcibios_irq_mask
;
940 /* Work around broken HP Pavilion Notebooks which assign USB to
941 IRQ 9 even though it is actually wired to IRQ 11 */
943 if (broken_hp_bios_irq9
&& pirq
== 0x59 && dev
->irq
== 9) {
945 pci_write_config_byte(dev
, PCI_INTERRUPT_LINE
, 11);
946 r
->set(pirq_router_dev
, dev
, pirq
, 11);
949 /* same for Acer Travelmate 360, but with CB and irq 11 -> 10 */
950 if (acer_tm360_irqrouting
&& dev
->irq
== 11 &&
951 dev
->vendor
== PCI_VENDOR_ID_O2
) {
954 dev
->irq
= r
->get(pirq_router_dev
, dev
, pirq
);
955 pci_write_config_byte(dev
, PCI_INTERRUPT_LINE
, dev
->irq
);
959 * Find the best IRQ to assign: use the one
960 * reported by the device if possible.
963 if (newirq
&& !((1 << newirq
) & mask
)) {
964 if (pci_probe
& PCI_USE_PIRQ_MASK
)
967 printk("\n" KERN_WARNING
968 "PCI: IRQ %i for device %s doesn't match PIRQ mask - try pci=usepirqmask\n"
972 if (!newirq
&& assign
) {
973 for (i
= 0; i
< 16; i
++) {
974 if (!(mask
& (1 << i
)))
976 if (pirq_penalty
[i
] < pirq_penalty
[newirq
] &&
977 can_request_irq(i
, IRQF_SHARED
))
981 DBG(" -> newirq=%d", newirq
);
983 /* Check if it is hardcoded */
984 if ((pirq
& 0xf0) == 0xf0) {
986 DBG(" -> hardcoded IRQ %d\n", irq
);
988 } else if (r
->get
&& (irq
= r
->get(pirq_router_dev
, dev
, pirq
)) && \
989 ((!(pci_probe
& PCI_USE_PIRQ_MASK
)) || ((1 << irq
) & mask
))) {
990 DBG(" -> got IRQ %d\n", irq
);
992 eisa_set_level_irq(irq
);
993 } else if (newirq
&& r
->set
&&
994 (dev
->class >> 8) != PCI_CLASS_DISPLAY_VGA
) {
995 DBG(" -> assigning IRQ %d", newirq
);
996 if (r
->set(pirq_router_dev
, dev
, pirq
, newirq
)) {
997 eisa_set_level_irq(newirq
);
1005 DBG(" ... failed\n");
1006 if (newirq
&& mask
== (1 << newirq
)) {
1012 printk(KERN_INFO
"PCI: %s IRQ %d for device %s\n", msg
, irq
,
1015 /* Update IRQ for all devices with the same pirq value */
1016 while ((dev2
= pci_get_device(PCI_ANY_ID
, PCI_ANY_ID
, dev2
)) != NULL
) {
1017 pci_read_config_byte(dev2
, PCI_INTERRUPT_PIN
, &pin
);
1021 info
= pirq_get_info(dev2
);
1024 if (info
->irq
[pin
].link
== pirq
) {
1026 * We refuse to override the dev->irq
1027 * information. Give a warning!
1029 if (dev2
->irq
&& dev2
->irq
!= irq
&& \
1030 (!(pci_probe
& PCI_USE_PIRQ_MASK
) || \
1031 ((1 << dev2
->irq
) & mask
))) {
1032 #ifndef CONFIG_PCI_MSI
1034 "IRQ routing conflict for %s, have irq %d, want irq %d\n",
1035 pci_name(dev2
), dev2
->irq
, irq
);
1040 pirq_penalty
[irq
]++;
1043 "PCI: Sharing IRQ %d with %s\n",
1044 irq
, pci_name(dev2
));
1050 static void __init
pcibios_fixup_irqs(void)
1052 struct pci_dev
*dev
= NULL
;
1055 DBG(KERN_DEBUG
"PCI: IRQ fixup\n");
1056 while ((dev
= pci_get_device(PCI_ANY_ID
, PCI_ANY_ID
, dev
)) != NULL
) {
1058 * If the BIOS has set an out of range IRQ number, just
1059 * ignore it. Also keep track of which IRQ's are
1062 if (dev
->irq
>= 16) {
1063 DBG(KERN_DEBUG
"%s: ignoring bogus IRQ %d\n",
1064 pci_name(dev
), dev
->irq
);
1068 * If the IRQ is already assigned to a PCI device,
1069 * ignore its ISA use penalty
1071 if (pirq_penalty
[dev
->irq
] >= 100 &&
1072 pirq_penalty
[dev
->irq
] < 100000)
1073 pirq_penalty
[dev
->irq
] = 0;
1074 pirq_penalty
[dev
->irq
]++;
1078 while ((dev
= pci_get_device(PCI_ANY_ID
, PCI_ANY_ID
, dev
)) != NULL
) {
1079 pci_read_config_byte(dev
, PCI_INTERRUPT_PIN
, &pin
);
1080 #ifdef CONFIG_X86_IO_APIC
1082 * Recalculate IRQ numbers if we use the I/O APIC.
1084 if (io_apic_assign_pci_irqs
) {
1089 * interrupt pins are numbered starting
1093 irq
= IO_APIC_get_PCI_irq_vector(dev
->bus
->number
,
1094 PCI_SLOT(dev
->devfn
), pin
);
1096 * Busses behind bridges are typically not listed in the MP-table.
1097 * In this case we have to look up the IRQ based on the parent bus,
1098 * parent slot, and pin number. The SMP code detects such bridged
1099 * busses itself so we should get into this branch reliably.
1101 if (irq
< 0 && dev
->bus
->parent
) {
1102 /* go back to the bridge */
1103 struct pci_dev
*bridge
= dev
->bus
->self
;
1105 pin
= (pin
+ PCI_SLOT(dev
->devfn
)) % 4;
1106 irq
= IO_APIC_get_PCI_irq_vector(bridge
->bus
->number
,
1107 PCI_SLOT(bridge
->devfn
),
1111 "PCI: using PPB %s[%c] to get irq %d\n",
1117 "PCI->APIC IRQ transform: %s[%c] -> IRQ %d\n",
1118 pci_name(dev
), 'A' + pin
, irq
);
1125 * Still no IRQ? Try to lookup one...
1127 if (pin
&& !dev
->irq
)
1128 pcibios_lookup_irq(dev
, 0);
1133 * Work around broken HP Pavilion Notebooks which assign USB to
1134 * IRQ 9 even though it is actually wired to IRQ 11
1136 static int __init
fix_broken_hp_bios_irq9(const struct dmi_system_id
*d
)
1138 if (!broken_hp_bios_irq9
) {
1139 broken_hp_bios_irq9
= 1;
1140 printk(KERN_INFO
"%s detected - fixing broken IRQ routing\n",
1147 * Work around broken Acer TravelMate 360 Notebooks which assign
1148 * Cardbus to IRQ 11 even though it is actually wired to IRQ 10
1150 static int __init
fix_acer_tm360_irqrouting(const struct dmi_system_id
*d
)
1152 if (!acer_tm360_irqrouting
) {
1153 acer_tm360_irqrouting
= 1;
1154 printk(KERN_INFO
"%s detected - fixing broken IRQ routing\n",
1160 static struct dmi_system_id __initdata pciirq_dmi_table
[] = {
1162 .callback
= fix_broken_hp_bios_irq9
,
1163 .ident
= "HP Pavilion N5400 Series Laptop",
1165 DMI_MATCH(DMI_SYS_VENDOR
, "Hewlett-Packard"),
1166 DMI_MATCH(DMI_BIOS_VERSION
, "GE.M1.03"),
1167 DMI_MATCH(DMI_PRODUCT_VERSION
,
1168 "HP Pavilion Notebook Model GE"),
1169 DMI_MATCH(DMI_BOARD_VERSION
, "OmniBook N32N-736"),
1173 .callback
= fix_acer_tm360_irqrouting
,
1174 .ident
= "Acer TravelMate 36x Laptop",
1176 DMI_MATCH(DMI_SYS_VENDOR
, "Acer"),
1177 DMI_MATCH(DMI_PRODUCT_NAME
, "TravelMate 360"),
1183 static int __init
pcibios_irq_init(void)
1185 DBG(KERN_DEBUG
"PCI: IRQ init\n");
1187 if (pcibios_enable_irq
|| raw_pci_ops
== NULL
)
1190 dmi_check_system(pciirq_dmi_table
);
1192 pirq_table
= pirq_find_routing_table();
1194 #ifdef CONFIG_PCI_BIOS
1195 if (!pirq_table
&& (pci_probe
& PCI_BIOS_IRQ_SCAN
))
1196 pirq_table
= pcibios_get_irq_routing_table();
1200 pirq_find_router(&pirq_router
);
1201 if (pirq_table
->exclusive_irqs
) {
1203 for (i
= 0; i
< 16; i
++)
1204 if (!(pirq_table
->exclusive_irqs
& (1 << i
)))
1205 pirq_penalty
[i
] += 100;
1208 * If we're using the I/O APIC, avoid using the PCI IRQ
1211 if (io_apic_assign_pci_irqs
)
1215 pcibios_enable_irq
= pirq_enable_irq
;
1217 pcibios_fixup_irqs();
1221 subsys_initcall(pcibios_irq_init
);
1224 static void pirq_penalize_isa_irq(int irq
, int active
)
1227 * If any ISAPnP device reports an IRQ in its list of possible
1228 * IRQ's, we try to avoid assigning it to PCI devices.
1232 pirq_penalty
[irq
] += 1000;
1234 pirq_penalty
[irq
] += 100;
1238 void pcibios_penalize_isa_irq(int irq
, int active
)
1242 acpi_penalize_isa_irq(irq
, active
);
1245 pirq_penalize_isa_irq(irq
, active
);
1248 static int pirq_enable_irq(struct pci_dev
*dev
)
1251 struct pci_dev
*temp_dev
;
1253 pci_read_config_byte(dev
, PCI_INTERRUPT_PIN
, &pin
);
1254 if (pin
&& !pcibios_lookup_irq(dev
, 1) && !dev
->irq
) {
1257 pin
--; /* interrupt pins are numbered starting from 1 */
1259 if (io_apic_assign_pci_irqs
) {
1262 irq
= IO_APIC_get_PCI_irq_vector(dev
->bus
->number
,
1263 PCI_SLOT(dev
->devfn
), pin
);
1265 * Busses behind bridges are typically not
1266 * listed in the MP-table. In this case we have
1267 * to look up the IRQ based on the parent bus,
1268 * parent slot, and pin number. The SMP code
1269 * detects such bridged busses itself so we
1270 * should get into this branch reliably.
1273 while (irq
< 0 && dev
->bus
->parent
) {
1274 /* go back to the bridge */
1275 struct pci_dev
*bridge
= dev
->bus
->self
;
1277 pin
= (pin
+ PCI_SLOT(dev
->devfn
)) % 4;
1278 irq
= IO_APIC_get_PCI_irq_vector(bridge
->bus
->number
,
1279 PCI_SLOT(bridge
->devfn
), pin
);
1282 "PCI: using PPB %s[%c] to get irq %d\n",
1290 "PCI->APIC IRQ transform: %s[%c] -> IRQ %d\n",
1291 pci_name(dev
), 'A' + pin
, irq
);
1295 msg
= " Probably buggy MP table.";
1296 } else if (pci_probe
& PCI_BIOS_IRQ_SCAN
)
1299 msg
= " Please try using pci=biosirq.";
1302 * With IDE legacy devices the IRQ lookup failure is not
1305 if (dev
->class >> 8 == PCI_CLASS_STORAGE_IDE
&&
1306 !(dev
->class & 0x5))
1310 "PCI: No IRQ known for interrupt pin %c of device %s.%s\n",
1311 'A' + pin
, pci_name(dev
), msg
);