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correct wrong function name of d_put in kernel document and source comment
[linux-2.6/mini2440.git] / drivers / net / smsc911x.c
blobdc3f1108884d0709159246031c6252e1f42079f6
1 /***************************************************************************
2 *
3 * Copyright (C) 2004-2008 SMSC
4 * Copyright (C) 2005-2008 ARM
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 *
20 ***************************************************************************
21 * Rewritten, heavily based on smsc911x simple driver by SMSC.
22 * Partly uses io macros from smc91x.c by Nicolas Pitre
23 *
24 * Supported devices:
25 * LAN9115, LAN9116, LAN9117, LAN9118
26 * LAN9215, LAN9216, LAN9217, LAN9218
27 * LAN9210, LAN9211
28 * LAN9220, LAN9221
29 *
30 */
31
32 #include <linux/crc32.h>
33 #include <linux/delay.h>
34 #include <linux/errno.h>
35 #include <linux/etherdevice.h>
36 #include <linux/ethtool.h>
37 #include <linux/init.h>
38 #include <linux/ioport.h>
39 #include <linux/kernel.h>
40 #include <linux/module.h>
41 #include <linux/netdevice.h>
42 #include <linux/platform_device.h>
43 #include <linux/sched.h>
44 #include <linux/slab.h>
45 #include <linux/timer.h>
46 #include <linux/version.h>
47 #include <linux/bug.h>
48 #include <linux/bitops.h>
49 #include <linux/irq.h>
50 #include <linux/io.h>
51 #include <linux/phy.h>
52 #include <linux/smsc911x.h>
53 #include "smsc911x.h"
54
55 #define SMSC_CHIPNAME "smsc911x"
56 #define SMSC_MDIONAME "smsc911x-mdio"
57 #define SMSC_DRV_VERSION "2008-10-21"
58
59 MODULE_LICENSE("GPL");
60 MODULE_VERSION(SMSC_DRV_VERSION);
61
62 #if USE_DEBUG > 0
63 static int debug = 16;
64 #else
65 static int debug = 3;
66 #endif
67
68 module_param(debug, int, 0);
69 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
70
71 struct smsc911x_data {
72 void __iomem *ioaddr;
73
74 unsigned int idrev;
75
76 /* used to decide which workarounds apply */
77 unsigned int generation;
78
79 /* device configuration (copied from platform_data during probe) */
80 struct smsc911x_platform_config config;
81
82 /* This needs to be acquired before calling any of below:
83 * smsc911x_mac_read(), smsc911x_mac_write()
84 */
85 spinlock_t mac_lock;
86
87 /* spinlock to ensure 16-bit accesses are serialised.
88 * unused with a 32-bit bus */
89 spinlock_t dev_lock;
90
91 struct phy_device *phy_dev;
92 struct mii_bus *mii_bus;
93 int phy_irq[PHY_MAX_ADDR];
94 unsigned int using_extphy;
95 int last_duplex;
96 int last_carrier;
97
98 u32 msg_enable;
99 unsigned int gpio_setting;
100 unsigned int gpio_orig_setting;
101 struct net_device *dev;
102 struct napi_struct napi;
103
104 unsigned int software_irq_signal;
105
106 #ifdef USE_PHY_WORK_AROUND
107 #define MIN_PACKET_SIZE (64)
108 char loopback_tx_pkt[MIN_PACKET_SIZE];
109 char loopback_rx_pkt[MIN_PACKET_SIZE];
110 unsigned int resetcount;
111 #endif
112
113 /* Members for Multicast filter workaround */
114 unsigned int multicast_update_pending;
115 unsigned int set_bits_mask;
116 unsigned int clear_bits_mask;
117 unsigned int hashhi;
118 unsigned int hashlo;
119 };
120
121 /* The 16-bit access functions are significantly slower, due to the locking
122 * necessary. If your bus hardware can be configured to do this for you
123 * (in response to a single 32-bit operation from software), you should use
124 * the 32-bit access functions instead. */
125
126 static inline u32 smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg)
127 {
128 if (pdata->config.flags & SMSC911X_USE_32BIT)
129 return readl(pdata->ioaddr + reg);
130
131 if (pdata->config.flags & SMSC911X_USE_16BIT) {
132 u32 data;
133 unsigned long flags;
134
135 /* these two 16-bit reads must be performed consecutively, so
136 * must not be interrupted by our own ISR (which would start
137 * another read operation) */
138 spin_lock_irqsave(&pdata->dev_lock, flags);
139 data = ((readw(pdata->ioaddr + reg) & 0xFFFF) |
140 ((readw(pdata->ioaddr + reg + 2) & 0xFFFF) << 16));
141 spin_unlock_irqrestore(&pdata->dev_lock, flags);
142
143 return data;
144 }
145
146 BUG();
147 }
148
149 static inline void smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg,
150 u32 val)
151 {
152 if (pdata->config.flags & SMSC911X_USE_32BIT) {
153 writel(val, pdata->ioaddr + reg);
154 return;
155 }
156
157 if (pdata->config.flags & SMSC911X_USE_16BIT) {
158 unsigned long flags;
159
160 /* these two 16-bit writes must be performed consecutively, so
161 * must not be interrupted by our own ISR (which would start
162 * another read operation) */
163 spin_lock_irqsave(&pdata->dev_lock, flags);
164 writew(val & 0xFFFF, pdata->ioaddr + reg);
165 writew((val >> 16) & 0xFFFF, pdata->ioaddr + reg + 2);
166 spin_unlock_irqrestore(&pdata->dev_lock, flags);
167 return;
168 }
169
170 BUG();
171 }
172
173 /* Writes a packet to the TX_DATA_FIFO */
174 static inline void
175 smsc911x_tx_writefifo(struct smsc911x_data *pdata, unsigned int *buf,
176 unsigned int wordcount)
177 {
178 if (pdata->config.flags & SMSC911X_USE_32BIT) {
179 writesl(pdata->ioaddr + TX_DATA_FIFO, buf, wordcount);
180 return;
181 }
182
183 if (pdata->config.flags & SMSC911X_USE_16BIT) {
184 while (wordcount--)
185 smsc911x_reg_write(pdata, TX_DATA_FIFO, *buf++);
186 return;
187 }
188
189 BUG();
190 }
191
192 /* Reads a packet out of the RX_DATA_FIFO */
193 static inline void
194 smsc911x_rx_readfifo(struct smsc911x_data *pdata, unsigned int *buf,
195 unsigned int wordcount)
196 {
197 if (pdata->config.flags & SMSC911X_USE_32BIT) {
198 readsl(pdata->ioaddr + RX_DATA_FIFO, buf, wordcount);
199 return;
200 }
201
202 if (pdata->config.flags & SMSC911X_USE_16BIT) {
203 while (wordcount--)
204 *buf++ = smsc911x_reg_read(pdata, RX_DATA_FIFO);
205 return;
206 }
207
208 BUG();
209 }
210
211 /* waits for MAC not busy, with timeout. Only called by smsc911x_mac_read
212 * and smsc911x_mac_write, so assumes mac_lock is held */
213 static int smsc911x_mac_complete(struct smsc911x_data *pdata)
214 {
215 int i;
216 u32 val;
217
218 SMSC_ASSERT_MAC_LOCK(pdata);
219
220 for (i = 0; i < 40; i++) {
221 val = smsc911x_reg_read(pdata, MAC_CSR_CMD);
222 if (!(val & MAC_CSR_CMD_CSR_BUSY_))
223 return 0;
224 }
225 SMSC_WARNING(HW, "Timed out waiting for MAC not BUSY. "
226 "MAC_CSR_CMD: 0x%08X", val);
227 return -EIO;
228 }
229
230 /* Fetches a MAC register value. Assumes mac_lock is acquired */
231 static u32 smsc911x_mac_read(struct smsc911x_data *pdata, unsigned int offset)
232 {
233 unsigned int temp;
234
235 SMSC_ASSERT_MAC_LOCK(pdata);
236
237 temp = smsc911x_reg_read(pdata, MAC_CSR_CMD);
238 if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) {
239 SMSC_WARNING(HW, "MAC busy at entry");
240 return 0xFFFFFFFF;
241 }
242
243 /* Send the MAC cmd */
244 smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) |
245 MAC_CSR_CMD_CSR_BUSY_ | MAC_CSR_CMD_R_NOT_W_));
246
247 /* Workaround for hardware read-after-write restriction */
248 temp = smsc911x_reg_read(pdata, BYTE_TEST);
249
250 /* Wait for the read to complete */
251 if (likely(smsc911x_mac_complete(pdata) == 0))
252 return smsc911x_reg_read(pdata, MAC_CSR_DATA);
253
254 SMSC_WARNING(HW, "MAC busy after read");
255 return 0xFFFFFFFF;
256 }
257
258 /* Set a mac register, mac_lock must be acquired before calling */
259 static void smsc911x_mac_write(struct smsc911x_data *pdata,
260 unsigned int offset, u32 val)
261 {
262 unsigned int temp;
263
264 SMSC_ASSERT_MAC_LOCK(pdata);
265
266 temp = smsc911x_reg_read(pdata, MAC_CSR_CMD);
267 if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) {
268 SMSC_WARNING(HW,
269 "smsc911x_mac_write failed, MAC busy at entry");
270 return;
271 }
272
273 /* Send data to write */
274 smsc911x_reg_write(pdata, MAC_CSR_DATA, val);
275
276 /* Write the actual data */
277 smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) |
278 MAC_CSR_CMD_CSR_BUSY_));
279
280 /* Workaround for hardware read-after-write restriction */
281 temp = smsc911x_reg_read(pdata, BYTE_TEST);
282
283 /* Wait for the write to complete */
284 if (likely(smsc911x_mac_complete(pdata) == 0))
285 return;
286
287 SMSC_WARNING(HW,
288 "smsc911x_mac_write failed, MAC busy after write");
289 }
290
291 /* Get a phy register */
292 static int smsc911x_mii_read(struct mii_bus *bus, int phyaddr, int regidx)
293 {
294 struct smsc911x_data *pdata = (struct smsc911x_data *)bus->priv;
295 unsigned long flags;
296 unsigned int addr;
297 int i, reg;
298
299 spin_lock_irqsave(&pdata->mac_lock, flags);
300
301 /* Confirm MII not busy */
302 if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
303 SMSC_WARNING(HW,
304 "MII is busy in smsc911x_mii_read???");
305 reg = -EIO;
306 goto out;
307 }
308
309 /* Set the address, index & direction (read from PHY) */
310 addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6);
311 smsc911x_mac_write(pdata, MII_ACC, addr);
312
313 /* Wait for read to complete w/ timeout */
314 for (i = 0; i < 100; i++)
315 if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
316 reg = smsc911x_mac_read(pdata, MII_DATA);
317 goto out;
318 }
319
320 SMSC_WARNING(HW, "Timed out waiting for MII write to finish");
321 reg = -EIO;
322
323 out:
324 spin_unlock_irqrestore(&pdata->mac_lock, flags);
325 return reg;
326 }
327
328 /* Set a phy register */
329 static int smsc911x_mii_write(struct mii_bus *bus, int phyaddr, int regidx,
330 u16 val)
331 {
332 struct smsc911x_data *pdata = (struct smsc911x_data *)bus->priv;
333 unsigned long flags;
334 unsigned int addr;
335 int i, reg;
336
337 spin_lock_irqsave(&pdata->mac_lock, flags);
338
339 /* Confirm MII not busy */
340 if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
341 SMSC_WARNING(HW,
342 "MII is busy in smsc911x_mii_write???");
343 reg = -EIO;
344 goto out;
345 }
346
347 /* Put the data to write in the MAC */
348 smsc911x_mac_write(pdata, MII_DATA, val);
349
350 /* Set the address, index & direction (write to PHY) */
351 addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6) |
352 MII_ACC_MII_WRITE_;
353 smsc911x_mac_write(pdata, MII_ACC, addr);
354
355 /* Wait for write to complete w/ timeout */
356 for (i = 0; i < 100; i++)
357 if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
358 reg = 0;
359 goto out;
360 }
361
362 SMSC_WARNING(HW, "Timed out waiting for MII write to finish");
363 reg = -EIO;
364
365 out:
366 spin_unlock_irqrestore(&pdata->mac_lock, flags);
367 return reg;
368 }
369
370 /* Autodetects and initialises external phy for SMSC9115 and SMSC9117 flavors.
371 * If something goes wrong, returns -ENODEV to revert back to internal phy.
372 * Performed at initialisation only, so interrupts are enabled */
373 static int smsc911x_phy_initialise_external(struct smsc911x_data *pdata)
374 {
375 unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG);
376
377 /* External phy is requested, supported, and detected */
378 if (hwcfg & HW_CFG_EXT_PHY_DET_) {
379
380 /* Switch to external phy. Assuming tx and rx are stopped
381 * because smsc911x_phy_initialise is called before
382 * smsc911x_rx_initialise and tx_initialise. */
383
384 /* Disable phy clocks to the MAC */
385 hwcfg &= (~HW_CFG_PHY_CLK_SEL_);
386 hwcfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_;
387 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
388 udelay(10); /* Enough time for clocks to stop */
389
390 /* Switch to external phy */
391 hwcfg |= HW_CFG_EXT_PHY_EN_;
392 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
393
394 /* Enable phy clocks to the MAC */
395 hwcfg &= (~HW_CFG_PHY_CLK_SEL_);
396 hwcfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_;
397 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
398 udelay(10); /* Enough time for clocks to restart */
399
400 hwcfg |= HW_CFG_SMI_SEL_;
401 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
402
403 SMSC_TRACE(HW, "Successfully switched to external PHY");
404 pdata->using_extphy = 1;
405 } else {
406 SMSC_WARNING(HW, "No external PHY detected, "
407 "Using internal PHY instead.");
408 /* Use internal phy */
409 return -ENODEV;
410 }
411 return 0;
412 }
413
414 /* Fetches a tx status out of the status fifo */
415 static unsigned int smsc911x_tx_get_txstatus(struct smsc911x_data *pdata)
416 {
417 unsigned int result =
418 smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TSUSED_;
419
420 if (result != 0)
421 result = smsc911x_reg_read(pdata, TX_STATUS_FIFO);
422
423 return result;
424 }
425
426 /* Fetches the next rx status */
427 static unsigned int smsc911x_rx_get_rxstatus(struct smsc911x_data *pdata)
428 {
429 unsigned int result =
430 smsc911x_reg_read(pdata, RX_FIFO_INF) & RX_FIFO_INF_RXSUSED_;
431
432 if (result != 0)
433 result = smsc911x_reg_read(pdata, RX_STATUS_FIFO);
434
435 return result;
436 }
437
438 #ifdef USE_PHY_WORK_AROUND
439 static int smsc911x_phy_check_loopbackpkt(struct smsc911x_data *pdata)
440 {
441 unsigned int tries;
442 u32 wrsz;
443 u32 rdsz;
444 ulong bufp;
445
446 for (tries = 0; tries < 10; tries++) {
447 unsigned int txcmd_a;
448 unsigned int txcmd_b;
449 unsigned int status;
450 unsigned int pktlength;
451 unsigned int i;
452
453 /* Zero-out rx packet memory */
454 memset(pdata->loopback_rx_pkt, 0, MIN_PACKET_SIZE);
455
456 /* Write tx packet to 118 */
457 txcmd_a = (u32)((ulong)pdata->loopback_tx_pkt & 0x03) << 16;
458 txcmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_;
459 txcmd_a |= MIN_PACKET_SIZE;
460
461 txcmd_b = MIN_PACKET_SIZE << 16 | MIN_PACKET_SIZE;
462
463 smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_a);
464 smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_b);
465
466 bufp = (ulong)pdata->loopback_tx_pkt & (~0x3);
467 wrsz = MIN_PACKET_SIZE + 3;
468 wrsz += (u32)((ulong)pdata->loopback_tx_pkt & 0x3);
469 wrsz >>= 2;
470
471 smsc911x_tx_writefifo(pdata, (unsigned int *)bufp, wrsz);
472
473 /* Wait till transmit is done */
474 i = 60;
475 do {
476 udelay(5);
477 status = smsc911x_tx_get_txstatus(pdata);
478 } while ((i--) && (!status));
479
480 if (!status) {
481 SMSC_WARNING(HW, "Failed to transmit "
482 "during loopback test");
483 continue;
484 }
485 if (status & TX_STS_ES_) {
486 SMSC_WARNING(HW, "Transmit encountered "
487 "errors during loopback test");
488 continue;
489 }
490
491 /* Wait till receive is done */
492 i = 60;
493 do {
494 udelay(5);
495 status = smsc911x_rx_get_rxstatus(pdata);
496 } while ((i--) && (!status));
497
498 if (!status) {
499 SMSC_WARNING(HW,
500 "Failed to receive during loopback test");
501 continue;
502 }
503 if (status & RX_STS_ES_) {
504 SMSC_WARNING(HW, "Receive encountered "
505 "errors during loopback test");
506 continue;
507 }
508
509 pktlength = ((status & 0x3FFF0000UL) >> 16);
510 bufp = (ulong)pdata->loopback_rx_pkt;
511 rdsz = pktlength + 3;
512 rdsz += (u32)((ulong)pdata->loopback_rx_pkt & 0x3);
513 rdsz >>= 2;
514
515 smsc911x_rx_readfifo(pdata, (unsigned int *)bufp, rdsz);
516
517 if (pktlength != (MIN_PACKET_SIZE + 4)) {
518 SMSC_WARNING(HW, "Unexpected packet size "
519 "during loop back test, size=%d, will retry",
520 pktlength);
521 } else {
522 unsigned int j;
523 int mismatch = 0;
524 for (j = 0; j < MIN_PACKET_SIZE; j++) {
525 if (pdata->loopback_tx_pkt[j]
526 != pdata->loopback_rx_pkt[j]) {
527 mismatch = 1;
528 break;
529 }
530 }
531 if (!mismatch) {
532 SMSC_TRACE(HW, "Successfully verified "
533 "loopback packet");
534 return 0;
535 } else {
536 SMSC_WARNING(HW, "Data mismatch "
537 "during loop back test, will retry");
538 }
539 }
540 }
541
542 return -EIO;
543 }
544
545 static int smsc911x_phy_reset(struct smsc911x_data *pdata)
546 {
547 struct phy_device *phy_dev = pdata->phy_dev;
548 unsigned int temp;
549 unsigned int i = 100000;
550
551 BUG_ON(!phy_dev);
552 BUG_ON(!phy_dev->bus);
553
554 SMSC_TRACE(HW, "Performing PHY BCR Reset");
555 smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR, BMCR_RESET);
556 do {
557 msleep(1);
558 temp = smsc911x_mii_read(phy_dev->bus, phy_dev->addr,
559 MII_BMCR);
560 } while ((i--) && (temp & BMCR_RESET));
561
562 if (temp & BMCR_RESET) {
563 SMSC_WARNING(HW, "PHY reset failed to complete.");
564 return -EIO;
565 }
566 /* Extra delay required because the phy may not be completed with
567 * its reset when BMCR_RESET is cleared. Specs say 256 uS is
568 * enough delay but using 1ms here to be safe */
569 msleep(1);
570
571 return 0;
572 }
573
574 static int smsc911x_phy_loopbacktest(struct net_device *dev)
575 {
576 struct smsc911x_data *pdata = netdev_priv(dev);
577 struct phy_device *phy_dev = pdata->phy_dev;
578 int result = -EIO;
579 unsigned int i, val;
580 unsigned long flags;
581
582 /* Initialise tx packet using broadcast destination address */
583 memset(pdata->loopback_tx_pkt, 0xff, ETH_ALEN);
584
585 /* Use incrementing source address */
586 for (i = 6; i < 12; i++)
587 pdata->loopback_tx_pkt[i] = (char)i;
588
589 /* Set length type field */
590 pdata->loopback_tx_pkt[12] = 0x00;
591 pdata->loopback_tx_pkt[13] = 0x00;
592
593 for (i = 14; i < MIN_PACKET_SIZE; i++)
594 pdata->loopback_tx_pkt[i] = (char)i;
595
596 val = smsc911x_reg_read(pdata, HW_CFG);
597 val &= HW_CFG_TX_FIF_SZ_;
598 val |= HW_CFG_SF_;
599 smsc911x_reg_write(pdata, HW_CFG, val);
600
601 smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_);
602 smsc911x_reg_write(pdata, RX_CFG,
603 (u32)((ulong)pdata->loopback_rx_pkt & 0x03) << 8);
604
605 for (i = 0; i < 10; i++) {
606 /* Set PHY to 10/FD, no ANEG, and loopback mode */
607 smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR,
608 BMCR_LOOPBACK | BMCR_FULLDPLX);
609
610 /* Enable MAC tx/rx, FD */
611 spin_lock_irqsave(&pdata->mac_lock, flags);
612 smsc911x_mac_write(pdata, MAC_CR, MAC_CR_FDPX_
613 | MAC_CR_TXEN_ | MAC_CR_RXEN_);
614 spin_unlock_irqrestore(&pdata->mac_lock, flags);
615
616 if (smsc911x_phy_check_loopbackpkt(pdata) == 0) {
617 result = 0;
618 break;
619 }
620 pdata->resetcount++;
621
622 /* Disable MAC rx */
623 spin_lock_irqsave(&pdata->mac_lock, flags);
624 smsc911x_mac_write(pdata, MAC_CR, 0);
625 spin_unlock_irqrestore(&pdata->mac_lock, flags);
626
627 smsc911x_phy_reset(pdata);
628 }
629
630 /* Disable MAC */
631 spin_lock_irqsave(&pdata->mac_lock, flags);
632 smsc911x_mac_write(pdata, MAC_CR, 0);
633 spin_unlock_irqrestore(&pdata->mac_lock, flags);
634
635 /* Cancel PHY loopback mode */
636 smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR, 0);
637
638 smsc911x_reg_write(pdata, TX_CFG, 0);
639 smsc911x_reg_write(pdata, RX_CFG, 0);
640
641 return result;
642 }
643 #endif /* USE_PHY_WORK_AROUND */
644
645 static void smsc911x_phy_update_flowcontrol(struct smsc911x_data *pdata)
646 {
647 struct phy_device *phy_dev = pdata->phy_dev;
648 u32 afc = smsc911x_reg_read(pdata, AFC_CFG);
649 u32 flow;
650 unsigned long flags;
651
652 if (phy_dev->duplex == DUPLEX_FULL) {
653 u16 lcladv = phy_read(phy_dev, MII_ADVERTISE);
654 u16 rmtadv = phy_read(phy_dev, MII_LPA);
655 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
656
657 if (cap & FLOW_CTRL_RX)
658 flow = 0xFFFF0002;
659 else
660 flow = 0;
661
662 if (cap & FLOW_CTRL_TX)
663 afc |= 0xF;
664 else
665 afc &= ~0xF;
666
667 SMSC_TRACE(HW, "rx pause %s, tx pause %s",
668 (cap & FLOW_CTRL_RX ? "enabled" : "disabled"),
669 (cap & FLOW_CTRL_TX ? "enabled" : "disabled"));
670 } else {
671 SMSC_TRACE(HW, "half duplex");
672 flow = 0;
673 afc |= 0xF;
674 }
675
676 spin_lock_irqsave(&pdata->mac_lock, flags);
677 smsc911x_mac_write(pdata, FLOW, flow);
678 spin_unlock_irqrestore(&pdata->mac_lock, flags);
679
680 smsc911x_reg_write(pdata, AFC_CFG, afc);
681 }
682
683 /* Update link mode if anything has changed. Called periodically when the
684 * PHY is in polling mode, even if nothing has changed. */
685 static void smsc911x_phy_adjust_link(struct net_device *dev)
686 {
687 struct smsc911x_data *pdata = netdev_priv(dev);
688 struct phy_device *phy_dev = pdata->phy_dev;
689 unsigned long flags;
690 int carrier;
691
692 if (phy_dev->duplex != pdata->last_duplex) {
693 unsigned int mac_cr;
694 SMSC_TRACE(HW, "duplex state has changed");
695
696 spin_lock_irqsave(&pdata->mac_lock, flags);
697 mac_cr = smsc911x_mac_read(pdata, MAC_CR);
698 if (phy_dev->duplex) {
699 SMSC_TRACE(HW,
700 "configuring for full duplex mode");
701 mac_cr |= MAC_CR_FDPX_;
702 } else {
703 SMSC_TRACE(HW,
704 "configuring for half duplex mode");
705 mac_cr &= ~MAC_CR_FDPX_;
706 }
707 smsc911x_mac_write(pdata, MAC_CR, mac_cr);
708 spin_unlock_irqrestore(&pdata->mac_lock, flags);
709
710 smsc911x_phy_update_flowcontrol(pdata);
711 pdata->last_duplex = phy_dev->duplex;
712 }
713
714 carrier = netif_carrier_ok(dev);
715 if (carrier != pdata->last_carrier) {
716 SMSC_TRACE(HW, "carrier state has changed");
717 if (carrier) {
718 SMSC_TRACE(HW, "configuring for carrier OK");
719 if ((pdata->gpio_orig_setting & GPIO_CFG_LED1_EN_) &&
720 (!pdata->using_extphy)) {
721 /* Restore orginal GPIO configuration */
722 pdata->gpio_setting = pdata->gpio_orig_setting;
723 smsc911x_reg_write(pdata, GPIO_CFG,
724 pdata->gpio_setting);
725 }
726 } else {
727 SMSC_TRACE(HW, "configuring for no carrier");
728 /* Check global setting that LED1
729 * usage is 10/100 indicator */
730 pdata->gpio_setting = smsc911x_reg_read(pdata,
731 GPIO_CFG);
732 if ((pdata->gpio_setting & GPIO_CFG_LED1_EN_)
733 && (!pdata->using_extphy)) {
734 /* Force 10/100 LED off, after saving
735 * orginal GPIO configuration */
736 pdata->gpio_orig_setting = pdata->gpio_setting;
737
738 pdata->gpio_setting &= ~GPIO_CFG_LED1_EN_;
739 pdata->gpio_setting |= (GPIO_CFG_GPIOBUF0_
740 | GPIO_CFG_GPIODIR0_
741 | GPIO_CFG_GPIOD0_);
742 smsc911x_reg_write(pdata, GPIO_CFG,
743 pdata->gpio_setting);
744 }
745 }
746 pdata->last_carrier = carrier;
747 }
748 }
749
750 static int smsc911x_mii_probe(struct net_device *dev)
751 {
752 struct smsc911x_data *pdata = netdev_priv(dev);
753 struct phy_device *phydev = NULL;
754 int phy_addr;
755
756 /* find the first phy */
757 for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++) {
758 if (pdata->mii_bus->phy_map[phy_addr]) {
759 phydev = pdata->mii_bus->phy_map[phy_addr];
760 SMSC_TRACE(PROBE, "PHY %d: addr %d, phy_id 0x%08X",
761 phy_addr, phydev->addr, phydev->phy_id);
762 break;
763 }
764 }
765
766 if (!phydev) {
767 pr_err("%s: no PHY found\n", dev->name);
768 return -ENODEV;
769 }
770
771 phydev = phy_connect(dev, phydev->dev.bus_id,
772 &smsc911x_phy_adjust_link, 0, pdata->config.phy_interface);
773
774 if (IS_ERR(phydev)) {
775 pr_err("%s: Could not attach to PHY\n", dev->name);
776 return PTR_ERR(phydev);
777 }
778
779 pr_info("%s: attached PHY driver [%s] (mii_bus:phy_addr=%s, irq=%d)\n",
780 dev->name, phydev->drv->name, phydev->dev.bus_id, phydev->irq);
781
782 /* mask with MAC supported features */
783 phydev->supported &= (PHY_BASIC_FEATURES | SUPPORTED_Pause |
784 SUPPORTED_Asym_Pause);
785 phydev->advertising = phydev->supported;
786
787 pdata->phy_dev = phydev;
788 pdata->last_duplex = -1;
789 pdata->last_carrier = -1;
790
791 #ifdef USE_PHY_WORK_AROUND
792 if (smsc911x_phy_loopbacktest(dev) < 0) {
793 SMSC_WARNING(HW, "Failed Loop Back Test");
794 return -ENODEV;
795 }
796 SMSC_TRACE(HW, "Passed Loop Back Test");
797 #endif /* USE_PHY_WORK_AROUND */
798
799 SMSC_TRACE(HW, "phy initialised succesfully");
800 return 0;
801 }
802
803 static int __devinit smsc911x_mii_init(struct platform_device *pdev,
804 struct net_device *dev)
805 {
806 struct smsc911x_data *pdata = netdev_priv(dev);
807 int err = -ENXIO, i;
808
809 pdata->mii_bus = mdiobus_alloc();
810 if (!pdata->mii_bus) {
811 err = -ENOMEM;
812 goto err_out_1;
813 }
814
815 pdata->mii_bus->name = SMSC_MDIONAME;
816 snprintf(pdata->mii_bus->id, MII_BUS_ID_SIZE, "%x", pdev->id);
817 pdata->mii_bus->priv = pdata;
818 pdata->mii_bus->read = smsc911x_mii_read;
819 pdata->mii_bus->write = smsc911x_mii_write;
820 pdata->mii_bus->irq = pdata->phy_irq;
821 for (i = 0; i < PHY_MAX_ADDR; ++i)
822 pdata->mii_bus->irq[i] = PHY_POLL;
823
824 pdata->mii_bus->parent = &pdev->dev;
825
826 pdata->using_extphy = 0;
827
828 switch (pdata->idrev & 0xFFFF0000) {
829 case 0x01170000:
830 case 0x01150000:
831 case 0x117A0000:
832 case 0x115A0000:
833 /* External PHY supported, try to autodetect */
834 if (smsc911x_phy_initialise_external(pdata) < 0) {
835 SMSC_TRACE(HW, "No external PHY detected, "
836 "using internal PHY");
837 }
838 break;
839 default:
840 SMSC_TRACE(HW, "External PHY is not supported, "
841 "using internal PHY");
842 break;
843 }
844
845 if (!pdata->using_extphy) {
846 /* Mask all PHYs except ID 1 (internal) */
847 pdata->mii_bus->phy_mask = ~(1 << 1);
848 }
849
850 if (mdiobus_register(pdata->mii_bus)) {
851 SMSC_WARNING(PROBE, "Error registering mii bus");
852 goto err_out_free_bus_2;
853 }
854
855 if (smsc911x_mii_probe(dev) < 0) {
856 SMSC_WARNING(PROBE, "Error registering mii bus");
857 goto err_out_unregister_bus_3;
858 }
859
860 return 0;
861
862 err_out_unregister_bus_3:
863 mdiobus_unregister(pdata->mii_bus);
864 err_out_free_bus_2:
865 mdiobus_free(pdata->mii_bus);
866 err_out_1:
867 return err;
868 }
869
870 /* Gets the number of tx statuses in the fifo */
871 static unsigned int smsc911x_tx_get_txstatcount(struct smsc911x_data *pdata)
872 {
873 return (smsc911x_reg_read(pdata, TX_FIFO_INF)
874 & TX_FIFO_INF_TSUSED_) >> 16;
875 }
876
877 /* Reads tx statuses and increments counters where necessary */
878 static void smsc911x_tx_update_txcounters(struct net_device *dev)
879 {
880 struct smsc911x_data *pdata = netdev_priv(dev);
881 unsigned int tx_stat;
882
883 while ((tx_stat = smsc911x_tx_get_txstatus(pdata)) != 0) {
884 if (unlikely(tx_stat & 0x80000000)) {
885 /* In this driver the packet tag is used as the packet
886 * length. Since a packet length can never reach the
887 * size of 0x8000, this bit is reserved. It is worth
888 * noting that the "reserved bit" in the warning above
889 * does not reference a hardware defined reserved bit
890 * but rather a driver defined one.
891 */
892 SMSC_WARNING(HW,
893 "Packet tag reserved bit is high");
894 } else {
895 if (unlikely(tx_stat & 0x00008000)) {
896 dev->stats.tx_errors++;
897 } else {
898 dev->stats.tx_packets++;
899 dev->stats.tx_bytes += (tx_stat >> 16);
900 }
901 if (unlikely(tx_stat & 0x00000100)) {
902 dev->stats.collisions += 16;
903 dev->stats.tx_aborted_errors += 1;
904 } else {
905 dev->stats.collisions +=
906 ((tx_stat >> 3) & 0xF);
907 }
908 if (unlikely(tx_stat & 0x00000800))
909 dev->stats.tx_carrier_errors += 1;
910 if (unlikely(tx_stat & 0x00000200)) {
911 dev->stats.collisions++;
912 dev->stats.tx_aborted_errors++;
913 }
914 }
915 }
916 }
917
918 /* Increments the Rx error counters */
919 static void
920 smsc911x_rx_counterrors(struct net_device *dev, unsigned int rxstat)
921 {
922 int crc_err = 0;
923
924 if (unlikely(rxstat & 0x00008000)) {
925 dev->stats.rx_errors++;
926 if (unlikely(rxstat & 0x00000002)) {
927 dev->stats.rx_crc_errors++;
928 crc_err = 1;
929 }
930 }
931 if (likely(!crc_err)) {
932 if (unlikely((rxstat & 0x00001020) == 0x00001020)) {
933 /* Frame type indicates length,
934 * and length error is set */
935 dev->stats.rx_length_errors++;
936 }
937 if (rxstat & RX_STS_MCAST_)
938 dev->stats.multicast++;
939 }
940 }
941
942 /* Quickly dumps bad packets */
943 static void
944 smsc911x_rx_fastforward(struct smsc911x_data *pdata, unsigned int pktbytes)
945 {
946 unsigned int pktwords = (pktbytes + NET_IP_ALIGN + 3) >> 2;
947
948 if (likely(pktwords >= 4)) {
949 unsigned int timeout = 500;
950 unsigned int val;
951 smsc911x_reg_write(pdata, RX_DP_CTRL, RX_DP_CTRL_RX_FFWD_);
952 do {
953 udelay(1);
954 val = smsc911x_reg_read(pdata, RX_DP_CTRL);
955 } while (timeout-- && (val & RX_DP_CTRL_RX_FFWD_));
956
957 if (unlikely(timeout == 0))
958 SMSC_WARNING(HW, "Timed out waiting for "
959 "RX FFWD to finish, RX_DP_CTRL: 0x%08X", val);
960 } else {
961 unsigned int temp;
962 while (pktwords--)
963 temp = smsc911x_reg_read(pdata, RX_DATA_FIFO);
964 }
965 }
966
967 /* NAPI poll function */
968 static int smsc911x_poll(struct napi_struct *napi, int budget)
969 {
970 struct smsc911x_data *pdata =
971 container_of(napi, struct smsc911x_data, napi);
972 struct net_device *dev = pdata->dev;
973 int npackets = 0;
974
975 while (likely(netif_running(dev)) && (npackets < budget)) {
976 unsigned int pktlength;
977 unsigned int pktwords;
978 struct sk_buff *skb;
979 unsigned int rxstat = smsc911x_rx_get_rxstatus(pdata);
980
981 if (!rxstat) {
982 unsigned int temp;
983 /* We processed all packets available. Tell NAPI it can
984 * stop polling then re-enable rx interrupts */
985 smsc911x_reg_write(pdata, INT_STS, INT_STS_RSFL_);
986 netif_rx_complete(napi);
987 temp = smsc911x_reg_read(pdata, INT_EN);
988 temp |= INT_EN_RSFL_EN_;
989 smsc911x_reg_write(pdata, INT_EN, temp);
990 break;
991 }
992
993 /* Count packet for NAPI scheduling, even if it has an error.
994 * Error packets still require cycles to discard */
995 npackets++;
996
997 pktlength = ((rxstat & 0x3FFF0000) >> 16);
998 pktwords = (pktlength + NET_IP_ALIGN + 3) >> 2;
999 smsc911x_rx_counterrors(dev, rxstat);
1000
1001 if (unlikely(rxstat & RX_STS_ES_)) {
1002 SMSC_WARNING(RX_ERR,
1003 "Discarding packet with error bit set");
1004 /* Packet has an error, discard it and continue with
1005 * the next */
1006 smsc911x_rx_fastforward(pdata, pktwords);
1007 dev->stats.rx_dropped++;
1008 continue;
1009 }
1010
1011 skb = netdev_alloc_skb(dev, pktlength + NET_IP_ALIGN);
1012 if (unlikely(!skb)) {
1013 SMSC_WARNING(RX_ERR,
1014 "Unable to allocate skb for rx packet");
1015 /* Drop the packet and stop this polling iteration */
1016 smsc911x_rx_fastforward(pdata, pktwords);
1017 dev->stats.rx_dropped++;
1018 break;
1019 }
1020
1021 skb->data = skb->head;
1022 skb_reset_tail_pointer(skb);
1023
1024 /* Align IP on 16B boundary */
1025 skb_reserve(skb, NET_IP_ALIGN);
1026 skb_put(skb, pktlength - 4);
1027 smsc911x_rx_readfifo(pdata, (unsigned int *)skb->head,
1028 pktwords);
1029 skb->protocol = eth_type_trans(skb, dev);
1030 skb->ip_summed = CHECKSUM_NONE;
1031 netif_receive_skb(skb);
1032
1033 /* Update counters */
1034 dev->stats.rx_packets++;
1035 dev->stats.rx_bytes += (pktlength - 4);
1036 dev->last_rx = jiffies;
1037 }
1038
1039 /* Return total received packets */
1040 return npackets;
1041 }
1042
1043 /* Returns hash bit number for given MAC address
1044 * Example:
1045 * 01 00 5E 00 00 01 -> returns bit number 31 */
1046 static unsigned int smsc911x_hash(char addr[ETH_ALEN])
1047 {
1048 return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f;
1049 }
1050
1051 static void smsc911x_rx_multicast_update(struct smsc911x_data *pdata)
1052 {
1053 /* Performs the multicast & mac_cr update. This is called when
1054 * safe on the current hardware, and with the mac_lock held */
1055 unsigned int mac_cr;
1056
1057 SMSC_ASSERT_MAC_LOCK(pdata);
1058
1059 mac_cr = smsc911x_mac_read(pdata, MAC_CR);
1060 mac_cr |= pdata->set_bits_mask;
1061 mac_cr &= ~(pdata->clear_bits_mask);
1062 smsc911x_mac_write(pdata, MAC_CR, mac_cr);
1063 smsc911x_mac_write(pdata, HASHH, pdata->hashhi);
1064 smsc911x_mac_write(pdata, HASHL, pdata->hashlo);
1065 SMSC_TRACE(HW, "maccr 0x%08X, HASHH 0x%08X, HASHL 0x%08X",
1066 mac_cr, pdata->hashhi, pdata->hashlo);
1067 }
1068
1069 static void smsc911x_rx_multicast_update_workaround(struct smsc911x_data *pdata)
1070 {
1071 unsigned int mac_cr;
1072
1073 /* This function is only called for older LAN911x devices
1074 * (revA or revB), where MAC_CR, HASHH and HASHL should not
1075 * be modified during Rx - newer devices immediately update the
1076 * registers.
1077 *
1078 * This is called from interrupt context */
1079
1080 spin_lock(&pdata->mac_lock);
1081
1082 /* Check Rx has stopped */
1083 if (smsc911x_mac_read(pdata, MAC_CR) & MAC_CR_RXEN_)
1084 SMSC_WARNING(DRV, "Rx not stopped");
1085
1086 /* Perform the update - safe to do now Rx has stopped */
1087 smsc911x_rx_multicast_update(pdata);
1088
1089 /* Re-enable Rx */
1090 mac_cr = smsc911x_mac_read(pdata, MAC_CR);
1091 mac_cr |= MAC_CR_RXEN_;
1092 smsc911x_mac_write(pdata, MAC_CR, mac_cr);
1093
1094 pdata->multicast_update_pending = 0;
1095
1096 spin_unlock(&pdata->mac_lock);
1097 }
1098
1099 static int smsc911x_soft_reset(struct smsc911x_data *pdata)
1100 {
1101 unsigned int timeout;
1102 unsigned int temp;
1103
1104 /* Reset the LAN911x */
1105 smsc911x_reg_write(pdata, HW_CFG, HW_CFG_SRST_);
1106 timeout = 10;
1107 do {
1108 udelay(10);
1109 temp = smsc911x_reg_read(pdata, HW_CFG);
1110 } while ((--timeout) && (temp & HW_CFG_SRST_));
1111
1112 if (unlikely(temp & HW_CFG_SRST_)) {
1113 SMSC_WARNING(DRV, "Failed to complete reset");
1114 return -EIO;
1115 }
1116 return 0;
1117 }
1118
1119 /* Sets the device MAC address to dev_addr, called with mac_lock held */
1120 static void
1121 smsc911x_set_mac_address(struct smsc911x_data *pdata, u8 dev_addr[6])
1122 {
1123 u32 mac_high16 = (dev_addr[5] << 8) | dev_addr[4];
1124 u32 mac_low32 = (dev_addr[3] << 24) | (dev_addr[2] << 16) |
1125 (dev_addr[1] << 8) | dev_addr[0];
1126
1127 SMSC_ASSERT_MAC_LOCK(pdata);
1128
1129 smsc911x_mac_write(pdata, ADDRH, mac_high16);
1130 smsc911x_mac_write(pdata, ADDRL, mac_low32);
1131 }
1132
1133 static int smsc911x_open(struct net_device *dev)
1134 {
1135 struct smsc911x_data *pdata = netdev_priv(dev);
1136 unsigned int timeout;
1137 unsigned int temp;
1138 unsigned int intcfg;
1139
1140 /* if the phy is not yet registered, retry later*/
1141 if (!pdata->phy_dev) {
1142 SMSC_WARNING(HW, "phy_dev is NULL");
1143 return -EAGAIN;
1144 }
1145
1146 if (!is_valid_ether_addr(dev->dev_addr)) {
1147 SMSC_WARNING(HW, "dev_addr is not a valid MAC address");
1148 return -EADDRNOTAVAIL;
1149 }
1150
1151 /* Reset the LAN911x */
1152 if (smsc911x_soft_reset(pdata)) {
1153 SMSC_WARNING(HW, "soft reset failed");
1154 return -EIO;
1155 }
1156
1157 smsc911x_reg_write(pdata, HW_CFG, 0x00050000);
1158 smsc911x_reg_write(pdata, AFC_CFG, 0x006E3740);
1159
1160 /* Make sure EEPROM has finished loading before setting GPIO_CFG */
1161 timeout = 50;
1162 while ((timeout--) &&
1163 (smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_)) {
1164 udelay(10);
1165 }
1166
1167 if (unlikely(timeout == 0))
1168 SMSC_WARNING(IFUP,
1169 "Timed out waiting for EEPROM busy bit to clear");
1170
1171 smsc911x_reg_write(pdata, GPIO_CFG, 0x70070000);
1172
1173 /* The soft reset above cleared the device's MAC address,
1174 * restore it from local copy (set in probe) */
1175 spin_lock_irq(&pdata->mac_lock);
1176 smsc911x_set_mac_address(pdata, dev->dev_addr);
1177 spin_unlock_irq(&pdata->mac_lock);
1178
1179 /* Initialise irqs, but leave all sources disabled */
1180 smsc911x_reg_write(pdata, INT_EN, 0);
1181 smsc911x_reg_write(pdata, INT_STS, 0xFFFFFFFF);
1182
1183 /* Set interrupt deassertion to 100uS */
1184 intcfg = ((10 << 24) | INT_CFG_IRQ_EN_);
1185
1186 if (pdata->config.irq_polarity) {
1187 SMSC_TRACE(IFUP, "irq polarity: active high");
1188 intcfg |= INT_CFG_IRQ_POL_;
1189 } else {
1190 SMSC_TRACE(IFUP, "irq polarity: active low");
1191 }
1192
1193 if (pdata->config.irq_type) {
1194 SMSC_TRACE(IFUP, "irq type: push-pull");
1195 intcfg |= INT_CFG_IRQ_TYPE_;
1196 } else {
1197 SMSC_TRACE(IFUP, "irq type: open drain");
1198 }
1199
1200 smsc911x_reg_write(pdata, INT_CFG, intcfg);
1201
1202 SMSC_TRACE(IFUP, "Testing irq handler using IRQ %d", dev->irq);
1203 pdata->software_irq_signal = 0;
1204 smp_wmb();
1205
1206 temp = smsc911x_reg_read(pdata, INT_EN);
1207 temp |= INT_EN_SW_INT_EN_;
1208 smsc911x_reg_write(pdata, INT_EN, temp);
1209
1210 timeout = 1000;
1211 while (timeout--) {
1212 if (pdata->software_irq_signal)
1213 break;
1214 msleep(1);
1215 }
1216
1217 if (!pdata->software_irq_signal) {
1218 dev_warn(&dev->dev, "ISR failed signaling test (IRQ %d)\n",
1219 dev->irq);
1220 return -ENODEV;
1221 }
1222 SMSC_TRACE(IFUP, "IRQ handler passed test using IRQ %d", dev->irq);
1223
1224 dev_info(&dev->dev, "SMSC911x/921x identified at %#08lx, IRQ: %d\n",
1225 (unsigned long)pdata->ioaddr, dev->irq);
1226
1227 /* Bring the PHY up */
1228 phy_start(pdata->phy_dev);
1229
1230 temp = smsc911x_reg_read(pdata, HW_CFG);
1231 /* Preserve TX FIFO size and external PHY configuration */
1232 temp &= (HW_CFG_TX_FIF_SZ_|0x00000FFF);
1233 temp |= HW_CFG_SF_;
1234 smsc911x_reg_write(pdata, HW_CFG, temp);
1235
1236 temp = smsc911x_reg_read(pdata, FIFO_INT);
1237 temp |= FIFO_INT_TX_AVAIL_LEVEL_;
1238 temp &= ~(FIFO_INT_RX_STS_LEVEL_);
1239 smsc911x_reg_write(pdata, FIFO_INT, temp);
1240
1241 /* set RX Data offset to 2 bytes for alignment */
1242 smsc911x_reg_write(pdata, RX_CFG, (2 << 8));
1243
1244 /* enable NAPI polling before enabling RX interrupts */
1245 napi_enable(&pdata->napi);
1246
1247 temp = smsc911x_reg_read(pdata, INT_EN);
1248 temp |= (INT_EN_TDFA_EN_ | INT_EN_RSFL_EN_);
1249 smsc911x_reg_write(pdata, INT_EN, temp);
1250
1251 spin_lock_irq(&pdata->mac_lock);
1252 temp = smsc911x_mac_read(pdata, MAC_CR);
1253 temp |= (MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_);
1254 smsc911x_mac_write(pdata, MAC_CR, temp);
1255 spin_unlock_irq(&pdata->mac_lock);
1256
1257 smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_);
1258
1259 netif_start_queue(dev);
1260 return 0;
1261 }
1262
1263 /* Entry point for stopping the interface */
1264 static int smsc911x_stop(struct net_device *dev)
1265 {
1266 struct smsc911x_data *pdata = netdev_priv(dev);
1267 unsigned int temp;
1268
1269 /* Disable all device interrupts */
1270 temp = smsc911x_reg_read(pdata, INT_CFG);
1271 temp &= ~INT_CFG_IRQ_EN_;
1272 smsc911x_reg_write(pdata, INT_CFG, temp);
1273
1274 /* Stop Tx and Rx polling */
1275 netif_stop_queue(dev);
1276 napi_disable(&pdata->napi);
1277
1278 /* At this point all Rx and Tx activity is stopped */
1279 dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP);
1280 smsc911x_tx_update_txcounters(dev);
1281
1282 /* Bring the PHY down */
1283 if (pdata->phy_dev)
1284 phy_stop(pdata->phy_dev);
1285
1286 SMSC_TRACE(IFDOWN, "Interface stopped");
1287 return 0;
1288 }
1289
1290 /* Entry point for transmitting a packet */
1291 static int smsc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
1292 {
1293 struct smsc911x_data *pdata = netdev_priv(dev);
1294 unsigned int freespace;
1295 unsigned int tx_cmd_a;
1296 unsigned int tx_cmd_b;
1297 unsigned int temp;
1298 u32 wrsz;
1299 ulong bufp;
1300
1301 freespace = smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TDFREE_;
1302
1303 if (unlikely(freespace < TX_FIFO_LOW_THRESHOLD))
1304 SMSC_WARNING(TX_ERR,
1305 "Tx data fifo low, space available: %d", freespace);
1306
1307 /* Word alignment adjustment */
1308 tx_cmd_a = (u32)((ulong)skb->data & 0x03) << 16;
1309 tx_cmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_;
1310 tx_cmd_a |= (unsigned int)skb->len;
1311
1312 tx_cmd_b = ((unsigned int)skb->len) << 16;
1313 tx_cmd_b |= (unsigned int)skb->len;
1314
1315 smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_a);
1316 smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_b);
1317
1318 bufp = (ulong)skb->data & (~0x3);
1319 wrsz = (u32)skb->len + 3;
1320 wrsz += (u32)((ulong)skb->data & 0x3);
1321 wrsz >>= 2;
1322
1323 smsc911x_tx_writefifo(pdata, (unsigned int *)bufp, wrsz);
1324 freespace -= (skb->len + 32);
1325 dev_kfree_skb(skb);
1326 dev->trans_start = jiffies;
1327
1328 if (unlikely(smsc911x_tx_get_txstatcount(pdata) >= 30))
1329 smsc911x_tx_update_txcounters(dev);
1330
1331 if (freespace < TX_FIFO_LOW_THRESHOLD) {
1332 netif_stop_queue(dev);
1333 temp = smsc911x_reg_read(pdata, FIFO_INT);
1334 temp &= 0x00FFFFFF;
1335 temp |= 0x32000000;
1336 smsc911x_reg_write(pdata, FIFO_INT, temp);
1337 }
1338
1339 return NETDEV_TX_OK;
1340 }
1341
1342 /* Entry point for getting status counters */
1343 static struct net_device_stats *smsc911x_get_stats(struct net_device *dev)
1344 {
1345 struct smsc911x_data *pdata = netdev_priv(dev);
1346 smsc911x_tx_update_txcounters(dev);
1347 dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP);
1348 return &dev->stats;
1349 }
1350
1351 /* Entry point for setting addressing modes */
1352 static void smsc911x_set_multicast_list(struct net_device *dev)
1353 {
1354 struct smsc911x_data *pdata = netdev_priv(dev);
1355 unsigned long flags;
1356
1357 if (dev->flags & IFF_PROMISC) {
1358 /* Enabling promiscuous mode */
1359 pdata->set_bits_mask = MAC_CR_PRMS_;
1360 pdata->clear_bits_mask = (MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
1361 pdata->hashhi = 0;
1362 pdata->hashlo = 0;
1363 } else if (dev->flags & IFF_ALLMULTI) {
1364 /* Enabling all multicast mode */
1365 pdata->set_bits_mask = MAC_CR_MCPAS_;
1366 pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_HPFILT_);
1367 pdata->hashhi = 0;
1368 pdata->hashlo = 0;
1369 } else if (dev->mc_count > 0) {
1370 /* Enabling specific multicast addresses */
1371 unsigned int hash_high = 0;
1372 unsigned int hash_low = 0;
1373 unsigned int count = 0;
1374 struct dev_mc_list *mc_list = dev->mc_list;
1375
1376 pdata->set_bits_mask = MAC_CR_HPFILT_;
1377 pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_MCPAS_);
1378
1379 while (mc_list) {
1380 count++;
1381 if ((mc_list->dmi_addrlen) == ETH_ALEN) {
1382 unsigned int bitnum =
1383 smsc911x_hash(mc_list->dmi_addr);
1384 unsigned int mask = 0x01 << (bitnum & 0x1F);
1385 if (bitnum & 0x20)
1386 hash_high |= mask;
1387 else
1388 hash_low |= mask;
1389 } else {
1390 SMSC_WARNING(DRV, "dmi_addrlen != 6");
1391 }
1392 mc_list = mc_list->next;
1393 }
1394 if (count != (unsigned int)dev->mc_count)
1395 SMSC_WARNING(DRV, "mc_count != dev->mc_count");
1396
1397 pdata->hashhi = hash_high;
1398 pdata->hashlo = hash_low;
1399 } else {
1400 /* Enabling local MAC address only */
1401 pdata->set_bits_mask = 0;
1402 pdata->clear_bits_mask =
1403 (MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
1404 pdata->hashhi = 0;
1405 pdata->hashlo = 0;
1406 }
1407
1408 spin_lock_irqsave(&pdata->mac_lock, flags);
1409
1410 if (pdata->generation <= 1) {
1411 /* Older hardware revision - cannot change these flags while
1412 * receiving data */
1413 if (!pdata->multicast_update_pending) {
1414 unsigned int temp;
1415 SMSC_TRACE(HW, "scheduling mcast update");
1416 pdata->multicast_update_pending = 1;
1417
1418 /* Request the hardware to stop, then perform the
1419 * update when we get an RX_STOP interrupt */
1420 smsc911x_reg_write(pdata, INT_STS, INT_STS_RXSTOP_INT_);
1421 temp = smsc911x_reg_read(pdata, INT_EN);
1422 temp |= INT_EN_RXSTOP_INT_EN_;
1423 smsc911x_reg_write(pdata, INT_EN, temp);
1424
1425 temp = smsc911x_mac_read(pdata, MAC_CR);
1426 temp &= ~(MAC_CR_RXEN_);
1427 smsc911x_mac_write(pdata, MAC_CR, temp);
1428 } else {
1429 /* There is another update pending, this should now
1430 * use the newer values */
1431 }
1432 } else {
1433 /* Newer hardware revision - can write immediately */
1434 smsc911x_rx_multicast_update(pdata);
1435 }
1436
1437 spin_unlock_irqrestore(&pdata->mac_lock, flags);
1438 }
1439
1440 static irqreturn_t smsc911x_irqhandler(int irq, void *dev_id)
1441 {
1442 struct net_device *dev = dev_id;
1443 struct smsc911x_data *pdata = netdev_priv(dev);
1444 u32 intsts = smsc911x_reg_read(pdata, INT_STS);
1445 u32 inten = smsc911x_reg_read(pdata, INT_EN);
1446 int serviced = IRQ_NONE;
1447 u32 temp;
1448
1449 if (unlikely(intsts & inten & INT_STS_SW_INT_)) {
1450 temp = smsc911x_reg_read(pdata, INT_EN);
1451 temp &= (~INT_EN_SW_INT_EN_);
1452 smsc911x_reg_write(pdata, INT_EN, temp);
1453 smsc911x_reg_write(pdata, INT_STS, INT_STS_SW_INT_);
1454 pdata->software_irq_signal = 1;
1455 smp_wmb();
1456 serviced = IRQ_HANDLED;
1457 }
1458
1459 if (unlikely(intsts & inten & INT_STS_RXSTOP_INT_)) {
1460 /* Called when there is a multicast update scheduled and
1461 * it is now safe to complete the update */
1462 SMSC_TRACE(INTR, "RX Stop interrupt");
1463 temp = smsc911x_reg_read(pdata, INT_EN);
1464 temp &= (~INT_EN_RXSTOP_INT_EN_);
1465 smsc911x_reg_write(pdata, INT_EN, temp);
1466 smsc911x_reg_write(pdata, INT_STS, INT_STS_RXSTOP_INT_);
1467 smsc911x_rx_multicast_update_workaround(pdata);
1468 serviced = IRQ_HANDLED;
1469 }
1470
1471 if (intsts & inten & INT_STS_TDFA_) {
1472 temp = smsc911x_reg_read(pdata, FIFO_INT);
1473 temp |= FIFO_INT_TX_AVAIL_LEVEL_;
1474 smsc911x_reg_write(pdata, FIFO_INT, temp);
1475 smsc911x_reg_write(pdata, INT_STS, INT_STS_TDFA_);
1476 netif_wake_queue(dev);
1477 serviced = IRQ_HANDLED;
1478 }
1479
1480 if (unlikely(intsts & inten & INT_STS_RXE_)) {
1481 SMSC_TRACE(INTR, "RX Error interrupt");
1482 smsc911x_reg_write(pdata, INT_STS, INT_STS_RXE_);
1483 serviced = IRQ_HANDLED;
1484 }
1485
1486 if (likely(intsts & inten & INT_STS_RSFL_)) {
1487 if (likely(netif_rx_schedule_prep(&pdata->napi))) {
1488 /* Disable Rx interrupts */
1489 temp = smsc911x_reg_read(pdata, INT_EN);
1490 temp &= (~INT_EN_RSFL_EN_);
1491 smsc911x_reg_write(pdata, INT_EN, temp);
1492 /* Schedule a NAPI poll */
1493 __netif_rx_schedule(&pdata->napi);
1494 } else {
1495 SMSC_WARNING(RX_ERR,
1496 "netif_rx_schedule_prep failed");
1497 }
1498 serviced = IRQ_HANDLED;
1499 }
1500
1501 return serviced;
1502 }
1503
1504 #ifdef CONFIG_NET_POLL_CONTROLLER
1505 static void smsc911x_poll_controller(struct net_device *dev)
1506 {
1507 disable_irq(dev->irq);
1508 smsc911x_irqhandler(0, dev);
1509 enable_irq(dev->irq);
1510 }
1511 #endif /* CONFIG_NET_POLL_CONTROLLER */
1512
1513 /* Standard ioctls for mii-tool */
1514 static int smsc911x_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1515 {
1516 struct smsc911x_data *pdata = netdev_priv(dev);
1517
1518 if (!netif_running(dev) || !pdata->phy_dev)
1519 return -EINVAL;
1520
1521 return phy_mii_ioctl(pdata->phy_dev, if_mii(ifr), cmd);
1522 }
1523
1524 static int
1525 smsc911x_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1526 {
1527 struct smsc911x_data *pdata = netdev_priv(dev);
1528
1529 cmd->maxtxpkt = 1;
1530 cmd->maxrxpkt = 1;
1531 return phy_ethtool_gset(pdata->phy_dev, cmd);
1532 }
1533
1534 static int
1535 smsc911x_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1536 {
1537 struct smsc911x_data *pdata = netdev_priv(dev);
1538
1539 return phy_ethtool_sset(pdata->phy_dev, cmd);
1540 }
1541
1542 static void smsc911x_ethtool_getdrvinfo(struct net_device *dev,
1543 struct ethtool_drvinfo *info)
1544 {
1545 strlcpy(info->driver, SMSC_CHIPNAME, sizeof(info->driver));
1546 strlcpy(info->version, SMSC_DRV_VERSION, sizeof(info->version));
1547 strlcpy(info->bus_info, dev->dev.parent->bus_id,
1548 sizeof(info->bus_info));
1549 }
1550
1551 static int smsc911x_ethtool_nwayreset(struct net_device *dev)
1552 {
1553 struct smsc911x_data *pdata = netdev_priv(dev);
1554
1555 return phy_start_aneg(pdata->phy_dev);
1556 }
1557
1558 static u32 smsc911x_ethtool_getmsglevel(struct net_device *dev)
1559 {
1560 struct smsc911x_data *pdata = netdev_priv(dev);
1561 return pdata->msg_enable;
1562 }
1563
1564 static void smsc911x_ethtool_setmsglevel(struct net_device *dev, u32 level)
1565 {
1566 struct smsc911x_data *pdata = netdev_priv(dev);
1567 pdata->msg_enable = level;
1568 }
1569
1570 static int smsc911x_ethtool_getregslen(struct net_device *dev)
1571 {
1572 return (((E2P_DATA - ID_REV) / 4 + 1) + (WUCSR - MAC_CR) + 1 + 32) *
1573 sizeof(u32);
1574 }
1575
1576 static void
1577 smsc911x_ethtool_getregs(struct net_device *dev, struct ethtool_regs *regs,
1578 void *buf)
1579 {
1580 struct smsc911x_data *pdata = netdev_priv(dev);
1581 struct phy_device *phy_dev = pdata->phy_dev;
1582 unsigned long flags;
1583 unsigned int i;
1584 unsigned int j = 0;
1585 u32 *data = buf;
1586
1587 regs->version = pdata->idrev;
1588 for (i = ID_REV; i <= E2P_DATA; i += (sizeof(u32)))
1589 data[j++] = smsc911x_reg_read(pdata, i);
1590
1591 for (i = MAC_CR; i <= WUCSR; i++) {
1592 spin_lock_irqsave(&pdata->mac_lock, flags);
1593 data[j++] = smsc911x_mac_read(pdata, i);
1594 spin_unlock_irqrestore(&pdata->mac_lock, flags);
1595 }
1596
1597 for (i = 0; i <= 31; i++)
1598 data[j++] = smsc911x_mii_read(phy_dev->bus, phy_dev->addr, i);
1599 }
1600
1601 static void smsc911x_eeprom_enable_access(struct smsc911x_data *pdata)
1602 {
1603 unsigned int temp = smsc911x_reg_read(pdata, GPIO_CFG);
1604 temp &= ~GPIO_CFG_EEPR_EN_;
1605 smsc911x_reg_write(pdata, GPIO_CFG, temp);
1606 msleep(1);
1607 }
1608
1609 static int smsc911x_eeprom_send_cmd(struct smsc911x_data *pdata, u32 op)
1610 {
1611 int timeout = 100;
1612 u32 e2cmd;
1613
1614 SMSC_TRACE(DRV, "op 0x%08x", op);
1615 if (smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) {
1616 SMSC_WARNING(DRV, "Busy at start");
1617 return -EBUSY;
1618 }
1619
1620 e2cmd = op | E2P_CMD_EPC_BUSY_;
1621 smsc911x_reg_write(pdata, E2P_CMD, e2cmd);
1622
1623 do {
1624 msleep(1);
1625 e2cmd = smsc911x_reg_read(pdata, E2P_CMD);
1626 } while ((e2cmd & E2P_CMD_EPC_BUSY_) && (timeout--));
1627
1628 if (!timeout) {
1629 SMSC_TRACE(DRV, "TIMED OUT");
1630 return -EAGAIN;
1631 }
1632
1633 if (e2cmd & E2P_CMD_EPC_TIMEOUT_) {
1634 SMSC_TRACE(DRV, "Error occured during eeprom operation");
1635 return -EINVAL;
1636 }
1637
1638 return 0;
1639 }
1640
1641 static int smsc911x_eeprom_read_location(struct smsc911x_data *pdata,
1642 u8 address, u8 *data)
1643 {
1644 u32 op = E2P_CMD_EPC_CMD_READ_ | address;
1645 int ret;
1646
1647 SMSC_TRACE(DRV, "address 0x%x", address);
1648 ret = smsc911x_eeprom_send_cmd(pdata, op);
1649
1650 if (!ret)
1651 data[address] = smsc911x_reg_read(pdata, E2P_DATA);
1652
1653 return ret;
1654 }
1655
1656 static int smsc911x_eeprom_write_location(struct smsc911x_data *pdata,
1657 u8 address, u8 data)
1658 {
1659 u32 op = E2P_CMD_EPC_CMD_ERASE_ | address;
1660 int ret;
1661
1662 SMSC_TRACE(DRV, "address 0x%x, data 0x%x", address, data);
1663 ret = smsc911x_eeprom_send_cmd(pdata, op);
1664
1665 if (!ret) {
1666 op = E2P_CMD_EPC_CMD_WRITE_ | address;
1667 smsc911x_reg_write(pdata, E2P_DATA, (u32)data);
1668 ret = smsc911x_eeprom_send_cmd(pdata, op);
1669 }
1670
1671 return ret;
1672 }
1673
1674 static int smsc911x_ethtool_get_eeprom_len(struct net_device *dev)
1675 {
1676 return SMSC911X_EEPROM_SIZE;
1677 }
1678
1679 static int smsc911x_ethtool_get_eeprom(struct net_device *dev,
1680 struct ethtool_eeprom *eeprom, u8 *data)
1681 {
1682 struct smsc911x_data *pdata = netdev_priv(dev);
1683 u8 eeprom_data[SMSC911X_EEPROM_SIZE];
1684 int len;
1685 int i;
1686
1687 smsc911x_eeprom_enable_access(pdata);
1688
1689 len = min(eeprom->len, SMSC911X_EEPROM_SIZE);
1690 for (i = 0; i < len; i++) {
1691 int ret = smsc911x_eeprom_read_location(pdata, i, eeprom_data);
1692 if (ret < 0) {
1693 eeprom->len = 0;
1694 return ret;
1695 }
1696 }
1697
1698 memcpy(data, &eeprom_data[eeprom->offset], len);
1699 eeprom->len = len;
1700 return 0;
1701 }
1702
1703 static int smsc911x_ethtool_set_eeprom(struct net_device *dev,
1704 struct ethtool_eeprom *eeprom, u8 *data)
1705 {
1706 int ret;
1707 struct smsc911x_data *pdata = netdev_priv(dev);
1708
1709 smsc911x_eeprom_enable_access(pdata);
1710 smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWEN_);
1711 ret = smsc911x_eeprom_write_location(pdata, eeprom->offset, *data);
1712 smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWDS_);
1713
1714 /* Single byte write, according to man page */
1715 eeprom->len = 1;
1716
1717 return ret;
1718 }
1719
1720 static const struct ethtool_ops smsc911x_ethtool_ops = {
1721 .get_settings = smsc911x_ethtool_getsettings,
1722 .set_settings = smsc911x_ethtool_setsettings,
1723 .get_link = ethtool_op_get_link,
1724 .get_drvinfo = smsc911x_ethtool_getdrvinfo,
1725 .nway_reset = smsc911x_ethtool_nwayreset,
1726 .get_msglevel = smsc911x_ethtool_getmsglevel,
1727 .set_msglevel = smsc911x_ethtool_setmsglevel,
1728 .get_regs_len = smsc911x_ethtool_getregslen,
1729 .get_regs = smsc911x_ethtool_getregs,
1730 .get_eeprom_len = smsc911x_ethtool_get_eeprom_len,
1731 .get_eeprom = smsc911x_ethtool_get_eeprom,
1732 .set_eeprom = smsc911x_ethtool_set_eeprom,
1733 };
1734
1735 static const struct net_device_ops smsc911x_netdev_ops = {
1736 .ndo_open = smsc911x_open,
1737 .ndo_stop = smsc911x_stop,
1738 .ndo_start_xmit = smsc911x_hard_start_xmit,
1739 .ndo_get_stats = smsc911x_get_stats,
1740 .ndo_set_multicast_list = smsc911x_set_multicast_list,
1741 .ndo_do_ioctl = smsc911x_do_ioctl,
1742 .ndo_validate_addr = eth_validate_addr,
1743 #ifdef CONFIG_NET_POLL_CONTROLLER
1744 .ndo_poll_controller = smsc911x_poll_controller,
1745 #endif
1746 };
1747
1748 /* Initializing private device structures, only called from probe */
1749 static int __devinit smsc911x_init(struct net_device *dev)
1750 {
1751 struct smsc911x_data *pdata = netdev_priv(dev);
1752 unsigned int byte_test;
1753
1754 SMSC_TRACE(PROBE, "Driver Parameters:");
1755 SMSC_TRACE(PROBE, "LAN base: 0x%08lX",
1756 (unsigned long)pdata->ioaddr);
1757 SMSC_TRACE(PROBE, "IRQ: %d", dev->irq);
1758 SMSC_TRACE(PROBE, "PHY will be autodetected.");
1759
1760 spin_lock_init(&pdata->dev_lock);
1761
1762 if (pdata->ioaddr == 0) {
1763 SMSC_WARNING(PROBE, "pdata->ioaddr: 0x00000000");
1764 return -ENODEV;
1765 }
1766
1767 /* Check byte ordering */
1768 byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
1769 SMSC_TRACE(PROBE, "BYTE_TEST: 0x%08X", byte_test);
1770 if (byte_test == 0x43218765) {
1771 SMSC_TRACE(PROBE, "BYTE_TEST looks swapped, "
1772 "applying WORD_SWAP");
1773 smsc911x_reg_write(pdata, WORD_SWAP, 0xffffffff);
1774
1775 /* 1 dummy read of BYTE_TEST is needed after a write to
1776 * WORD_SWAP before its contents are valid */
1777 byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
1778
1779 byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
1780 }
1781
1782 if (byte_test != 0x87654321) {
1783 SMSC_WARNING(DRV, "BYTE_TEST: 0x%08X", byte_test);
1784 if (((byte_test >> 16) & 0xFFFF) == (byte_test & 0xFFFF)) {
1785 SMSC_WARNING(PROBE,
1786 "top 16 bits equal to bottom 16 bits");
1787 SMSC_TRACE(PROBE, "This may mean the chip is set "
1788 "for 32 bit while the bus is reading 16 bit");
1789 }
1790 return -ENODEV;
1791 }
1792
1793 /* Default generation to zero (all workarounds apply) */
1794 pdata->generation = 0;
1795
1796 pdata->idrev = smsc911x_reg_read(pdata, ID_REV);
1797 switch (pdata->idrev & 0xFFFF0000) {
1798 case 0x01180000:
1799 case 0x01170000:
1800 case 0x01160000:
1801 case 0x01150000:
1802 /* LAN911[5678] family */
1803 pdata->generation = pdata->idrev & 0x0000FFFF;
1804 break;
1805
1806 case 0x118A0000:
1807 case 0x117A0000:
1808 case 0x116A0000:
1809 case 0x115A0000:
1810 /* LAN921[5678] family */
1811 pdata->generation = 3;
1812 break;
1813
1814 case 0x92100000:
1815 case 0x92110000:
1816 case 0x92200000:
1817 case 0x92210000:
1818 /* LAN9210/LAN9211/LAN9220/LAN9221 */
1819 pdata->generation = 4;
1820 break;
1821
1822 default:
1823 SMSC_WARNING(PROBE, "LAN911x not identified, idrev: 0x%08X",
1824 pdata->idrev);
1825 return -ENODEV;
1826 }
1827
1828 SMSC_TRACE(PROBE, "LAN911x identified, idrev: 0x%08X, generation: %d",
1829 pdata->idrev, pdata->generation);
1830
1831 if (pdata->generation == 0)
1832 SMSC_WARNING(PROBE,
1833 "This driver is not intended for this chip revision");
1834
1835 /* Reset the LAN911x */
1836 if (smsc911x_soft_reset(pdata))
1837 return -ENODEV;
1838
1839 /* Disable all interrupt sources until we bring the device up */
1840 smsc911x_reg_write(pdata, INT_EN, 0);
1841
1842 ether_setup(dev);
1843 dev->flags |= IFF_MULTICAST;
1844 netif_napi_add(dev, &pdata->napi, smsc911x_poll, SMSC_NAPI_WEIGHT);
1845 dev->netdev_ops = &smsc911x_netdev_ops;
1846 dev->ethtool_ops = &smsc911x_ethtool_ops;
1847
1848 return 0;
1849 }
1850
1851 static int __devexit smsc911x_drv_remove(struct platform_device *pdev)
1852 {
1853 struct net_device *dev;
1854 struct smsc911x_data *pdata;
1855 struct resource *res;
1856
1857 dev = platform_get_drvdata(pdev);
1858 BUG_ON(!dev);
1859 pdata = netdev_priv(dev);
1860 BUG_ON(!pdata);
1861 BUG_ON(!pdata->ioaddr);
1862 BUG_ON(!pdata->phy_dev);
1863
1864 SMSC_TRACE(IFDOWN, "Stopping driver.");
1865
1866 phy_disconnect(pdata->phy_dev);
1867 pdata->phy_dev = NULL;
1868 mdiobus_unregister(pdata->mii_bus);
1869 mdiobus_free(pdata->mii_bus);
1870
1871 platform_set_drvdata(pdev, NULL);
1872 unregister_netdev(dev);
1873 free_irq(dev->irq, dev);
1874 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
1875 "smsc911x-memory");
1876 if (!res)
1877 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1878
1879 release_mem_region(res->start, res->end - res->start);
1880
1881 iounmap(pdata->ioaddr);
1882
1883 free_netdev(dev);
1884
1885 return 0;
1886 }
1887
1888 static int __devinit smsc911x_drv_probe(struct platform_device *pdev)
1889 {
1890 struct net_device *dev;
1891 struct smsc911x_data *pdata;
1892 struct smsc911x_platform_config *config = pdev->dev.platform_data;
1893 struct resource *res;
1894 unsigned int intcfg = 0;
1895 int res_size;
1896 int retval;
1897 DECLARE_MAC_BUF(mac);
1898
1899 pr_info("%s: Driver version %s.\n", SMSC_CHIPNAME, SMSC_DRV_VERSION);
1900
1901 /* platform data specifies irq & dynamic bus configuration */
1902 if (!pdev->dev.platform_data) {
1903 pr_warning("%s: platform_data not provided\n", SMSC_CHIPNAME);
1904 retval = -ENODEV;
1905 goto out_0;
1906 }
1907
1908 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
1909 "smsc911x-memory");
1910 if (!res)
1911 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1912 if (!res) {
1913 pr_warning("%s: Could not allocate resource.\n",
1914 SMSC_CHIPNAME);
1915 retval = -ENODEV;
1916 goto out_0;
1917 }
1918 res_size = res->end - res->start;
1919
1920 if (!request_mem_region(res->start, res_size, SMSC_CHIPNAME)) {
1921 retval = -EBUSY;
1922 goto out_0;
1923 }
1924
1925 dev = alloc_etherdev(sizeof(struct smsc911x_data));
1926 if (!dev) {
1927 pr_warning("%s: Could not allocate device.\n", SMSC_CHIPNAME);
1928 retval = -ENOMEM;
1929 goto out_release_io_1;
1930 }
1931
1932 SET_NETDEV_DEV(dev, &pdev->dev);
1933
1934 pdata = netdev_priv(dev);
1935
1936 dev->irq = platform_get_irq(pdev, 0);
1937 pdata->ioaddr = ioremap_nocache(res->start, res_size);
1938
1939 /* copy config parameters across to pdata */
1940 memcpy(&pdata->config, config, sizeof(pdata->config));
1941
1942 pdata->dev = dev;
1943 pdata->msg_enable = ((1 << debug) - 1);
1944
1945 if (pdata->ioaddr == NULL) {
1946 SMSC_WARNING(PROBE,
1947 "Error smsc911x base address invalid");
1948 retval = -ENOMEM;
1949 goto out_free_netdev_2;
1950 }
1951
1952 retval = smsc911x_init(dev);
1953 if (retval < 0)
1954 goto out_unmap_io_3;
1955
1956 /* configure irq polarity and type before connecting isr */
1957 if (pdata->config.irq_polarity == SMSC911X_IRQ_POLARITY_ACTIVE_HIGH)
1958 intcfg |= INT_CFG_IRQ_POL_;
1959
1960 if (pdata->config.irq_type == SMSC911X_IRQ_TYPE_PUSH_PULL)
1961 intcfg |= INT_CFG_IRQ_TYPE_;
1962
1963 smsc911x_reg_write(pdata, INT_CFG, intcfg);
1964
1965 /* Ensure interrupts are globally disabled before connecting ISR */
1966 smsc911x_reg_write(pdata, INT_EN, 0);
1967 smsc911x_reg_write(pdata, INT_STS, 0xFFFFFFFF);
1968
1969 retval = request_irq(dev->irq, smsc911x_irqhandler, IRQF_DISABLED,
1970 SMSC_CHIPNAME, dev);
1971 if (retval) {
1972 SMSC_WARNING(PROBE,
1973 "Unable to claim requested irq: %d", dev->irq);
1974 goto out_unmap_io_3;
1975 }
1976
1977 platform_set_drvdata(pdev, dev);
1978
1979 retval = register_netdev(dev);
1980 if (retval) {
1981 SMSC_WARNING(PROBE,
1982 "Error %i registering device", retval);
1983 goto out_unset_drvdata_4;
1984 } else {
1985 SMSC_TRACE(PROBE, "Network interface: \"%s\"", dev->name);
1986 }
1987
1988 spin_lock_init(&pdata->mac_lock);
1989
1990 retval = smsc911x_mii_init(pdev, dev);
1991 if (retval) {
1992 SMSC_WARNING(PROBE,
1993 "Error %i initialising mii", retval);
1994 goto out_unregister_netdev_5;
1995 }
1996
1997 spin_lock_irq(&pdata->mac_lock);
1998
1999 /* Check if mac address has been specified when bringing interface up */
2000 if (is_valid_ether_addr(dev->dev_addr)) {
2001 smsc911x_set_mac_address(pdata, dev->dev_addr);
2002 SMSC_TRACE(PROBE, "MAC Address is specified by configuration");
2003 } else {
2004 /* Try reading mac address from device. if EEPROM is present
2005 * it will already have been set */
2006 u32 mac_high16 = smsc911x_mac_read(pdata, ADDRH);
2007 u32 mac_low32 = smsc911x_mac_read(pdata, ADDRL);
2008 dev->dev_addr[0] = (u8)(mac_low32);
2009 dev->dev_addr[1] = (u8)(mac_low32 >> 8);
2010 dev->dev_addr[2] = (u8)(mac_low32 >> 16);
2011 dev->dev_addr[3] = (u8)(mac_low32 >> 24);
2012 dev->dev_addr[4] = (u8)(mac_high16);
2013 dev->dev_addr[5] = (u8)(mac_high16 >> 8);
2014
2015 if (is_valid_ether_addr(dev->dev_addr)) {
2016 /* eeprom values are valid so use them */
2017 SMSC_TRACE(PROBE,
2018 "Mac Address is read from LAN911x EEPROM");
2019 } else {
2020 /* eeprom values are invalid, generate random MAC */
2021 random_ether_addr(dev->dev_addr);
2022 smsc911x_set_mac_address(pdata, dev->dev_addr);
2023 SMSC_TRACE(PROBE,
2024 "MAC Address is set to random_ether_addr");
2025 }
2026 }
2027
2028 spin_unlock_irq(&pdata->mac_lock);
2029
2030 dev_info(&dev->dev, "MAC Address: %s\n",
2031 print_mac(mac, dev->dev_addr));
2032
2033 return 0;
2034
2035 out_unregister_netdev_5:
2036 unregister_netdev(dev);
2037 out_unset_drvdata_4:
2038 platform_set_drvdata(pdev, NULL);
2039 free_irq(dev->irq, dev);
2040 out_unmap_io_3:
2041 iounmap(pdata->ioaddr);
2042 out_free_netdev_2:
2043 free_netdev(dev);
2044 out_release_io_1:
2045 release_mem_region(res->start, res->end - res->start);
2046 out_0:
2047 return retval;
2048 }
2049
2050 static struct platform_driver smsc911x_driver = {
2051 .probe = smsc911x_drv_probe,
2052 .remove = smsc911x_drv_remove,
2053 .driver = {
2054 .name = SMSC_CHIPNAME,
2055 },
2056 };
2057
2058 /* Entry point for loading the module */
2059 static int __init smsc911x_init_module(void)
2060 {
2061 return platform_driver_register(&smsc911x_driver);
2062 }
2063
2064 /* entry point for unloading the module */
2065 static void __exit smsc911x_cleanup_module(void)
2066 {
2067 platform_driver_unregister(&smsc911x_driver);
2068 }
2069
2070 module_init(smsc911x_init_module);
2071 module_exit(smsc911x_cleanup_module);
Support for the Chinese Samsung S3C2440 based development boards