1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2008 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/delay.h>
16 #include <linux/notifier.h>
18 #include <linux/tcp.h>
20 #include <linux/crc32.h>
21 #include <linux/ethtool.h>
22 #include <linux/topology.h>
23 #include "net_driver.h"
33 #define EFX_MAX_MTU (9 * 1024)
35 /* RX slow fill workqueue. If memory allocation fails in the fast path,
36 * a work item is pushed onto this work queue to retry the allocation later,
37 * to avoid the NIC being starved of RX buffers. Since this is a per cpu
38 * workqueue, there is nothing to be gained in making it per NIC
40 static struct workqueue_struct
*refill_workqueue
;
42 /**************************************************************************
46 *************************************************************************/
49 * Enable large receive offload (LRO) aka soft segment reassembly (SSR)
51 * This sets the default for new devices. It can be controlled later
54 static int lro
= true;
55 module_param(lro
, int, 0644);
56 MODULE_PARM_DESC(lro
, "Large receive offload acceleration");
59 * Use separate channels for TX and RX events
61 * Set this to 1 to use separate channels for TX and RX. It allows us to
62 * apply a higher level of interrupt moderation to TX events.
64 * This is forced to 0 for MSI interrupt mode as the interrupt vector
67 static unsigned int separate_tx_and_rx_channels
= true;
69 /* This is the weight assigned to each of the (per-channel) virtual
72 static int napi_weight
= 64;
74 /* This is the time (in jiffies) between invocations of the hardware
75 * monitor, which checks for known hardware bugs and resets the
76 * hardware and driver as necessary.
78 unsigned int efx_monitor_interval
= 1 * HZ
;
80 /* This controls whether or not the hardware monitor will trigger a
81 * reset when it detects an error condition.
83 static unsigned int monitor_reset
= true;
85 /* This controls whether or not the driver will initialise devices
86 * with invalid MAC addresses stored in the EEPROM or flash. If true,
87 * such devices will be initialised with a random locally-generated
88 * MAC address. This allows for loading the sfc_mtd driver to
89 * reprogram the flash, even if the flash contents (including the MAC
90 * address) have previously been erased.
92 static unsigned int allow_bad_hwaddr
;
94 /* Initial interrupt moderation settings. They can be modified after
95 * module load with ethtool.
97 * The default for RX should strike a balance between increasing the
98 * round-trip latency and reducing overhead.
100 static unsigned int rx_irq_mod_usec
= 60;
102 /* Initial interrupt moderation settings. They can be modified after
103 * module load with ethtool.
105 * This default is chosen to ensure that a 10G link does not go idle
106 * while a TX queue is stopped after it has become full. A queue is
107 * restarted when it drops below half full. The time this takes (assuming
108 * worst case 3 descriptors per packet and 1024 descriptors) is
109 * 512 / 3 * 1.2 = 205 usec.
111 static unsigned int tx_irq_mod_usec
= 150;
113 /* This is the first interrupt mode to try out of:
118 static unsigned int interrupt_mode
;
120 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
121 * i.e. the number of CPUs among which we may distribute simultaneous
122 * interrupt handling.
124 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
125 * The default (0) means to assign an interrupt to each package (level II cache)
127 static unsigned int rss_cpus
;
128 module_param(rss_cpus
, uint
, 0444);
129 MODULE_PARM_DESC(rss_cpus
, "Number of CPUs to use for Receive-Side Scaling");
131 /**************************************************************************
133 * Utility functions and prototypes
135 *************************************************************************/
136 static void efx_remove_channel(struct efx_channel
*channel
);
137 static void efx_remove_port(struct efx_nic
*efx
);
138 static void efx_fini_napi(struct efx_nic
*efx
);
139 static void efx_fini_channels(struct efx_nic
*efx
);
141 #define EFX_ASSERT_RESET_SERIALISED(efx) \
143 if ((efx->state == STATE_RUNNING) || \
144 (efx->state == STATE_RESETTING)) \
148 /**************************************************************************
150 * Event queue processing
152 *************************************************************************/
154 /* Process channel's event queue
156 * This function is responsible for processing the event queue of a
157 * single channel. The caller must guarantee that this function will
158 * never be concurrently called more than once on the same channel,
159 * though different channels may be being processed concurrently.
161 static int efx_process_channel(struct efx_channel
*channel
, int rx_quota
)
163 struct efx_nic
*efx
= channel
->efx
;
166 if (unlikely(efx
->reset_pending
!= RESET_TYPE_NONE
||
170 rx_packets
= falcon_process_eventq(channel
, rx_quota
);
174 /* Deliver last RX packet. */
175 if (channel
->rx_pkt
) {
176 __efx_rx_packet(channel
, channel
->rx_pkt
,
177 channel
->rx_pkt_csummed
);
178 channel
->rx_pkt
= NULL
;
181 efx_flush_lro(channel
);
182 efx_rx_strategy(channel
);
184 efx_fast_push_rx_descriptors(&efx
->rx_queue
[channel
->channel
]);
189 /* Mark channel as finished processing
191 * Note that since we will not receive further interrupts for this
192 * channel before we finish processing and call the eventq_read_ack()
193 * method, there is no need to use the interrupt hold-off timers.
195 static inline void efx_channel_processed(struct efx_channel
*channel
)
197 /* The interrupt handler for this channel may set work_pending
198 * as soon as we acknowledge the events we've seen. Make sure
199 * it's cleared before then. */
200 channel
->work_pending
= false;
203 falcon_eventq_read_ack(channel
);
208 * NAPI guarantees serialisation of polls of the same device, which
209 * provides the guarantee required by efx_process_channel().
211 static int efx_poll(struct napi_struct
*napi
, int budget
)
213 struct efx_channel
*channel
=
214 container_of(napi
, struct efx_channel
, napi_str
);
215 struct net_device
*napi_dev
= channel
->napi_dev
;
218 EFX_TRACE(channel
->efx
, "channel %d NAPI poll executing on CPU %d\n",
219 channel
->channel
, raw_smp_processor_id());
221 rx_packets
= efx_process_channel(channel
, budget
);
223 if (rx_packets
< budget
) {
224 /* There is no race here; although napi_disable() will
225 * only wait for netif_rx_complete(), this isn't a problem
226 * since efx_channel_processed() will have no effect if
227 * interrupts have already been disabled.
229 netif_rx_complete(napi_dev
, napi
);
230 efx_channel_processed(channel
);
236 /* Process the eventq of the specified channel immediately on this CPU
238 * Disable hardware generated interrupts, wait for any existing
239 * processing to finish, then directly poll (and ack ) the eventq.
240 * Finally reenable NAPI and interrupts.
242 * Since we are touching interrupts the caller should hold the suspend lock
244 void efx_process_channel_now(struct efx_channel
*channel
)
246 struct efx_nic
*efx
= channel
->efx
;
248 BUG_ON(!channel
->used_flags
);
249 BUG_ON(!channel
->enabled
);
251 /* Disable interrupts and wait for ISRs to complete */
252 falcon_disable_interrupts(efx
);
254 synchronize_irq(efx
->legacy_irq
);
256 synchronize_irq(channel
->irq
);
258 /* Wait for any NAPI processing to complete */
259 napi_disable(&channel
->napi_str
);
261 /* Poll the channel */
262 efx_process_channel(channel
, efx
->type
->evq_size
);
264 /* Ack the eventq. This may cause an interrupt to be generated
265 * when they are reenabled */
266 efx_channel_processed(channel
);
268 napi_enable(&channel
->napi_str
);
269 falcon_enable_interrupts(efx
);
272 /* Create event queue
273 * Event queue memory allocations are done only once. If the channel
274 * is reset, the memory buffer will be reused; this guards against
275 * errors during channel reset and also simplifies interrupt handling.
277 static int efx_probe_eventq(struct efx_channel
*channel
)
279 EFX_LOG(channel
->efx
, "chan %d create event queue\n", channel
->channel
);
281 return falcon_probe_eventq(channel
);
284 /* Prepare channel's event queue */
285 static void efx_init_eventq(struct efx_channel
*channel
)
287 EFX_LOG(channel
->efx
, "chan %d init event queue\n", channel
->channel
);
289 channel
->eventq_read_ptr
= 0;
291 falcon_init_eventq(channel
);
294 static void efx_fini_eventq(struct efx_channel
*channel
)
296 EFX_LOG(channel
->efx
, "chan %d fini event queue\n", channel
->channel
);
298 falcon_fini_eventq(channel
);
301 static void efx_remove_eventq(struct efx_channel
*channel
)
303 EFX_LOG(channel
->efx
, "chan %d remove event queue\n", channel
->channel
);
305 falcon_remove_eventq(channel
);
308 /**************************************************************************
312 *************************************************************************/
314 static int efx_probe_channel(struct efx_channel
*channel
)
316 struct efx_tx_queue
*tx_queue
;
317 struct efx_rx_queue
*rx_queue
;
320 EFX_LOG(channel
->efx
, "creating channel %d\n", channel
->channel
);
322 rc
= efx_probe_eventq(channel
);
326 efx_for_each_channel_tx_queue(tx_queue
, channel
) {
327 rc
= efx_probe_tx_queue(tx_queue
);
332 efx_for_each_channel_rx_queue(rx_queue
, channel
) {
333 rc
= efx_probe_rx_queue(rx_queue
);
338 channel
->n_rx_frm_trunc
= 0;
343 efx_for_each_channel_rx_queue(rx_queue
, channel
)
344 efx_remove_rx_queue(rx_queue
);
346 efx_for_each_channel_tx_queue(tx_queue
, channel
)
347 efx_remove_tx_queue(tx_queue
);
353 /* Channels are shutdown and reinitialised whilst the NIC is running
354 * to propagate configuration changes (mtu, checksum offload), or
355 * to clear hardware error conditions
357 static void efx_init_channels(struct efx_nic
*efx
)
359 struct efx_tx_queue
*tx_queue
;
360 struct efx_rx_queue
*rx_queue
;
361 struct efx_channel
*channel
;
363 /* Calculate the rx buffer allocation parameters required to
364 * support the current MTU, including padding for header
365 * alignment and overruns.
367 efx
->rx_buffer_len
= (max(EFX_PAGE_IP_ALIGN
, NET_IP_ALIGN
) +
368 EFX_MAX_FRAME_LEN(efx
->net_dev
->mtu
) +
369 efx
->type
->rx_buffer_padding
);
370 efx
->rx_buffer_order
= get_order(efx
->rx_buffer_len
);
372 /* Initialise the channels */
373 efx_for_each_channel(channel
, efx
) {
374 EFX_LOG(channel
->efx
, "init chan %d\n", channel
->channel
);
376 efx_init_eventq(channel
);
378 efx_for_each_channel_tx_queue(tx_queue
, channel
)
379 efx_init_tx_queue(tx_queue
);
381 /* The rx buffer allocation strategy is MTU dependent */
382 efx_rx_strategy(channel
);
384 efx_for_each_channel_rx_queue(rx_queue
, channel
)
385 efx_init_rx_queue(rx_queue
);
387 WARN_ON(channel
->rx_pkt
!= NULL
);
388 efx_rx_strategy(channel
);
392 /* This enables event queue processing and packet transmission.
394 * Note that this function is not allowed to fail, since that would
395 * introduce too much complexity into the suspend/resume path.
397 static void efx_start_channel(struct efx_channel
*channel
)
399 struct efx_rx_queue
*rx_queue
;
401 EFX_LOG(channel
->efx
, "starting chan %d\n", channel
->channel
);
403 if (!(channel
->efx
->net_dev
->flags
& IFF_UP
))
404 netif_napi_add(channel
->napi_dev
, &channel
->napi_str
,
405 efx_poll
, napi_weight
);
407 /* The interrupt handler for this channel may set work_pending
408 * as soon as we enable it. Make sure it's cleared before
409 * then. Similarly, make sure it sees the enabled flag set. */
410 channel
->work_pending
= false;
411 channel
->enabled
= true;
414 napi_enable(&channel
->napi_str
);
416 /* Load up RX descriptors */
417 efx_for_each_channel_rx_queue(rx_queue
, channel
)
418 efx_fast_push_rx_descriptors(rx_queue
);
421 /* This disables event queue processing and packet transmission.
422 * This function does not guarantee that all queue processing
423 * (e.g. RX refill) is complete.
425 static void efx_stop_channel(struct efx_channel
*channel
)
427 struct efx_rx_queue
*rx_queue
;
429 if (!channel
->enabled
)
432 EFX_LOG(channel
->efx
, "stop chan %d\n", channel
->channel
);
434 channel
->enabled
= false;
435 napi_disable(&channel
->napi_str
);
437 /* Ensure that any worker threads have exited or will be no-ops */
438 efx_for_each_channel_rx_queue(rx_queue
, channel
) {
439 spin_lock_bh(&rx_queue
->add_lock
);
440 spin_unlock_bh(&rx_queue
->add_lock
);
444 static void efx_fini_channels(struct efx_nic
*efx
)
446 struct efx_channel
*channel
;
447 struct efx_tx_queue
*tx_queue
;
448 struct efx_rx_queue
*rx_queue
;
450 EFX_ASSERT_RESET_SERIALISED(efx
);
451 BUG_ON(efx
->port_enabled
);
453 efx_for_each_channel(channel
, efx
) {
454 EFX_LOG(channel
->efx
, "shut down chan %d\n", channel
->channel
);
456 efx_for_each_channel_rx_queue(rx_queue
, channel
)
457 efx_fini_rx_queue(rx_queue
);
458 efx_for_each_channel_tx_queue(tx_queue
, channel
)
459 efx_fini_tx_queue(tx_queue
);
462 /* Do the event queues last so that we can handle flush events
463 * for all DMA queues. */
464 efx_for_each_channel(channel
, efx
) {
465 EFX_LOG(channel
->efx
, "shut down evq %d\n", channel
->channel
);
467 efx_fini_eventq(channel
);
471 static void efx_remove_channel(struct efx_channel
*channel
)
473 struct efx_tx_queue
*tx_queue
;
474 struct efx_rx_queue
*rx_queue
;
476 EFX_LOG(channel
->efx
, "destroy chan %d\n", channel
->channel
);
478 efx_for_each_channel_rx_queue(rx_queue
, channel
)
479 efx_remove_rx_queue(rx_queue
);
480 efx_for_each_channel_tx_queue(tx_queue
, channel
)
481 efx_remove_tx_queue(tx_queue
);
482 efx_remove_eventq(channel
);
484 channel
->used_flags
= 0;
487 void efx_schedule_slow_fill(struct efx_rx_queue
*rx_queue
, int delay
)
489 queue_delayed_work(refill_workqueue
, &rx_queue
->work
, delay
);
492 /**************************************************************************
496 **************************************************************************/
498 /* This ensures that the kernel is kept informed (via
499 * netif_carrier_on/off) of the link status, and also maintains the
500 * link status's stop on the port's TX queue.
502 static void efx_link_status_changed(struct efx_nic
*efx
)
504 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
505 * that no events are triggered between unregister_netdev() and the
506 * driver unloading. A more general condition is that NETDEV_CHANGE
507 * can only be generated between NETDEV_UP and NETDEV_DOWN */
508 if (!netif_running(efx
->net_dev
))
511 if (efx
->link_up
!= netif_carrier_ok(efx
->net_dev
)) {
512 efx
->n_link_state_changes
++;
515 netif_carrier_on(efx
->net_dev
);
517 netif_carrier_off(efx
->net_dev
);
520 /* Status message for kernel log */
522 struct mii_if_info
*gmii
= &efx
->mii
;
524 /* NONE here means direct XAUI from the controller, with no
525 * MDIO-attached device we can query. */
526 if (efx
->phy_type
!= PHY_TYPE_NONE
) {
527 adv
= gmii_advertised(gmii
);
528 lpa
= gmii_lpa(gmii
);
530 lpa
= GM_LPA_10000
| LPA_DUPLEX
;
533 EFX_INFO(efx
, "link up at %dMbps %s-duplex "
534 "(adv %04x lpa %04x) (MTU %d)%s\n",
535 (efx
->link_options
& GM_LPA_10000
? 10000 :
536 (efx
->link_options
& GM_LPA_1000
? 1000 :
537 (efx
->link_options
& GM_LPA_100
? 100 :
539 (efx
->link_options
& GM_LPA_DUPLEX
?
543 (efx
->promiscuous
? " [PROMISC]" : ""));
545 EFX_INFO(efx
, "link down\n");
550 /* This call reinitialises the MAC to pick up new PHY settings. The
551 * caller must hold the mac_lock */
552 static void __efx_reconfigure_port(struct efx_nic
*efx
)
554 WARN_ON(!mutex_is_locked(&efx
->mac_lock
));
556 EFX_LOG(efx
, "reconfiguring MAC from PHY settings on CPU %d\n",
557 raw_smp_processor_id());
559 falcon_reconfigure_xmac(efx
);
561 /* Inform kernel of loss/gain of carrier */
562 efx_link_status_changed(efx
);
565 /* Reinitialise the MAC to pick up new PHY settings, even if the port is
567 void efx_reconfigure_port(struct efx_nic
*efx
)
569 EFX_ASSERT_RESET_SERIALISED(efx
);
571 mutex_lock(&efx
->mac_lock
);
572 __efx_reconfigure_port(efx
);
573 mutex_unlock(&efx
->mac_lock
);
576 /* Asynchronous efx_reconfigure_port work item. To speed up efx_flush_all()
577 * we don't efx_reconfigure_port() if the port is disabled. Care is taken
578 * in efx_stop_all() and efx_start_port() to prevent PHY events being lost */
579 static void efx_reconfigure_work(struct work_struct
*data
)
581 struct efx_nic
*efx
= container_of(data
, struct efx_nic
,
584 mutex_lock(&efx
->mac_lock
);
585 if (efx
->port_enabled
)
586 __efx_reconfigure_port(efx
);
587 mutex_unlock(&efx
->mac_lock
);
590 static int efx_probe_port(struct efx_nic
*efx
)
594 EFX_LOG(efx
, "create port\n");
596 /* Connect up MAC/PHY operations table and read MAC address */
597 rc
= falcon_probe_port(efx
);
601 /* Sanity check MAC address */
602 if (is_valid_ether_addr(efx
->mac_address
)) {
603 memcpy(efx
->net_dev
->dev_addr
, efx
->mac_address
, ETH_ALEN
);
605 DECLARE_MAC_BUF(mac
);
607 EFX_ERR(efx
, "invalid MAC address %s\n",
608 print_mac(mac
, efx
->mac_address
));
609 if (!allow_bad_hwaddr
) {
613 random_ether_addr(efx
->net_dev
->dev_addr
);
614 EFX_INFO(efx
, "using locally-generated MAC %s\n",
615 print_mac(mac
, efx
->net_dev
->dev_addr
));
621 efx_remove_port(efx
);
625 static int efx_init_port(struct efx_nic
*efx
)
629 EFX_LOG(efx
, "init port\n");
631 /* Initialise the MAC and PHY */
632 rc
= falcon_init_xmac(efx
);
636 efx
->port_initialized
= true;
638 /* Reconfigure port to program MAC registers */
639 falcon_reconfigure_xmac(efx
);
644 /* Allow efx_reconfigure_port() to be scheduled, and close the window
645 * between efx_stop_port and efx_flush_all whereby a previously scheduled
646 * efx_reconfigure_port() may have been cancelled */
647 static void efx_start_port(struct efx_nic
*efx
)
649 EFX_LOG(efx
, "start port\n");
650 BUG_ON(efx
->port_enabled
);
652 mutex_lock(&efx
->mac_lock
);
653 efx
->port_enabled
= true;
654 __efx_reconfigure_port(efx
);
655 mutex_unlock(&efx
->mac_lock
);
658 /* Prevent efx_reconfigure_work and efx_monitor() from executing, and
659 * efx_set_multicast_list() from scheduling efx_reconfigure_work.
660 * efx_reconfigure_work can still be scheduled via NAPI processing
661 * until efx_flush_all() is called */
662 static void efx_stop_port(struct efx_nic
*efx
)
664 EFX_LOG(efx
, "stop port\n");
666 mutex_lock(&efx
->mac_lock
);
667 efx
->port_enabled
= false;
668 mutex_unlock(&efx
->mac_lock
);
670 /* Serialise against efx_set_multicast_list() */
671 if (efx_dev_registered(efx
)) {
672 netif_addr_lock_bh(efx
->net_dev
);
673 netif_addr_unlock_bh(efx
->net_dev
);
677 static void efx_fini_port(struct efx_nic
*efx
)
679 EFX_LOG(efx
, "shut down port\n");
681 if (!efx
->port_initialized
)
684 falcon_fini_xmac(efx
);
685 efx
->port_initialized
= false;
687 efx
->link_up
= false;
688 efx_link_status_changed(efx
);
691 static void efx_remove_port(struct efx_nic
*efx
)
693 EFX_LOG(efx
, "destroying port\n");
695 falcon_remove_port(efx
);
698 /**************************************************************************
702 **************************************************************************/
704 /* This configures the PCI device to enable I/O and DMA. */
705 static int efx_init_io(struct efx_nic
*efx
)
707 struct pci_dev
*pci_dev
= efx
->pci_dev
;
708 dma_addr_t dma_mask
= efx
->type
->max_dma_mask
;
711 EFX_LOG(efx
, "initialising I/O\n");
713 rc
= pci_enable_device(pci_dev
);
715 EFX_ERR(efx
, "failed to enable PCI device\n");
719 pci_set_master(pci_dev
);
721 /* Set the PCI DMA mask. Try all possibilities from our
722 * genuine mask down to 32 bits, because some architectures
723 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit
724 * masks event though they reject 46 bit masks.
726 while (dma_mask
> 0x7fffffffUL
) {
727 if (pci_dma_supported(pci_dev
, dma_mask
) &&
728 ((rc
= pci_set_dma_mask(pci_dev
, dma_mask
)) == 0))
733 EFX_ERR(efx
, "could not find a suitable DMA mask\n");
736 EFX_LOG(efx
, "using DMA mask %llx\n", (unsigned long long) dma_mask
);
737 rc
= pci_set_consistent_dma_mask(pci_dev
, dma_mask
);
739 /* pci_set_consistent_dma_mask() is not *allowed* to
740 * fail with a mask that pci_set_dma_mask() accepted,
741 * but just in case...
743 EFX_ERR(efx
, "failed to set consistent DMA mask\n");
747 efx
->membase_phys
= pci_resource_start(efx
->pci_dev
,
749 rc
= pci_request_region(pci_dev
, efx
->type
->mem_bar
, "sfc");
751 EFX_ERR(efx
, "request for memory BAR failed\n");
755 efx
->membase
= ioremap_nocache(efx
->membase_phys
,
756 efx
->type
->mem_map_size
);
758 EFX_ERR(efx
, "could not map memory BAR %d at %llx+%x\n",
760 (unsigned long long)efx
->membase_phys
,
761 efx
->type
->mem_map_size
);
765 EFX_LOG(efx
, "memory BAR %u at %llx+%x (virtual %p)\n",
766 efx
->type
->mem_bar
, (unsigned long long)efx
->membase_phys
,
767 efx
->type
->mem_map_size
, efx
->membase
);
772 release_mem_region(efx
->membase_phys
, efx
->type
->mem_map_size
);
774 efx
->membase_phys
= 0;
776 pci_disable_device(efx
->pci_dev
);
781 static void efx_fini_io(struct efx_nic
*efx
)
783 EFX_LOG(efx
, "shutting down I/O\n");
786 iounmap(efx
->membase
);
790 if (efx
->membase_phys
) {
791 pci_release_region(efx
->pci_dev
, efx
->type
->mem_bar
);
792 efx
->membase_phys
= 0;
795 pci_disable_device(efx
->pci_dev
);
798 /* Get number of RX queues wanted. Return number of online CPU
799 * packages in the expectation that an IRQ balancer will spread
800 * interrupts across them. */
801 static int efx_wanted_rx_queues(void)
807 cpus_clear(core_mask
);
809 for_each_online_cpu(cpu
) {
810 if (!cpu_isset(cpu
, core_mask
)) {
812 cpus_or(core_mask
, core_mask
,
813 topology_core_siblings(cpu
));
820 /* Probe the number and type of interrupts we are able to obtain, and
821 * the resulting numbers of channels and RX queues.
823 static void efx_probe_interrupts(struct efx_nic
*efx
)
826 min_t(int, efx
->type
->phys_addr_channels
, EFX_MAX_CHANNELS
);
829 if (efx
->interrupt_mode
== EFX_INT_MODE_MSIX
) {
830 struct msix_entry xentries
[EFX_MAX_CHANNELS
];
833 /* We want one RX queue and interrupt per CPU package
834 * (or as specified by the rss_cpus module parameter).
835 * We will need one channel per interrupt.
837 wanted_ints
= rss_cpus
? rss_cpus
: efx_wanted_rx_queues();
838 efx
->n_rx_queues
= min(wanted_ints
, max_channels
);
840 for (i
= 0; i
< efx
->n_rx_queues
; i
++)
841 xentries
[i
].entry
= i
;
842 rc
= pci_enable_msix(efx
->pci_dev
, xentries
, efx
->n_rx_queues
);
844 EFX_BUG_ON_PARANOID(rc
>= efx
->n_rx_queues
);
845 efx
->n_rx_queues
= rc
;
846 rc
= pci_enable_msix(efx
->pci_dev
, xentries
,
851 for (i
= 0; i
< efx
->n_rx_queues
; i
++)
852 efx
->channel
[i
].irq
= xentries
[i
].vector
;
854 /* Fall back to single channel MSI */
855 efx
->interrupt_mode
= EFX_INT_MODE_MSI
;
856 EFX_ERR(efx
, "could not enable MSI-X\n");
860 /* Try single interrupt MSI */
861 if (efx
->interrupt_mode
== EFX_INT_MODE_MSI
) {
862 efx
->n_rx_queues
= 1;
863 rc
= pci_enable_msi(efx
->pci_dev
);
865 efx
->channel
[0].irq
= efx
->pci_dev
->irq
;
867 EFX_ERR(efx
, "could not enable MSI\n");
868 efx
->interrupt_mode
= EFX_INT_MODE_LEGACY
;
872 /* Assume legacy interrupts */
873 if (efx
->interrupt_mode
== EFX_INT_MODE_LEGACY
) {
874 efx
->n_rx_queues
= 1;
875 efx
->legacy_irq
= efx
->pci_dev
->irq
;
879 static void efx_remove_interrupts(struct efx_nic
*efx
)
881 struct efx_channel
*channel
;
883 /* Remove MSI/MSI-X interrupts */
884 efx_for_each_channel(channel
, efx
)
886 pci_disable_msi(efx
->pci_dev
);
887 pci_disable_msix(efx
->pci_dev
);
889 /* Remove legacy interrupt */
893 static void efx_set_channels(struct efx_nic
*efx
)
895 struct efx_tx_queue
*tx_queue
;
896 struct efx_rx_queue
*rx_queue
;
898 efx_for_each_tx_queue(tx_queue
, efx
) {
899 if (!EFX_INT_MODE_USE_MSI(efx
) && separate_tx_and_rx_channels
)
900 tx_queue
->channel
= &efx
->channel
[1];
902 tx_queue
->channel
= &efx
->channel
[0];
903 tx_queue
->channel
->used_flags
|= EFX_USED_BY_TX
;
906 efx_for_each_rx_queue(rx_queue
, efx
) {
907 rx_queue
->channel
= &efx
->channel
[rx_queue
->queue
];
908 rx_queue
->channel
->used_flags
|= EFX_USED_BY_RX
;
912 static int efx_probe_nic(struct efx_nic
*efx
)
916 EFX_LOG(efx
, "creating NIC\n");
918 /* Carry out hardware-type specific initialisation */
919 rc
= falcon_probe_nic(efx
);
923 /* Determine the number of channels and RX queues by trying to hook
924 * in MSI-X interrupts. */
925 efx_probe_interrupts(efx
);
927 efx_set_channels(efx
);
929 /* Initialise the interrupt moderation settings */
930 efx_init_irq_moderation(efx
, tx_irq_mod_usec
, rx_irq_mod_usec
);
935 static void efx_remove_nic(struct efx_nic
*efx
)
937 EFX_LOG(efx
, "destroying NIC\n");
939 efx_remove_interrupts(efx
);
940 falcon_remove_nic(efx
);
943 /**************************************************************************
945 * NIC startup/shutdown
947 *************************************************************************/
949 static int efx_probe_all(struct efx_nic
*efx
)
951 struct efx_channel
*channel
;
955 rc
= efx_probe_nic(efx
);
957 EFX_ERR(efx
, "failed to create NIC\n");
962 rc
= efx_probe_port(efx
);
964 EFX_ERR(efx
, "failed to create port\n");
968 /* Create channels */
969 efx_for_each_channel(channel
, efx
) {
970 rc
= efx_probe_channel(channel
);
972 EFX_ERR(efx
, "failed to create channel %d\n",
981 efx_for_each_channel(channel
, efx
)
982 efx_remove_channel(channel
);
983 efx_remove_port(efx
);
990 /* Called after previous invocation(s) of efx_stop_all, restarts the
991 * port, kernel transmit queue, NAPI processing and hardware interrupts,
992 * and ensures that the port is scheduled to be reconfigured.
993 * This function is safe to call multiple times when the NIC is in any
995 static void efx_start_all(struct efx_nic
*efx
)
997 struct efx_channel
*channel
;
999 EFX_ASSERT_RESET_SERIALISED(efx
);
1001 /* Check that it is appropriate to restart the interface. All
1002 * of these flags are safe to read under just the rtnl lock */
1003 if (efx
->port_enabled
)
1005 if ((efx
->state
!= STATE_RUNNING
) && (efx
->state
!= STATE_INIT
))
1007 if (efx_dev_registered(efx
) && !netif_running(efx
->net_dev
))
1010 /* Mark the port as enabled so port reconfigurations can start, then
1011 * restart the transmit interface early so the watchdog timer stops */
1012 efx_start_port(efx
);
1013 if (efx_dev_registered(efx
))
1014 efx_wake_queue(efx
);
1016 efx_for_each_channel(channel
, efx
)
1017 efx_start_channel(channel
);
1019 falcon_enable_interrupts(efx
);
1021 /* Start hardware monitor if we're in RUNNING */
1022 if (efx
->state
== STATE_RUNNING
)
1023 queue_delayed_work(efx
->workqueue
, &efx
->monitor_work
,
1024 efx_monitor_interval
);
1027 /* Flush all delayed work. Should only be called when no more delayed work
1028 * will be scheduled. This doesn't flush pending online resets (efx_reset),
1029 * since we're holding the rtnl_lock at this point. */
1030 static void efx_flush_all(struct efx_nic
*efx
)
1032 struct efx_rx_queue
*rx_queue
;
1034 /* Make sure the hardware monitor is stopped */
1035 cancel_delayed_work_sync(&efx
->monitor_work
);
1037 /* Ensure that all RX slow refills are complete. */
1038 efx_for_each_rx_queue(rx_queue
, efx
)
1039 cancel_delayed_work_sync(&rx_queue
->work
);
1041 /* Stop scheduled port reconfigurations */
1042 cancel_work_sync(&efx
->reconfigure_work
);
1046 /* Quiesce hardware and software without bringing the link down.
1047 * Safe to call multiple times, when the nic and interface is in any
1048 * state. The caller is guaranteed to subsequently be in a position
1049 * to modify any hardware and software state they see fit without
1051 static void efx_stop_all(struct efx_nic
*efx
)
1053 struct efx_channel
*channel
;
1055 EFX_ASSERT_RESET_SERIALISED(efx
);
1057 /* port_enabled can be read safely under the rtnl lock */
1058 if (!efx
->port_enabled
)
1061 /* Disable interrupts and wait for ISR to complete */
1062 falcon_disable_interrupts(efx
);
1063 if (efx
->legacy_irq
)
1064 synchronize_irq(efx
->legacy_irq
);
1065 efx_for_each_channel(channel
, efx
) {
1067 synchronize_irq(channel
->irq
);
1070 /* Stop all NAPI processing and synchronous rx refills */
1071 efx_for_each_channel(channel
, efx
)
1072 efx_stop_channel(channel
);
1074 /* Stop all asynchronous port reconfigurations. Since all
1075 * event processing has already been stopped, there is no
1076 * window to loose phy events */
1079 /* Flush reconfigure_work, refill_workqueue, monitor_work */
1082 /* Isolate the MAC from the TX and RX engines, so that queue
1083 * flushes will complete in a timely fashion. */
1084 falcon_deconfigure_mac_wrapper(efx
);
1085 falcon_drain_tx_fifo(efx
);
1087 /* Stop the kernel transmit interface late, so the watchdog
1088 * timer isn't ticking over the flush */
1089 if (efx_dev_registered(efx
)) {
1090 efx_stop_queue(efx
);
1091 netif_tx_lock_bh(efx
->net_dev
);
1092 netif_tx_unlock_bh(efx
->net_dev
);
1096 static void efx_remove_all(struct efx_nic
*efx
)
1098 struct efx_channel
*channel
;
1100 efx_for_each_channel(channel
, efx
)
1101 efx_remove_channel(channel
);
1102 efx_remove_port(efx
);
1103 efx_remove_nic(efx
);
1106 /* A convinience function to safely flush all the queues */
1107 void efx_flush_queues(struct efx_nic
*efx
)
1109 EFX_ASSERT_RESET_SERIALISED(efx
);
1113 efx_fini_channels(efx
);
1114 efx_init_channels(efx
);
1119 /**************************************************************************
1121 * Interrupt moderation
1123 **************************************************************************/
1125 /* Set interrupt moderation parameters */
1126 void efx_init_irq_moderation(struct efx_nic
*efx
, int tx_usecs
, int rx_usecs
)
1128 struct efx_tx_queue
*tx_queue
;
1129 struct efx_rx_queue
*rx_queue
;
1131 EFX_ASSERT_RESET_SERIALISED(efx
);
1133 efx_for_each_tx_queue(tx_queue
, efx
)
1134 tx_queue
->channel
->irq_moderation
= tx_usecs
;
1136 efx_for_each_rx_queue(rx_queue
, efx
)
1137 rx_queue
->channel
->irq_moderation
= rx_usecs
;
1140 /**************************************************************************
1144 **************************************************************************/
1146 /* Run periodically off the general workqueue. Serialised against
1147 * efx_reconfigure_port via the mac_lock */
1148 static void efx_monitor(struct work_struct
*data
)
1150 struct efx_nic
*efx
= container_of(data
, struct efx_nic
,
1154 EFX_TRACE(efx
, "hardware monitor executing on CPU %d\n",
1155 raw_smp_processor_id());
1158 /* If the mac_lock is already held then it is likely a port
1159 * reconfiguration is already in place, which will likely do
1160 * most of the work of check_hw() anyway. */
1161 if (!mutex_trylock(&efx
->mac_lock
)) {
1162 queue_delayed_work(efx
->workqueue
, &efx
->monitor_work
,
1163 efx_monitor_interval
);
1167 if (efx
->port_enabled
)
1168 rc
= falcon_check_xmac(efx
);
1169 mutex_unlock(&efx
->mac_lock
);
1172 if (monitor_reset
) {
1173 EFX_ERR(efx
, "hardware monitor detected a fault: "
1174 "triggering reset\n");
1175 efx_schedule_reset(efx
, RESET_TYPE_MONITOR
);
1177 EFX_ERR(efx
, "hardware monitor detected a fault, "
1178 "skipping reset\n");
1182 queue_delayed_work(efx
->workqueue
, &efx
->monitor_work
,
1183 efx_monitor_interval
);
1186 /**************************************************************************
1190 *************************************************************************/
1193 * Context: process, rtnl_lock() held.
1195 static int efx_ioctl(struct net_device
*net_dev
, struct ifreq
*ifr
, int cmd
)
1197 struct efx_nic
*efx
= netdev_priv(net_dev
);
1199 EFX_ASSERT_RESET_SERIALISED(efx
);
1201 return generic_mii_ioctl(&efx
->mii
, if_mii(ifr
), cmd
, NULL
);
1204 /**************************************************************************
1208 **************************************************************************/
1210 static int efx_init_napi(struct efx_nic
*efx
)
1212 struct efx_channel
*channel
;
1215 efx_for_each_channel(channel
, efx
) {
1216 channel
->napi_dev
= efx
->net_dev
;
1217 rc
= efx_lro_init(&channel
->lro_mgr
, efx
);
1227 static void efx_fini_napi(struct efx_nic
*efx
)
1229 struct efx_channel
*channel
;
1231 efx_for_each_channel(channel
, efx
) {
1232 efx_lro_fini(&channel
->lro_mgr
);
1233 channel
->napi_dev
= NULL
;
1237 /**************************************************************************
1239 * Kernel netpoll interface
1241 *************************************************************************/
1243 #ifdef CONFIG_NET_POLL_CONTROLLER
1245 /* Although in the common case interrupts will be disabled, this is not
1246 * guaranteed. However, all our work happens inside the NAPI callback,
1247 * so no locking is required.
1249 static void efx_netpoll(struct net_device
*net_dev
)
1251 struct efx_nic
*efx
= netdev_priv(net_dev
);
1252 struct efx_channel
*channel
;
1254 efx_for_each_channel(channel
, efx
)
1255 efx_schedule_channel(channel
);
1260 /**************************************************************************
1262 * Kernel net device interface
1264 *************************************************************************/
1266 /* Context: process, rtnl_lock() held. */
1267 static int efx_net_open(struct net_device
*net_dev
)
1269 struct efx_nic
*efx
= netdev_priv(net_dev
);
1270 EFX_ASSERT_RESET_SERIALISED(efx
);
1272 EFX_LOG(efx
, "opening device %s on CPU %d\n", net_dev
->name
,
1273 raw_smp_processor_id());
1275 if (efx
->phy_mode
& PHY_MODE_SPECIAL
)
1282 /* Context: process, rtnl_lock() held.
1283 * Note that the kernel will ignore our return code; this method
1284 * should really be a void.
1286 static int efx_net_stop(struct net_device
*net_dev
)
1288 struct efx_nic
*efx
= netdev_priv(net_dev
);
1290 EFX_LOG(efx
, "closing %s on CPU %d\n", net_dev
->name
,
1291 raw_smp_processor_id());
1293 /* Stop the device and flush all the channels */
1295 efx_fini_channels(efx
);
1296 efx_init_channels(efx
);
1301 /* Context: process, dev_base_lock or RTNL held, non-blocking. */
1302 static struct net_device_stats
*efx_net_stats(struct net_device
*net_dev
)
1304 struct efx_nic
*efx
= netdev_priv(net_dev
);
1305 struct efx_mac_stats
*mac_stats
= &efx
->mac_stats
;
1306 struct net_device_stats
*stats
= &net_dev
->stats
;
1308 /* Update stats if possible, but do not wait if another thread
1309 * is updating them (or resetting the NIC); slightly stale
1310 * stats are acceptable.
1312 if (!spin_trylock(&efx
->stats_lock
))
1314 if (efx
->state
== STATE_RUNNING
) {
1315 falcon_update_stats_xmac(efx
);
1316 falcon_update_nic_stats(efx
);
1318 spin_unlock(&efx
->stats_lock
);
1320 stats
->rx_packets
= mac_stats
->rx_packets
;
1321 stats
->tx_packets
= mac_stats
->tx_packets
;
1322 stats
->rx_bytes
= mac_stats
->rx_bytes
;
1323 stats
->tx_bytes
= mac_stats
->tx_bytes
;
1324 stats
->multicast
= mac_stats
->rx_multicast
;
1325 stats
->collisions
= mac_stats
->tx_collision
;
1326 stats
->rx_length_errors
= (mac_stats
->rx_gtjumbo
+
1327 mac_stats
->rx_length_error
);
1328 stats
->rx_over_errors
= efx
->n_rx_nodesc_drop_cnt
;
1329 stats
->rx_crc_errors
= mac_stats
->rx_bad
;
1330 stats
->rx_frame_errors
= mac_stats
->rx_align_error
;
1331 stats
->rx_fifo_errors
= mac_stats
->rx_overflow
;
1332 stats
->rx_missed_errors
= mac_stats
->rx_missed
;
1333 stats
->tx_window_errors
= mac_stats
->tx_late_collision
;
1335 stats
->rx_errors
= (stats
->rx_length_errors
+
1336 stats
->rx_over_errors
+
1337 stats
->rx_crc_errors
+
1338 stats
->rx_frame_errors
+
1339 stats
->rx_fifo_errors
+
1340 stats
->rx_missed_errors
+
1341 mac_stats
->rx_symbol_error
);
1342 stats
->tx_errors
= (stats
->tx_window_errors
+
1348 /* Context: netif_tx_lock held, BHs disabled. */
1349 static void efx_watchdog(struct net_device
*net_dev
)
1351 struct efx_nic
*efx
= netdev_priv(net_dev
);
1353 EFX_ERR(efx
, "TX stuck with stop_count=%d port_enabled=%d: %s\n",
1354 atomic_read(&efx
->netif_stop_count
), efx
->port_enabled
,
1355 monitor_reset
? "resetting channels" : "skipping reset");
1358 efx_schedule_reset(efx
, RESET_TYPE_MONITOR
);
1362 /* Context: process, rtnl_lock() held. */
1363 static int efx_change_mtu(struct net_device
*net_dev
, int new_mtu
)
1365 struct efx_nic
*efx
= netdev_priv(net_dev
);
1368 EFX_ASSERT_RESET_SERIALISED(efx
);
1370 if (new_mtu
> EFX_MAX_MTU
)
1375 EFX_LOG(efx
, "changing MTU to %d\n", new_mtu
);
1377 efx_fini_channels(efx
);
1378 net_dev
->mtu
= new_mtu
;
1379 efx_init_channels(efx
);
1385 static int efx_set_mac_address(struct net_device
*net_dev
, void *data
)
1387 struct efx_nic
*efx
= netdev_priv(net_dev
);
1388 struct sockaddr
*addr
= data
;
1389 char *new_addr
= addr
->sa_data
;
1391 EFX_ASSERT_RESET_SERIALISED(efx
);
1393 if (!is_valid_ether_addr(new_addr
)) {
1394 DECLARE_MAC_BUF(mac
);
1395 EFX_ERR(efx
, "invalid ethernet MAC address requested: %s\n",
1396 print_mac(mac
, new_addr
));
1400 memcpy(net_dev
->dev_addr
, new_addr
, net_dev
->addr_len
);
1402 /* Reconfigure the MAC */
1403 efx_reconfigure_port(efx
);
1408 /* Context: netif_tx_lock held, BHs disabled. */
1409 static void efx_set_multicast_list(struct net_device
*net_dev
)
1411 struct efx_nic
*efx
= netdev_priv(net_dev
);
1412 struct dev_mc_list
*mc_list
= net_dev
->mc_list
;
1413 union efx_multicast_hash
*mc_hash
= &efx
->multicast_hash
;
1419 /* Set per-MAC promiscuity flag and reconfigure MAC if necessary */
1420 promiscuous
= !!(net_dev
->flags
& IFF_PROMISC
);
1421 if (efx
->promiscuous
!= promiscuous
) {
1422 efx
->promiscuous
= promiscuous
;
1423 /* Close the window between efx_stop_port() and efx_flush_all()
1424 * by only queuing work when the port is enabled. */
1425 if (efx
->port_enabled
)
1426 queue_work(efx
->workqueue
, &efx
->reconfigure_work
);
1429 /* Build multicast hash table */
1430 if (promiscuous
|| (net_dev
->flags
& IFF_ALLMULTI
)) {
1431 memset(mc_hash
, 0xff, sizeof(*mc_hash
));
1433 memset(mc_hash
, 0x00, sizeof(*mc_hash
));
1434 for (i
= 0; i
< net_dev
->mc_count
; i
++) {
1435 crc
= ether_crc_le(ETH_ALEN
, mc_list
->dmi_addr
);
1436 bit
= crc
& (EFX_MCAST_HASH_ENTRIES
- 1);
1437 set_bit_le(bit
, mc_hash
->byte
);
1438 mc_list
= mc_list
->next
;
1442 /* Create and activate new global multicast hash table */
1443 falcon_set_multicast_hash(efx
);
1446 static int efx_netdev_event(struct notifier_block
*this,
1447 unsigned long event
, void *ptr
)
1449 struct net_device
*net_dev
= ptr
;
1451 if (net_dev
->open
== efx_net_open
&& event
== NETDEV_CHANGENAME
) {
1452 struct efx_nic
*efx
= netdev_priv(net_dev
);
1454 strcpy(efx
->name
, net_dev
->name
);
1460 static struct notifier_block efx_netdev_notifier
= {
1461 .notifier_call
= efx_netdev_event
,
1464 static int efx_register_netdev(struct efx_nic
*efx
)
1466 struct net_device
*net_dev
= efx
->net_dev
;
1469 net_dev
->watchdog_timeo
= 5 * HZ
;
1470 net_dev
->irq
= efx
->pci_dev
->irq
;
1471 net_dev
->open
= efx_net_open
;
1472 net_dev
->stop
= efx_net_stop
;
1473 net_dev
->get_stats
= efx_net_stats
;
1474 net_dev
->tx_timeout
= &efx_watchdog
;
1475 net_dev
->hard_start_xmit
= efx_hard_start_xmit
;
1476 net_dev
->do_ioctl
= efx_ioctl
;
1477 net_dev
->change_mtu
= efx_change_mtu
;
1478 net_dev
->set_mac_address
= efx_set_mac_address
;
1479 net_dev
->set_multicast_list
= efx_set_multicast_list
;
1480 #ifdef CONFIG_NET_POLL_CONTROLLER
1481 net_dev
->poll_controller
= efx_netpoll
;
1483 SET_NETDEV_DEV(net_dev
, &efx
->pci_dev
->dev
);
1484 SET_ETHTOOL_OPS(net_dev
, &efx_ethtool_ops
);
1486 /* Always start with carrier off; PHY events will detect the link */
1487 netif_carrier_off(efx
->net_dev
);
1489 /* Clear MAC statistics */
1490 falcon_update_stats_xmac(efx
);
1491 memset(&efx
->mac_stats
, 0, sizeof(efx
->mac_stats
));
1493 rc
= register_netdev(net_dev
);
1495 EFX_ERR(efx
, "could not register net dev\n");
1498 strcpy(efx
->name
, net_dev
->name
);
1503 static void efx_unregister_netdev(struct efx_nic
*efx
)
1505 struct efx_tx_queue
*tx_queue
;
1510 BUG_ON(netdev_priv(efx
->net_dev
) != efx
);
1512 /* Free up any skbs still remaining. This has to happen before
1513 * we try to unregister the netdev as running their destructors
1514 * may be needed to get the device ref. count to 0. */
1515 efx_for_each_tx_queue(tx_queue
, efx
)
1516 efx_release_tx_buffers(tx_queue
);
1518 if (efx_dev_registered(efx
)) {
1519 strlcpy(efx
->name
, pci_name(efx
->pci_dev
), sizeof(efx
->name
));
1520 unregister_netdev(efx
->net_dev
);
1524 /**************************************************************************
1526 * Device reset and suspend
1528 **************************************************************************/
1530 /* The final hardware and software finalisation before reset. */
1531 static int efx_reset_down(struct efx_nic
*efx
, struct ethtool_cmd
*ecmd
)
1535 EFX_ASSERT_RESET_SERIALISED(efx
);
1537 rc
= falcon_xmac_get_settings(efx
, ecmd
);
1539 EFX_ERR(efx
, "could not back up PHY settings\n");
1543 efx_fini_channels(efx
);
1550 /* The first part of software initialisation after a hardware reset
1551 * This function does not handle serialisation with the kernel, it
1552 * assumes the caller has done this */
1553 static int efx_reset_up(struct efx_nic
*efx
, struct ethtool_cmd
*ecmd
)
1557 efx_init_channels(efx
);
1559 /* Restore MAC and PHY settings. */
1560 rc
= falcon_xmac_set_settings(efx
, ecmd
);
1562 EFX_ERR(efx
, "could not restore PHY settings\n");
1569 efx_fini_channels(efx
);
1573 /* Reset the NIC as transparently as possible. Do not reset the PHY
1574 * Note that the reset may fail, in which case the card will be left
1575 * in a most-probably-unusable state.
1577 * This function will sleep. You cannot reset from within an atomic
1578 * state; use efx_schedule_reset() instead.
1580 * Grabs the rtnl_lock.
1582 static int efx_reset(struct efx_nic
*efx
)
1584 struct ethtool_cmd ecmd
;
1585 enum reset_type method
= efx
->reset_pending
;
1588 /* Serialise with kernel interfaces */
1591 /* If we're not RUNNING then don't reset. Leave the reset_pending
1592 * flag set so that efx_pci_probe_main will be retried */
1593 if (efx
->state
!= STATE_RUNNING
) {
1594 EFX_INFO(efx
, "scheduled reset quenched. NIC not RUNNING\n");
1598 efx
->state
= STATE_RESETTING
;
1599 EFX_INFO(efx
, "resetting (%d)\n", method
);
1601 /* The net_dev->get_stats handler is quite slow, and will fail
1602 * if a fetch is pending over reset. Serialise against it. */
1603 spin_lock(&efx
->stats_lock
);
1604 spin_unlock(&efx
->stats_lock
);
1607 mutex_lock(&efx
->mac_lock
);
1609 rc
= efx_reset_down(efx
, &ecmd
);
1613 rc
= falcon_reset_hw(efx
, method
);
1615 EFX_ERR(efx
, "failed to reset hardware\n");
1619 /* Allow resets to be rescheduled. */
1620 efx
->reset_pending
= RESET_TYPE_NONE
;
1622 /* Reinitialise bus-mastering, which may have been turned off before
1623 * the reset was scheduled. This is still appropriate, even in the
1624 * RESET_TYPE_DISABLE since this driver generally assumes the hardware
1625 * can respond to requests. */
1626 pci_set_master(efx
->pci_dev
);
1628 /* Reinitialise device. This is appropriate in the RESET_TYPE_DISABLE
1629 * case so the driver can talk to external SRAM */
1630 rc
= falcon_init_nic(efx
);
1632 EFX_ERR(efx
, "failed to initialise NIC\n");
1636 /* Leave device stopped if necessary */
1637 if (method
== RESET_TYPE_DISABLE
) {
1638 /* Reinitialise the device anyway so the driver unload sequence
1639 * can talk to the external SRAM */
1640 falcon_init_nic(efx
);
1645 rc
= efx_reset_up(efx
, &ecmd
);
1649 mutex_unlock(&efx
->mac_lock
);
1650 EFX_LOG(efx
, "reset complete\n");
1652 efx
->state
= STATE_RUNNING
;
1664 EFX_ERR(efx
, "has been disabled\n");
1665 efx
->state
= STATE_DISABLED
;
1667 mutex_unlock(&efx
->mac_lock
);
1669 efx_unregister_netdev(efx
);
1674 /* The worker thread exists so that code that cannot sleep can
1675 * schedule a reset for later.
1677 static void efx_reset_work(struct work_struct
*data
)
1679 struct efx_nic
*nic
= container_of(data
, struct efx_nic
, reset_work
);
1684 void efx_schedule_reset(struct efx_nic
*efx
, enum reset_type type
)
1686 enum reset_type method
;
1688 if (efx
->reset_pending
!= RESET_TYPE_NONE
) {
1689 EFX_INFO(efx
, "quenching already scheduled reset\n");
1694 case RESET_TYPE_INVISIBLE
:
1695 case RESET_TYPE_ALL
:
1696 case RESET_TYPE_WORLD
:
1697 case RESET_TYPE_DISABLE
:
1700 case RESET_TYPE_RX_RECOVERY
:
1701 case RESET_TYPE_RX_DESC_FETCH
:
1702 case RESET_TYPE_TX_DESC_FETCH
:
1703 case RESET_TYPE_TX_SKIP
:
1704 method
= RESET_TYPE_INVISIBLE
;
1707 method
= RESET_TYPE_ALL
;
1712 EFX_LOG(efx
, "scheduling reset (%d:%d)\n", type
, method
);
1714 EFX_LOG(efx
, "scheduling reset (%d)\n", method
);
1716 efx
->reset_pending
= method
;
1718 queue_work(efx
->reset_workqueue
, &efx
->reset_work
);
1721 /**************************************************************************
1723 * List of NICs we support
1725 **************************************************************************/
1727 /* PCI device ID table */
1728 static struct pci_device_id efx_pci_table
[] __devinitdata
= {
1729 {PCI_DEVICE(EFX_VENDID_SFC
, FALCON_A_P_DEVID
),
1730 .driver_data
= (unsigned long) &falcon_a_nic_type
},
1731 {PCI_DEVICE(EFX_VENDID_SFC
, FALCON_B_P_DEVID
),
1732 .driver_data
= (unsigned long) &falcon_b_nic_type
},
1733 {0} /* end of list */
1736 /**************************************************************************
1738 * Dummy PHY/MAC/Board operations
1740 * Can be used for some unimplemented operations
1741 * Needed so all function pointers are valid and do not have to be tested
1744 **************************************************************************/
1745 int efx_port_dummy_op_int(struct efx_nic
*efx
)
1749 void efx_port_dummy_op_void(struct efx_nic
*efx
) {}
1750 void efx_port_dummy_op_blink(struct efx_nic
*efx
, bool blink
) {}
1752 static struct efx_phy_operations efx_dummy_phy_operations
= {
1753 .init
= efx_port_dummy_op_int
,
1754 .reconfigure
= efx_port_dummy_op_void
,
1755 .check_hw
= efx_port_dummy_op_int
,
1756 .fini
= efx_port_dummy_op_void
,
1757 .clear_interrupt
= efx_port_dummy_op_void
,
1758 .reset_xaui
= efx_port_dummy_op_void
,
1761 static struct efx_board efx_dummy_board_info
= {
1762 .init
= efx_port_dummy_op_int
,
1763 .init_leds
= efx_port_dummy_op_int
,
1764 .set_fault_led
= efx_port_dummy_op_blink
,
1765 .blink
= efx_port_dummy_op_blink
,
1766 .fini
= efx_port_dummy_op_void
,
1769 /**************************************************************************
1773 **************************************************************************/
1775 /* This zeroes out and then fills in the invariants in a struct
1776 * efx_nic (including all sub-structures).
1778 static int efx_init_struct(struct efx_nic
*efx
, struct efx_nic_type
*type
,
1779 struct pci_dev
*pci_dev
, struct net_device
*net_dev
)
1781 struct efx_channel
*channel
;
1782 struct efx_tx_queue
*tx_queue
;
1783 struct efx_rx_queue
*rx_queue
;
1786 /* Initialise common structures */
1787 memset(efx
, 0, sizeof(*efx
));
1788 spin_lock_init(&efx
->biu_lock
);
1789 spin_lock_init(&efx
->phy_lock
);
1790 INIT_WORK(&efx
->reset_work
, efx_reset_work
);
1791 INIT_DELAYED_WORK(&efx
->monitor_work
, efx_monitor
);
1792 efx
->pci_dev
= pci_dev
;
1793 efx
->state
= STATE_INIT
;
1794 efx
->reset_pending
= RESET_TYPE_NONE
;
1795 strlcpy(efx
->name
, pci_name(pci_dev
), sizeof(efx
->name
));
1796 efx
->board_info
= efx_dummy_board_info
;
1798 efx
->net_dev
= net_dev
;
1799 efx
->rx_checksum_enabled
= true;
1800 spin_lock_init(&efx
->netif_stop_lock
);
1801 spin_lock_init(&efx
->stats_lock
);
1802 mutex_init(&efx
->mac_lock
);
1803 efx
->phy_op
= &efx_dummy_phy_operations
;
1804 efx
->mii
.dev
= net_dev
;
1805 INIT_WORK(&efx
->reconfigure_work
, efx_reconfigure_work
);
1806 atomic_set(&efx
->netif_stop_count
, 1);
1808 for (i
= 0; i
< EFX_MAX_CHANNELS
; i
++) {
1809 channel
= &efx
->channel
[i
];
1811 channel
->channel
= i
;
1812 channel
->work_pending
= false;
1814 for (i
= 0; i
< EFX_TX_QUEUE_COUNT
; i
++) {
1815 tx_queue
= &efx
->tx_queue
[i
];
1816 tx_queue
->efx
= efx
;
1817 tx_queue
->queue
= i
;
1818 tx_queue
->buffer
= NULL
;
1819 tx_queue
->channel
= &efx
->channel
[0]; /* for safety */
1820 tx_queue
->tso_headers_free
= NULL
;
1822 for (i
= 0; i
< EFX_MAX_RX_QUEUES
; i
++) {
1823 rx_queue
= &efx
->rx_queue
[i
];
1824 rx_queue
->efx
= efx
;
1825 rx_queue
->queue
= i
;
1826 rx_queue
->channel
= &efx
->channel
[0]; /* for safety */
1827 rx_queue
->buffer
= NULL
;
1828 spin_lock_init(&rx_queue
->add_lock
);
1829 INIT_DELAYED_WORK(&rx_queue
->work
, efx_rx_work
);
1834 /* Sanity-check NIC type */
1835 EFX_BUG_ON_PARANOID(efx
->type
->txd_ring_mask
&
1836 (efx
->type
->txd_ring_mask
+ 1));
1837 EFX_BUG_ON_PARANOID(efx
->type
->rxd_ring_mask
&
1838 (efx
->type
->rxd_ring_mask
+ 1));
1839 EFX_BUG_ON_PARANOID(efx
->type
->evq_size
&
1840 (efx
->type
->evq_size
- 1));
1841 /* As close as we can get to guaranteeing that we don't overflow */
1842 EFX_BUG_ON_PARANOID(efx
->type
->evq_size
<
1843 (efx
->type
->txd_ring_mask
+ 1 +
1844 efx
->type
->rxd_ring_mask
+ 1));
1845 EFX_BUG_ON_PARANOID(efx
->type
->phys_addr_channels
> EFX_MAX_CHANNELS
);
1847 /* Higher numbered interrupt modes are less capable! */
1848 efx
->interrupt_mode
= max(efx
->type
->max_interrupt_mode
,
1851 efx
->workqueue
= create_singlethread_workqueue("sfc_work");
1852 if (!efx
->workqueue
) {
1857 efx
->reset_workqueue
= create_singlethread_workqueue("sfc_reset");
1858 if (!efx
->reset_workqueue
) {
1866 destroy_workqueue(efx
->workqueue
);
1867 efx
->workqueue
= NULL
;
1873 static void efx_fini_struct(struct efx_nic
*efx
)
1875 if (efx
->reset_workqueue
) {
1876 destroy_workqueue(efx
->reset_workqueue
);
1877 efx
->reset_workqueue
= NULL
;
1879 if (efx
->workqueue
) {
1880 destroy_workqueue(efx
->workqueue
);
1881 efx
->workqueue
= NULL
;
1885 /**************************************************************************
1889 **************************************************************************/
1891 /* Main body of final NIC shutdown code
1892 * This is called only at module unload (or hotplug removal).
1894 static void efx_pci_remove_main(struct efx_nic
*efx
)
1896 EFX_ASSERT_RESET_SERIALISED(efx
);
1898 /* Skip everything if we never obtained a valid membase */
1902 efx_fini_channels(efx
);
1905 /* Shutdown the board, then the NIC and board state */
1906 efx
->board_info
.fini(efx
);
1907 falcon_fini_interrupt(efx
);
1910 efx_remove_all(efx
);
1913 /* Final NIC shutdown
1914 * This is called only at module unload (or hotplug removal).
1916 static void efx_pci_remove(struct pci_dev
*pci_dev
)
1918 struct efx_nic
*efx
;
1920 efx
= pci_get_drvdata(pci_dev
);
1924 /* Mark the NIC as fini, then stop the interface */
1926 efx
->state
= STATE_FINI
;
1927 dev_close(efx
->net_dev
);
1929 /* Allow any queued efx_resets() to complete */
1932 if (efx
->membase
== NULL
)
1935 efx_unregister_netdev(efx
);
1937 /* Wait for any scheduled resets to complete. No more will be
1938 * scheduled from this point because efx_stop_all() has been
1939 * called, we are no longer registered with driverlink, and
1940 * the net_device's have been removed. */
1941 flush_workqueue(efx
->reset_workqueue
);
1943 efx_pci_remove_main(efx
);
1947 EFX_LOG(efx
, "shutdown successful\n");
1949 pci_set_drvdata(pci_dev
, NULL
);
1950 efx_fini_struct(efx
);
1951 free_netdev(efx
->net_dev
);
1954 /* Main body of NIC initialisation
1955 * This is called at module load (or hotplug insertion, theoretically).
1957 static int efx_pci_probe_main(struct efx_nic
*efx
)
1961 /* Do start-of-day initialisation */
1962 rc
= efx_probe_all(efx
);
1966 rc
= efx_init_napi(efx
);
1970 /* Initialise the board */
1971 rc
= efx
->board_info
.init(efx
);
1973 EFX_ERR(efx
, "failed to initialise board\n");
1977 rc
= falcon_init_nic(efx
);
1979 EFX_ERR(efx
, "failed to initialise NIC\n");
1983 rc
= efx_init_port(efx
);
1985 EFX_ERR(efx
, "failed to initialise port\n");
1989 efx_init_channels(efx
);
1991 rc
= falcon_init_interrupt(efx
);
1998 efx_fini_channels(efx
);
2005 efx_remove_all(efx
);
2010 /* NIC initialisation
2012 * This is called at module load (or hotplug insertion,
2013 * theoretically). It sets up PCI mappings, tests and resets the NIC,
2014 * sets up and registers the network devices with the kernel and hooks
2015 * the interrupt service routine. It does not prepare the device for
2016 * transmission; this is left to the first time one of the network
2017 * interfaces is brought up (i.e. efx_net_open).
2019 static int __devinit
efx_pci_probe(struct pci_dev
*pci_dev
,
2020 const struct pci_device_id
*entry
)
2022 struct efx_nic_type
*type
= (struct efx_nic_type
*) entry
->driver_data
;
2023 struct net_device
*net_dev
;
2024 struct efx_nic
*efx
;
2027 /* Allocate and initialise a struct net_device and struct efx_nic */
2028 net_dev
= alloc_etherdev(sizeof(*efx
));
2031 net_dev
->features
|= (NETIF_F_IP_CSUM
| NETIF_F_SG
|
2032 NETIF_F_HIGHDMA
| NETIF_F_TSO
);
2034 net_dev
->features
|= NETIF_F_LRO
;
2035 /* Mask for features that also apply to VLAN devices */
2036 net_dev
->vlan_features
|= (NETIF_F_ALL_CSUM
| NETIF_F_SG
|
2037 NETIF_F_HIGHDMA
| NETIF_F_TSO
);
2038 efx
= netdev_priv(net_dev
);
2039 pci_set_drvdata(pci_dev
, efx
);
2040 rc
= efx_init_struct(efx
, type
, pci_dev
, net_dev
);
2044 EFX_INFO(efx
, "Solarflare Communications NIC detected\n");
2046 /* Set up basic I/O (BAR mappings etc) */
2047 rc
= efx_init_io(efx
);
2051 /* No serialisation is required with the reset path because
2052 * we're in STATE_INIT. */
2053 for (i
= 0; i
< 5; i
++) {
2054 rc
= efx_pci_probe_main(efx
);
2058 /* Serialise against efx_reset(). No more resets will be
2059 * scheduled since efx_stop_all() has been called, and we
2060 * have not and never have been registered with either
2061 * the rtnetlink or driverlink layers. */
2062 flush_workqueue(efx
->reset_workqueue
);
2064 /* Retry if a recoverably reset event has been scheduled */
2065 if ((efx
->reset_pending
!= RESET_TYPE_INVISIBLE
) &&
2066 (efx
->reset_pending
!= RESET_TYPE_ALL
))
2069 efx
->reset_pending
= RESET_TYPE_NONE
;
2073 EFX_ERR(efx
, "Could not reset NIC\n");
2077 /* Switch to the running state before we expose the device to
2078 * the OS. This is to ensure that the initial gathering of
2079 * MAC stats succeeds. */
2081 efx
->state
= STATE_RUNNING
;
2084 rc
= efx_register_netdev(efx
);
2088 EFX_LOG(efx
, "initialisation successful\n");
2093 efx_pci_remove_main(efx
);
2098 efx_fini_struct(efx
);
2100 EFX_LOG(efx
, "initialisation failed. rc=%d\n", rc
);
2101 free_netdev(net_dev
);
2105 static struct pci_driver efx_pci_driver
= {
2106 .name
= EFX_DRIVER_NAME
,
2107 .id_table
= efx_pci_table
,
2108 .probe
= efx_pci_probe
,
2109 .remove
= efx_pci_remove
,
2112 /**************************************************************************
2114 * Kernel module interface
2116 *************************************************************************/
2118 module_param(interrupt_mode
, uint
, 0444);
2119 MODULE_PARM_DESC(interrupt_mode
,
2120 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)");
2122 static int __init
efx_init_module(void)
2126 printk(KERN_INFO
"Solarflare NET driver v" EFX_DRIVER_VERSION
"\n");
2128 rc
= register_netdevice_notifier(&efx_netdev_notifier
);
2132 refill_workqueue
= create_workqueue("sfc_refill");
2133 if (!refill_workqueue
) {
2138 rc
= pci_register_driver(&efx_pci_driver
);
2145 destroy_workqueue(refill_workqueue
);
2147 unregister_netdevice_notifier(&efx_netdev_notifier
);
2152 static void __exit
efx_exit_module(void)
2154 printk(KERN_INFO
"Solarflare NET driver unloading\n");
2156 pci_unregister_driver(&efx_pci_driver
);
2157 destroy_workqueue(refill_workqueue
);
2158 unregister_netdevice_notifier(&efx_netdev_notifier
);
2162 module_init(efx_init_module
);
2163 module_exit(efx_exit_module
);
2165 MODULE_AUTHOR("Michael Brown <mbrown@fensystems.co.uk> and "
2166 "Solarflare Communications");
2167 MODULE_DESCRIPTION("Solarflare Communications network driver");
2168 MODULE_LICENSE("GPL");
2169 MODULE_DEVICE_TABLE(pci
, efx_pci_table
);