tracehook_notify_death: use task_detached() helper
[linux-2.6/mini2440.git] / drivers / staging / et131x / et131x_initpci.c
bloba18c499d0ae05147dc63ed13082bba352809fc3d
1 /*
2 * Agere Systems Inc.
3 * 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
5 * Copyright © 2005 Agere Systems Inc.
6 * All rights reserved.
7 * http://www.agere.com
9 *------------------------------------------------------------------------------
11 * et131x_initpci.c - Routines and data used to register the driver with the
12 * PCI (and PCI Express) subsystem, as well as basic driver
13 * init and startup.
15 *------------------------------------------------------------------------------
17 * SOFTWARE LICENSE
19 * This software is provided subject to the following terms and conditions,
20 * which you should read carefully before using the software. Using this
21 * software indicates your acceptance of these terms and conditions. If you do
22 * not agree with these terms and conditions, do not use the software.
24 * Copyright © 2005 Agere Systems Inc.
25 * All rights reserved.
27 * Redistribution and use in source or binary forms, with or without
28 * modifications, are permitted provided that the following conditions are met:
30 * . Redistributions of source code must retain the above copyright notice, this
31 * list of conditions and the following Disclaimer as comments in the code as
32 * well as in the documentation and/or other materials provided with the
33 * distribution.
35 * . Redistributions in binary form must reproduce the above copyright notice,
36 * this list of conditions and the following Disclaimer in the documentation
37 * and/or other materials provided with the distribution.
39 * . Neither the name of Agere Systems Inc. nor the names of the contributors
40 * may be used to endorse or promote products derived from this software
41 * without specific prior written permission.
43 * Disclaimer
45 * THIS SOFTWARE IS PROVIDED “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES,
46 * INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
47 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
48 * USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
49 * RISK. IN NO EVENT SHALL AGERE SYSTEMS INC. OR CONTRIBUTORS BE LIABLE FOR ANY
50 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
51 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
52 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
53 * ON ANY THEORY OF LIABILITY, INCLUDING, BUT NOT LIMITED TO, CONTRACT, STRICT
54 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
55 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
56 * DAMAGE.
60 #include "et131x_version.h"
61 #include "et131x_debug.h"
62 #include "et131x_defs.h"
64 #include <linux/pci.h>
65 #include <linux/init.h>
66 #include <linux/module.h>
67 #include <linux/types.h>
68 #include <linux/kernel.h>
70 #include <linux/sched.h>
71 #include <linux/ptrace.h>
72 #include <linux/slab.h>
73 #include <linux/ctype.h>
74 #include <linux/string.h>
75 #include <linux/timer.h>
76 #include <linux/interrupt.h>
77 #include <linux/in.h>
78 #include <linux/delay.h>
79 #include <asm/io.h>
80 #include <asm/system.h>
81 #include <asm/bitops.h>
83 #include <linux/netdevice.h>
84 #include <linux/etherdevice.h>
85 #include <linux/skbuff.h>
86 #include <linux/if_arp.h>
87 #include <linux/ioport.h>
88 #include <linux/random.h>
90 #include "et1310_phy.h"
91 #include "et1310_pm.h"
92 #include "et1310_jagcore.h"
94 #include "et131x_adapter.h"
95 #include "et131x_netdev.h"
96 #include "et131x_config.h"
97 #include "et131x_isr.h"
99 #include "et1310_address_map.h"
100 #include "et1310_tx.h"
101 #include "et1310_rx.h"
102 #include "et1310_mac.h"
103 #include "et1310_eeprom.h"
106 int __devinit et131x_pci_setup(struct pci_dev *pdev,
107 const struct pci_device_id *ent);
108 void __devexit et131x_pci_remove(struct pci_dev *pdev);
111 /* Modinfo parameters (filled out using defines from et131x_version.h) */
112 MODULE_AUTHOR(DRIVER_AUTHOR);
113 MODULE_DESCRIPTION(DRIVER_INFO);
114 MODULE_LICENSE(DRIVER_LICENSE);
116 /* Module Parameters and related data for debugging facilities */
117 #ifdef CONFIG_ET131X_DEBUG
118 static u32 et131x_debug_level = DBG_LVL;
119 static u32 et131x_debug_flags = DBG_DEFAULTS;
122 et131x_debug_level :
123 Level of debugging desired (0-7)
124 7 : DBG_RX_ON | DBG_TX_ON
125 6 : DBG_PARAM_ON
126 5 : DBG_VERBOSE_ON
127 4 : DBG_TRACE_ON
128 3 : DBG_NOTICE_ON
129 2 : no debug info
130 1 : no debug info
131 0 : no debug info
134 module_param(et131x_debug_level, uint, 0);
135 module_param(et131x_debug_flags, uint, 0);
137 MODULE_PARM_DESC(et131x_debug_level, "Level of debugging desired (0-7)");
139 static dbg_info_t et131x_info = { DRIVER_NAME_EXT, 0, 0 };
140 dbg_info_t *et131x_dbginfo = &et131x_info;
141 #endif /* CONFIG_ET131X_DEBUG */
143 static struct pci_device_id et131x_pci_table[] __devinitdata = {
144 {ET131X_PCI_VENDOR_ID, ET131X_PCI_DEVICE_ID_GIG, PCI_ANY_ID,
145 PCI_ANY_ID, 0, 0, 0UL},
146 {ET131X_PCI_VENDOR_ID, ET131X_PCI_DEVICE_ID_FAST, PCI_ANY_ID,
147 PCI_ANY_ID, 0, 0, 0UL},
148 {0,}
151 MODULE_DEVICE_TABLE(pci, et131x_pci_table);
153 static struct pci_driver et131x_driver = {
154 .name = DRIVER_NAME,
155 .id_table = et131x_pci_table,
156 .probe = et131x_pci_setup,
157 .remove = __devexit_p(et131x_pci_remove),
158 .suspend = NULL, //et131x_pci_suspend,
159 .resume = NULL, //et131x_pci_resume,
164 * et131x_init_module - The "main" entry point called on driver initialization
166 * Returns 0 on success, errno on failure (as defined in errno.h)
168 int et131x_init_module(void)
170 int result;
172 #ifdef CONFIG_ET131X_DEBUG
173 /* Set the level of debug messages displayed using the module
174 * parameter
176 et131x_dbginfo->dbgFlags = et131x_debug_flags;
178 switch (et131x_debug_level) {
179 case 7:
180 et131x_dbginfo->dbgFlags |= (DBG_RX_ON | DBG_TX_ON);
182 case 6:
183 et131x_dbginfo->dbgFlags |= DBG_PARAM_ON;
185 case 5:
186 et131x_dbginfo->dbgFlags |= DBG_VERBOSE_ON;
188 case 4:
189 et131x_dbginfo->dbgFlags |= DBG_TRACE_ON;
191 case 3:
192 et131x_dbginfo->dbgFlags |= DBG_NOTICE_ON;
194 case 2:
195 case 1:
196 case 0:
197 default:
198 break;
200 #endif /* CONFIG_ET131X_DEBUG */
202 DBG_ENTER(et131x_dbginfo);
203 DBG_PRINT("%s\n", DRIVER_INFO);
205 result = pci_register_driver(&et131x_driver);
207 DBG_LEAVE(et131x_dbginfo);
208 return result;
212 * et131x_cleanup_module - The entry point called on driver cleanup
214 void et131x_cleanup_module(void)
216 DBG_ENTER(et131x_dbginfo);
218 pci_unregister_driver(&et131x_driver);
220 DBG_LEAVE(et131x_dbginfo);
224 * These macros map the driver-specific init_module() and cleanup_module()
225 * routines so they can be called by the kernel.
227 module_init(et131x_init_module);
228 module_exit(et131x_cleanup_module);
232 * et131x_find_adapter - Find the adapter and get all the assigned resources
233 * @adapter: pointer to our private adapter structure
235 * Returns 0 on success, errno on failure (as defined in errno.h)
237 int et131x_find_adapter(struct et131x_adapter *adapter, struct pci_dev *pdev)
239 int result;
240 uint8_t eepromStat;
241 uint8_t maxPayload = 0;
242 uint8_t read_size_reg;
244 DBG_ENTER(et131x_dbginfo);
246 /* Allow disabling of Non-Maskable Interrupts in I/O space, to
247 * support validation.
249 if (adapter->RegistryNMIDisable) {
250 uint8_t RegisterVal;
252 RegisterVal = inb(ET1310_NMI_DISABLE);
253 RegisterVal &= 0xf3;
255 if (adapter->RegistryNMIDisable == 2) {
256 RegisterVal |= 0xc;
259 outb(ET1310_NMI_DISABLE, RegisterVal);
262 /* We first need to check the EEPROM Status code located at offset
263 * 0xB2 of config space
265 result = pci_read_config_byte(pdev, ET1310_PCI_EEPROM_STATUS,
266 &eepromStat);
268 /* THIS IS A WORKAROUND:
269 * I need to call this function twice to get my card in a
270 * LG M1 Express Dual running. I tried also a msleep before this
271 * function, because I thougth there could be some time condidions
272 * but it didn't work. Call the whole function twice also work.
274 result = pci_read_config_byte(pdev, ET1310_PCI_EEPROM_STATUS,
275 &eepromStat);
276 if (result != PCIBIOS_SUCCESSFUL) {
277 DBG_ERROR(et131x_dbginfo, "Could not read PCI config space for "
278 "EEPROM Status\n");
279 DBG_LEAVE(et131x_dbginfo);
280 return -EIO;
283 /* Determine if the error(s) we care about are present. If they are
284 * present, we need to fail.
286 if (eepromStat & 0x4C) {
287 result = pci_read_config_byte(pdev, PCI_REVISION_ID,
288 &adapter->RevisionID);
289 if (result != PCIBIOS_SUCCESSFUL) {
290 DBG_ERROR(et131x_dbginfo,
291 "Could not read PCI config space for "
292 "Revision ID\n");
293 DBG_LEAVE(et131x_dbginfo);
294 return -EIO;
295 } else if (adapter->RevisionID == 0x01) {
296 int32_t nLoop;
297 uint8_t ucTemp[4] = { 0xFE, 0x13, 0x10, 0xFF };
299 /* Re-write the first 4 bytes if we have an eeprom
300 * present and the revision id is 1, this fixes the
301 * corruption seen with 1310 B Silicon
303 for (nLoop = 0; nLoop < 3; nLoop++) {
304 EepromWriteByte(adapter, nLoop, ucTemp[nLoop],
305 0, SINGLE_BYTE);
309 DBG_ERROR(et131x_dbginfo,
310 "Fatal EEPROM Status Error - 0x%04x\n", eepromStat);
312 /* This error could mean that there was an error reading the
313 * eeprom or that the eeprom doesn't exist. We will treat
314 * each case the same and not try to gather additional
315 * information that normally would come from the eeprom, like
316 * MAC Address
318 adapter->bEepromPresent = false;
320 DBG_LEAVE(et131x_dbginfo);
321 return -EIO;
322 } else {
323 DBG_TRACE(et131x_dbginfo, "EEPROM Status Code - 0x%04x\n",
324 eepromStat);
325 adapter->bEepromPresent = true;
328 /* Read the EEPROM for information regarding LED behavior. Refer to
329 * ET1310_phy.c, et131x_xcvr_init(), for its use.
331 EepromReadByte(adapter, 0x70, &adapter->eepromData[0], 0, SINGLE_BYTE);
332 EepromReadByte(adapter, 0x71, &adapter->eepromData[1], 0, SINGLE_BYTE);
334 if (adapter->eepromData[0] != 0xcd) {
335 adapter->eepromData[1] = 0x00; // Disable all optional features
338 /* Let's set up the PORT LOGIC Register. First we need to know what
339 * the max_payload_size is
341 result = pci_read_config_byte(pdev, ET1310_PCI_MAX_PYLD, &maxPayload);
342 if (result != PCIBIOS_SUCCESSFUL) {
343 DBG_ERROR(et131x_dbginfo, "Could not read PCI config space for "
344 "Max Payload Size\n");
345 DBG_LEAVE(et131x_dbginfo);
346 return -EIO;
349 /* Program the Ack/Nak latency and replay timers */
350 maxPayload &= 0x07; // Only the lower 3 bits are valid
352 if (maxPayload < 2) {
353 const uint16_t AckNak[2] = { 0x76, 0xD0 };
354 const uint16_t Replay[2] = { 0x1E0, 0x2ED };
356 result = pci_write_config_word(pdev, ET1310_PCI_ACK_NACK,
357 AckNak[maxPayload]);
358 if (result != PCIBIOS_SUCCESSFUL) {
359 DBG_ERROR(et131x_dbginfo,
360 "Could not write PCI config space "
361 "for ACK/NAK\n");
362 DBG_LEAVE(et131x_dbginfo);
363 return -EIO;
366 result = pci_write_config_word(pdev, ET1310_PCI_REPLAY,
367 Replay[maxPayload]);
368 if (result != PCIBIOS_SUCCESSFUL) {
369 DBG_ERROR(et131x_dbginfo,
370 "Could not write PCI config space "
371 "for Replay Timer\n");
372 DBG_LEAVE(et131x_dbginfo);
373 return -EIO;
377 /* l0s and l1 latency timers. We are using default values.
378 * Representing 001 for L0s and 010 for L1
380 result = pci_write_config_byte(pdev, ET1310_PCI_L0L1LATENCY, 0x11);
381 if (result != PCIBIOS_SUCCESSFUL) {
382 DBG_ERROR(et131x_dbginfo,
383 "Could not write PCI config space for "
384 "Latency Timers\n");
385 DBG_LEAVE(et131x_dbginfo);
386 return -EIO;
389 /* Change the max read size to 2k */
390 result = pci_read_config_byte(pdev, 0x51, &read_size_reg);
391 if (result != PCIBIOS_SUCCESSFUL) {
392 DBG_ERROR(et131x_dbginfo,
393 "Could not read PCI config space for Max read size\n");
394 DBG_LEAVE(et131x_dbginfo);
395 return -EIO;
398 read_size_reg &= 0x8f;
399 read_size_reg |= 0x40;
401 result = pci_write_config_byte(pdev, 0x51, read_size_reg);
402 if (result != PCIBIOS_SUCCESSFUL) {
403 DBG_ERROR(et131x_dbginfo,
404 "Could not write PCI config space for Max read size\n");
405 DBG_LEAVE(et131x_dbginfo);
406 return -EIO;
409 /* PCI Express Configuration registers 0x48-0x5B (Device Control) */
410 result = pci_read_config_word(pdev, ET1310_PCI_DEV_CTRL,
411 &adapter->PciXDevCtl);
412 if (result != PCIBIOS_SUCCESSFUL) {
413 DBG_ERROR(et131x_dbginfo,
414 "Could not read PCI config space for PCI Express Dev Ctl\n");
415 DBG_LEAVE(et131x_dbginfo);
416 return -EIO;
419 /* Get MAC address from config space if an eeprom exists, otherwise
420 * the MAC address there will not be valid
422 if (adapter->bEepromPresent) {
423 int i;
425 for (i = 0; i < ETH_ALEN; i++) {
426 result = pci_read_config_byte(
427 pdev, ET1310_PCI_MAC_ADDRESS + i,
428 adapter->PermanentAddress + i);
429 if (result != PCIBIOS_SUCCESSFUL) {
430 DBG_ERROR(et131x_dbginfo,
431 "Could not read PCI config space for MAC address\n");
432 DBG_LEAVE(et131x_dbginfo);
433 return -EIO;
438 DBG_LEAVE(et131x_dbginfo);
439 return 0;
443 * et131x_error_timer_handler
444 * @data: timer-specific variable; here a pointer to our adapter structure
446 * The routine called when the error timer expires, to track the number of
447 * recurring errors.
449 void et131x_error_timer_handler(unsigned long data)
451 struct et131x_adapter *pAdapter = (struct et131x_adapter *) data;
452 PM_CSR_t pm_csr;
454 pm_csr.value = readl(&pAdapter->CSRAddress->global.pm_csr.value);
456 if (pm_csr.bits.pm_phy_sw_coma == 0) {
457 if (pAdapter->RegistryMACStat) {
458 UpdateMacStatHostCounters(pAdapter);
460 } else {
461 DBG_VERBOSE(et131x_dbginfo,
462 "No interrupts, in PHY coma, pm_csr = 0x%x\n",
463 pm_csr.value);
466 if (!pAdapter->Bmsr.bits.link_status &&
467 pAdapter->RegistryPhyComa &&
468 pAdapter->PoMgmt.TransPhyComaModeOnBoot < 11) {
469 pAdapter->PoMgmt.TransPhyComaModeOnBoot++;
472 if (pAdapter->PoMgmt.TransPhyComaModeOnBoot == 10) {
473 if (!pAdapter->Bmsr.bits.link_status
474 && pAdapter->RegistryPhyComa) {
475 if (pm_csr.bits.pm_phy_sw_coma == 0) {
476 // NOTE - This was originally a 'sync with interrupt'. How
477 // to do that under Linux?
478 et131x_enable_interrupts(pAdapter);
479 EnablePhyComa(pAdapter);
484 /* This is a periodic timer, so reschedule */
485 mod_timer(&pAdapter->ErrorTimer, jiffies +
486 TX_ERROR_PERIOD * HZ / 1000);
490 * et131x_link_detection_handler
492 * Timer function for link up at driver load time
494 void et131x_link_detection_handler(unsigned long data)
496 struct et131x_adapter *pAdapter = (struct et131x_adapter *) data;
497 unsigned long lockflags;
499 /* Let everyone know that we have run */
500 pAdapter->bLinkTimerActive = false;
502 if (pAdapter->MediaState == 0) {
503 spin_lock_irqsave(&pAdapter->Lock, lockflags);
505 pAdapter->MediaState = NETIF_STATUS_MEDIA_DISCONNECT;
506 MP_CLEAR_FLAG(pAdapter, fMP_ADAPTER_LINK_DETECTION);
508 spin_unlock_irqrestore(&pAdapter->Lock, lockflags);
510 netif_carrier_off(pAdapter->netdev);
512 pAdapter->bSetPending = false;
517 * et131x_adapter_setup - Set the adapter up as per cassini+ documentation
518 * @adapter: pointer to our private adapter structure
520 * Returns 0 on success, errno on failure (as defined in errno.h)
522 int et131x_adapter_setup(struct et131x_adapter *pAdapter)
524 int status = 0;
526 DBG_ENTER(et131x_dbginfo);
528 /* Configure the JAGCore */
529 ConfigGlobalRegs(pAdapter);
531 ConfigMACRegs1(pAdapter);
532 ConfigMMCRegs(pAdapter);
534 ConfigRxMacRegs(pAdapter);
535 ConfigTxMacRegs(pAdapter);
537 ConfigRxDmaRegs(pAdapter);
538 ConfigTxDmaRegs(pAdapter);
540 ConfigMacStatRegs(pAdapter);
542 /* Move the following code to Timer function?? */
543 status = et131x_xcvr_find(pAdapter);
545 if (status != 0) {
546 DBG_WARNING(et131x_dbginfo, "Could not find the xcvr\n");
549 /* Prepare the TRUEPHY library. */
550 ET1310_PhyInit(pAdapter);
552 /* Reset the phy now so changes take place */
553 ET1310_PhyReset(pAdapter);
555 /* Power down PHY */
556 ET1310_PhyPowerDown(pAdapter, 1);
559 * We need to turn off 1000 base half dulplex, the mac does not
560 * support it. For the 10/100 part, turn off all gig advertisement
562 if (pAdapter->DeviceID != ET131X_PCI_DEVICE_ID_FAST) {
563 ET1310_PhyAdvertise1000BaseT(pAdapter, TRUEPHY_ADV_DUPLEX_FULL);
564 } else {
565 ET1310_PhyAdvertise1000BaseT(pAdapter, TRUEPHY_ADV_DUPLEX_NONE);
568 /* Power up PHY */
569 ET1310_PhyPowerDown(pAdapter, 0);
571 et131x_setphy_normal(pAdapter);
573 DBG_LEAVE(et131x_dbginfo);
574 return status;
578 * et131x_setup_hardware_properties - set up the MAC Address on the ET1310
579 * @adapter: pointer to our private adapter structure
581 void et131x_setup_hardware_properties(struct et131x_adapter *adapter)
583 DBG_ENTER(et131x_dbginfo);
585 /* If have our default mac from registry and no mac address from
586 * EEPROM then we need to generate the last octet and set it on the
587 * device
589 if (!adapter->bOverrideAddress) {
590 if (adapter->PermanentAddress[0] == 0x00 &&
591 adapter->PermanentAddress[1] == 0x00 &&
592 adapter->PermanentAddress[2] == 0x00 &&
593 adapter->PermanentAddress[3] == 0x00 &&
594 adapter->PermanentAddress[4] == 0x00 &&
595 adapter->PermanentAddress[5] == 0x00) {
597 * We need to randomly generate the last octet so we
598 * decrease our chances of setting the mac address to
599 * same as another one of our cards in the system
601 get_random_bytes(&adapter->CurrentAddress[5], 1);
604 * We have the default value in the register we are
605 * working with so we need to copy the current
606 * address into the permanent address
608 memcpy(adapter->PermanentAddress,
609 adapter->CurrentAddress, ETH_ALEN);
610 } else {
611 /* We do not have an override address, so set the
612 * current address to the permanent address and add
613 * it to the device
615 memcpy(adapter->CurrentAddress,
616 adapter->PermanentAddress, ETH_ALEN);
620 DBG_LEAVE(et131x_dbginfo);
624 * et131x_soft_reset - Issue a soft reset to the hardware, complete for ET1310
625 * @adapter: pointer to our private adapter structure
627 void et131x_soft_reset(struct et131x_adapter *adapter)
629 DBG_ENTER(et131x_dbginfo);
631 /* Disable MAC Core */
632 writel(0xc00f0000, &adapter->CSRAddress->mac.cfg1.value);
634 /* Set everything to a reset value */
635 writel(0x7F, &adapter->CSRAddress->global.sw_reset.value);
636 writel(0x000f0000, &adapter->CSRAddress->mac.cfg1.value);
637 writel(0x00000000, &adapter->CSRAddress->mac.cfg1.value);
639 DBG_LEAVE(et131x_dbginfo);
643 * et131x_align_allocated_memory - Align allocated memory on a given boundary
644 * @adapter: pointer to our adapter structure
645 * @phys_addr: pointer to Physical address
646 * @offset: pointer to the offset variable
647 * @mask: correct mask
649 void et131x_align_allocated_memory(struct et131x_adapter *adapter,
650 uint64_t *phys_addr,
651 uint64_t *offset, uint64_t mask)
653 uint64_t new_addr;
655 DBG_ENTER(et131x_dbginfo);
657 *offset = 0;
659 new_addr = *phys_addr & ~mask;
661 if (new_addr != *phys_addr) {
662 /* Move to next aligned block */
663 new_addr += mask + 1;
664 /* Return offset for adjusting virt addr */
665 *offset = new_addr - *phys_addr;
666 /* Return new physical address */
667 *phys_addr = new_addr;
670 DBG_LEAVE(et131x_dbginfo);
674 * et131x_adapter_memory_alloc
675 * @adapter: pointer to our private adapter structure
677 * Returns 0 on success, errno on failure (as defined in errno.h).
679 * Allocate all the memory blocks for send, receive and others.
681 int et131x_adapter_memory_alloc(struct et131x_adapter *adapter)
683 int status = 0;
685 DBG_ENTER(et131x_dbginfo);
687 do {
688 /* Allocate memory for the Tx Ring */
689 status = et131x_tx_dma_memory_alloc(adapter);
690 if (status != 0) {
691 DBG_ERROR(et131x_dbginfo,
692 "et131x_tx_dma_memory_alloc FAILED\n");
693 break;
696 /* Receive buffer memory allocation */
697 status = et131x_rx_dma_memory_alloc(adapter);
698 if (status != 0) {
699 DBG_ERROR(et131x_dbginfo,
700 "et131x_rx_dma_memory_alloc FAILED\n");
701 et131x_tx_dma_memory_free(adapter);
702 break;
705 /* Init receive data structures */
706 status = et131x_init_recv(adapter);
707 if (status != 0) {
708 DBG_ERROR(et131x_dbginfo, "et131x_init_recv FAILED\n");
709 et131x_tx_dma_memory_free(adapter);
710 et131x_rx_dma_memory_free(adapter);
711 break;
713 } while (0);
715 DBG_LEAVE(et131x_dbginfo);
716 return status;
720 * et131x_adapter_memory_free - Free all memory allocated for use by Tx & Rx
721 * @adapter: pointer to our private adapter structure
723 void et131x_adapter_memory_free(struct et131x_adapter *adapter)
725 DBG_ENTER(et131x_dbginfo);
727 /* Free DMA memory */
728 et131x_tx_dma_memory_free(adapter);
729 et131x_rx_dma_memory_free(adapter);
731 DBG_LEAVE(et131x_dbginfo);
735 * et131x_pci_remove
736 * @pdev: a pointer to the device's pci_dev structure
738 * Registered in the pci_driver structure, this function is called when the
739 * PCI subsystem detects that a PCI device which matches the information
740 * contained in the pci_device_id table has been removed.
742 void __devexit et131x_pci_remove(struct pci_dev *pdev)
744 struct net_device *netdev;
745 struct et131x_adapter *adapter;
747 DBG_ENTER(et131x_dbginfo);
749 /* Retrieve the net_device pointer from the pci_dev struct, as well
750 * as the private adapter struct
752 netdev = (struct net_device *) pci_get_drvdata(pdev);
753 adapter = netdev_priv(netdev);
755 /* Perform device cleanup */
756 unregister_netdev(netdev);
757 et131x_adapter_memory_free(adapter);
758 iounmap(adapter->CSRAddress);
759 free_netdev(netdev);
760 pci_release_regions(pdev);
761 pci_disable_device(pdev);
763 DBG_LEAVE(et131x_dbginfo);
767 * et131x_pci_setup - Perform device initialization
768 * @pdev: a pointer to the device's pci_dev structure
769 * @ent: this device's entry in the pci_device_id table
771 * Returns 0 on success, errno on failure (as defined in errno.h)
773 * Registered in the pci_driver structure, this function is called when the
774 * PCI subsystem finds a new PCI device which matches the information
775 * contained in the pci_device_id table. This routine is the equivalent to
776 * a device insertion routine.
778 int __devinit et131x_pci_setup(struct pci_dev *pdev,
779 const struct pci_device_id *ent)
781 int result = 0;
782 int pm_cap;
783 bool pci_using_dac;
784 struct net_device *netdev = NULL;
785 struct et131x_adapter *adapter = NULL;
787 DBG_ENTER(et131x_dbginfo);
789 /* Enable the device via the PCI subsystem */
790 result = pci_enable_device(pdev);
791 if (result != 0) {
792 DBG_ERROR(et131x_dbginfo, "pci_enable_device() failed\n");
793 goto out;
796 /* Perform some basic PCI checks */
797 if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {
798 DBG_ERROR(et131x_dbginfo,
799 "Can't find PCI device's base address\n");
800 result = -ENODEV;
801 goto out;
804 result = pci_request_regions(pdev, DRIVER_NAME);
805 if (result != 0) {
806 DBG_ERROR(et131x_dbginfo, "Can't get PCI resources\n");
807 goto err_disable;
810 /* Enable PCI bus mastering */
811 DBG_TRACE(et131x_dbginfo, "Setting PCI Bus Mastering...\n");
812 pci_set_master(pdev);
814 /* Query PCI for Power Mgmt Capabilities
816 * NOTE: Now reading PowerMgmt in another location; is this still
817 * needed?
819 pm_cap = pci_find_capability(pdev, PCI_CAP_ID_PM);
820 if (pm_cap == 0) {
821 DBG_ERROR(et131x_dbginfo,
822 "Cannot find Power Management capabilities\n");
823 result = -EIO;
824 goto err_release_res;
827 /* Check the DMA addressing support of this device */
828 if (!pci_set_dma_mask(pdev, 0xffffffffffffffffULL)) {
829 DBG_TRACE(et131x_dbginfo, "64-bit DMA addressing supported\n");
830 pci_using_dac = true;
832 result =
833 pci_set_consistent_dma_mask(pdev, 0xffffffffffffffffULL);
834 if (result != 0) {
835 DBG_ERROR(et131x_dbginfo,
836 "Unable to obtain 64 bit DMA for consistent allocations\n");
837 goto err_release_res;
839 } else if (!pci_set_dma_mask(pdev, 0xffffffffULL)) {
840 DBG_TRACE(et131x_dbginfo,
841 "64-bit DMA addressing NOT supported\n");
842 DBG_TRACE(et131x_dbginfo,
843 "32-bit DMA addressing will be used\n");
844 pci_using_dac = false;
845 } else {
846 DBG_ERROR(et131x_dbginfo, "No usable DMA addressing method\n");
847 result = -EIO;
848 goto err_release_res;
851 /* Allocate netdev and private adapter structs */
852 DBG_TRACE(et131x_dbginfo,
853 "Allocate netdev and private adapter structs...\n");
854 netdev = et131x_device_alloc();
855 if (netdev == NULL) {
856 DBG_ERROR(et131x_dbginfo, "Couldn't alloc netdev struct\n");
857 result = -ENOMEM;
858 goto err_release_res;
861 /* Setup the fundamental net_device and private adapter structure elements */
862 DBG_TRACE(et131x_dbginfo, "Setting fundamental net_device info...\n");
863 SET_NETDEV_DEV(netdev, &pdev->dev);
864 if (pci_using_dac) {
865 //netdev->features |= NETIF_F_HIGHDMA;
869 * NOTE - Turn this on when we're ready to deal with SG-DMA
871 * NOTE: According to "Linux Device Drivers", 3rd ed, Rubini et al,
872 * if checksumming is not performed in HW, then the kernel will not
873 * use SG.
874 * From pp 510-511:
876 * "Note that the kernel does not perform scatter/gather I/O to your
877 * device if it does not also provide some form of checksumming as
878 * well. The reason is that, if the kernel has to make a pass over a
879 * fragmented ("nonlinear") packet to calculate the checksum, it
880 * might as well copy the data and coalesce the packet at the same
881 * time."
883 * This has been verified by setting the flags below and still not
884 * receiving a scattered buffer from the network stack, so leave it
885 * off until checksums are calculated in HW.
887 //netdev->features |= NETIF_F_SG;
888 //netdev->features |= NETIF_F_NO_CSUM;
889 //netdev->features |= NETIF_F_LLTX;
891 /* Allocate private adapter struct and copy in relevant information */
892 adapter = netdev_priv(netdev);
893 adapter->pdev = pdev;
894 adapter->netdev = netdev;
895 adapter->VendorID = pdev->vendor;
896 adapter->DeviceID = pdev->device;
898 /* Do the same for the netdev struct */
899 netdev->irq = pdev->irq;
900 netdev->base_addr = pdev->resource[0].start;
902 /* Initialize spinlocks here */
903 DBG_TRACE(et131x_dbginfo, "Initialize spinlocks...\n");
905 spin_lock_init(&adapter->Lock);
906 spin_lock_init(&adapter->TCBSendQLock);
907 spin_lock_init(&adapter->TCBReadyQLock);
908 spin_lock_init(&adapter->SendHWLock);
909 spin_lock_init(&adapter->SendWaitLock);
910 spin_lock_init(&adapter->RcvLock);
911 spin_lock_init(&adapter->RcvPendLock);
912 spin_lock_init(&adapter->FbrLock);
913 spin_lock_init(&adapter->PHYLock);
915 /* Parse configuration parameters into the private adapter struct */
916 et131x_config_parse(adapter);
918 /* Find the physical adapter
920 * NOTE: This is the equivalent of the MpFindAdapter() routine; can we
921 * lump it's init with the device specific init below into a
922 * single init function?
924 //while (et131x_find_adapter(adapter, pdev) != 0);
925 et131x_find_adapter(adapter, pdev);
927 /* Map the bus-relative registers to system virtual memory */
928 DBG_TRACE(et131x_dbginfo,
929 "Mapping bus-relative registers to virtual memory...\n");
931 adapter->CSRAddress = ioremap_nocache(pci_resource_start(pdev, 0),
932 pci_resource_len(pdev, 0));
933 if (adapter->CSRAddress == NULL) {
934 DBG_ERROR(et131x_dbginfo, "Cannot map device registers\n");
935 result = -ENOMEM;
936 goto err_free_dev;
939 /* Perform device-specific initialization here (See code below) */
941 /* If Phy COMA mode was enabled when we went down, disable it here. */
943 PM_CSR_t GlobalPmCSR = { 0 };
945 GlobalPmCSR.bits.pm_sysclk_gate = 1;
946 GlobalPmCSR.bits.pm_txclk_gate = 1;
947 GlobalPmCSR.bits.pm_rxclk_gate = 1;
948 writel(GlobalPmCSR.value,
949 &adapter->CSRAddress->global.pm_csr.value);
952 /* Issue a global reset to the et1310 */
953 DBG_TRACE(et131x_dbginfo, "Issuing soft reset...\n");
954 et131x_soft_reset(adapter);
956 /* Disable all interrupts (paranoid) */
957 DBG_TRACE(et131x_dbginfo, "Disable device interrupts...\n");
958 et131x_disable_interrupts(adapter);
960 /* Allocate DMA memory */
961 result = et131x_adapter_memory_alloc(adapter);
962 if (result != 0) {
963 DBG_ERROR(et131x_dbginfo,
964 "Could not alloc adapater memory (DMA)\n");
965 goto err_iounmap;
968 /* Init send data structures */
969 DBG_TRACE(et131x_dbginfo, "Init send data structures...\n");
970 et131x_init_send(adapter);
972 adapter->PoMgmt.PowerState = NdisDeviceStateD0;
974 /* Register the interrupt
976 * NOTE - This is being done in the open routine, where most other
977 * Linux drivers setup IRQ handlers. Make sure device
978 * interrupts are not turned on before the IRQ is registered!!
980 * What we will do here is setup the task structure for the
981 * ISR's deferred handler
983 INIT_WORK(&adapter->task, et131x_isr_handler);
985 /* Determine MAC Address, and copy into the net_device struct */
986 DBG_TRACE(et131x_dbginfo, "Retrieve MAC address...\n");
987 et131x_setup_hardware_properties(adapter);
989 memcpy(netdev->dev_addr, adapter->CurrentAddress, ETH_ALEN);
991 /* Setup et1310 as per the documentation */
992 DBG_TRACE(et131x_dbginfo, "Setup the adapter...\n");
993 et131x_adapter_setup(adapter);
995 /* Create a timer to count errors received by the NIC */
996 init_timer(&adapter->ErrorTimer);
998 adapter->ErrorTimer.expires = jiffies + TX_ERROR_PERIOD * HZ / 1000;
999 adapter->ErrorTimer.function = et131x_error_timer_handler;
1000 adapter->ErrorTimer.data = (unsigned long)adapter;
1002 /* Initialize link state */
1003 et131x_link_detection_handler((unsigned long)adapter);
1005 /* Intialize variable for counting how long we do not have link status */
1006 adapter->PoMgmt.TransPhyComaModeOnBoot = 0;
1008 /* We can enable interrupts now
1010 * NOTE - Because registration of interrupt handler is done in the
1011 * device's open(), defer enabling device interrupts to that
1012 * point
1015 /* Register the net_device struct with the Linux network layer */
1016 DBG_TRACE(et131x_dbginfo, "Registering net_device...\n");
1017 if ((result = register_netdev(netdev)) != 0) {
1018 DBG_ERROR(et131x_dbginfo, "register_netdev() failed\n");
1019 goto err_mem_free;
1022 /* Register the net_device struct with the PCI subsystem. Save a copy
1023 * of the PCI config space for this device now that the device has
1024 * been initialized, just in case it needs to be quickly restored.
1026 pci_set_drvdata(pdev, netdev);
1028 pci_save_state(adapter->pdev);
1030 out:
1031 DBG_LEAVE(et131x_dbginfo);
1032 return result;
1034 err_mem_free:
1035 et131x_adapter_memory_free(adapter);
1036 err_iounmap:
1037 iounmap(adapter->CSRAddress);
1038 err_free_dev:
1039 free_netdev(netdev);
1040 err_release_res:
1041 pci_release_regions(pdev);
1042 err_disable:
1043 pci_disable_device(pdev);
1044 goto out;