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tracehook_notify_death: use task_detached() helper
[linux-2.6/mini2440.git] / drivers / net / wireless / mwl8k.c
blob57a0268d1bae46890ac6c1c332d7bcae781b259b
1 /*
2 * drivers/net/wireless/mwl8k.c driver for Marvell TOPDOG 802.11 Wireless cards
3 *
4 * Copyright (C) 2008 Marvell Semiconductor Inc.
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11 #include <linux/init.h>
12 #include <linux/module.h>
13 #include <linux/kernel.h>
14 #include <linux/spinlock.h>
15 #include <linux/list.h>
16 #include <linux/pci.h>
17 #include <linux/delay.h>
18 #include <linux/completion.h>
19 #include <linux/etherdevice.h>
20 #include <net/mac80211.h>
21 #include <linux/moduleparam.h>
22 #include <linux/firmware.h>
23 #include <linux/workqueue.h>
24
25 #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
26 #define MWL8K_NAME KBUILD_MODNAME
27 #define MWL8K_VERSION "0.9.1"
28
29 MODULE_DESCRIPTION(MWL8K_DESC);
30 MODULE_VERSION(MWL8K_VERSION);
31 MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
32 MODULE_LICENSE("GPL");
33
34 static DEFINE_PCI_DEVICE_TABLE(mwl8k_table) = {
35 { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = 8687, },
36 { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = 8687, },
37 { }
38 };
39 MODULE_DEVICE_TABLE(pci, mwl8k_table);
40
41 #define IEEE80211_ADDR_LEN ETH_ALEN
42
43 /* Register definitions */
44 #define MWL8K_HIU_GEN_PTR 0x00000c10
45 #define MWL8K_MODE_STA 0x0000005a
46 #define MWL8K_MODE_AP 0x000000a5
47 #define MWL8K_HIU_INT_CODE 0x00000c14
48 #define MWL8K_FWSTA_READY 0xf0f1f2f4
49 #define MWL8K_FWAP_READY 0xf1f2f4a5
50 #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
51 #define MWL8K_HIU_SCRATCH 0x00000c40
52
53 /* Host->device communications */
54 #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
55 #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
56 #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
57 #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
58 #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
59 #define MWL8K_H2A_INT_DUMMY (1 << 20)
60 #define MWL8K_H2A_INT_RESET (1 << 15)
61 #define MWL8K_H2A_INT_PS (1 << 2)
62 #define MWL8K_H2A_INT_DOORBELL (1 << 1)
63 #define MWL8K_H2A_INT_PPA_READY (1 << 0)
64
65 /* Device->host communications */
66 #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
67 #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
68 #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
69 #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
70 #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
71 #define MWL8K_A2H_INT_DUMMY (1 << 20)
72 #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
73 #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
74 #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
75 #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
76 #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
77 #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
78 #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
79 #define MWL8K_A2H_INT_RX_READY (1 << 1)
80 #define MWL8K_A2H_INT_TX_DONE (1 << 0)
81
82 #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
83 MWL8K_A2H_INT_CHNL_SWITCHED | \
84 MWL8K_A2H_INT_QUEUE_EMPTY | \
85 MWL8K_A2H_INT_RADAR_DETECT | \
86 MWL8K_A2H_INT_RADIO_ON | \
87 MWL8K_A2H_INT_RADIO_OFF | \
88 MWL8K_A2H_INT_MAC_EVENT | \
89 MWL8K_A2H_INT_OPC_DONE | \
90 MWL8K_A2H_INT_RX_READY | \
91 MWL8K_A2H_INT_TX_DONE)
92
93 /* WME stream classes */
94 #define WME_AC_BE 0 /* best effort */
95 #define WME_AC_BK 1 /* background */
96 #define WME_AC_VI 2 /* video */
97 #define WME_AC_VO 3 /* voice */
98
99 #define MWL8K_RX_QUEUES 1
100 #define MWL8K_TX_QUEUES 4
101
102 struct mwl8k_rx_queue {
103 int rx_desc_count;
104
105 /* hw receives here */
106 int rx_head;
107
108 /* refill descs here */
109 int rx_tail;
110
111 struct mwl8k_rx_desc *rx_desc_area;
112 dma_addr_t rx_desc_dma;
113 struct sk_buff **rx_skb;
114 };
115
116 struct mwl8k_skb {
117 /*
118 * The DMA engine requires a modification to the payload.
119 * If the skbuff is shared/cloned, it needs to be unshared.
120 * This method is used to ensure the stack always gets back
121 * the skbuff it sent for transmission.
122 */
123 struct sk_buff *clone;
124 struct sk_buff *skb;
125 };
126
127 struct mwl8k_tx_queue {
128 /* hw transmits here */
129 int tx_head;
130
131 /* sw appends here */
132 int tx_tail;
133
134 struct ieee80211_tx_queue_stats tx_stats;
135 struct mwl8k_tx_desc *tx_desc_area;
136 dma_addr_t tx_desc_dma;
137 struct mwl8k_skb *tx_skb;
138 };
139
140 /* Pointers to the firmware data and meta information about it. */
141 struct mwl8k_firmware {
142 /* Microcode */
143 struct firmware *ucode;
144
145 /* Boot helper code */
146 struct firmware *helper;
147 };
148
149 struct mwl8k_priv {
150 void __iomem *regs;
151 struct ieee80211_hw *hw;
152
153 struct pci_dev *pdev;
154 u8 name[16];
155 /* firmware access lock */
156 spinlock_t fw_lock;
157
158 /* firmware files and meta data */
159 struct mwl8k_firmware fw;
160 u32 part_num;
161
162 /* lock held over TX and TX reap */
163 spinlock_t tx_lock;
164 u32 int_mask;
165
166 struct ieee80211_vif *vif;
167 struct list_head vif_list;
168
169 struct ieee80211_channel *current_channel;
170
171 /* power management status cookie from firmware */
172 u32 *cookie;
173 dma_addr_t cookie_dma;
174
175 u16 num_mcaddrs;
176 u16 region_code;
177 u8 hw_rev;
178 __le32 fw_rev;
179 u32 wep_enabled;
180
181 /*
182 * Running count of TX packets in flight, to avoid
183 * iterating over the transmit rings each time.
184 */
185 int pending_tx_pkts;
186
187 struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
188 struct mwl8k_tx_queue txq[MWL8K_TX_QUEUES];
189
190 /* PHY parameters */
191 struct ieee80211_supported_band band;
192 struct ieee80211_channel channels[14];
193 struct ieee80211_rate rates[12];
194
195 /* RF preamble: Short, Long or Auto */
196 u8 radio_preamble;
197 u8 radio_state;
198
199 /* WMM MODE 1 for enabled; 0 for disabled */
200 bool wmm_mode;
201
202 /* Set if PHY config is in progress */
203 bool inconfig;
204
205 /* XXX need to convert this to handle multiple interfaces */
206 bool capture_beacon;
207 u8 capture_bssid[IEEE80211_ADDR_LEN];
208 struct sk_buff *beacon_skb;
209
210 /*
211 * This FJ worker has to be global as it is scheduled from the
212 * RX handler. At this point we don't know which interface it
213 * belongs to until the list of bssids waiting to complete join
214 * is checked.
215 */
216 struct work_struct finalize_join_worker;
217
218 /* Tasklet to reclaim TX descriptors and buffers after tx */
219 struct tasklet_struct tx_reclaim_task;
220
221 /* Work thread to serialize configuration requests */
222 struct workqueue_struct *config_wq;
223 struct completion *hostcmd_wait;
224 struct completion *tx_wait;
225 };
226
227 /* Per interface specific private data */
228 struct mwl8k_vif {
229 struct list_head node;
230
231 /* backpointer to parent config block */
232 struct mwl8k_priv *priv;
233
234 /* BSS config of AP or IBSS from mac80211*/
235 struct ieee80211_bss_conf bss_info;
236
237 /* BSSID of AP or IBSS */
238 u8 bssid[IEEE80211_ADDR_LEN];
239 u8 mac_addr[IEEE80211_ADDR_LEN];
240
241 /*
242 * Subset of supported legacy rates.
243 * Intersection of AP and STA supported rates.
244 */
245 struct ieee80211_rate legacy_rates[12];
246
247 /* number of supported legacy rates */
248 u8 legacy_nrates;
249
250 /* Number of supported MCS rates. Work in progress */
251 u8 mcs_nrates;
252
253 /* Index into station database.Returned by update_sta_db call */
254 u8 peer_id;
255
256 /* Non AMPDU sequence number assigned by driver */
257 u16 seqno;
258
259 /* Note:There is no channel info,
260 * refer to the master channel info in priv
261 */
262 };
263
264 #define MWL8K_VIF(_vif) (struct mwl8k_vif *)(&((_vif)->drv_priv))
265
266 static const struct ieee80211_channel mwl8k_channels[] = {
267 { .center_freq = 2412, .hw_value = 1, },
268 { .center_freq = 2417, .hw_value = 2, },
269 { .center_freq = 2422, .hw_value = 3, },
270 { .center_freq = 2427, .hw_value = 4, },
271 { .center_freq = 2432, .hw_value = 5, },
272 { .center_freq = 2437, .hw_value = 6, },
273 { .center_freq = 2442, .hw_value = 7, },
274 { .center_freq = 2447, .hw_value = 8, },
275 { .center_freq = 2452, .hw_value = 9, },
276 { .center_freq = 2457, .hw_value = 10, },
277 { .center_freq = 2462, .hw_value = 11, },
278 };
279
280 static const struct ieee80211_rate mwl8k_rates[] = {
281 { .bitrate = 10, .hw_value = 2, },
282 { .bitrate = 20, .hw_value = 4, },
283 { .bitrate = 55, .hw_value = 11, },
284 { .bitrate = 60, .hw_value = 12, },
285 { .bitrate = 90, .hw_value = 18, },
286 { .bitrate = 110, .hw_value = 22, },
287 { .bitrate = 120, .hw_value = 24, },
288 { .bitrate = 180, .hw_value = 36, },
289 { .bitrate = 240, .hw_value = 48, },
290 { .bitrate = 360, .hw_value = 72, },
291 { .bitrate = 480, .hw_value = 96, },
292 { .bitrate = 540, .hw_value = 108, },
293 };
294
295 /* Radio settings */
296 #define MWL8K_RADIO_FORCE 0x2
297 #define MWL8K_RADIO_ENABLE 0x1
298 #define MWL8K_RADIO_DISABLE 0x0
299 #define MWL8K_RADIO_AUTO_PREAMBLE 0x0005
300 #define MWL8K_RADIO_SHORT_PREAMBLE 0x0003
301 #define MWL8K_RADIO_LONG_PREAMBLE 0x0001
302
303 /* WMM */
304 #define MWL8K_WMM_ENABLE 1
305 #define MWL8K_WMM_DISABLE 0
306
307 #define MWL8K_RADIO_DEFAULT_PREAMBLE MWL8K_RADIO_LONG_PREAMBLE
308
309 /* Slot time */
310
311 /* Short Slot: 9us slot time */
312 #define MWL8K_SHORT_SLOTTIME 1
313
314 /* Long slot: 20us slot time */
315 #define MWL8K_LONG_SLOTTIME 0
316
317 /* Set or get info from Firmware */
318 #define MWL8K_CMD_SET 0x0001
319 #define MWL8K_CMD_GET 0x0000
320
321 /* Firmware command codes */
322 #define MWL8K_CMD_CODE_DNLD 0x0001
323 #define MWL8K_CMD_GET_HW_SPEC 0x0003
324 #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
325 #define MWL8K_CMD_GET_STAT 0x0014
326 #define MWL8K_CMD_RADIO_CONTROL 0x001C
327 #define MWL8K_CMD_RF_TX_POWER 0x001E
328 #define MWL8K_CMD_SET_PRE_SCAN 0x0107
329 #define MWL8K_CMD_SET_POST_SCAN 0x0108
330 #define MWL8K_CMD_SET_RF_CHANNEL 0x010A
331 #define MWL8K_CMD_SET_SLOT 0x0114
332 #define MWL8K_CMD_MIMO_CONFIG 0x0125
333 #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
334 #define MWL8K_CMD_SET_WMM_MODE 0x0123
335 #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
336 #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
337 #define MWL8K_CMD_UPDATE_STADB 0x1123
338 #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
339 #define MWL8K_CMD_SET_LINKADAPT_MODE 0x0129
340 #define MWL8K_CMD_SET_AID 0x010d
341 #define MWL8K_CMD_SET_RATE 0x0110
342 #define MWL8K_CMD_USE_FIXED_RATE 0x0126
343 #define MWL8K_CMD_RTS_THRESHOLD 0x0113
344 #define MWL8K_CMD_ENCRYPTION 0x1122
345
346 static const char *mwl8k_cmd_name(u16 cmd, char *buf, int bufsize)
347 {
348 #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
349 snprintf(buf, bufsize, "%s", #x);\
350 return buf;\
351 } while (0)
352 switch (cmd & (~0x8000)) {
353 MWL8K_CMDNAME(CODE_DNLD);
354 MWL8K_CMDNAME(GET_HW_SPEC);
355 MWL8K_CMDNAME(MAC_MULTICAST_ADR);
356 MWL8K_CMDNAME(GET_STAT);
357 MWL8K_CMDNAME(RADIO_CONTROL);
358 MWL8K_CMDNAME(RF_TX_POWER);
359 MWL8K_CMDNAME(SET_PRE_SCAN);
360 MWL8K_CMDNAME(SET_POST_SCAN);
361 MWL8K_CMDNAME(SET_RF_CHANNEL);
362 MWL8K_CMDNAME(SET_SLOT);
363 MWL8K_CMDNAME(MIMO_CONFIG);
364 MWL8K_CMDNAME(ENABLE_SNIFFER);
365 MWL8K_CMDNAME(SET_WMM_MODE);
366 MWL8K_CMDNAME(SET_EDCA_PARAMS);
367 MWL8K_CMDNAME(SET_FINALIZE_JOIN);
368 MWL8K_CMDNAME(UPDATE_STADB);
369 MWL8K_CMDNAME(SET_RATEADAPT_MODE);
370 MWL8K_CMDNAME(SET_LINKADAPT_MODE);
371 MWL8K_CMDNAME(SET_AID);
372 MWL8K_CMDNAME(SET_RATE);
373 MWL8K_CMDNAME(USE_FIXED_RATE);
374 MWL8K_CMDNAME(RTS_THRESHOLD);
375 MWL8K_CMDNAME(ENCRYPTION);
376 default:
377 snprintf(buf, bufsize, "0x%x", cmd);
378 }
379 #undef MWL8K_CMDNAME
380
381 return buf;
382 }
383
384 /* Hardware and firmware reset */
385 static void mwl8k_hw_reset(struct mwl8k_priv *priv)
386 {
387 iowrite32(MWL8K_H2A_INT_RESET,
388 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
389 iowrite32(MWL8K_H2A_INT_RESET,
390 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
391 msleep(20);
392 }
393
394 /* Release fw image */
395 static void mwl8k_release_fw(struct firmware **fw)
396 {
397 if (*fw == NULL)
398 return;
399 release_firmware(*fw);
400 *fw = NULL;
401 }
402
403 static void mwl8k_release_firmware(struct mwl8k_priv *priv)
404 {
405 mwl8k_release_fw(&priv->fw.ucode);
406 mwl8k_release_fw(&priv->fw.helper);
407 }
408
409 /* Request fw image */
410 static int mwl8k_request_fw(struct mwl8k_priv *priv,
411 const char *fname, struct firmware **fw)
412 {
413 /* release current image */
414 if (*fw != NULL)
415 mwl8k_release_fw(fw);
416
417 return request_firmware((const struct firmware **)fw,
418 fname, &priv->pdev->dev);
419 }
420
421 static int mwl8k_request_firmware(struct mwl8k_priv *priv, u32 part_num)
422 {
423 u8 filename[64];
424 int rc;
425
426 priv->part_num = part_num;
427
428 snprintf(filename, sizeof(filename),
429 "mwl8k/helper_%u.fw", priv->part_num);
430
431 rc = mwl8k_request_fw(priv, filename, &priv->fw.helper);
432 if (rc) {
433 printk(KERN_ERR
434 "%s Error requesting helper firmware file %s\n",
435 pci_name(priv->pdev), filename);
436 return rc;
437 }
438
439 snprintf(filename, sizeof(filename),
440 "mwl8k/fmimage_%u.fw", priv->part_num);
441
442 rc = mwl8k_request_fw(priv, filename, &priv->fw.ucode);
443 if (rc) {
444 printk(KERN_ERR "%s Error requesting firmware file %s\n",
445 pci_name(priv->pdev), filename);
446 mwl8k_release_fw(&priv->fw.helper);
447 return rc;
448 }
449
450 return 0;
451 }
452
453 struct mwl8k_cmd_pkt {
454 __le16 code;
455 __le16 length;
456 __le16 seq_num;
457 __le16 result;
458 char payload[0];
459 } __attribute__((packed));
460
461 /*
462 * Firmware loading.
463 */
464 static int
465 mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
466 {
467 void __iomem *regs = priv->regs;
468 dma_addr_t dma_addr;
469 int rc;
470 int loops;
471
472 dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
473 if (pci_dma_mapping_error(priv->pdev, dma_addr))
474 return -ENOMEM;
475
476 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
477 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
478 iowrite32(MWL8K_H2A_INT_DOORBELL,
479 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
480 iowrite32(MWL8K_H2A_INT_DUMMY,
481 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
482
483 rc = -ETIMEDOUT;
484 loops = 1000;
485 do {
486 u32 int_code;
487
488 int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
489 if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
490 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
491 rc = 0;
492 break;
493 }
494
495 udelay(1);
496 } while (--loops);
497
498 pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
499
500 /*
501 * Clear 'command done' interrupt bit.
502 */
503 loops = 1000;
504 do {
505 u32 status;
506
507 status = ioread32(priv->regs +
508 MWL8K_HIU_A2H_INTERRUPT_STATUS);
509 if (status & MWL8K_A2H_INT_OPC_DONE) {
510 iowrite32(~MWL8K_A2H_INT_OPC_DONE,
511 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
512 ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
513 break;
514 }
515
516 udelay(1);
517 } while (--loops);
518
519 return rc;
520 }
521
522 static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
523 const u8 *data, size_t length)
524 {
525 struct mwl8k_cmd_pkt *cmd;
526 int done;
527 int rc = 0;
528
529 cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
530 if (cmd == NULL)
531 return -ENOMEM;
532
533 cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
534 cmd->seq_num = 0;
535 cmd->result = 0;
536
537 done = 0;
538 while (length) {
539 int block_size = length > 256 ? 256 : length;
540
541 memcpy(cmd->payload, data + done, block_size);
542 cmd->length = cpu_to_le16(block_size);
543
544 rc = mwl8k_send_fw_load_cmd(priv, cmd,
545 sizeof(*cmd) + block_size);
546 if (rc)
547 break;
548
549 done += block_size;
550 length -= block_size;
551 }
552
553 if (!rc) {
554 cmd->length = 0;
555 rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
556 }
557
558 kfree(cmd);
559
560 return rc;
561 }
562
563 static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
564 const u8 *data, size_t length)
565 {
566 unsigned char *buffer;
567 int may_continue, rc = 0;
568 u32 done, prev_block_size;
569
570 buffer = kmalloc(1024, GFP_KERNEL);
571 if (buffer == NULL)
572 return -ENOMEM;
573
574 done = 0;
575 prev_block_size = 0;
576 may_continue = 1000;
577 while (may_continue > 0) {
578 u32 block_size;
579
580 block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
581 if (block_size & 1) {
582 block_size &= ~1;
583 may_continue--;
584 } else {
585 done += prev_block_size;
586 length -= prev_block_size;
587 }
588
589 if (block_size > 1024 || block_size > length) {
590 rc = -EOVERFLOW;
591 break;
592 }
593
594 if (length == 0) {
595 rc = 0;
596 break;
597 }
598
599 if (block_size == 0) {
600 rc = -EPROTO;
601 may_continue--;
602 udelay(1);
603 continue;
604 }
605
606 prev_block_size = block_size;
607 memcpy(buffer, data + done, block_size);
608
609 rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
610 if (rc)
611 break;
612 }
613
614 if (!rc && length != 0)
615 rc = -EREMOTEIO;
616
617 kfree(buffer);
618
619 return rc;
620 }
621
622 static int mwl8k_load_firmware(struct mwl8k_priv *priv)
623 {
624 int loops, rc;
625
626 const u8 *ucode = priv->fw.ucode->data;
627 size_t ucode_len = priv->fw.ucode->size;
628 const u8 *helper = priv->fw.helper->data;
629 size_t helper_len = priv->fw.helper->size;
630
631 if (!memcmp(ucode, "\x01\x00\x00\x00", 4)) {
632 rc = mwl8k_load_fw_image(priv, helper, helper_len);
633 if (rc) {
634 printk(KERN_ERR "%s: unable to load firmware "
635 "helper image\n", pci_name(priv->pdev));
636 return rc;
637 }
638 msleep(1);
639
640 rc = mwl8k_feed_fw_image(priv, ucode, ucode_len);
641 } else {
642 rc = mwl8k_load_fw_image(priv, ucode, ucode_len);
643 }
644
645 if (rc) {
646 printk(KERN_ERR "%s: unable to load firmware data\n",
647 pci_name(priv->pdev));
648 return rc;
649 }
650
651 iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
652 msleep(1);
653
654 loops = 200000;
655 do {
656 if (ioread32(priv->regs + MWL8K_HIU_INT_CODE)
657 == MWL8K_FWSTA_READY)
658 break;
659 udelay(1);
660 } while (--loops);
661
662 return loops ? 0 : -ETIMEDOUT;
663 }
664
665
666 /*
667 * Defines shared between transmission and reception.
668 */
669 /* HT control fields for firmware */
670 struct ewc_ht_info {
671 __le16 control1;
672 __le16 control2;
673 __le16 control3;
674 } __attribute__((packed));
675
676 /* Firmware Station database operations */
677 #define MWL8K_STA_DB_ADD_ENTRY 0
678 #define MWL8K_STA_DB_MODIFY_ENTRY 1
679 #define MWL8K_STA_DB_DEL_ENTRY 2
680 #define MWL8K_STA_DB_FLUSH 3
681
682 /* Peer Entry flags - used to define the type of the peer node */
683 #define MWL8K_PEER_TYPE_ACCESSPOINT 2
684 #define MWL8K_PEER_TYPE_ADHOC_STATION 4
685
686 #define MWL8K_IEEE_LEGACY_DATA_RATES 12
687 #define MWL8K_MCS_BITMAP_SIZE 16
688 #define pad_size 16
689
690 struct peer_capability_info {
691 /* Peer type - AP vs. STA. */
692 __u8 peer_type;
693
694 /* Basic 802.11 capabilities from assoc resp. */
695 __le16 basic_caps;
696
697 /* Set if peer supports 802.11n high throughput (HT). */
698 __u8 ht_support;
699
700 /* Valid if HT is supported. */
701 __le16 ht_caps;
702 __u8 extended_ht_caps;
703 struct ewc_ht_info ewc_info;
704
705 /* Legacy rate table. Intersection of our rates and peer rates. */
706 __u8 legacy_rates[MWL8K_IEEE_LEGACY_DATA_RATES];
707
708 /* HT rate table. Intersection of our rates and peer rates. */
709 __u8 ht_rates[MWL8K_MCS_BITMAP_SIZE];
710 __u8 pad[pad_size];
711
712 /* If set, interoperability mode, no proprietary extensions. */
713 __u8 interop;
714 __u8 pad2;
715 __u8 station_id;
716 __le16 amsdu_enabled;
717 } __attribute__((packed));
718
719 /* Inline functions to manipulate QoS field in data descriptor. */
720 static inline u16 mwl8k_qos_setbit_tid(u16 qos, u8 tid)
721 {
722 u16 val_mask = 0x000f;
723 u16 qos_mask = ~val_mask;
724
725 /* TID bits 0-3 */
726 return (qos & qos_mask) | (tid & val_mask);
727 }
728
729 static inline u16 mwl8k_qos_setbit_eosp(u16 qos)
730 {
731 u16 val_mask = 1 << 4;
732
733 /* End of Service Period Bit 4 */
734 return qos | val_mask;
735 }
736
737 static inline u16 mwl8k_qos_setbit_ack(u16 qos, u8 ack_policy)
738 {
739 u16 val_mask = 0x3;
740 u8 shift = 5;
741 u16 qos_mask = ~(val_mask << shift);
742
743 /* Ack Policy Bit 5-6 */
744 return (qos & qos_mask) | ((ack_policy & val_mask) << shift);
745 }
746
747 static inline u16 mwl8k_qos_setbit_amsdu(u16 qos)
748 {
749 u16 val_mask = 1 << 7;
750
751 /* AMSDU present Bit 7 */
752 return qos | val_mask;
753 }
754
755 static inline u16 mwl8k_qos_setbit_qlen(u16 qos, u8 len)
756 {
757 u16 val_mask = 0xff;
758 u8 shift = 8;
759 u16 qos_mask = ~(val_mask << shift);
760
761 /* Queue Length Bits 8-15 */
762 return (qos & qos_mask) | ((len & val_mask) << shift);
763 }
764
765 /* DMA header used by firmware and hardware. */
766 struct mwl8k_dma_data {
767 __le16 fwlen;
768 struct ieee80211_hdr wh;
769 } __attribute__((packed));
770
771 /* Routines to add/remove DMA header from skb. */
772 static inline int mwl8k_remove_dma_header(struct sk_buff *skb)
773 {
774 struct mwl8k_dma_data *tr = (struct mwl8k_dma_data *)(skb->data);
775 void *dst, *src = &tr->wh;
776 __le16 fc = tr->wh.frame_control;
777 int hdrlen = ieee80211_hdrlen(fc);
778 u16 space = sizeof(struct mwl8k_dma_data) - hdrlen;
779
780 dst = (void *)tr + space;
781 if (dst != src) {
782 memmove(dst, src, hdrlen);
783 skb_pull(skb, space);
784 }
785
786 return 0;
787 }
788
789 static inline struct sk_buff *mwl8k_add_dma_header(struct sk_buff *skb)
790 {
791 struct ieee80211_hdr *wh;
792 u32 hdrlen, pktlen;
793 struct mwl8k_dma_data *tr;
794
795 wh = (struct ieee80211_hdr *)skb->data;
796 hdrlen = ieee80211_hdrlen(wh->frame_control);
797 pktlen = skb->len;
798
799 /*
800 * Copy up/down the 802.11 header; the firmware requires
801 * we present a 2-byte payload length followed by a
802 * 4-address header (w/o QoS), followed (optionally) by
803 * any WEP/ExtIV header (but only filled in for CCMP).
804 */
805 if (hdrlen != sizeof(struct mwl8k_dma_data))
806 skb_push(skb, sizeof(struct mwl8k_dma_data) - hdrlen);
807
808 tr = (struct mwl8k_dma_data *)skb->data;
809 if (wh != &tr->wh)
810 memmove(&tr->wh, wh, hdrlen);
811
812 /* Clear addr4 */
813 memset(tr->wh.addr4, 0, IEEE80211_ADDR_LEN);
814
815 /*
816 * Firmware length is the length of the fully formed "802.11
817 * payload". That is, everything except for the 802.11 header.
818 * This includes all crypto material including the MIC.
819 */
820 tr->fwlen = cpu_to_le16(pktlen - hdrlen);
821
822 return skb;
823 }
824
825
826 /*
827 * Packet reception.
828 */
829 #define MWL8K_RX_CTRL_KEY_INDEX_MASK 0x30
830 #define MWL8K_RX_CTRL_OWNED_BY_HOST 0x02
831 #define MWL8K_RX_CTRL_AMPDU 0x01
832
833 struct mwl8k_rx_desc {
834 __le16 pkt_len;
835 __u8 link_quality;
836 __u8 noise_level;
837 __le32 pkt_phys_addr;
838 __le32 next_rx_desc_phys_addr;
839 __le16 qos_control;
840 __le16 rate_info;
841 __le32 pad0[4];
842 __u8 rssi;
843 __u8 channel;
844 __le16 pad1;
845 __u8 rx_ctrl;
846 __u8 rx_status;
847 __u8 pad2[2];
848 } __attribute__((packed));
849
850 #define MWL8K_RX_DESCS 256
851 #define MWL8K_RX_MAXSZ 3800
852
853 static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
854 {
855 struct mwl8k_priv *priv = hw->priv;
856 struct mwl8k_rx_queue *rxq = priv->rxq + index;
857 int size;
858 int i;
859
860 rxq->rx_desc_count = 0;
861 rxq->rx_head = 0;
862 rxq->rx_tail = 0;
863
864 size = MWL8K_RX_DESCS * sizeof(struct mwl8k_rx_desc);
865
866 rxq->rx_desc_area =
867 pci_alloc_consistent(priv->pdev, size, &rxq->rx_desc_dma);
868 if (rxq->rx_desc_area == NULL) {
869 printk(KERN_ERR "%s: failed to alloc RX descriptors\n",
870 priv->name);
871 return -ENOMEM;
872 }
873 memset(rxq->rx_desc_area, 0, size);
874
875 rxq->rx_skb = kmalloc(MWL8K_RX_DESCS *
876 sizeof(*rxq->rx_skb), GFP_KERNEL);
877 if (rxq->rx_skb == NULL) {
878 printk(KERN_ERR "%s: failed to alloc RX skbuff list\n",
879 priv->name);
880 pci_free_consistent(priv->pdev, size,
881 rxq->rx_desc_area, rxq->rx_desc_dma);
882 return -ENOMEM;
883 }
884 memset(rxq->rx_skb, 0, MWL8K_RX_DESCS * sizeof(*rxq->rx_skb));
885
886 for (i = 0; i < MWL8K_RX_DESCS; i++) {
887 struct mwl8k_rx_desc *rx_desc;
888 int nexti;
889
890 rx_desc = rxq->rx_desc_area + i;
891 nexti = (i + 1) % MWL8K_RX_DESCS;
892
893 rx_desc->next_rx_desc_phys_addr =
894 cpu_to_le32(rxq->rx_desc_dma
895 + nexti * sizeof(*rx_desc));
896 rx_desc->rx_ctrl =
897 cpu_to_le32(MWL8K_RX_CTRL_OWNED_BY_HOST);
898 }
899
900 return 0;
901 }
902
903 static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
904 {
905 struct mwl8k_priv *priv = hw->priv;
906 struct mwl8k_rx_queue *rxq = priv->rxq + index;
907 int refilled;
908
909 refilled = 0;
910 while (rxq->rx_desc_count < MWL8K_RX_DESCS && limit--) {
911 struct sk_buff *skb;
912 int rx;
913
914 skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
915 if (skb == NULL)
916 break;
917
918 rxq->rx_desc_count++;
919
920 rx = rxq->rx_tail;
921 rxq->rx_tail = (rx + 1) % MWL8K_RX_DESCS;
922
923 rxq->rx_desc_area[rx].pkt_phys_addr =
924 cpu_to_le32(pci_map_single(priv->pdev, skb->data,
925 MWL8K_RX_MAXSZ, DMA_FROM_DEVICE));
926
927 rxq->rx_desc_area[rx].pkt_len = cpu_to_le16(MWL8K_RX_MAXSZ);
928 rxq->rx_skb[rx] = skb;
929 wmb();
930 rxq->rx_desc_area[rx].rx_ctrl = 0;
931
932 refilled++;
933 }
934
935 return refilled;
936 }
937
938 /* Must be called only when the card's reception is completely halted */
939 static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
940 {
941 struct mwl8k_priv *priv = hw->priv;
942 struct mwl8k_rx_queue *rxq = priv->rxq + index;
943 int i;
944
945 for (i = 0; i < MWL8K_RX_DESCS; i++) {
946 if (rxq->rx_skb[i] != NULL) {
947 unsigned long addr;
948
949 addr = le32_to_cpu(rxq->rx_desc_area[i].pkt_phys_addr);
950 pci_unmap_single(priv->pdev, addr, MWL8K_RX_MAXSZ,
951 PCI_DMA_FROMDEVICE);
952 kfree_skb(rxq->rx_skb[i]);
953 rxq->rx_skb[i] = NULL;
954 }
955 }
956
957 kfree(rxq->rx_skb);
958 rxq->rx_skb = NULL;
959
960 pci_free_consistent(priv->pdev,
961 MWL8K_RX_DESCS * sizeof(struct mwl8k_rx_desc),
962 rxq->rx_desc_area, rxq->rx_desc_dma);
963 rxq->rx_desc_area = NULL;
964 }
965
966
967 /*
968 * Scan a list of BSSIDs to process for finalize join.
969 * Allows for extension to process multiple BSSIDs.
970 */
971 static inline int
972 mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
973 {
974 return priv->capture_beacon &&
975 ieee80211_is_beacon(wh->frame_control) &&
976 !compare_ether_addr(wh->addr3, priv->capture_bssid);
977 }
978
979 static inline void mwl8k_save_beacon(struct mwl8k_priv *priv,
980 struct sk_buff *skb)
981 {
982 priv->capture_beacon = false;
983 memset(priv->capture_bssid, 0, IEEE80211_ADDR_LEN);
984
985 /*
986 * Use GFP_ATOMIC as rxq_process is called from
987 * the primary interrupt handler, memory allocation call
988 * must not sleep.
989 */
990 priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
991 if (priv->beacon_skb != NULL)
992 queue_work(priv->config_wq,
993 &priv->finalize_join_worker);
994 }
995
996 static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
997 {
998 struct mwl8k_priv *priv = hw->priv;
999 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1000 int processed;
1001
1002 processed = 0;
1003 while (rxq->rx_desc_count && limit--) {
1004 struct mwl8k_rx_desc *rx_desc;
1005 struct sk_buff *skb;
1006 struct ieee80211_rx_status status;
1007 unsigned long addr;
1008 struct ieee80211_hdr *wh;
1009
1010 rx_desc = rxq->rx_desc_area + rxq->rx_head;
1011 if (!(rx_desc->rx_ctrl & MWL8K_RX_CTRL_OWNED_BY_HOST))
1012 break;
1013 rmb();
1014
1015 skb = rxq->rx_skb[rxq->rx_head];
1016 rxq->rx_skb[rxq->rx_head] = NULL;
1017
1018 rxq->rx_head = (rxq->rx_head + 1) % MWL8K_RX_DESCS;
1019 rxq->rx_desc_count--;
1020
1021 addr = le32_to_cpu(rx_desc->pkt_phys_addr);
1022 pci_unmap_single(priv->pdev, addr,
1023 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
1024
1025 skb_put(skb, le16_to_cpu(rx_desc->pkt_len));
1026 if (mwl8k_remove_dma_header(skb)) {
1027 dev_kfree_skb(skb);
1028 continue;
1029 }
1030
1031 wh = (struct ieee80211_hdr *)skb->data;
1032
1033 /*
1034 * Check for pending join operation. save a copy of
1035 * the beacon and schedule a tasklet to send finalize
1036 * join command to the firmware.
1037 */
1038 if (mwl8k_capture_bssid(priv, wh))
1039 mwl8k_save_beacon(priv, skb);
1040
1041 memset(&status, 0, sizeof(status));
1042 status.mactime = 0;
1043 status.signal = -rx_desc->rssi;
1044 status.noise = -rx_desc->noise_level;
1045 status.qual = rx_desc->link_quality;
1046 status.antenna = 1;
1047 status.rate_idx = 1;
1048 status.flag = 0;
1049 status.band = IEEE80211_BAND_2GHZ;
1050 status.freq = ieee80211_channel_to_frequency(rx_desc->channel);
1051 ieee80211_rx_irqsafe(hw, skb, &status);
1052
1053 processed++;
1054 }
1055
1056 return processed;
1057 }
1058
1059
1060 /*
1061 * Packet transmission.
1062 */
1063
1064 /* Transmit queue assignment. */
1065 enum {
1066 MWL8K_WME_AC_BK = 0, /* background access */
1067 MWL8K_WME_AC_BE = 1, /* best effort access */
1068 MWL8K_WME_AC_VI = 2, /* video access */
1069 MWL8K_WME_AC_VO = 3, /* voice access */
1070 };
1071
1072 /* Transmit packet ACK policy */
1073 #define MWL8K_TXD_ACK_POLICY_NORMAL 0
1074 #define MWL8K_TXD_ACK_POLICY_NONE 1
1075 #define MWL8K_TXD_ACK_POLICY_NO_EXPLICIT 2
1076 #define MWL8K_TXD_ACK_POLICY_BLOCKACK 3
1077
1078 #define GET_TXQ(_ac) (\
1079 ((_ac) == WME_AC_VO) ? MWL8K_WME_AC_VO : \
1080 ((_ac) == WME_AC_VI) ? MWL8K_WME_AC_VI : \
1081 ((_ac) == WME_AC_BK) ? MWL8K_WME_AC_BK : \
1082 MWL8K_WME_AC_BE)
1083
1084 #define MWL8K_TXD_STATUS_IDLE 0x00000000
1085 #define MWL8K_TXD_STATUS_USED 0x00000001
1086 #define MWL8K_TXD_STATUS_OK 0x00000001
1087 #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
1088 #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
1089 #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
1090 #define MWL8K_TXD_STATUS_BROADCAST_TX 0x00000010
1091 #define MWL8K_TXD_STATUS_FAILED_LINK_ERROR 0x00000020
1092 #define MWL8K_TXD_STATUS_FAILED_EXCEED_LIMIT 0x00000040
1093 #define MWL8K_TXD_STATUS_FAILED_AGING 0x00000080
1094 #define MWL8K_TXD_STATUS_HOST_CMD 0x40000000
1095 #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
1096 #define MWL8K_TXD_SOFTSTALE 0x80
1097 #define MWL8K_TXD_SOFTSTALE_MGMT_RETRY 0x01
1098
1099 struct mwl8k_tx_desc {
1100 __le32 status;
1101 __u8 data_rate;
1102 __u8 tx_priority;
1103 __le16 qos_control;
1104 __le32 pkt_phys_addr;
1105 __le16 pkt_len;
1106 __u8 dest_MAC_addr[IEEE80211_ADDR_LEN];
1107 __le32 next_tx_desc_phys_addr;
1108 __le32 reserved;
1109 __le16 rate_info;
1110 __u8 peer_id;
1111 __u8 tx_frag_cnt;
1112 } __attribute__((packed));
1113
1114 #define MWL8K_TX_DESCS 128
1115
1116 static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
1117 {
1118 struct mwl8k_priv *priv = hw->priv;
1119 struct mwl8k_tx_queue *txq = priv->txq + index;
1120 int size;
1121 int i;
1122
1123 memset(&txq->tx_stats, 0,
1124 sizeof(struct ieee80211_tx_queue_stats));
1125 txq->tx_stats.limit = MWL8K_TX_DESCS;
1126 txq->tx_head = 0;
1127 txq->tx_tail = 0;
1128
1129 size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
1130
1131 txq->tx_desc_area =
1132 pci_alloc_consistent(priv->pdev, size, &txq->tx_desc_dma);
1133 if (txq->tx_desc_area == NULL) {
1134 printk(KERN_ERR "%s: failed to alloc TX descriptors\n",
1135 priv->name);
1136 return -ENOMEM;
1137 }
1138 memset(txq->tx_desc_area, 0, size);
1139
1140 txq->tx_skb = kmalloc(MWL8K_TX_DESCS * sizeof(*txq->tx_skb),
1141 GFP_KERNEL);
1142 if (txq->tx_skb == NULL) {
1143 printk(KERN_ERR "%s: failed to alloc TX skbuff list\n",
1144 priv->name);
1145 pci_free_consistent(priv->pdev, size,
1146 txq->tx_desc_area, txq->tx_desc_dma);
1147 return -ENOMEM;
1148 }
1149 memset(txq->tx_skb, 0, MWL8K_TX_DESCS * sizeof(*txq->tx_skb));
1150
1151 for (i = 0; i < MWL8K_TX_DESCS; i++) {
1152 struct mwl8k_tx_desc *tx_desc;
1153 int nexti;
1154
1155 tx_desc = txq->tx_desc_area + i;
1156 nexti = (i + 1) % MWL8K_TX_DESCS;
1157
1158 tx_desc->status = 0;
1159 tx_desc->next_tx_desc_phys_addr =
1160 cpu_to_le32(txq->tx_desc_dma +
1161 nexti * sizeof(*tx_desc));
1162 }
1163
1164 return 0;
1165 }
1166
1167 static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
1168 {
1169 iowrite32(MWL8K_H2A_INT_PPA_READY,
1170 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1171 iowrite32(MWL8K_H2A_INT_DUMMY,
1172 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1173 ioread32(priv->regs + MWL8K_HIU_INT_CODE);
1174 }
1175
1176 static inline int mwl8k_txq_busy(struct mwl8k_priv *priv)
1177 {
1178 return priv->pending_tx_pkts;
1179 }
1180
1181 struct mwl8k_txq_info {
1182 u32 fw_owned;
1183 u32 drv_owned;
1184 u32 unused;
1185 u32 len;
1186 u32 head;
1187 u32 tail;
1188 };
1189
1190 static int mwl8k_scan_tx_ring(struct mwl8k_priv *priv,
1191 struct mwl8k_txq_info txinfo[],
1192 u32 num_queues)
1193 {
1194 int count, desc, status;
1195 struct mwl8k_tx_queue *txq;
1196 struct mwl8k_tx_desc *tx_desc;
1197 int ndescs = 0;
1198
1199 memset(txinfo, 0, num_queues * sizeof(struct mwl8k_txq_info));
1200 spin_lock_bh(&priv->tx_lock);
1201 for (count = 0; count < num_queues; count++) {
1202 txq = priv->txq + count;
1203 txinfo[count].len = txq->tx_stats.len;
1204 txinfo[count].head = txq->tx_head;
1205 txinfo[count].tail = txq->tx_tail;
1206 for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
1207 tx_desc = txq->tx_desc_area + desc;
1208 status = le32_to_cpu(tx_desc->status);
1209
1210 if (status & MWL8K_TXD_STATUS_FW_OWNED)
1211 txinfo[count].fw_owned++;
1212 else
1213 txinfo[count].drv_owned++;
1214
1215 if (tx_desc->pkt_len == 0)
1216 txinfo[count].unused++;
1217 }
1218 }
1219 spin_unlock_bh(&priv->tx_lock);
1220
1221 return ndescs;
1222 }
1223
1224 static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw, u32 delay_ms)
1225 {
1226 u32 count = 0;
1227 unsigned long timeout = 0;
1228 struct mwl8k_priv *priv = hw->priv;
1229 DECLARE_COMPLETION_ONSTACK(cmd_wait);
1230
1231 might_sleep();
1232
1233 if (priv->tx_wait != NULL)
1234 printk(KERN_ERR "WARNING Previous TXWaitEmpty instance\n");
1235
1236 spin_lock_bh(&priv->tx_lock);
1237 count = mwl8k_txq_busy(priv);
1238 if (count) {
1239 priv->tx_wait = &cmd_wait;
1240 if (priv->radio_state)
1241 mwl8k_tx_start(priv);
1242 }
1243 spin_unlock_bh(&priv->tx_lock);
1244
1245 if (count) {
1246 struct mwl8k_txq_info txinfo[4];
1247 int index;
1248 int newcount;
1249
1250 timeout = wait_for_completion_timeout(&cmd_wait,
1251 msecs_to_jiffies(delay_ms));
1252 if (timeout)
1253 return 0;
1254
1255 spin_lock_bh(&priv->tx_lock);
1256 priv->tx_wait = NULL;
1257 newcount = mwl8k_txq_busy(priv);
1258 spin_unlock_bh(&priv->tx_lock);
1259
1260 printk(KERN_ERR "%s(%u) TIMEDOUT:%ums Pend:%u-->%u\n",
1261 __func__, __LINE__, delay_ms, count, newcount);
1262
1263 mwl8k_scan_tx_ring(priv, txinfo, 4);
1264 for (index = 0 ; index < 4; index++)
1265 printk(KERN_ERR
1266 "TXQ:%u L:%u H:%u T:%u FW:%u DRV:%u U:%u\n",
1267 index,
1268 txinfo[index].len,
1269 txinfo[index].head,
1270 txinfo[index].tail,
1271 txinfo[index].fw_owned,
1272 txinfo[index].drv_owned,
1273 txinfo[index].unused);
1274 return -ETIMEDOUT;
1275 }
1276
1277 return 0;
1278 }
1279
1280 #define MWL8K_TXD_OK (MWL8K_TXD_STATUS_OK | \
1281 MWL8K_TXD_STATUS_OK_RETRY | \
1282 MWL8K_TXD_STATUS_OK_MORE_RETRY)
1283 #define MWL8K_TXD_SUCCESS(stat) ((stat) & MWL8K_TXD_OK)
1284 #define MWL8K_TXD_FAIL_RETRY(stat) \
1285 ((stat) & (MWL8K_TXD_STATUS_FAILED_EXCEED_LIMIT))
1286
1287 static void mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int force)
1288 {
1289 struct mwl8k_priv *priv = hw->priv;
1290 struct mwl8k_tx_queue *txq = priv->txq + index;
1291 int wake = 0;
1292
1293 while (txq->tx_stats.len > 0) {
1294 int tx;
1295 int rc;
1296 struct mwl8k_tx_desc *tx_desc;
1297 unsigned long addr;
1298 size_t size;
1299 struct sk_buff *skb;
1300 struct ieee80211_tx_info *info;
1301 u32 status;
1302
1303 rc = 0;
1304 tx = txq->tx_head;
1305 tx_desc = txq->tx_desc_area + tx;
1306
1307 status = le32_to_cpu(tx_desc->status);
1308
1309 if (status & MWL8K_TXD_STATUS_FW_OWNED) {
1310 if (!force)
1311 break;
1312 tx_desc->status &=
1313 ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
1314 }
1315
1316 txq->tx_head = (tx + 1) % MWL8K_TX_DESCS;
1317 BUG_ON(txq->tx_stats.len == 0);
1318 txq->tx_stats.len--;
1319 priv->pending_tx_pkts--;
1320
1321 addr = le32_to_cpu(tx_desc->pkt_phys_addr);
1322 size = (u32)(le16_to_cpu(tx_desc->pkt_len));
1323 skb = txq->tx_skb[tx].skb;
1324 txq->tx_skb[tx].skb = NULL;
1325
1326 BUG_ON(skb == NULL);
1327 pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
1328
1329 rc = mwl8k_remove_dma_header(skb);
1330
1331 /* Mark descriptor as unused */
1332 tx_desc->pkt_phys_addr = 0;
1333 tx_desc->pkt_len = 0;
1334
1335 if (txq->tx_skb[tx].clone) {
1336 /* Replace with original skb
1337 * before returning to stack
1338 * as buffer has been cloned
1339 */
1340 dev_kfree_skb(skb);
1341 skb = txq->tx_skb[tx].clone;
1342 txq->tx_skb[tx].clone = NULL;
1343 }
1344
1345 if (rc) {
1346 /* Something has gone wrong here.
1347 * Failed to remove DMA header.
1348 * Print error message and drop packet.
1349 */
1350 printk(KERN_ERR "%s: Error removing DMA header from "
1351 "tx skb 0x%p.\n", priv->name, skb);
1352
1353 dev_kfree_skb(skb);
1354 continue;
1355 }
1356
1357 info = IEEE80211_SKB_CB(skb);
1358 ieee80211_tx_info_clear_status(info);
1359
1360 /* Convert firmware status stuff into tx_status */
1361 if (MWL8K_TXD_SUCCESS(status)) {
1362 /* Transmit OK */
1363 info->flags |= IEEE80211_TX_STAT_ACK;
1364 }
1365
1366 ieee80211_tx_status_irqsafe(hw, skb);
1367
1368 wake = !priv->inconfig && priv->radio_state;
1369 }
1370
1371 if (wake)
1372 ieee80211_wake_queue(hw, index);
1373 }
1374
1375 /* must be called only when the card's transmit is completely halted */
1376 static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
1377 {
1378 struct mwl8k_priv *priv = hw->priv;
1379 struct mwl8k_tx_queue *txq = priv->txq + index;
1380
1381 mwl8k_txq_reclaim(hw, index, 1);
1382
1383 kfree(txq->tx_skb);
1384 txq->tx_skb = NULL;
1385
1386 pci_free_consistent(priv->pdev,
1387 MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
1388 txq->tx_desc_area, txq->tx_desc_dma);
1389 txq->tx_desc_area = NULL;
1390 }
1391
1392 static int
1393 mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
1394 {
1395 struct mwl8k_priv *priv = hw->priv;
1396 struct ieee80211_tx_info *tx_info;
1397 struct ieee80211_hdr *wh;
1398 struct mwl8k_tx_queue *txq;
1399 struct mwl8k_tx_desc *tx;
1400 struct mwl8k_dma_data *tr;
1401 struct mwl8k_vif *mwl8k_vif;
1402 struct sk_buff *org_skb = skb;
1403 dma_addr_t dma;
1404 u16 qos = 0;
1405 bool qosframe = false, ampduframe = false;
1406 bool mcframe = false, eapolframe = false;
1407 bool amsduframe = false;
1408 __le16 fc;
1409
1410 txq = priv->txq + index;
1411 tx = txq->tx_desc_area + txq->tx_tail;
1412
1413 BUG_ON(txq->tx_skb[txq->tx_tail].skb != NULL);
1414
1415 /*
1416 * Append HW DMA header to start of packet. Drop packet if
1417 * there is not enough space or a failure to unshare/unclone
1418 * the skb.
1419 */
1420 skb = mwl8k_add_dma_header(skb);
1421
1422 if (skb == NULL) {
1423 printk(KERN_DEBUG "%s: failed to prepend HW DMA "
1424 "header, dropping TX frame.\n", priv->name);
1425 dev_kfree_skb(org_skb);
1426 return NETDEV_TX_OK;
1427 }
1428
1429 tx_info = IEEE80211_SKB_CB(skb);
1430 mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
1431 tr = (struct mwl8k_dma_data *)skb->data;
1432 wh = &tr->wh;
1433 fc = wh->frame_control;
1434 qosframe = ieee80211_is_data_qos(fc);
1435 mcframe = is_multicast_ether_addr(wh->addr1);
1436 ampduframe = !!(tx_info->flags & IEEE80211_TX_CTL_AMPDU);
1437
1438 if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1439 u16 seqno = mwl8k_vif->seqno;
1440 wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1441 wh->seq_ctrl |= cpu_to_le16(seqno << 4);
1442 mwl8k_vif->seqno = seqno++ % 4096;
1443 }
1444
1445 if (qosframe)
1446 qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
1447
1448 dma = pci_map_single(priv->pdev, skb->data,
1449 skb->len, PCI_DMA_TODEVICE);
1450
1451 if (pci_dma_mapping_error(priv->pdev, dma)) {
1452 printk(KERN_DEBUG "%s: failed to dma map skb, "
1453 "dropping TX frame.\n", priv->name);
1454
1455 if (org_skb != NULL)
1456 dev_kfree_skb(org_skb);
1457 if (skb != NULL)
1458 dev_kfree_skb(skb);
1459 return NETDEV_TX_OK;
1460 }
1461
1462 /* Set desc header, cpu bit order. */
1463 tx->status = 0;
1464 tx->data_rate = 0;
1465 tx->tx_priority = index;
1466 tx->qos_control = 0;
1467 tx->rate_info = 0;
1468 tx->peer_id = mwl8k_vif->peer_id;
1469
1470 amsduframe = !!(qos & IEEE80211_QOS_CONTROL_A_MSDU_PRESENT);
1471
1472 /* Setup firmware control bit fields for each frame type. */
1473 if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc)) {
1474 tx->data_rate = 0;
1475 qos = mwl8k_qos_setbit_eosp(qos);
1476 /* Set Queue size to unspecified */
1477 qos = mwl8k_qos_setbit_qlen(qos, 0xff);
1478 } else if (ieee80211_is_data(fc)) {
1479 tx->data_rate = 1;
1480 if (mcframe)
1481 tx->status |= MWL8K_TXD_STATUS_MULTICAST_TX;
1482
1483 /*
1484 * Tell firmware to not send EAPOL pkts in an
1485 * aggregate. Verify against mac80211 tx path. If
1486 * stack turns off AMPDU for an EAPOL frame this
1487 * check will be removed.
1488 */
1489 if (eapolframe) {
1490 qos = mwl8k_qos_setbit_ack(qos,
1491 MWL8K_TXD_ACK_POLICY_NORMAL);
1492 } else {
1493 /* Send pkt in an aggregate if AMPDU frame. */
1494 if (ampduframe)
1495 qos = mwl8k_qos_setbit_ack(qos,
1496 MWL8K_TXD_ACK_POLICY_BLOCKACK);
1497 else
1498 qos = mwl8k_qos_setbit_ack(qos,
1499 MWL8K_TXD_ACK_POLICY_NORMAL);
1500
1501 if (amsduframe)
1502 qos = mwl8k_qos_setbit_amsdu(qos);
1503 }
1504 }
1505
1506 /* Convert to little endian */
1507 tx->qos_control = cpu_to_le16(qos);
1508 tx->status = cpu_to_le32(tx->status);
1509 tx->pkt_phys_addr = cpu_to_le32(dma);
1510 tx->pkt_len = cpu_to_le16(skb->len);
1511
1512 txq->tx_skb[txq->tx_tail].skb = skb;
1513 txq->tx_skb[txq->tx_tail].clone =
1514 skb == org_skb ? NULL : org_skb;
1515
1516 spin_lock_bh(&priv->tx_lock);
1517
1518 tx->status = cpu_to_le32(MWL8K_TXD_STATUS_OK |
1519 MWL8K_TXD_STATUS_FW_OWNED);
1520 wmb();
1521 txq->tx_stats.len++;
1522 priv->pending_tx_pkts++;
1523 txq->tx_stats.count++;
1524 txq->tx_tail++;
1525
1526 if (txq->tx_tail == MWL8K_TX_DESCS)
1527 txq->tx_tail = 0;
1528 if (txq->tx_head == txq->tx_tail)
1529 ieee80211_stop_queue(hw, index);
1530
1531 if (priv->inconfig) {
1532 /*
1533 * Silently queue packet when we are in the middle of
1534 * a config cycle. Notify firmware only if we are
1535 * waiting for TXQs to empty. If a packet is sent
1536 * before .config() is complete, perhaps it is better
1537 * to drop the packet, as the channel is being changed
1538 * and the packet will end up on the wrong channel.
1539 */
1540 printk(KERN_ERR "%s(): WARNING TX activity while "
1541 "in config\n", __func__);
1542
1543 if (priv->tx_wait != NULL)
1544 mwl8k_tx_start(priv);
1545 } else
1546 mwl8k_tx_start(priv);
1547
1548 spin_unlock_bh(&priv->tx_lock);
1549
1550 return NETDEV_TX_OK;
1551 }
1552
1553
1554 /*
1555 * Command processing.
1556 */
1557
1558 /* Timeout firmware commands after 2000ms */
1559 #define MWL8K_CMD_TIMEOUT_MS 2000
1560
1561 static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
1562 {
1563 DECLARE_COMPLETION_ONSTACK(cmd_wait);
1564 struct mwl8k_priv *priv = hw->priv;
1565 void __iomem *regs = priv->regs;
1566 dma_addr_t dma_addr;
1567 unsigned int dma_size;
1568 int rc;
1569 u16 __iomem *result;
1570 unsigned long timeout = 0;
1571 u8 buf[32];
1572
1573 cmd->result = 0xFFFF;
1574 dma_size = le16_to_cpu(cmd->length);
1575 dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
1576 PCI_DMA_BIDIRECTIONAL);
1577 if (pci_dma_mapping_error(priv->pdev, dma_addr))
1578 return -ENOMEM;
1579
1580 if (priv->hostcmd_wait != NULL)
1581 printk(KERN_ERR "WARNING host command in progress\n");
1582
1583 spin_lock_irq(&priv->fw_lock);
1584 priv->hostcmd_wait = &cmd_wait;
1585 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
1586 iowrite32(MWL8K_H2A_INT_DOORBELL,
1587 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1588 iowrite32(MWL8K_H2A_INT_DUMMY,
1589 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1590 spin_unlock_irq(&priv->fw_lock);
1591
1592 timeout = wait_for_completion_timeout(&cmd_wait,
1593 msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
1594
1595 result = &cmd->result;
1596 if (!timeout) {
1597 spin_lock_irq(&priv->fw_lock);
1598 priv->hostcmd_wait = NULL;
1599 spin_unlock_irq(&priv->fw_lock);
1600 printk(KERN_ERR "%s: Command %s timeout after %u ms\n",
1601 priv->name,
1602 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1603 MWL8K_CMD_TIMEOUT_MS);
1604 rc = -ETIMEDOUT;
1605 } else {
1606 rc = *result ? -EINVAL : 0;
1607 if (rc)
1608 printk(KERN_ERR "%s: Command %s error 0x%x\n",
1609 priv->name,
1610 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1611 *result);
1612 }
1613
1614 pci_unmap_single(priv->pdev, dma_addr, dma_size,
1615 PCI_DMA_BIDIRECTIONAL);
1616 return rc;
1617 }
1618
1619 /*
1620 * GET_HW_SPEC.
1621 */
1622 struct mwl8k_cmd_get_hw_spec {
1623 struct mwl8k_cmd_pkt header;
1624 __u8 hw_rev;
1625 __u8 host_interface;
1626 __le16 num_mcaddrs;
1627 __u8 perm_addr[IEEE80211_ADDR_LEN];
1628 __le16 region_code;
1629 __le32 fw_rev;
1630 __le32 ps_cookie;
1631 __le32 caps;
1632 __u8 mcs_bitmap[16];
1633 __le32 rx_queue_ptr;
1634 __le32 num_tx_queues;
1635 __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
1636 __le32 caps2;
1637 __le32 num_tx_desc_per_queue;
1638 __le32 total_rx_desc;
1639 } __attribute__((packed));
1640
1641 static int mwl8k_cmd_get_hw_spec(struct ieee80211_hw *hw)
1642 {
1643 struct mwl8k_priv *priv = hw->priv;
1644 struct mwl8k_cmd_get_hw_spec *cmd;
1645 int rc;
1646 int i;
1647
1648 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1649 if (cmd == NULL)
1650 return -ENOMEM;
1651
1652 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
1653 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1654
1655 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
1656 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1657 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rx_desc_dma);
1658 cmd->num_tx_queues = MWL8K_TX_QUEUES;
1659 for (i = 0; i < MWL8K_TX_QUEUES; i++)
1660 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].tx_desc_dma);
1661 cmd->num_tx_desc_per_queue = MWL8K_TX_DESCS;
1662 cmd->total_rx_desc = MWL8K_RX_DESCS;
1663
1664 rc = mwl8k_post_cmd(hw, &cmd->header);
1665
1666 if (!rc) {
1667 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
1668 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
1669 priv->fw_rev = cmd->fw_rev;
1670 priv->hw_rev = cmd->hw_rev;
1671 priv->region_code = le16_to_cpu(cmd->region_code);
1672 }
1673
1674 kfree(cmd);
1675 return rc;
1676 }
1677
1678 /*
1679 * CMD_MAC_MULTICAST_ADR.
1680 */
1681 struct mwl8k_cmd_mac_multicast_adr {
1682 struct mwl8k_cmd_pkt header;
1683 __le16 action;
1684 __le16 numaddr;
1685 __u8 addr[1][IEEE80211_ADDR_LEN];
1686 };
1687
1688 #define MWL8K_ENABLE_RX_MULTICAST 0x000F
1689 static int mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw,
1690 int mc_count,
1691 struct dev_addr_list *mclist)
1692 {
1693 struct mwl8k_cmd_mac_multicast_adr *cmd;
1694 int index = 0;
1695 int rc;
1696 int size = sizeof(*cmd) + ((mc_count - 1) * IEEE80211_ADDR_LEN);
1697 cmd = kzalloc(size, GFP_KERNEL);
1698 if (cmd == NULL)
1699 return -ENOMEM;
1700
1701 cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
1702 cmd->header.length = cpu_to_le16(size);
1703 cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
1704 cmd->numaddr = cpu_to_le16(mc_count);
1705 while ((index < mc_count) && mclist) {
1706 if (mclist->da_addrlen != IEEE80211_ADDR_LEN) {
1707 rc = -EINVAL;
1708 goto mwl8k_cmd_mac_multicast_adr_exit;
1709 }
1710 memcpy(cmd->addr[index], mclist->da_addr, IEEE80211_ADDR_LEN);
1711 index++;
1712 mclist = mclist->next;
1713 }
1714
1715 rc = mwl8k_post_cmd(hw, &cmd->header);
1716
1717 mwl8k_cmd_mac_multicast_adr_exit:
1718 kfree(cmd);
1719 return rc;
1720 }
1721
1722 /*
1723 * CMD_802_11_GET_STAT.
1724 */
1725 struct mwl8k_cmd_802_11_get_stat {
1726 struct mwl8k_cmd_pkt header;
1727 __le16 action;
1728 __le32 stats[64];
1729 } __attribute__((packed));
1730
1731 #define MWL8K_STAT_ACK_FAILURE 9
1732 #define MWL8K_STAT_RTS_FAILURE 12
1733 #define MWL8K_STAT_FCS_ERROR 24
1734 #define MWL8K_STAT_RTS_SUCCESS 11
1735
1736 static int mwl8k_cmd_802_11_get_stat(struct ieee80211_hw *hw,
1737 struct ieee80211_low_level_stats *stats)
1738 {
1739 struct mwl8k_cmd_802_11_get_stat *cmd;
1740 int rc;
1741
1742 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1743 if (cmd == NULL)
1744 return -ENOMEM;
1745
1746 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
1747 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1748 cmd->action = cpu_to_le16(MWL8K_CMD_GET);
1749
1750 rc = mwl8k_post_cmd(hw, &cmd->header);
1751 if (!rc) {
1752 stats->dot11ACKFailureCount =
1753 le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
1754 stats->dot11RTSFailureCount =
1755 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
1756 stats->dot11FCSErrorCount =
1757 le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
1758 stats->dot11RTSSuccessCount =
1759 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
1760 }
1761 kfree(cmd);
1762
1763 return rc;
1764 }
1765
1766 /*
1767 * CMD_802_11_RADIO_CONTROL.
1768 */
1769 struct mwl8k_cmd_802_11_radio_control {
1770 struct mwl8k_cmd_pkt header;
1771 __le16 action;
1772 __le16 control;
1773 __le16 radio_on;
1774 } __attribute__((packed));
1775
1776 static int mwl8k_cmd_802_11_radio_control(struct ieee80211_hw *hw, int enable)
1777 {
1778 struct mwl8k_priv *priv = hw->priv;
1779 struct mwl8k_cmd_802_11_radio_control *cmd;
1780 int rc;
1781
1782 if (((enable & MWL8K_RADIO_ENABLE) == priv->radio_state) &&
1783 !(enable & MWL8K_RADIO_FORCE))
1784 return 0;
1785
1786 enable &= MWL8K_RADIO_ENABLE;
1787
1788 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1789 if (cmd == NULL)
1790 return -ENOMEM;
1791
1792 cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
1793 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1794 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1795 cmd->control = cpu_to_le16(priv->radio_preamble);
1796 cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
1797
1798 rc = mwl8k_post_cmd(hw, &cmd->header);
1799 kfree(cmd);
1800
1801 if (!rc)
1802 priv->radio_state = enable;
1803
1804 return rc;
1805 }
1806
1807 static int
1808 mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
1809 {
1810 struct mwl8k_priv *priv;
1811
1812 if (hw == NULL || hw->priv == NULL)
1813 return -EINVAL;
1814 priv = hw->priv;
1815
1816 priv->radio_preamble = (short_preamble ?
1817 MWL8K_RADIO_SHORT_PREAMBLE :
1818 MWL8K_RADIO_LONG_PREAMBLE);
1819
1820 return mwl8k_cmd_802_11_radio_control(hw,
1821 MWL8K_RADIO_ENABLE | MWL8K_RADIO_FORCE);
1822 }
1823
1824 /*
1825 * CMD_802_11_RF_TX_POWER.
1826 */
1827 #define MWL8K_TX_POWER_LEVEL_TOTAL 8
1828
1829 struct mwl8k_cmd_802_11_rf_tx_power {
1830 struct mwl8k_cmd_pkt header;
1831 __le16 action;
1832 __le16 support_level;
1833 __le16 current_level;
1834 __le16 reserved;
1835 __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
1836 } __attribute__((packed));
1837
1838 static int mwl8k_cmd_802_11_rf_tx_power(struct ieee80211_hw *hw, int dBm)
1839 {
1840 struct mwl8k_cmd_802_11_rf_tx_power *cmd;
1841 int rc;
1842
1843 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1844 if (cmd == NULL)
1845 return -ENOMEM;
1846
1847 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
1848 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1849 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1850 cmd->support_level = cpu_to_le16(dBm);
1851
1852 rc = mwl8k_post_cmd(hw, &cmd->header);
1853 kfree(cmd);
1854
1855 return rc;
1856 }
1857
1858 /*
1859 * CMD_SET_PRE_SCAN.
1860 */
1861 struct mwl8k_cmd_set_pre_scan {
1862 struct mwl8k_cmd_pkt header;
1863 } __attribute__((packed));
1864
1865 static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
1866 {
1867 struct mwl8k_cmd_set_pre_scan *cmd;
1868 int rc;
1869
1870 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1871 if (cmd == NULL)
1872 return -ENOMEM;
1873
1874 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
1875 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1876
1877 rc = mwl8k_post_cmd(hw, &cmd->header);
1878 kfree(cmd);
1879
1880 return rc;
1881 }
1882
1883 /*
1884 * CMD_SET_POST_SCAN.
1885 */
1886 struct mwl8k_cmd_set_post_scan {
1887 struct mwl8k_cmd_pkt header;
1888 __le32 isibss;
1889 __u8 bssid[IEEE80211_ADDR_LEN];
1890 } __attribute__((packed));
1891
1892 static int
1893 mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, __u8 mac[IEEE80211_ADDR_LEN])
1894 {
1895 struct mwl8k_cmd_set_post_scan *cmd;
1896 int rc;
1897
1898 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1899 if (cmd == NULL)
1900 return -ENOMEM;
1901
1902 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
1903 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1904 cmd->isibss = 0;
1905 memcpy(cmd->bssid, mac, IEEE80211_ADDR_LEN);
1906
1907 rc = mwl8k_post_cmd(hw, &cmd->header);
1908 kfree(cmd);
1909
1910 return rc;
1911 }
1912
1913 /*
1914 * CMD_SET_RF_CHANNEL.
1915 */
1916 struct mwl8k_cmd_set_rf_channel {
1917 struct mwl8k_cmd_pkt header;
1918 __le16 action;
1919 __u8 current_channel;
1920 __le32 channel_flags;
1921 } __attribute__((packed));
1922
1923 static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
1924 struct ieee80211_channel *channel)
1925 {
1926 struct mwl8k_cmd_set_rf_channel *cmd;
1927 int rc;
1928
1929 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1930 if (cmd == NULL)
1931 return -ENOMEM;
1932
1933 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
1934 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1935 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1936 cmd->current_channel = channel->hw_value;
1937 if (channel->band == IEEE80211_BAND_2GHZ)
1938 cmd->channel_flags = cpu_to_le32(0x00000081);
1939 else
1940 cmd->channel_flags = cpu_to_le32(0x00000000);
1941
1942 rc = mwl8k_post_cmd(hw, &cmd->header);
1943 kfree(cmd);
1944
1945 return rc;
1946 }
1947
1948 /*
1949 * CMD_SET_SLOT.
1950 */
1951 struct mwl8k_cmd_set_slot {
1952 struct mwl8k_cmd_pkt header;
1953 __le16 action;
1954 __u8 short_slot;
1955 } __attribute__((packed));
1956
1957 static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, int slot_time)
1958 {
1959 struct mwl8k_cmd_set_slot *cmd;
1960 int rc;
1961
1962 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1963 if (cmd == NULL)
1964 return -ENOMEM;
1965
1966 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
1967 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1968 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1969 cmd->short_slot = slot_time == MWL8K_SHORT_SLOTTIME ? 1 : 0;
1970
1971 rc = mwl8k_post_cmd(hw, &cmd->header);
1972 kfree(cmd);
1973
1974 return rc;
1975 }
1976
1977 /*
1978 * CMD_MIMO_CONFIG.
1979 */
1980 struct mwl8k_cmd_mimo_config {
1981 struct mwl8k_cmd_pkt header;
1982 __le32 action;
1983 __u8 rx_antenna_map;
1984 __u8 tx_antenna_map;
1985 } __attribute__((packed));
1986
1987 static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
1988 {
1989 struct mwl8k_cmd_mimo_config *cmd;
1990 int rc;
1991
1992 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1993 if (cmd == NULL)
1994 return -ENOMEM;
1995
1996 cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
1997 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1998 cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
1999 cmd->rx_antenna_map = rx;
2000 cmd->tx_antenna_map = tx;
2001
2002 rc = mwl8k_post_cmd(hw, &cmd->header);
2003 kfree(cmd);
2004
2005 return rc;
2006 }
2007
2008 /*
2009 * CMD_ENABLE_SNIFFER.
2010 */
2011 struct mwl8k_cmd_enable_sniffer {
2012 struct mwl8k_cmd_pkt header;
2013 __le32 action;
2014 } __attribute__((packed));
2015
2016 static int mwl8k_enable_sniffer(struct ieee80211_hw *hw, bool enable)
2017 {
2018 struct mwl8k_cmd_enable_sniffer *cmd;
2019 int rc;
2020
2021 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2022 if (cmd == NULL)
2023 return -ENOMEM;
2024
2025 cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
2026 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2027 cmd->action = enable ? cpu_to_le32((u32)MWL8K_CMD_SET) : 0;
2028
2029 rc = mwl8k_post_cmd(hw, &cmd->header);
2030 kfree(cmd);
2031
2032 return rc;
2033 }
2034
2035 /*
2036 * CMD_SET_RATE_ADAPT_MODE.
2037 */
2038 struct mwl8k_cmd_set_rate_adapt_mode {
2039 struct mwl8k_cmd_pkt header;
2040 __le16 action;
2041 __le16 mode;
2042 } __attribute__((packed));
2043
2044 static int mwl8k_cmd_setrateadaptmode(struct ieee80211_hw *hw, __u16 mode)
2045 {
2046 struct mwl8k_cmd_set_rate_adapt_mode *cmd;
2047 int rc;
2048
2049 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2050 if (cmd == NULL)
2051 return -ENOMEM;
2052
2053 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
2054 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2055 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2056 cmd->mode = cpu_to_le16(mode);
2057
2058 rc = mwl8k_post_cmd(hw, &cmd->header);
2059 kfree(cmd);
2060
2061 return rc;
2062 }
2063
2064 /*
2065 * CMD_SET_WMM_MODE.
2066 */
2067 struct mwl8k_cmd_set_wmm {
2068 struct mwl8k_cmd_pkt header;
2069 __le16 action;
2070 } __attribute__((packed));
2071
2072 static int mwl8k_set_wmm(struct ieee80211_hw *hw, bool enable)
2073 {
2074 struct mwl8k_priv *priv = hw->priv;
2075 struct mwl8k_cmd_set_wmm *cmd;
2076 int rc;
2077
2078 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2079 if (cmd == NULL)
2080 return -ENOMEM;
2081
2082 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
2083 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2084 cmd->action = enable ? cpu_to_le16(MWL8K_CMD_SET) : 0;
2085
2086 rc = mwl8k_post_cmd(hw, &cmd->header);
2087 kfree(cmd);
2088
2089 if (!rc)
2090 priv->wmm_mode = enable;
2091
2092 return rc;
2093 }
2094
2095 /*
2096 * CMD_SET_RTS_THRESHOLD.
2097 */
2098 struct mwl8k_cmd_rts_threshold {
2099 struct mwl8k_cmd_pkt header;
2100 __le16 action;
2101 __le16 threshold;
2102 } __attribute__((packed));
2103
2104 static int mwl8k_rts_threshold(struct ieee80211_hw *hw,
2105 u16 action, u16 *threshold)
2106 {
2107 struct mwl8k_cmd_rts_threshold *cmd;
2108 int rc;
2109
2110 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2111 if (cmd == NULL)
2112 return -ENOMEM;
2113
2114 cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
2115 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2116 cmd->action = cpu_to_le16(action);
2117 cmd->threshold = cpu_to_le16(*threshold);
2118
2119 rc = mwl8k_post_cmd(hw, &cmd->header);
2120 kfree(cmd);
2121
2122 return rc;
2123 }
2124
2125 /*
2126 * CMD_SET_EDCA_PARAMS.
2127 */
2128 struct mwl8k_cmd_set_edca_params {
2129 struct mwl8k_cmd_pkt header;
2130
2131 /* See MWL8K_SET_EDCA_XXX below */
2132 __le16 action;
2133
2134 /* TX opportunity in units of 32 us */
2135 __le16 txop;
2136
2137 /* Log exponent of max contention period: 0...15*/
2138 __u8 log_cw_max;
2139
2140 /* Log exponent of min contention period: 0...15 */
2141 __u8 log_cw_min;
2142
2143 /* Adaptive interframe spacing in units of 32us */
2144 __u8 aifs;
2145
2146 /* TX queue to configure */
2147 __u8 txq;
2148 } __attribute__((packed));
2149
2150 #define MWL8K_GET_EDCA_ALL 0
2151 #define MWL8K_SET_EDCA_CW 0x01
2152 #define MWL8K_SET_EDCA_TXOP 0x02
2153 #define MWL8K_SET_EDCA_AIFS 0x04
2154
2155 #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
2156 MWL8K_SET_EDCA_TXOP | \
2157 MWL8K_SET_EDCA_AIFS)
2158
2159 static int
2160 mwl8k_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
2161 __u16 cw_min, __u16 cw_max,
2162 __u8 aifs, __u16 txop)
2163 {
2164 struct mwl8k_cmd_set_edca_params *cmd;
2165 u32 log_cw_min, log_cw_max;
2166 int rc;
2167
2168 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2169 if (cmd == NULL)
2170 return -ENOMEM;
2171
2172 log_cw_min = ilog2(cw_min+1);
2173 log_cw_max = ilog2(cw_max+1);
2174 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
2175 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2176
2177 cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
2178 cmd->txop = cpu_to_le16(txop);
2179 cmd->log_cw_max = (u8)log_cw_max;
2180 cmd->log_cw_min = (u8)log_cw_min;
2181 cmd->aifs = aifs;
2182 cmd->txq = qnum;
2183
2184 rc = mwl8k_post_cmd(hw, &cmd->header);
2185 kfree(cmd);
2186
2187 return rc;
2188 }
2189
2190 /*
2191 * CMD_FINALIZE_JOIN.
2192 */
2193
2194 /* FJ beacon buffer size is compiled into the firmware. */
2195 #define MWL8K_FJ_BEACON_MAXLEN 128
2196
2197 struct mwl8k_cmd_finalize_join {
2198 struct mwl8k_cmd_pkt header;
2199 __le32 sleep_interval; /* Number of beacon periods to sleep */
2200 __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
2201 } __attribute__((packed));
2202
2203 static int mwl8k_finalize_join(struct ieee80211_hw *hw, void *frame,
2204 __u16 framelen, __u16 dtim)
2205 {
2206 struct mwl8k_cmd_finalize_join *cmd;
2207 struct ieee80211_mgmt *payload = frame;
2208 u16 hdrlen;
2209 u32 payload_len;
2210 int rc;
2211
2212 if (frame == NULL)
2213 return -EINVAL;
2214
2215 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2216 if (cmd == NULL)
2217 return -ENOMEM;
2218
2219 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
2220 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2221
2222 if (dtim)
2223 cmd->sleep_interval = cpu_to_le32(dtim);
2224 else
2225 cmd->sleep_interval = cpu_to_le32(1);
2226
2227 hdrlen = ieee80211_hdrlen(payload->frame_control);
2228
2229 payload_len = framelen > hdrlen ? framelen - hdrlen : 0;
2230
2231 /* XXX TBD Might just have to abort and return an error */
2232 if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
2233 printk(KERN_ERR "%s(): WARNING: Incomplete beacon "
2234 "sent to firmware. Sz=%u MAX=%u\n", __func__,
2235 payload_len, MWL8K_FJ_BEACON_MAXLEN);
2236
2237 payload_len = payload_len > MWL8K_FJ_BEACON_MAXLEN ?
2238 MWL8K_FJ_BEACON_MAXLEN : payload_len;
2239
2240 if (payload && payload_len)
2241 memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
2242
2243 rc = mwl8k_post_cmd(hw, &cmd->header);
2244 kfree(cmd);
2245 return rc;
2246 }
2247
2248 /*
2249 * CMD_UPDATE_STADB.
2250 */
2251 struct mwl8k_cmd_update_sta_db {
2252 struct mwl8k_cmd_pkt header;
2253
2254 /* See STADB_ACTION_TYPE */
2255 __le32 action;
2256
2257 /* Peer MAC address */
2258 __u8 peer_addr[IEEE80211_ADDR_LEN];
2259
2260 __le32 reserved;
2261
2262 /* Peer info - valid during add/update. */
2263 struct peer_capability_info peer_info;
2264 } __attribute__((packed));
2265
2266 static int mwl8k_cmd_update_sta_db(struct ieee80211_hw *hw,
2267 struct ieee80211_vif *vif, __u32 action)
2268 {
2269 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
2270 struct ieee80211_bss_conf *info = &mv_vif->bss_info;
2271 struct mwl8k_cmd_update_sta_db *cmd;
2272 struct peer_capability_info *peer_info;
2273 struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
2274 DECLARE_MAC_BUF(mac);
2275 int rc;
2276 __u8 count, *rates;
2277
2278 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2279 if (cmd == NULL)
2280 return -ENOMEM;
2281
2282 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
2283 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2284
2285 cmd->action = cpu_to_le32(action);
2286 peer_info = &cmd->peer_info;
2287 memcpy(cmd->peer_addr, mv_vif->bssid, IEEE80211_ADDR_LEN);
2288
2289 switch (action) {
2290 case MWL8K_STA_DB_ADD_ENTRY:
2291 case MWL8K_STA_DB_MODIFY_ENTRY:
2292 /* Build peer_info block */
2293 peer_info->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
2294 peer_info->basic_caps = cpu_to_le16(info->assoc_capability);
2295 peer_info->interop = 1;
2296 peer_info->amsdu_enabled = 0;
2297
2298 rates = peer_info->legacy_rates;
2299 for (count = 0 ; count < mv_vif->legacy_nrates; count++)
2300 rates[count] = bitrates[count].hw_value;
2301
2302 rc = mwl8k_post_cmd(hw, &cmd->header);
2303 if (rc == 0)
2304 mv_vif->peer_id = peer_info->station_id;
2305
2306 break;
2307
2308 case MWL8K_STA_DB_DEL_ENTRY:
2309 case MWL8K_STA_DB_FLUSH:
2310 default:
2311 rc = mwl8k_post_cmd(hw, &cmd->header);
2312 if (rc == 0)
2313 mv_vif->peer_id = 0;
2314 break;
2315 }
2316 kfree(cmd);
2317
2318 return rc;
2319 }
2320
2321 /*
2322 * CMD_SET_AID.
2323 */
2324 #define IEEE80211_OPMODE_DISABLED 0x00
2325 #define IEEE80211_OPMODE_NON_MEMBER_PROT_MODE 0x01
2326 #define IEEE80211_OPMODE_ONE_20MHZ_STA_PROT_MODE 0x02
2327 #define IEEE80211_OPMODE_HTMIXED_PROT_MODE 0x03
2328
2329 #define MWL8K_RATE_INDEX_MAX_ARRAY 14
2330
2331 #define MWL8K_FRAME_PROT_DISABLED 0x00
2332 #define MWL8K_FRAME_PROT_11G 0x07
2333 #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
2334 #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
2335 #define MWL8K_FRAME_PROT_MASK 0x07
2336
2337 struct mwl8k_cmd_update_set_aid {
2338 struct mwl8k_cmd_pkt header;
2339 __le16 aid;
2340
2341 /* AP's MAC address (BSSID) */
2342 __u8 bssid[IEEE80211_ADDR_LEN];
2343 __le16 protection_mode;
2344 __u8 supp_rates[MWL8K_RATE_INDEX_MAX_ARRAY];
2345 } __attribute__((packed));
2346
2347 static int mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
2348 struct ieee80211_vif *vif)
2349 {
2350 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
2351 struct ieee80211_bss_conf *info = &mv_vif->bss_info;
2352 struct mwl8k_cmd_update_set_aid *cmd;
2353 struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
2354 int count;
2355 u16 prot_mode;
2356 int rc;
2357
2358 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2359 if (cmd == NULL)
2360 return -ENOMEM;
2361
2362 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
2363 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2364 cmd->aid = cpu_to_le16(info->aid);
2365
2366 memcpy(cmd->bssid, mv_vif->bssid, IEEE80211_ADDR_LEN);
2367
2368 prot_mode = MWL8K_FRAME_PROT_DISABLED;
2369
2370 if (info->use_cts_prot) {
2371 prot_mode = MWL8K_FRAME_PROT_11G;
2372 } else {
2373 switch (info->ht.operation_mode &
2374 IEEE80211_HT_OP_MODE_PROTECTION) {
2375 case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
2376 prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
2377 break;
2378 case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
2379 prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
2380 break;
2381 default:
2382 prot_mode = MWL8K_FRAME_PROT_DISABLED;
2383 break;
2384 }
2385 }
2386
2387 cmd->protection_mode = cpu_to_le16(prot_mode);
2388
2389 for (count = 0; count < mv_vif->legacy_nrates; count++)
2390 cmd->supp_rates[count] = bitrates[count].hw_value;
2391
2392 rc = mwl8k_post_cmd(hw, &cmd->header);
2393 kfree(cmd);
2394
2395 return rc;
2396 }
2397
2398 /*
2399 * CMD_SET_RATE.
2400 */
2401 struct mwl8k_cmd_update_rateset {
2402 struct mwl8k_cmd_pkt header;
2403 __u8 legacy_rates[MWL8K_RATE_INDEX_MAX_ARRAY];
2404
2405 /* Bitmap for supported MCS codes. */
2406 __u8 mcs_set[MWL8K_IEEE_LEGACY_DATA_RATES];
2407 __u8 reserved[MWL8K_IEEE_LEGACY_DATA_RATES];
2408 } __attribute__((packed));
2409
2410 static int mwl8k_update_rateset(struct ieee80211_hw *hw,
2411 struct ieee80211_vif *vif)
2412 {
2413 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
2414 struct mwl8k_cmd_update_rateset *cmd;
2415 struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
2416 int count;
2417 int rc;
2418
2419 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2420 if (cmd == NULL)
2421 return -ENOMEM;
2422
2423 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
2424 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2425
2426 for (count = 0; count < mv_vif->legacy_nrates; count++)
2427 cmd->legacy_rates[count] = bitrates[count].hw_value;
2428
2429 rc = mwl8k_post_cmd(hw, &cmd->header);
2430 kfree(cmd);
2431
2432 return rc;
2433 }
2434
2435 /*
2436 * CMD_USE_FIXED_RATE.
2437 */
2438 #define MWL8K_RATE_TABLE_SIZE 8
2439 #define MWL8K_UCAST_RATE 0
2440 #define MWL8K_MCAST_RATE 1
2441 #define MWL8K_BCAST_RATE 2
2442
2443 #define MWL8K_USE_FIXED_RATE 0x0001
2444 #define MWL8K_USE_AUTO_RATE 0x0002
2445
2446 struct mwl8k_rate_entry {
2447 /* Set to 1 if HT rate, 0 if legacy. */
2448 __le32 is_ht_rate;
2449
2450 /* Set to 1 to use retry_count field. */
2451 __le32 enable_retry;
2452
2453 /* Specified legacy rate or MCS. */
2454 __le32 rate;
2455
2456 /* Number of allowed retries. */
2457 __le32 retry_count;
2458 } __attribute__((packed));
2459
2460 struct mwl8k_rate_table {
2461 /* 1 to allow specified rate and below */
2462 __le32 allow_rate_drop;
2463 __le32 num_rates;
2464 struct mwl8k_rate_entry rate_entry[MWL8K_RATE_TABLE_SIZE];
2465 } __attribute__((packed));
2466
2467 struct mwl8k_cmd_use_fixed_rate {
2468 struct mwl8k_cmd_pkt header;
2469 __le32 action;
2470 struct mwl8k_rate_table rate_table;
2471
2472 /* Unicast, Broadcast or Multicast */
2473 __le32 rate_type;
2474 __le32 reserved1;
2475 __le32 reserved2;
2476 } __attribute__((packed));
2477
2478 static int mwl8k_cmd_use_fixed_rate(struct ieee80211_hw *hw,
2479 u32 action, u32 rate_type, struct mwl8k_rate_table *rate_table)
2480 {
2481 struct mwl8k_cmd_use_fixed_rate *cmd;
2482 int count;
2483 int rc;
2484
2485 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2486 if (cmd == NULL)
2487 return -ENOMEM;
2488
2489 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
2490 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2491
2492 cmd->action = cpu_to_le32(action);
2493 cmd->rate_type = cpu_to_le32(rate_type);
2494
2495 if (rate_table != NULL) {
2496 /* Copy over each field manually so
2497 * that bitflipping can be done
2498 */
2499 cmd->rate_table.allow_rate_drop =
2500 cpu_to_le32(rate_table->allow_rate_drop);
2501 cmd->rate_table.num_rates =
2502 cpu_to_le32(rate_table->num_rates);
2503
2504 for (count = 0; count < rate_table->num_rates; count++) {
2505 struct mwl8k_rate_entry *dst =
2506 &cmd->rate_table.rate_entry[count];
2507 struct mwl8k_rate_entry *src =
2508 &rate_table->rate_entry[count];
2509
2510 dst->is_ht_rate = cpu_to_le32(src->is_ht_rate);
2511 dst->enable_retry = cpu_to_le32(src->enable_retry);
2512 dst->rate = cpu_to_le32(src->rate);
2513 dst->retry_count = cpu_to_le32(src->retry_count);
2514 }
2515 }
2516
2517 rc = mwl8k_post_cmd(hw, &cmd->header);
2518 kfree(cmd);
2519
2520 return rc;
2521 }
2522
2523
2524 /*
2525 * Interrupt handling.
2526 */
2527 static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
2528 {
2529 struct ieee80211_hw *hw = dev_id;
2530 struct mwl8k_priv *priv = hw->priv;
2531 u32 status;
2532
2533 status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
2534 iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
2535
2536 status &= priv->int_mask;
2537 if (!status)
2538 return IRQ_NONE;
2539
2540 if (status & MWL8K_A2H_INT_TX_DONE)
2541 tasklet_schedule(&priv->tx_reclaim_task);
2542
2543 if (status & MWL8K_A2H_INT_RX_READY) {
2544 while (rxq_process(hw, 0, 1))
2545 rxq_refill(hw, 0, 1);
2546 }
2547
2548 if (status & MWL8K_A2H_INT_OPC_DONE) {
2549 if (priv->hostcmd_wait != NULL) {
2550 complete(priv->hostcmd_wait);
2551 priv->hostcmd_wait = NULL;
2552 }
2553 }
2554
2555 if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
2556 if (!priv->inconfig &&
2557 priv->radio_state &&
2558 mwl8k_txq_busy(priv))
2559 mwl8k_tx_start(priv);
2560 }
2561
2562 return IRQ_HANDLED;
2563 }
2564
2565
2566 /*
2567 * Core driver operations.
2568 */
2569 static int mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2570 {
2571 struct mwl8k_priv *priv = hw->priv;
2572 int index = skb_get_queue_mapping(skb);
2573 int rc;
2574
2575 if (priv->current_channel == NULL) {
2576 printk(KERN_DEBUG "%s: dropped TX frame since radio "
2577 "disabled\n", priv->name);
2578 dev_kfree_skb(skb);
2579 return NETDEV_TX_OK;
2580 }
2581
2582 rc = mwl8k_txq_xmit(hw, index, skb);
2583
2584 return rc;
2585 }
2586
2587 struct mwl8k_work_struct {
2588 /* Initialized by mwl8k_queue_work(). */
2589 struct work_struct wt;
2590
2591 /* Required field passed in to mwl8k_queue_work(). */
2592 struct ieee80211_hw *hw;
2593
2594 /* Required field passed in to mwl8k_queue_work(). */
2595 int (*wfunc)(struct work_struct *w);
2596
2597 /* Initialized by mwl8k_queue_work(). */
2598 struct completion *cmd_wait;
2599
2600 /* Result code. */
2601 int rc;
2602
2603 /*
2604 * Optional field. Refer to explanation of MWL8K_WQ_XXX_XXX
2605 * flags for explanation. Defaults to MWL8K_WQ_DEFAULT_OPTIONS.
2606 */
2607 u32 options;
2608
2609 /* Optional field. Defaults to MWL8K_CONFIG_TIMEOUT_MS. */
2610 unsigned long timeout_ms;
2611
2612 /* Optional field. Defaults to MWL8K_WQ_TXWAIT_ATTEMPTS. */
2613 u32 txwait_attempts;
2614
2615 /* Optional field. Defaults to MWL8K_TXWAIT_MS. */
2616 u32 tx_timeout_ms;
2617 u32 step;
2618 };
2619
2620 /* Flags controlling behavior of config queue requests */
2621
2622 /* Caller spins while waiting for completion. */
2623 #define MWL8K_WQ_SPIN 0x00000001
2624
2625 /* Wait for TX queues to empty before proceeding with configuration. */
2626 #define MWL8K_WQ_TX_WAIT_EMPTY 0x00000002
2627
2628 /* Queue request and return immediately. */
2629 #define MWL8K_WQ_POST_REQUEST 0x00000004
2630
2631 /*
2632 * Caller sleeps and waits for task complete notification.
2633 * Do not use in atomic context.
2634 */
2635 #define MWL8K_WQ_SLEEP 0x00000008
2636
2637 /* Free work struct when task is done. */
2638 #define MWL8K_WQ_FREE_WORKSTRUCT 0x00000010
2639
2640 /*
2641 * Config request is queued and returns to caller imediately. Use
2642 * this in atomic context. Work struct is freed by mwl8k_queue_work()
2643 * when this flag is set.
2644 */
2645 #define MWL8K_WQ_QUEUE_ONLY (MWL8K_WQ_POST_REQUEST | \
2646 MWL8K_WQ_FREE_WORKSTRUCT)
2647
2648 /* Default work queue behavior is to sleep and wait for tx completion. */
2649 #define MWL8K_WQ_DEFAULT_OPTIONS (MWL8K_WQ_SLEEP | MWL8K_WQ_TX_WAIT_EMPTY)
2650
2651 /*
2652 * Default config request timeout. Add adjustments to make sure the
2653 * config thread waits long enough for both tx wait and cmd wait before
2654 * timing out.
2655 */
2656
2657 /* Time to wait for all TXQs to drain. TX Doorbell is pressed each time. */
2658 #define MWL8K_TXWAIT_TIMEOUT_MS 1000
2659
2660 /* Default number of TX wait attempts. */
2661 #define MWL8K_WQ_TXWAIT_ATTEMPTS 4
2662
2663 /* Total time to wait for TXQ to drain. */
2664 #define MWL8K_TXWAIT_MS (MWL8K_TXWAIT_TIMEOUT_MS * \
2665 MWL8K_WQ_TXWAIT_ATTEMPTS)
2666
2667 /* Scheduling slop. */
2668 #define MWL8K_OS_SCHEDULE_OVERHEAD_MS 200
2669
2670 #define MWL8K_CONFIG_TIMEOUT_MS (MWL8K_CMD_TIMEOUT_MS + \
2671 MWL8K_TXWAIT_MS + \
2672 MWL8K_OS_SCHEDULE_OVERHEAD_MS)
2673
2674 static void mwl8k_config_thread(struct work_struct *wt)
2675 {
2676 struct mwl8k_work_struct *worker = (struct mwl8k_work_struct *)wt;
2677 struct ieee80211_hw *hw = worker->hw;
2678 struct mwl8k_priv *priv = hw->priv;
2679 int rc = 0;
2680
2681 spin_lock_irq(&priv->tx_lock);
2682 priv->inconfig = true;
2683 spin_unlock_irq(&priv->tx_lock);
2684
2685 ieee80211_stop_queues(hw);
2686
2687 /*
2688 * Wait for host queues to drain before doing PHY
2689 * reconfiguration. This avoids interrupting any in-flight
2690 * DMA transfers to the hardware.
2691 */
2692 if (worker->options & MWL8K_WQ_TX_WAIT_EMPTY) {
2693 u32 timeout;
2694 u32 time_remaining;
2695 u32 iter;
2696 u32 tx_wait_attempts = worker->txwait_attempts;
2697
2698 time_remaining = worker->tx_timeout_ms;
2699 if (!tx_wait_attempts)
2700 tx_wait_attempts = 1;
2701
2702 timeout = worker->tx_timeout_ms/tx_wait_attempts;
2703 if (!timeout)
2704 timeout = 1;
2705
2706 iter = tx_wait_attempts;
2707 do {
2708 int wait_time;
2709
2710 if (time_remaining > timeout) {
2711 time_remaining -= timeout;
2712 wait_time = timeout;
2713 } else
2714 wait_time = time_remaining;
2715
2716 if (!wait_time)
2717 wait_time = 1;
2718
2719 rc = mwl8k_tx_wait_empty(hw, wait_time);
2720 if (rc)
2721 printk(KERN_ERR "%s() txwait timeout=%ums "
2722 "Retry:%u/%u\n", __func__, timeout,
2723 tx_wait_attempts - iter + 1,
2724 tx_wait_attempts);
2725
2726 } while (rc && --iter);
2727
2728 rc = iter ? 0 : -ETIMEDOUT;
2729 }
2730 if (!rc)
2731 rc = worker->wfunc(wt);
2732
2733 spin_lock_irq(&priv->tx_lock);
2734 priv->inconfig = false;
2735 if (priv->pending_tx_pkts && priv->radio_state)
2736 mwl8k_tx_start(priv);
2737 spin_unlock_irq(&priv->tx_lock);
2738 ieee80211_wake_queues(hw);
2739
2740 worker->rc = rc;
2741 if (worker->options & MWL8K_WQ_SLEEP)
2742 complete(worker->cmd_wait);
2743
2744 if (worker->options & MWL8K_WQ_FREE_WORKSTRUCT)
2745 kfree(wt);
2746 }
2747
2748 static int mwl8k_queue_work(struct ieee80211_hw *hw,
2749 struct mwl8k_work_struct *worker,
2750 struct workqueue_struct *wqueue,
2751 int (*wfunc)(struct work_struct *w))
2752 {
2753 unsigned long timeout = 0;
2754 int rc = 0;
2755
2756 DECLARE_COMPLETION_ONSTACK(cmd_wait);
2757
2758 if (!worker->timeout_ms)
2759 worker->timeout_ms = MWL8K_CONFIG_TIMEOUT_MS;
2760
2761 if (!worker->options)
2762 worker->options = MWL8K_WQ_DEFAULT_OPTIONS;
2763
2764 if (!worker->txwait_attempts)
2765 worker->txwait_attempts = MWL8K_WQ_TXWAIT_ATTEMPTS;
2766
2767 if (!worker->tx_timeout_ms)
2768 worker->tx_timeout_ms = MWL8K_TXWAIT_MS;
2769
2770 worker->hw = hw;
2771 worker->cmd_wait = &cmd_wait;
2772 worker->rc = 1;
2773 worker->wfunc = wfunc;
2774
2775 INIT_WORK(&worker->wt, mwl8k_config_thread);
2776 queue_work(wqueue, &worker->wt);
2777
2778 if (worker->options & MWL8K_WQ_POST_REQUEST) {
2779 rc = 0;
2780 } else {
2781 if (worker->options & MWL8K_WQ_SPIN) {
2782 timeout = worker->timeout_ms;
2783 while (timeout && (worker->rc > 0)) {
2784 mdelay(1);
2785 timeout--;
2786 }
2787 } else if (worker->options & MWL8K_WQ_SLEEP)
2788 timeout = wait_for_completion_timeout(&cmd_wait,
2789 msecs_to_jiffies(worker->timeout_ms));
2790
2791 if (timeout)
2792 rc = worker->rc;
2793 else {
2794 cancel_work_sync(&worker->wt);
2795 rc = -ETIMEDOUT;
2796 }
2797 }
2798
2799 return rc;
2800 }
2801
2802 struct mwl8k_start_worker {
2803 struct mwl8k_work_struct header;
2804 };
2805
2806 static int mwl8k_start_wt(struct work_struct *wt)
2807 {
2808 struct mwl8k_start_worker *worker = (struct mwl8k_start_worker *)wt;
2809 struct ieee80211_hw *hw = worker->header.hw;
2810 struct mwl8k_priv *priv = hw->priv;
2811 int rc = 0;
2812
2813 if (priv->vif != NULL) {
2814 rc = -EIO;
2815 goto mwl8k_start_exit;
2816 }
2817
2818 /* Turn on radio */
2819 if (mwl8k_cmd_802_11_radio_control(hw, MWL8K_RADIO_ENABLE)) {
2820 rc = -EIO;
2821 goto mwl8k_start_exit;
2822 }
2823
2824 /* Purge TX/RX HW queues */
2825 if (mwl8k_cmd_set_pre_scan(hw)) {
2826 rc = -EIO;
2827 goto mwl8k_start_exit;
2828 }
2829
2830 if (mwl8k_cmd_set_post_scan(hw, "\x00\x00\x00\x00\x00\x00")) {
2831 rc = -EIO;
2832 goto mwl8k_start_exit;
2833 }
2834
2835 /* Enable firmware rate adaptation */
2836 if (mwl8k_cmd_setrateadaptmode(hw, 0)) {
2837 rc = -EIO;
2838 goto mwl8k_start_exit;
2839 }
2840
2841 /* Disable WMM. WMM gets enabled when stack sends WMM parms */
2842 if (mwl8k_set_wmm(hw, MWL8K_WMM_DISABLE)) {
2843 rc = -EIO;
2844 goto mwl8k_start_exit;
2845 }
2846
2847 /* Disable sniffer mode */
2848 if (mwl8k_enable_sniffer(hw, 0))
2849 rc = -EIO;
2850
2851 mwl8k_start_exit:
2852 return rc;
2853 }
2854
2855 static int mwl8k_start(struct ieee80211_hw *hw)
2856 {
2857 struct mwl8k_start_worker *worker;
2858 struct mwl8k_priv *priv = hw->priv;
2859 int rc;
2860
2861 /* Enable tx reclaim tasklet */
2862 tasklet_enable(&priv->tx_reclaim_task);
2863
2864 rc = request_irq(priv->pdev->irq, &mwl8k_interrupt,
2865 IRQF_SHARED, MWL8K_NAME, hw);
2866 if (rc) {
2867 printk(KERN_ERR "%s: failed to register IRQ handler\n",
2868 priv->name);
2869 rc = -EIO;
2870 goto mwl8k_start_disable_tasklet;
2871 }
2872
2873 /* Enable interrupts */
2874 iowrite32(priv->int_mask, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
2875
2876 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
2877 if (worker == NULL) {
2878 rc = -ENOMEM;
2879 goto mwl8k_start_disable_irq;
2880 }
2881
2882 rc = mwl8k_queue_work(hw, &worker->header,
2883 priv->config_wq, mwl8k_start_wt);
2884 kfree(worker);
2885 if (!rc)
2886 return rc;
2887
2888 if (rc == -ETIMEDOUT)
2889 printk(KERN_ERR "%s() timed out\n", __func__);
2890
2891 rc = -EIO;
2892
2893 mwl8k_start_disable_irq:
2894 spin_lock_irq(&priv->tx_lock);
2895 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
2896 spin_unlock_irq(&priv->tx_lock);
2897 free_irq(priv->pdev->irq, hw);
2898
2899 mwl8k_start_disable_tasklet:
2900 tasklet_disable(&priv->tx_reclaim_task);
2901
2902 return rc;
2903 }
2904
2905 struct mwl8k_stop_worker {
2906 struct mwl8k_work_struct header;
2907 };
2908
2909 static int mwl8k_stop_wt(struct work_struct *wt)
2910 {
2911 struct mwl8k_stop_worker *worker = (struct mwl8k_stop_worker *)wt;
2912 struct ieee80211_hw *hw = worker->header.hw;
2913 int rc;
2914
2915 rc = mwl8k_cmd_802_11_radio_control(hw, MWL8K_RADIO_DISABLE);
2916
2917 return rc;
2918 }
2919
2920 static void mwl8k_stop(struct ieee80211_hw *hw)
2921 {
2922 int rc;
2923 struct mwl8k_stop_worker *worker;
2924 struct mwl8k_priv *priv = hw->priv;
2925 int i;
2926
2927 if (priv->vif != NULL)
2928 return;
2929
2930 ieee80211_stop_queues(hw);
2931
2932 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
2933 if (worker == NULL)
2934 return;
2935
2936 rc = mwl8k_queue_work(hw, &worker->header,
2937 priv->config_wq, mwl8k_stop_wt);
2938 kfree(worker);
2939 if (rc == -ETIMEDOUT)
2940 printk(KERN_ERR "%s() timed out\n", __func__);
2941
2942 /* Disable interrupts */
2943 spin_lock_irq(&priv->tx_lock);
2944 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
2945 spin_unlock_irq(&priv->tx_lock);
2946 free_irq(priv->pdev->irq, hw);
2947
2948 /* Stop finalize join worker */
2949 cancel_work_sync(&priv->finalize_join_worker);
2950 if (priv->beacon_skb != NULL)
2951 dev_kfree_skb(priv->beacon_skb);
2952
2953 /* Stop tx reclaim tasklet */
2954 tasklet_disable(&priv->tx_reclaim_task);
2955
2956 /* Stop config thread */
2957 flush_workqueue(priv->config_wq);
2958
2959 /* Return all skbs to mac80211 */
2960 for (i = 0; i < MWL8K_TX_QUEUES; i++)
2961 mwl8k_txq_reclaim(hw, i, 1);
2962 }
2963
2964 static int mwl8k_add_interface(struct ieee80211_hw *hw,
2965 struct ieee80211_if_init_conf *conf)
2966 {
2967 struct mwl8k_priv *priv = hw->priv;
2968 struct mwl8k_vif *mwl8k_vif;
2969
2970 /*
2971 * We only support one active interface at a time.
2972 */
2973 if (priv->vif != NULL)
2974 return -EBUSY;
2975
2976 /*
2977 * We only support managed interfaces for now.
2978 */
2979 if (conf->type != NL80211_IFTYPE_STATION &&
2980 conf->type != NL80211_IFTYPE_MONITOR)
2981 return -EINVAL;
2982
2983 /* Clean out driver private area */
2984 mwl8k_vif = MWL8K_VIF(conf->vif);
2985 memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
2986
2987 /* Save the mac address */
2988 memcpy(mwl8k_vif->mac_addr, conf->mac_addr, IEEE80211_ADDR_LEN);
2989
2990 /* Back pointer to parent config block */
2991 mwl8k_vif->priv = priv;
2992
2993 /* Setup initial PHY parameters */
2994 memcpy(mwl8k_vif->legacy_rates ,
2995 priv->rates, sizeof(mwl8k_vif->legacy_rates));
2996 mwl8k_vif->legacy_nrates = ARRAY_SIZE(priv->rates);
2997
2998 /* Set Initial sequence number to zero */
2999 mwl8k_vif->seqno = 0;
3000
3001 priv->vif = conf->vif;
3002 priv->current_channel = NULL;
3003
3004 return 0;
3005 }
3006
3007 static void mwl8k_remove_interface(struct ieee80211_hw *hw,
3008 struct ieee80211_if_init_conf *conf)
3009 {
3010 struct mwl8k_priv *priv = hw->priv;
3011
3012 if (priv->vif == NULL)
3013 return;
3014
3015 priv->vif = NULL;
3016 }
3017
3018 struct mwl8k_config_worker {
3019 struct mwl8k_work_struct header;
3020 u32 changed;
3021 };
3022
3023 static int mwl8k_config_wt(struct work_struct *wt)
3024 {
3025 struct mwl8k_config_worker *worker =
3026 (struct mwl8k_config_worker *)wt;
3027 struct ieee80211_hw *hw = worker->header.hw;
3028 struct ieee80211_conf *conf = &hw->conf;
3029 struct mwl8k_priv *priv = hw->priv;
3030 int rc = 0;
3031
3032 if (!conf->radio_enabled) {
3033 mwl8k_cmd_802_11_radio_control(hw, MWL8K_RADIO_DISABLE);
3034 priv->current_channel = NULL;
3035 rc = 0;
3036 goto mwl8k_config_exit;
3037 }
3038
3039 if (mwl8k_cmd_802_11_radio_control(hw, MWL8K_RADIO_ENABLE)) {
3040 rc = -EINVAL;
3041 goto mwl8k_config_exit;
3042 }
3043
3044 priv->current_channel = conf->channel;
3045
3046 if (mwl8k_cmd_set_rf_channel(hw, conf->channel)) {
3047 rc = -EINVAL;
3048 goto mwl8k_config_exit;
3049 }
3050
3051 if (conf->power_level > 18)
3052 conf->power_level = 18;
3053 if (mwl8k_cmd_802_11_rf_tx_power(hw, conf->power_level)) {
3054 rc = -EINVAL;
3055 goto mwl8k_config_exit;
3056 }
3057
3058 if (mwl8k_cmd_mimo_config(hw, 0x7, 0x7))
3059 rc = -EINVAL;
3060
3061 mwl8k_config_exit:
3062 return rc;
3063 }
3064
3065 static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
3066 {
3067 int rc = 0;
3068 struct mwl8k_config_worker *worker;
3069 struct mwl8k_priv *priv = hw->priv;
3070
3071 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
3072 if (worker == NULL)
3073 return -ENOMEM;
3074
3075 worker->changed = changed;
3076 rc = mwl8k_queue_work(hw, &worker->header,
3077 priv->config_wq, mwl8k_config_wt);
3078 if (rc == -ETIMEDOUT) {
3079 printk(KERN_ERR "%s() timed out.\n", __func__);
3080 rc = -EINVAL;
3081 }
3082
3083 kfree(worker);
3084
3085 /*
3086 * mac80211 will crash on anything other than -EINVAL on
3087 * error. Looks like wireless extensions which calls mac80211
3088 * may be the actual culprit...
3089 */
3090 return rc ? -EINVAL : 0;
3091 }
3092
3093 static int mwl8k_config_interface(struct ieee80211_hw *hw,
3094 struct ieee80211_vif *vif,
3095 struct ieee80211_if_conf *conf)
3096 {
3097 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
3098 u32 changed = conf->changed;
3099
3100 if (changed & IEEE80211_IFCC_BSSID)
3101 memcpy(mv_vif->bssid, conf->bssid, IEEE80211_ADDR_LEN);
3102
3103 return 0;
3104 }
3105
3106 struct mwl8k_bss_info_changed_worker {
3107 struct mwl8k_work_struct header;
3108 struct ieee80211_vif *vif;
3109 struct ieee80211_bss_conf *info;
3110 u32 changed;
3111 };
3112
3113 static int mwl8k_bss_info_changed_wt(struct work_struct *wt)
3114 {
3115 struct mwl8k_bss_info_changed_worker *worker =
3116 (struct mwl8k_bss_info_changed_worker *)wt;
3117 struct ieee80211_hw *hw = worker->header.hw;
3118 struct ieee80211_vif *vif = worker->vif;
3119 struct ieee80211_bss_conf *info = worker->info;
3120 u32 changed;
3121 int rc;
3122
3123 struct mwl8k_priv *priv = hw->priv;
3124 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
3125
3126 changed = worker->changed;
3127 priv->capture_beacon = false;
3128
3129 if (info->assoc) {
3130 memcpy(&mwl8k_vif->bss_info, info,
3131 sizeof(struct ieee80211_bss_conf));
3132
3133 /* Install rates */
3134 if (mwl8k_update_rateset(hw, vif))
3135 goto mwl8k_bss_info_changed_exit;
3136
3137 /* Turn on rate adaptation */
3138 if (mwl8k_cmd_use_fixed_rate(hw, MWL8K_USE_AUTO_RATE,
3139 MWL8K_UCAST_RATE, NULL))
3140 goto mwl8k_bss_info_changed_exit;
3141
3142 /* Set radio preamble */
3143 if (mwl8k_set_radio_preamble(hw,
3144 info->use_short_preamble))
3145 goto mwl8k_bss_info_changed_exit;
3146
3147 /* Set slot time */
3148 if (mwl8k_cmd_set_slot(hw, info->use_short_slot ?
3149 MWL8K_SHORT_SLOTTIME : MWL8K_LONG_SLOTTIME))
3150 goto mwl8k_bss_info_changed_exit;
3151
3152 /* Update peer rate info */
3153 if (mwl8k_cmd_update_sta_db(hw, vif,
3154 MWL8K_STA_DB_MODIFY_ENTRY))
3155 goto mwl8k_bss_info_changed_exit;
3156
3157 /* Set AID */
3158 if (mwl8k_cmd_set_aid(hw, vif))
3159 goto mwl8k_bss_info_changed_exit;
3160
3161 /*
3162 * Finalize the join. Tell rx handler to process
3163 * next beacon from our BSSID.
3164 */
3165 memcpy(priv->capture_bssid,
3166 mwl8k_vif->bssid, IEEE80211_ADDR_LEN);
3167 priv->capture_beacon = true;
3168 } else {
3169 mwl8k_cmd_update_sta_db(hw, vif, MWL8K_STA_DB_DEL_ENTRY);
3170 memset(&mwl8k_vif->bss_info, 0,
3171 sizeof(struct ieee80211_bss_conf));
3172 memset(mwl8k_vif->bssid, 0, IEEE80211_ADDR_LEN);
3173 }
3174
3175 mwl8k_bss_info_changed_exit:
3176 rc = 0;
3177 return rc;
3178 }
3179
3180 static void mwl8k_bss_info_changed(struct ieee80211_hw *hw,
3181 struct ieee80211_vif *vif,
3182 struct ieee80211_bss_conf *info,
3183 u32 changed)
3184 {
3185 struct mwl8k_bss_info_changed_worker *worker;
3186 struct mwl8k_priv *priv = hw->priv;
3187 int rc;
3188
3189 if ((changed & BSS_CHANGED_ASSOC) == 0)
3190 return;
3191
3192 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
3193 if (worker == NULL)
3194 return;
3195
3196 worker->vif = vif;
3197 worker->info = info;
3198 worker->changed = changed;
3199 rc = mwl8k_queue_work(hw, &worker->header,
3200 priv->config_wq,
3201 mwl8k_bss_info_changed_wt);
3202 kfree(worker);
3203 if (rc == -ETIMEDOUT)
3204 printk(KERN_ERR "%s() timed out\n", __func__);
3205 }
3206
3207 struct mwl8k_configure_filter_worker {
3208 struct mwl8k_work_struct header;
3209 unsigned int changed_flags;
3210 unsigned int *total_flags;
3211 int mc_count;
3212 struct dev_addr_list *mclist;
3213 };
3214
3215 #define MWL8K_SUPPORTED_IF_FLAGS FIF_BCN_PRBRESP_PROMISC
3216
3217 static int mwl8k_configure_filter_wt(struct work_struct *wt)
3218 {
3219 struct mwl8k_configure_filter_worker *worker =
3220 (struct mwl8k_configure_filter_worker *)wt;
3221
3222 struct ieee80211_hw *hw = worker->header.hw;
3223 unsigned int changed_flags = worker->changed_flags;
3224 unsigned int *total_flags = worker->total_flags;
3225 int mc_count = worker->mc_count;
3226 struct dev_addr_list *mclist = worker->mclist;
3227
3228 struct mwl8k_priv *priv = hw->priv;
3229 struct mwl8k_vif *mv_vif;
3230 int rc = 0;
3231
3232 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
3233 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
3234 rc = mwl8k_cmd_set_pre_scan(hw);
3235 else {
3236 mv_vif = MWL8K_VIF(priv->vif);
3237 rc = mwl8k_cmd_set_post_scan(hw, mv_vif->bssid);
3238 }
3239 }
3240
3241 if (rc)
3242 goto mwl8k_configure_filter_exit;
3243 if (mc_count) {
3244 mc_count = mc_count < priv->num_mcaddrs ?
3245 mc_count : priv->num_mcaddrs;
3246 rc = mwl8k_cmd_mac_multicast_adr(hw, mc_count, mclist);
3247 if (rc)
3248 printk(KERN_ERR
3249 "%s()Error setting multicast addresses\n",
3250 __func__);
3251 }
3252
3253 mwl8k_configure_filter_exit:
3254 return rc;
3255 }
3256
3257 static void mwl8k_configure_filter(struct ieee80211_hw *hw,
3258 unsigned int changed_flags,
3259 unsigned int *total_flags,
3260 int mc_count,
3261 struct dev_addr_list *mclist)
3262 {
3263
3264 struct mwl8k_configure_filter_worker *worker;
3265 struct mwl8k_priv *priv = hw->priv;
3266
3267 /* Clear unsupported feature flags */
3268 *total_flags &= MWL8K_SUPPORTED_IF_FLAGS;
3269
3270 if (!(changed_flags & MWL8K_SUPPORTED_IF_FLAGS) && !mc_count)
3271 return;
3272
3273 worker = kzalloc(sizeof(*worker), GFP_ATOMIC);
3274 if (worker == NULL)
3275 return;
3276
3277 worker->header.options = MWL8K_WQ_QUEUE_ONLY | MWL8K_WQ_TX_WAIT_EMPTY;
3278 worker->changed_flags = changed_flags;
3279 worker->total_flags = total_flags;
3280 worker->mc_count = mc_count;
3281 worker->mclist = mclist;
3282
3283 mwl8k_queue_work(hw, &worker->header, priv->config_wq,
3284 mwl8k_configure_filter_wt);
3285 }
3286
3287 struct mwl8k_set_rts_threshold_worker {
3288 struct mwl8k_work_struct header;
3289 u32 value;
3290 };
3291
3292 static int mwl8k_set_rts_threshold_wt(struct work_struct *wt)
3293 {
3294 struct mwl8k_set_rts_threshold_worker *worker =
3295 (struct mwl8k_set_rts_threshold_worker *)wt;
3296
3297 struct ieee80211_hw *hw = worker->header.hw;
3298 u16 threshold = (u16)(worker->value);
3299 int rc;
3300
3301 rc = mwl8k_rts_threshold(hw, MWL8K_CMD_SET, &threshold);
3302
3303 return rc;
3304 }
3305
3306 static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
3307 {
3308 int rc;
3309 struct mwl8k_set_rts_threshold_worker *worker;
3310 struct mwl8k_priv *priv = hw->priv;
3311
3312 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
3313 if (worker == NULL)
3314 return -ENOMEM;
3315
3316 worker->value = value;
3317
3318 rc = mwl8k_queue_work(hw, &worker->header,
3319 priv->config_wq,
3320 mwl8k_set_rts_threshold_wt);
3321 kfree(worker);
3322
3323 if (rc == -ETIMEDOUT) {
3324 printk(KERN_ERR "%s() timed out\n", __func__);
3325 rc = -EINVAL;
3326 }
3327
3328 return rc;
3329 }
3330
3331 struct mwl8k_conf_tx_worker {
3332 struct mwl8k_work_struct header;
3333 u16 queue;
3334 const struct ieee80211_tx_queue_params *params;
3335 };
3336
3337 static int mwl8k_conf_tx_wt(struct work_struct *wt)
3338 {
3339 struct mwl8k_conf_tx_worker *worker =
3340 (struct mwl8k_conf_tx_worker *)wt;
3341
3342 struct ieee80211_hw *hw = worker->header.hw;
3343 u16 queue = worker->queue;
3344 const struct ieee80211_tx_queue_params *params = worker->params;
3345
3346 struct mwl8k_priv *priv = hw->priv;
3347 int rc = 0;
3348
3349 if (priv->wmm_mode == MWL8K_WMM_DISABLE)
3350 if (mwl8k_set_wmm(hw, MWL8K_WMM_ENABLE)) {
3351 rc = -EINVAL;
3352 goto mwl8k_conf_tx_exit;
3353 }
3354
3355 if (mwl8k_set_edca_params(hw, GET_TXQ(queue), params->cw_min,
3356 params->cw_max, params->aifs, params->txop))
3357 rc = -EINVAL;
3358 mwl8k_conf_tx_exit:
3359 return rc;
3360 }
3361
3362 static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
3363 const struct ieee80211_tx_queue_params *params)
3364 {
3365 int rc;
3366 struct mwl8k_conf_tx_worker *worker;
3367 struct mwl8k_priv *priv = hw->priv;
3368
3369 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
3370 if (worker == NULL)
3371 return -ENOMEM;
3372
3373 worker->queue = queue;
3374 worker->params = params;
3375 rc = mwl8k_queue_work(hw, &worker->header,
3376 priv->config_wq, mwl8k_conf_tx_wt);
3377 kfree(worker);
3378 if (rc == -ETIMEDOUT) {
3379 printk(KERN_ERR "%s() timed out\n", __func__);
3380 rc = -EINVAL;
3381 }
3382 return rc;
3383 }
3384
3385 static int mwl8k_get_tx_stats(struct ieee80211_hw *hw,
3386 struct ieee80211_tx_queue_stats *stats)
3387 {
3388 struct mwl8k_priv *priv = hw->priv;
3389 struct mwl8k_tx_queue *txq;
3390 int index;
3391
3392 spin_lock_bh(&priv->tx_lock);
3393 for (index = 0; index < MWL8K_TX_QUEUES; index++) {
3394 txq = priv->txq + index;
3395 memcpy(&stats[index], &txq->tx_stats,
3396 sizeof(struct ieee80211_tx_queue_stats));
3397 }
3398 spin_unlock_bh(&priv->tx_lock);
3399 return 0;
3400 }
3401
3402 struct mwl8k_get_stats_worker {
3403 struct mwl8k_work_struct header;
3404 struct ieee80211_low_level_stats *stats;
3405 };
3406
3407 static int mwl8k_get_stats_wt(struct work_struct *wt)
3408 {
3409 struct mwl8k_get_stats_worker *worker =
3410 (struct mwl8k_get_stats_worker *)wt;
3411
3412 return mwl8k_cmd_802_11_get_stat(worker->header.hw, worker->stats);
3413 }
3414
3415 static int mwl8k_get_stats(struct ieee80211_hw *hw,
3416 struct ieee80211_low_level_stats *stats)
3417 {
3418 int rc;
3419 struct mwl8k_get_stats_worker *worker;
3420 struct mwl8k_priv *priv = hw->priv;
3421
3422 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
3423 if (worker == NULL)
3424 return -ENOMEM;
3425
3426 worker->stats = stats;
3427 rc = mwl8k_queue_work(hw, &worker->header,
3428 priv->config_wq, mwl8k_get_stats_wt);
3429
3430 kfree(worker);
3431 if (rc == -ETIMEDOUT) {
3432 printk(KERN_ERR "%s() timed out\n", __func__);
3433 rc = -EINVAL;
3434 }
3435
3436 return rc;
3437 }
3438
3439 static const struct ieee80211_ops mwl8k_ops = {
3440 .tx = mwl8k_tx,
3441 .start = mwl8k_start,
3442 .stop = mwl8k_stop,
3443 .add_interface = mwl8k_add_interface,
3444 .remove_interface = mwl8k_remove_interface,
3445 .config = mwl8k_config,
3446 .config_interface = mwl8k_config_interface,
3447 .bss_info_changed = mwl8k_bss_info_changed,
3448 .configure_filter = mwl8k_configure_filter,
3449 .set_rts_threshold = mwl8k_set_rts_threshold,
3450 .conf_tx = mwl8k_conf_tx,
3451 .get_tx_stats = mwl8k_get_tx_stats,
3452 .get_stats = mwl8k_get_stats,
3453 };
3454
3455 static void mwl8k_tx_reclaim_handler(unsigned long data)
3456 {
3457 int i;
3458 struct ieee80211_hw *hw = (struct ieee80211_hw *) data;
3459 struct mwl8k_priv *priv = hw->priv;
3460
3461 spin_lock_bh(&priv->tx_lock);
3462 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3463 mwl8k_txq_reclaim(hw, i, 0);
3464
3465 if (priv->tx_wait != NULL) {
3466 int count = mwl8k_txq_busy(priv);
3467 if (count == 0) {
3468 complete(priv->tx_wait);
3469 priv->tx_wait = NULL;
3470 }
3471 }
3472 spin_unlock_bh(&priv->tx_lock);
3473 }
3474
3475 static void mwl8k_finalize_join_worker(struct work_struct *work)
3476 {
3477 struct mwl8k_priv *priv =
3478 container_of(work, struct mwl8k_priv, finalize_join_worker);
3479 struct sk_buff *skb = priv->beacon_skb;
3480 u8 dtim = (MWL8K_VIF(priv->vif))->bss_info.dtim_period;
3481
3482 mwl8k_finalize_join(priv->hw, skb->data, skb->len, dtim);
3483 dev_kfree_skb(skb);
3484
3485 priv->beacon_skb = NULL;
3486 }
3487
3488 static int __devinit mwl8k_probe(struct pci_dev *pdev,
3489 const struct pci_device_id *id)
3490 {
3491 struct ieee80211_hw *hw;
3492 struct mwl8k_priv *priv;
3493 DECLARE_MAC_BUF(mac);
3494 int rc;
3495 int i;
3496 u8 *fw;
3497
3498 rc = pci_enable_device(pdev);
3499 if (rc) {
3500 printk(KERN_ERR "%s: Cannot enable new PCI device\n",
3501 MWL8K_NAME);
3502 return rc;
3503 }
3504
3505 rc = pci_request_regions(pdev, MWL8K_NAME);
3506 if (rc) {
3507 printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
3508 MWL8K_NAME);
3509 return rc;
3510 }
3511
3512 pci_set_master(pdev);
3513
3514 hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
3515 if (hw == NULL) {
3516 printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
3517 rc = -ENOMEM;
3518 goto err_free_reg;
3519 }
3520
3521 priv = hw->priv;
3522 priv->hw = hw;
3523 priv->pdev = pdev;
3524 priv->hostcmd_wait = NULL;
3525 priv->tx_wait = NULL;
3526 priv->inconfig = false;
3527 priv->wep_enabled = 0;
3528 priv->wmm_mode = false;
3529 priv->pending_tx_pkts = 0;
3530 strncpy(priv->name, MWL8K_NAME, sizeof(priv->name));
3531
3532 spin_lock_init(&priv->fw_lock);
3533
3534 SET_IEEE80211_DEV(hw, &pdev->dev);
3535 pci_set_drvdata(pdev, hw);
3536
3537 priv->regs = pci_iomap(pdev, 1, 0x10000);
3538 if (priv->regs == NULL) {
3539 printk(KERN_ERR "%s: Cannot map device memory\n", priv->name);
3540 goto err_iounmap;
3541 }
3542
3543 memcpy(priv->channels, mwl8k_channels, sizeof(mwl8k_channels));
3544 priv->band.band = IEEE80211_BAND_2GHZ;
3545 priv->band.channels = priv->channels;
3546 priv->band.n_channels = ARRAY_SIZE(mwl8k_channels);
3547 priv->band.bitrates = priv->rates;
3548 priv->band.n_bitrates = ARRAY_SIZE(mwl8k_rates);
3549 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
3550
3551 BUILD_BUG_ON(sizeof(priv->rates) != sizeof(mwl8k_rates));
3552 memcpy(priv->rates, mwl8k_rates, sizeof(mwl8k_rates));
3553
3554 /*
3555 * Extra headroom is the size of the required DMA header
3556 * minus the size of the smallest 802.11 frame (CTS frame).
3557 */
3558 hw->extra_tx_headroom =
3559 sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
3560
3561 hw->channel_change_time = 10;
3562
3563 hw->queues = MWL8K_TX_QUEUES;
3564
3565 hw->wiphy->interface_modes =
3566 BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_MONITOR);
3567
3568 /* Set rssi and noise values to dBm */
3569 hw->flags |= (IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_NOISE_DBM);
3570 hw->vif_data_size = sizeof(struct mwl8k_vif);
3571 priv->vif = NULL;
3572
3573 /* Set default radio state and preamble */
3574 priv->radio_preamble = MWL8K_RADIO_DEFAULT_PREAMBLE;
3575 priv->radio_state = MWL8K_RADIO_DISABLE;
3576
3577 /* Finalize join worker */
3578 INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
3579
3580 /* TX reclaim tasklet */
3581 tasklet_init(&priv->tx_reclaim_task,
3582 mwl8k_tx_reclaim_handler, (unsigned long)hw);
3583 tasklet_disable(&priv->tx_reclaim_task);
3584
3585 /* Config workthread */
3586 priv->config_wq = create_singlethread_workqueue("mwl8k_config");
3587 if (priv->config_wq == NULL)
3588 goto err_iounmap;
3589
3590 /* Power management cookie */
3591 priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
3592 if (priv->cookie == NULL)
3593 goto err_iounmap;
3594
3595 rc = mwl8k_rxq_init(hw, 0);
3596 if (rc)
3597 goto err_iounmap;
3598 rxq_refill(hw, 0, INT_MAX);
3599
3600 spin_lock_init(&priv->tx_lock);
3601
3602 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
3603 rc = mwl8k_txq_init(hw, i);
3604 if (rc)
3605 goto err_free_queues;
3606 }
3607
3608 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3609 priv->int_mask = 0;
3610 iowrite32(priv->int_mask, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3611 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
3612 iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
3613
3614 rc = request_irq(priv->pdev->irq, &mwl8k_interrupt,
3615 IRQF_SHARED, MWL8K_NAME, hw);
3616 if (rc) {
3617 printk(KERN_ERR "%s: failed to register IRQ handler\n",
3618 priv->name);
3619 goto err_free_queues;
3620 }
3621
3622 /* Reset firmware and hardware */
3623 mwl8k_hw_reset(priv);
3624
3625 /* Ask userland hotplug daemon for the device firmware */
3626 rc = mwl8k_request_firmware(priv, (u32)id->driver_data);
3627 if (rc) {
3628 printk(KERN_ERR "%s: Firmware files not found\n", priv->name);
3629 goto err_free_irq;
3630 }
3631
3632 /* Load firmware into hardware */
3633 rc = mwl8k_load_firmware(priv);
3634 if (rc) {
3635 printk(KERN_ERR "%s: Cannot start firmware\n", priv->name);
3636 goto err_stop_firmware;
3637 }
3638
3639 /* Reclaim memory once firmware is successfully loaded */
3640 mwl8k_release_firmware(priv);
3641
3642 /*
3643 * Temporarily enable interrupts. Initial firmware host
3644 * commands use interrupts and avoids polling. Disable
3645 * interrupts when done.
3646 */
3647 priv->int_mask |= MWL8K_A2H_EVENTS;
3648
3649 iowrite32(priv->int_mask, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3650
3651 /* Get config data, mac addrs etc */
3652 rc = mwl8k_cmd_get_hw_spec(hw);
3653 if (rc) {
3654 printk(KERN_ERR "%s: Cannot initialise firmware\n", priv->name);
3655 goto err_stop_firmware;
3656 }
3657
3658 /* Turn radio off */
3659 rc = mwl8k_cmd_802_11_radio_control(hw, MWL8K_RADIO_DISABLE);
3660 if (rc) {
3661 printk(KERN_ERR "%s: Cannot disable\n", priv->name);
3662 goto err_stop_firmware;
3663 }
3664
3665 /* Disable interrupts */
3666 spin_lock_irq(&priv->tx_lock);
3667 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3668 spin_unlock_irq(&priv->tx_lock);
3669 free_irq(priv->pdev->irq, hw);
3670
3671 rc = ieee80211_register_hw(hw);
3672 if (rc) {
3673 printk(KERN_ERR "%s: Cannot register device\n", priv->name);
3674 goto err_stop_firmware;
3675 }
3676
3677 fw = (u8 *)&priv->fw_rev;
3678 printk(KERN_INFO "%s: 88W%u %s\n", priv->name, priv->part_num,
3679 MWL8K_DESC);
3680 printk(KERN_INFO "%s: Driver Ver:%s Firmware Ver:%u.%u.%u.%u\n",
3681 priv->name, MWL8K_VERSION, fw[3], fw[2], fw[1], fw[0]);
3682 printk(KERN_INFO "%s: MAC Address: %s\n", priv->name,
3683 print_mac(mac, hw->wiphy->perm_addr));
3684
3685 return 0;
3686
3687 err_stop_firmware:
3688 mwl8k_hw_reset(priv);
3689 mwl8k_release_firmware(priv);
3690
3691 err_free_irq:
3692 spin_lock_irq(&priv->tx_lock);
3693 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3694 spin_unlock_irq(&priv->tx_lock);
3695 free_irq(priv->pdev->irq, hw);
3696
3697 err_free_queues:
3698 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3699 mwl8k_txq_deinit(hw, i);
3700 mwl8k_rxq_deinit(hw, 0);
3701
3702 err_iounmap:
3703 if (priv->cookie != NULL)
3704 pci_free_consistent(priv->pdev, 4,
3705 priv->cookie, priv->cookie_dma);
3706
3707 if (priv->regs != NULL)
3708 pci_iounmap(pdev, priv->regs);
3709
3710 if (priv->config_wq != NULL)
3711 destroy_workqueue(priv->config_wq);
3712
3713 pci_set_drvdata(pdev, NULL);
3714 ieee80211_free_hw(hw);
3715
3716 err_free_reg:
3717 pci_release_regions(pdev);
3718 pci_disable_device(pdev);
3719
3720 return rc;
3721 }
3722
3723 static void __devexit mwl8k_remove(struct pci_dev *pdev)
3724 {
3725 printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
3726 }
3727
3728 static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
3729 {
3730 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
3731 struct mwl8k_priv *priv;
3732 int i;
3733
3734 if (hw == NULL)
3735 return;
3736 priv = hw->priv;
3737
3738 ieee80211_stop_queues(hw);
3739
3740 /* Remove tx reclaim tasklet */
3741 tasklet_kill(&priv->tx_reclaim_task);
3742
3743 /* Stop config thread */
3744 destroy_workqueue(priv->config_wq);
3745
3746 /* Stop hardware */
3747 mwl8k_hw_reset(priv);
3748
3749 /* Return all skbs to mac80211 */
3750 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3751 mwl8k_txq_reclaim(hw, i, 1);
3752
3753 ieee80211_unregister_hw(hw);
3754
3755 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3756 mwl8k_txq_deinit(hw, i);
3757
3758 mwl8k_rxq_deinit(hw, 0);
3759
3760 pci_free_consistent(priv->pdev, 4,
3761 priv->cookie, priv->cookie_dma);
3762
3763 pci_iounmap(pdev, priv->regs);
3764 pci_set_drvdata(pdev, NULL);
3765 ieee80211_free_hw(hw);
3766 pci_release_regions(pdev);
3767 pci_disable_device(pdev);
3768 }
3769
3770 static struct pci_driver mwl8k_driver = {
3771 .name = MWL8K_NAME,
3772 .id_table = mwl8k_table,
3773 .probe = mwl8k_probe,
3774 .remove = __devexit_p(mwl8k_remove),
3775 .shutdown = __devexit_p(mwl8k_shutdown),
3776 };
3777
3778 static int __init mwl8k_init(void)
3779 {
3780 return pci_register_driver(&mwl8k_driver);
3781 }
3782
3783 static void __exit mwl8k_exit(void)
3784 {
3785 pci_unregister_driver(&mwl8k_driver);
3786 }
3787
3788 module_init(mwl8k_init);
3789 module_exit(mwl8k_exit);
Support for the Chinese Samsung S3C2440 based development boards