1 /*******************************************************************************
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2007 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *******************************************************************************/
29 #include <linux/types.h>
30 #include <linux/module.h>
31 #include <linux/pci.h>
32 #include <linux/netdevice.h>
33 #include <linux/vmalloc.h>
34 #include <linux/string.h>
37 #include <linux/tcp.h>
38 #include <linux/ipv6.h>
39 #include <net/checksum.h>
40 #include <net/ip6_checksum.h>
41 #include <linux/ethtool.h>
42 #include <linux/if_vlan.h>
45 #include "ixgbe_common.h"
47 char ixgbe_driver_name
[] = "ixgbe";
48 static const char ixgbe_driver_string
[] =
49 "Intel(R) 10 Gigabit PCI Express Network Driver";
51 #define DRV_VERSION "1.3.18-k4"
52 const char ixgbe_driver_version
[] = DRV_VERSION
;
53 static const char ixgbe_copyright
[] =
54 "Copyright (c) 1999-2007 Intel Corporation.";
56 static const struct ixgbe_info
*ixgbe_info_tbl
[] = {
57 [board_82598
] = &ixgbe_82598_info
,
60 /* ixgbe_pci_tbl - PCI Device ID Table
62 * Wildcard entries (PCI_ANY_ID) should come last
63 * Last entry must be all 0s
65 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
66 * Class, Class Mask, private data (not used) }
68 static struct pci_device_id ixgbe_pci_tbl
[] = {
69 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AF_DUAL_PORT
),
71 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AF_SINGLE_PORT
),
73 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598EB_CX4
),
75 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_CX4_DUAL_PORT
),
77 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598EB_XF_LR
),
80 /* required last entry */
83 MODULE_DEVICE_TABLE(pci
, ixgbe_pci_tbl
);
85 #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
86 static int ixgbe_notify_dca(struct notifier_block
*, unsigned long event
,
88 static struct notifier_block dca_notifier
= {
89 .notifier_call
= ixgbe_notify_dca
,
95 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
96 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
97 MODULE_LICENSE("GPL");
98 MODULE_VERSION(DRV_VERSION
);
100 #define DEFAULT_DEBUG_LEVEL_SHIFT 3
102 static void ixgbe_release_hw_control(struct ixgbe_adapter
*adapter
)
106 /* Let firmware take over control of h/w */
107 ctrl_ext
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_CTRL_EXT
);
108 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_CTRL_EXT
,
109 ctrl_ext
& ~IXGBE_CTRL_EXT_DRV_LOAD
);
112 static void ixgbe_get_hw_control(struct ixgbe_adapter
*adapter
)
116 /* Let firmware know the driver has taken over */
117 ctrl_ext
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_CTRL_EXT
);
118 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_CTRL_EXT
,
119 ctrl_ext
| IXGBE_CTRL_EXT_DRV_LOAD
);
124 * ixgbe_get_hw_dev_name - return device name string
125 * used by hardware layer to print debugging information
127 char *ixgbe_get_hw_dev_name(struct ixgbe_hw
*hw
)
129 struct ixgbe_adapter
*adapter
= hw
->back
;
130 struct net_device
*netdev
= adapter
->netdev
;
135 static void ixgbe_set_ivar(struct ixgbe_adapter
*adapter
, u16 int_alloc_entry
,
140 msix_vector
|= IXGBE_IVAR_ALLOC_VAL
;
141 index
= (int_alloc_entry
>> 2) & 0x1F;
142 ivar
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_IVAR(index
));
143 ivar
&= ~(0xFF << (8 * (int_alloc_entry
& 0x3)));
144 ivar
|= (msix_vector
<< (8 * (int_alloc_entry
& 0x3)));
145 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_IVAR(index
), ivar
);
148 static void ixgbe_unmap_and_free_tx_resource(struct ixgbe_adapter
*adapter
,
149 struct ixgbe_tx_buffer
152 if (tx_buffer_info
->dma
) {
153 pci_unmap_page(adapter
->pdev
, tx_buffer_info
->dma
,
154 tx_buffer_info
->length
, PCI_DMA_TODEVICE
);
155 tx_buffer_info
->dma
= 0;
157 if (tx_buffer_info
->skb
) {
158 dev_kfree_skb_any(tx_buffer_info
->skb
);
159 tx_buffer_info
->skb
= NULL
;
161 /* tx_buffer_info must be completely set up in the transmit path */
164 static inline bool ixgbe_check_tx_hang(struct ixgbe_adapter
*adapter
,
165 struct ixgbe_ring
*tx_ring
,
168 struct ixgbe_hw
*hw
= &adapter
->hw
;
171 /* Detect a transmit hang in hardware, this serializes the
172 * check with the clearing of time_stamp and movement of eop */
173 head
= IXGBE_READ_REG(hw
, tx_ring
->head
);
174 tail
= IXGBE_READ_REG(hw
, tx_ring
->tail
);
175 adapter
->detect_tx_hung
= false;
176 if ((head
!= tail
) &&
177 tx_ring
->tx_buffer_info
[eop
].time_stamp
&&
178 time_after(jiffies
, tx_ring
->tx_buffer_info
[eop
].time_stamp
+ HZ
) &&
179 !(IXGBE_READ_REG(&adapter
->hw
, IXGBE_TFCS
) & IXGBE_TFCS_TXOFF
)) {
180 /* detected Tx unit hang */
181 union ixgbe_adv_tx_desc
*tx_desc
;
182 tx_desc
= IXGBE_TX_DESC_ADV(*tx_ring
, eop
);
183 DPRINTK(DRV
, ERR
, "Detected Tx Unit Hang\n"
185 " TDH, TDT <%x>, <%x>\n"
186 " next_to_use <%x>\n"
187 " next_to_clean <%x>\n"
188 "tx_buffer_info[next_to_clean]\n"
189 " time_stamp <%lx>\n"
191 tx_ring
->queue_index
,
193 tx_ring
->next_to_use
, eop
,
194 tx_ring
->tx_buffer_info
[eop
].time_stamp
, jiffies
);
201 #define IXGBE_MAX_TXD_PWR 14
202 #define IXGBE_MAX_DATA_PER_TXD (1 << IXGBE_MAX_TXD_PWR)
204 /* Tx Descriptors needed, worst case */
205 #define TXD_USE_COUNT(S) (((S) >> IXGBE_MAX_TXD_PWR) + \
206 (((S) & (IXGBE_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
207 #define DESC_NEEDED (TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD) /* skb->data */ + \
208 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1) /* for context */
210 #define GET_TX_HEAD_FROM_RING(ring) (\
212 ((union ixgbe_adv_tx_desc *)(ring)->desc + (ring)->count))
213 static void ixgbe_tx_timeout(struct net_device
*netdev
);
216 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
217 * @adapter: board private structure
218 * @tx_ring: tx ring to clean
220 static bool ixgbe_clean_tx_irq(struct ixgbe_adapter
*adapter
,
221 struct ixgbe_ring
*tx_ring
)
223 union ixgbe_adv_tx_desc
*tx_desc
;
224 struct ixgbe_tx_buffer
*tx_buffer_info
;
225 struct net_device
*netdev
= adapter
->netdev
;
229 unsigned int count
= 0;
230 unsigned int total_bytes
= 0, total_packets
= 0;
233 head
= GET_TX_HEAD_FROM_RING(tx_ring
);
234 head
= le32_to_cpu(head
);
235 i
= tx_ring
->next_to_clean
;
238 tx_desc
= IXGBE_TX_DESC_ADV(*tx_ring
, i
);
239 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
240 skb
= tx_buffer_info
->skb
;
243 unsigned int segs
, bytecount
;
245 /* gso_segs is currently only valid for tcp */
246 segs
= skb_shinfo(skb
)->gso_segs
?: 1;
247 /* multiply data chunks by size of headers */
248 bytecount
= ((segs
- 1) * skb_headlen(skb
)) +
250 total_packets
+= segs
;
251 total_bytes
+= bytecount
;
254 ixgbe_unmap_and_free_tx_resource(adapter
,
258 if (i
== tx_ring
->count
)
262 if (count
== tx_ring
->count
)
267 head
= GET_TX_HEAD_FROM_RING(tx_ring
);
268 head
= le32_to_cpu(head
);
274 tx_ring
->next_to_clean
= i
;
276 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
277 if (unlikely(count
&& netif_carrier_ok(netdev
) &&
278 (IXGBE_DESC_UNUSED(tx_ring
) >= TX_WAKE_THRESHOLD
))) {
279 /* Make sure that anybody stopping the queue after this
280 * sees the new next_to_clean.
283 if (__netif_subqueue_stopped(netdev
, tx_ring
->queue_index
) &&
284 !test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
285 netif_wake_subqueue(netdev
, tx_ring
->queue_index
);
286 ++adapter
->restart_queue
;
290 if (adapter
->detect_tx_hung
) {
291 if (ixgbe_check_tx_hang(adapter
, tx_ring
, i
)) {
292 /* schedule immediate reset if we believe we hung */
294 "tx hang %d detected, resetting adapter\n",
295 adapter
->tx_timeout_count
+ 1);
296 ixgbe_tx_timeout(adapter
->netdev
);
300 /* re-arm the interrupt */
301 if ((total_packets
>= tx_ring
->work_limit
) ||
302 (count
== tx_ring
->count
))
303 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EICS
, tx_ring
->v_idx
);
305 tx_ring
->total_bytes
+= total_bytes
;
306 tx_ring
->total_packets
+= total_packets
;
307 tx_ring
->stats
.bytes
+= total_bytes
;
308 tx_ring
->stats
.packets
+= total_packets
;
309 adapter
->net_stats
.tx_bytes
+= total_bytes
;
310 adapter
->net_stats
.tx_packets
+= total_packets
;
311 return (total_packets
? true : false);
314 #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
315 static void ixgbe_update_rx_dca(struct ixgbe_adapter
*adapter
,
316 struct ixgbe_ring
*rx_ring
)
320 int q
= rx_ring
- adapter
->rx_ring
;
322 if (rx_ring
->cpu
!= cpu
) {
323 rxctrl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_DCA_RXCTRL(q
));
324 rxctrl
&= ~IXGBE_DCA_RXCTRL_CPUID_MASK
;
325 rxctrl
|= dca3_get_tag(&adapter
->pdev
->dev
, cpu
);
326 rxctrl
|= IXGBE_DCA_RXCTRL_DESC_DCA_EN
;
327 rxctrl
|= IXGBE_DCA_RXCTRL_HEAD_DCA_EN
;
328 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_RXCTRL(q
), rxctrl
);
334 static void ixgbe_update_tx_dca(struct ixgbe_adapter
*adapter
,
335 struct ixgbe_ring
*tx_ring
)
339 int q
= tx_ring
- adapter
->tx_ring
;
341 if (tx_ring
->cpu
!= cpu
) {
342 txctrl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_DCA_TXCTRL(q
));
343 txctrl
&= ~IXGBE_DCA_TXCTRL_CPUID_MASK
;
344 txctrl
|= dca3_get_tag(&adapter
->pdev
->dev
, cpu
);
345 txctrl
|= IXGBE_DCA_TXCTRL_DESC_DCA_EN
;
346 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_TXCTRL(q
), txctrl
);
352 static void ixgbe_setup_dca(struct ixgbe_adapter
*adapter
)
356 if (!(adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
))
359 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
360 adapter
->tx_ring
[i
].cpu
= -1;
361 ixgbe_update_tx_dca(adapter
, &adapter
->tx_ring
[i
]);
363 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
364 adapter
->rx_ring
[i
].cpu
= -1;
365 ixgbe_update_rx_dca(adapter
, &adapter
->rx_ring
[i
]);
369 static int __ixgbe_notify_dca(struct device
*dev
, void *data
)
371 struct net_device
*netdev
= dev_get_drvdata(dev
);
372 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
373 unsigned long event
= *(unsigned long *)data
;
376 case DCA_PROVIDER_ADD
:
377 /* if we're already enabled, don't do it again */
378 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
380 /* Always use CB2 mode, difference is masked
381 * in the CB driver. */
382 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
, 2);
383 if (dca_add_requester(dev
) == 0) {
384 adapter
->flags
|= IXGBE_FLAG_DCA_ENABLED
;
385 ixgbe_setup_dca(adapter
);
388 /* Fall Through since DCA is disabled. */
389 case DCA_PROVIDER_REMOVE
:
390 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
391 dca_remove_requester(dev
);
392 adapter
->flags
&= ~IXGBE_FLAG_DCA_ENABLED
;
393 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
, 1);
401 #endif /* CONFIG_DCA or CONFIG_DCA_MODULE */
403 * ixgbe_receive_skb - Send a completed packet up the stack
404 * @adapter: board private structure
405 * @skb: packet to send up
406 * @status: hardware indication of status of receive
407 * @rx_ring: rx descriptor ring (for a specific queue) to setup
408 * @rx_desc: rx descriptor
410 static void ixgbe_receive_skb(struct ixgbe_adapter
*adapter
,
411 struct sk_buff
*skb
, u8 status
,
412 struct ixgbe_ring
*ring
,
413 union ixgbe_adv_rx_desc
*rx_desc
)
415 bool is_vlan
= (status
& IXGBE_RXD_STAT_VP
);
416 u16 tag
= le16_to_cpu(rx_desc
->wb
.upper
.vlan
);
418 if (adapter
->netdev
->features
& NETIF_F_LRO
&&
419 skb
->ip_summed
== CHECKSUM_UNNECESSARY
) {
420 if (adapter
->vlgrp
&& is_vlan
)
421 lro_vlan_hwaccel_receive_skb(&ring
->lro_mgr
, skb
,
425 lro_receive_skb(&ring
->lro_mgr
, skb
, rx_desc
);
426 ring
->lro_used
= true;
428 if (!(adapter
->flags
& IXGBE_FLAG_IN_NETPOLL
)) {
429 if (adapter
->vlgrp
&& is_vlan
)
430 vlan_hwaccel_receive_skb(skb
, adapter
->vlgrp
, tag
);
432 netif_receive_skb(skb
);
434 if (adapter
->vlgrp
&& is_vlan
)
435 vlan_hwaccel_rx(skb
, adapter
->vlgrp
, tag
);
443 * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
444 * @adapter: address of board private structure
445 * @status_err: hardware indication of status of receive
446 * @skb: skb currently being received and modified
448 static inline void ixgbe_rx_checksum(struct ixgbe_adapter
*adapter
,
449 u32 status_err
, struct sk_buff
*skb
)
451 skb
->ip_summed
= CHECKSUM_NONE
;
453 /* Rx csum disabled */
454 if (!(adapter
->flags
& IXGBE_FLAG_RX_CSUM_ENABLED
))
457 /* if IP and error */
458 if ((status_err
& IXGBE_RXD_STAT_IPCS
) &&
459 (status_err
& IXGBE_RXDADV_ERR_IPE
)) {
460 adapter
->hw_csum_rx_error
++;
464 if (!(status_err
& IXGBE_RXD_STAT_L4CS
))
467 if (status_err
& IXGBE_RXDADV_ERR_TCPE
) {
468 adapter
->hw_csum_rx_error
++;
472 /* It must be a TCP or UDP packet with a valid checksum */
473 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
474 adapter
->hw_csum_rx_good
++;
478 * ixgbe_alloc_rx_buffers - Replace used receive buffers; packet split
479 * @adapter: address of board private structure
481 static void ixgbe_alloc_rx_buffers(struct ixgbe_adapter
*adapter
,
482 struct ixgbe_ring
*rx_ring
,
485 struct net_device
*netdev
= adapter
->netdev
;
486 struct pci_dev
*pdev
= adapter
->pdev
;
487 union ixgbe_adv_rx_desc
*rx_desc
;
488 struct ixgbe_rx_buffer
*bi
;
490 unsigned int bufsz
= rx_ring
->rx_buf_len
+ NET_IP_ALIGN
;
492 i
= rx_ring
->next_to_use
;
493 bi
= &rx_ring
->rx_buffer_info
[i
];
495 while (cleaned_count
--) {
496 rx_desc
= IXGBE_RX_DESC_ADV(*rx_ring
, i
);
499 (adapter
->flags
& IXGBE_FLAG_RX_PS_ENABLED
)) {
501 bi
->page
= alloc_page(GFP_ATOMIC
);
503 adapter
->alloc_rx_page_failed
++;
508 /* use a half page if we're re-using */
509 bi
->page_offset
^= (PAGE_SIZE
/ 2);
512 bi
->page_dma
= pci_map_page(pdev
, bi
->page
,
519 struct sk_buff
*skb
= netdev_alloc_skb(netdev
, bufsz
);
522 adapter
->alloc_rx_buff_failed
++;
527 * Make buffer alignment 2 beyond a 16 byte boundary
528 * this will result in a 16 byte aligned IP header after
529 * the 14 byte MAC header is removed
531 skb_reserve(skb
, NET_IP_ALIGN
);
534 bi
->dma
= pci_map_single(pdev
, skb
->data
, bufsz
,
537 /* Refresh the desc even if buffer_addrs didn't change because
538 * each write-back erases this info. */
539 if (adapter
->flags
& IXGBE_FLAG_RX_PS_ENABLED
) {
540 rx_desc
->read
.pkt_addr
= cpu_to_le64(bi
->page_dma
);
541 rx_desc
->read
.hdr_addr
= cpu_to_le64(bi
->dma
);
543 rx_desc
->read
.pkt_addr
= cpu_to_le64(bi
->dma
);
547 if (i
== rx_ring
->count
)
549 bi
= &rx_ring
->rx_buffer_info
[i
];
553 if (rx_ring
->next_to_use
!= i
) {
554 rx_ring
->next_to_use
= i
;
556 i
= (rx_ring
->count
- 1);
559 * Force memory writes to complete before letting h/w
560 * know there are new descriptors to fetch. (Only
561 * applicable for weak-ordered memory model archs,
565 writel(i
, adapter
->hw
.hw_addr
+ rx_ring
->tail
);
569 static inline u16
ixgbe_get_hdr_info(union ixgbe_adv_rx_desc
*rx_desc
)
571 return rx_desc
->wb
.lower
.lo_dword
.hs_rss
.hdr_info
;
574 static inline u16
ixgbe_get_pkt_info(union ixgbe_adv_rx_desc
*rx_desc
)
576 return rx_desc
->wb
.lower
.lo_dword
.hs_rss
.pkt_info
;
579 static bool ixgbe_clean_rx_irq(struct ixgbe_adapter
*adapter
,
580 struct ixgbe_ring
*rx_ring
,
581 int *work_done
, int work_to_do
)
583 struct net_device
*netdev
= adapter
->netdev
;
584 struct pci_dev
*pdev
= adapter
->pdev
;
585 union ixgbe_adv_rx_desc
*rx_desc
, *next_rxd
;
586 struct ixgbe_rx_buffer
*rx_buffer_info
, *next_buffer
;
591 bool cleaned
= false;
592 int cleaned_count
= 0;
593 unsigned int total_rx_bytes
= 0, total_rx_packets
= 0;
595 i
= rx_ring
->next_to_clean
;
596 rx_desc
= IXGBE_RX_DESC_ADV(*rx_ring
, i
);
597 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
598 rx_buffer_info
= &rx_ring
->rx_buffer_info
[i
];
600 while (staterr
& IXGBE_RXD_STAT_DD
) {
602 if (*work_done
>= work_to_do
)
606 if (adapter
->flags
& IXGBE_FLAG_RX_PS_ENABLED
) {
607 hdr_info
= le16_to_cpu(ixgbe_get_hdr_info(rx_desc
));
608 len
= (hdr_info
& IXGBE_RXDADV_HDRBUFLEN_MASK
) >>
609 IXGBE_RXDADV_HDRBUFLEN_SHIFT
;
610 if (hdr_info
& IXGBE_RXDADV_SPH
)
611 adapter
->rx_hdr_split
++;
612 if (len
> IXGBE_RX_HDR_SIZE
)
613 len
= IXGBE_RX_HDR_SIZE
;
614 upper_len
= le16_to_cpu(rx_desc
->wb
.upper
.length
);
616 len
= le16_to_cpu(rx_desc
->wb
.upper
.length
);
620 skb
= rx_buffer_info
->skb
;
621 prefetch(skb
->data
- NET_IP_ALIGN
);
622 rx_buffer_info
->skb
= NULL
;
624 if (len
&& !skb_shinfo(skb
)->nr_frags
) {
625 pci_unmap_single(pdev
, rx_buffer_info
->dma
,
626 rx_ring
->rx_buf_len
+ NET_IP_ALIGN
,
632 pci_unmap_page(pdev
, rx_buffer_info
->page_dma
,
633 PAGE_SIZE
/ 2, PCI_DMA_FROMDEVICE
);
634 rx_buffer_info
->page_dma
= 0;
635 skb_fill_page_desc(skb
, skb_shinfo(skb
)->nr_frags
,
636 rx_buffer_info
->page
,
637 rx_buffer_info
->page_offset
,
640 if ((rx_ring
->rx_buf_len
> (PAGE_SIZE
/ 2)) ||
641 (page_count(rx_buffer_info
->page
) != 1))
642 rx_buffer_info
->page
= NULL
;
644 get_page(rx_buffer_info
->page
);
646 skb
->len
+= upper_len
;
647 skb
->data_len
+= upper_len
;
648 skb
->truesize
+= upper_len
;
652 if (i
== rx_ring
->count
)
654 next_buffer
= &rx_ring
->rx_buffer_info
[i
];
656 next_rxd
= IXGBE_RX_DESC_ADV(*rx_ring
, i
);
660 if (staterr
& IXGBE_RXD_STAT_EOP
) {
661 rx_ring
->stats
.packets
++;
662 rx_ring
->stats
.bytes
+= skb
->len
;
664 rx_buffer_info
->skb
= next_buffer
->skb
;
665 rx_buffer_info
->dma
= next_buffer
->dma
;
666 next_buffer
->skb
= skb
;
667 next_buffer
->dma
= 0;
668 adapter
->non_eop_descs
++;
672 if (staterr
& IXGBE_RXDADV_ERR_FRAME_ERR_MASK
) {
673 dev_kfree_skb_irq(skb
);
677 ixgbe_rx_checksum(adapter
, staterr
, skb
);
679 /* probably a little skewed due to removing CRC */
680 total_rx_bytes
+= skb
->len
;
683 skb
->protocol
= eth_type_trans(skb
, netdev
);
684 ixgbe_receive_skb(adapter
, skb
, staterr
, rx_ring
, rx_desc
);
685 netdev
->last_rx
= jiffies
;
688 rx_desc
->wb
.upper
.status_error
= 0;
690 /* return some buffers to hardware, one at a time is too slow */
691 if (cleaned_count
>= IXGBE_RX_BUFFER_WRITE
) {
692 ixgbe_alloc_rx_buffers(adapter
, rx_ring
, cleaned_count
);
696 /* use prefetched values */
698 rx_buffer_info
= next_buffer
;
700 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
703 if (rx_ring
->lro_used
) {
704 lro_flush_all(&rx_ring
->lro_mgr
);
705 rx_ring
->lro_used
= false;
708 rx_ring
->next_to_clean
= i
;
709 cleaned_count
= IXGBE_DESC_UNUSED(rx_ring
);
712 ixgbe_alloc_rx_buffers(adapter
, rx_ring
, cleaned_count
);
714 rx_ring
->total_packets
+= total_rx_packets
;
715 rx_ring
->total_bytes
+= total_rx_bytes
;
716 adapter
->net_stats
.rx_bytes
+= total_rx_bytes
;
717 adapter
->net_stats
.rx_packets
+= total_rx_packets
;
722 static int ixgbe_clean_rxonly(struct napi_struct
*, int);
724 * ixgbe_configure_msix - Configure MSI-X hardware
725 * @adapter: board private structure
727 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
730 static void ixgbe_configure_msix(struct ixgbe_adapter
*adapter
)
732 struct ixgbe_q_vector
*q_vector
;
733 int i
, j
, q_vectors
, v_idx
, r_idx
;
736 q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
738 /* Populate the IVAR table and set the ITR values to the
739 * corresponding register.
741 for (v_idx
= 0; v_idx
< q_vectors
; v_idx
++) {
742 q_vector
= &adapter
->q_vector
[v_idx
];
743 /* XXX for_each_bit(...) */
744 r_idx
= find_first_bit(q_vector
->rxr_idx
,
745 adapter
->num_rx_queues
);
747 for (i
= 0; i
< q_vector
->rxr_count
; i
++) {
748 j
= adapter
->rx_ring
[r_idx
].reg_idx
;
749 ixgbe_set_ivar(adapter
, IXGBE_IVAR_RX_QUEUE(j
), v_idx
);
750 r_idx
= find_next_bit(q_vector
->rxr_idx
,
751 adapter
->num_rx_queues
,
754 r_idx
= find_first_bit(q_vector
->txr_idx
,
755 adapter
->num_tx_queues
);
757 for (i
= 0; i
< q_vector
->txr_count
; i
++) {
758 j
= adapter
->tx_ring
[r_idx
].reg_idx
;
759 ixgbe_set_ivar(adapter
, IXGBE_IVAR_TX_QUEUE(j
), v_idx
);
760 r_idx
= find_next_bit(q_vector
->txr_idx
,
761 adapter
->num_tx_queues
,
765 /* if this is a tx only vector halve the interrupt rate */
766 if (q_vector
->txr_count
&& !q_vector
->rxr_count
)
767 q_vector
->eitr
= (adapter
->eitr_param
>> 1);
770 q_vector
->eitr
= adapter
->eitr_param
;
772 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EITR(v_idx
),
773 EITR_INTS_PER_SEC_TO_REG(q_vector
->eitr
));
776 ixgbe_set_ivar(adapter
, IXGBE_IVAR_OTHER_CAUSES_INDEX
, v_idx
);
777 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EITR(v_idx
), 1950);
779 /* set up to autoclear timer, and the vectors */
780 mask
= IXGBE_EIMS_ENABLE_MASK
;
781 mask
&= ~(IXGBE_EIMS_OTHER
| IXGBE_EIMS_LSC
);
782 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIAC
, mask
);
789 latency_invalid
= 255
793 * ixgbe_update_itr - update the dynamic ITR value based on statistics
794 * @adapter: pointer to adapter
795 * @eitr: eitr setting (ints per sec) to give last timeslice
796 * @itr_setting: current throttle rate in ints/second
797 * @packets: the number of packets during this measurement interval
798 * @bytes: the number of bytes during this measurement interval
800 * Stores a new ITR value based on packets and byte
801 * counts during the last interrupt. The advantage of per interrupt
802 * computation is faster updates and more accurate ITR for the current
803 * traffic pattern. Constants in this function were computed
804 * based on theoretical maximum wire speed and thresholds were set based
805 * on testing data as well as attempting to minimize response time
806 * while increasing bulk throughput.
807 * this functionality is controlled by the InterruptThrottleRate module
808 * parameter (see ixgbe_param.c)
810 static u8
ixgbe_update_itr(struct ixgbe_adapter
*adapter
,
811 u32 eitr
, u8 itr_setting
,
812 int packets
, int bytes
)
814 unsigned int retval
= itr_setting
;
819 goto update_itr_done
;
822 /* simple throttlerate management
823 * 0-20MB/s lowest (100000 ints/s)
824 * 20-100MB/s low (20000 ints/s)
825 * 100-1249MB/s bulk (8000 ints/s)
827 /* what was last interrupt timeslice? */
828 timepassed_us
= 1000000/eitr
;
829 bytes_perint
= bytes
/ timepassed_us
; /* bytes/usec */
831 switch (itr_setting
) {
833 if (bytes_perint
> adapter
->eitr_low
)
834 retval
= low_latency
;
837 if (bytes_perint
> adapter
->eitr_high
)
838 retval
= bulk_latency
;
839 else if (bytes_perint
<= adapter
->eitr_low
)
840 retval
= lowest_latency
;
843 if (bytes_perint
<= adapter
->eitr_high
)
844 retval
= low_latency
;
852 static void ixgbe_set_itr_msix(struct ixgbe_q_vector
*q_vector
)
854 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
855 struct ixgbe_hw
*hw
= &adapter
->hw
;
857 u8 current_itr
, ret_itr
;
858 int i
, r_idx
, v_idx
= ((void *)q_vector
- (void *)(adapter
->q_vector
)) /
859 sizeof(struct ixgbe_q_vector
);
860 struct ixgbe_ring
*rx_ring
, *tx_ring
;
862 r_idx
= find_first_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
);
863 for (i
= 0; i
< q_vector
->txr_count
; i
++) {
864 tx_ring
= &(adapter
->tx_ring
[r_idx
]);
865 ret_itr
= ixgbe_update_itr(adapter
, q_vector
->eitr
,
867 tx_ring
->total_packets
,
868 tx_ring
->total_bytes
);
869 /* if the result for this queue would decrease interrupt
870 * rate for this vector then use that result */
871 q_vector
->tx_itr
= ((q_vector
->tx_itr
> ret_itr
) ?
872 q_vector
->tx_itr
- 1 : ret_itr
);
873 r_idx
= find_next_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
,
877 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
878 for (i
= 0; i
< q_vector
->rxr_count
; i
++) {
879 rx_ring
= &(adapter
->rx_ring
[r_idx
]);
880 ret_itr
= ixgbe_update_itr(adapter
, q_vector
->eitr
,
882 rx_ring
->total_packets
,
883 rx_ring
->total_bytes
);
884 /* if the result for this queue would decrease interrupt
885 * rate for this vector then use that result */
886 q_vector
->rx_itr
= ((q_vector
->rx_itr
> ret_itr
) ?
887 q_vector
->rx_itr
- 1 : ret_itr
);
888 r_idx
= find_next_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
,
892 current_itr
= max(q_vector
->rx_itr
, q_vector
->tx_itr
);
894 switch (current_itr
) {
895 /* counts and packets in update_itr are dependent on these numbers */
900 new_itr
= 20000; /* aka hwitr = ~200 */
908 if (new_itr
!= q_vector
->eitr
) {
910 /* do an exponential smoothing */
911 new_itr
= ((q_vector
->eitr
* 90)/100) + ((new_itr
* 10)/100);
912 q_vector
->eitr
= new_itr
;
913 itr_reg
= EITR_INTS_PER_SEC_TO_REG(new_itr
);
914 /* must write high and low 16 bits to reset counter */
915 DPRINTK(TX_ERR
, DEBUG
, "writing eitr(%d): %08X\n", v_idx
,
917 IXGBE_WRITE_REG(hw
, IXGBE_EITR(v_idx
), itr_reg
| (itr_reg
)<<16);
924 static void ixgbe_check_lsc(struct ixgbe_adapter
*adapter
)
926 struct ixgbe_hw
*hw
= &adapter
->hw
;
929 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_UPDATE
;
930 adapter
->link_check_timeout
= jiffies
;
931 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
932 IXGBE_WRITE_REG(hw
, IXGBE_EIMC
, IXGBE_EIMC_LSC
);
933 schedule_work(&adapter
->watchdog_task
);
937 static irqreturn_t
ixgbe_msix_lsc(int irq
, void *data
)
939 struct net_device
*netdev
= data
;
940 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
941 struct ixgbe_hw
*hw
= &adapter
->hw
;
942 u32 eicr
= IXGBE_READ_REG(hw
, IXGBE_EICR
);
944 if (eicr
& IXGBE_EICR_LSC
)
945 ixgbe_check_lsc(adapter
);
947 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
948 IXGBE_WRITE_REG(hw
, IXGBE_EIMS
, IXGBE_EIMS_OTHER
);
953 static irqreturn_t
ixgbe_msix_clean_tx(int irq
, void *data
)
955 struct ixgbe_q_vector
*q_vector
= data
;
956 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
957 struct ixgbe_ring
*tx_ring
;
960 if (!q_vector
->txr_count
)
963 r_idx
= find_first_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
);
964 for (i
= 0; i
< q_vector
->txr_count
; i
++) {
965 tx_ring
= &(adapter
->tx_ring
[r_idx
]);
966 #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
967 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
968 ixgbe_update_tx_dca(adapter
, tx_ring
);
970 tx_ring
->total_bytes
= 0;
971 tx_ring
->total_packets
= 0;
972 ixgbe_clean_tx_irq(adapter
, tx_ring
);
973 r_idx
= find_next_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
,
981 * ixgbe_msix_clean_rx - single unshared vector rx clean (all queues)
983 * @data: pointer to our q_vector struct for this interrupt vector
985 static irqreturn_t
ixgbe_msix_clean_rx(int irq
, void *data
)
987 struct ixgbe_q_vector
*q_vector
= data
;
988 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
989 struct ixgbe_ring
*rx_ring
;
993 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
994 for (i
= 0; i
< q_vector
->rxr_count
; i
++) {
995 rx_ring
= &(adapter
->rx_ring
[r_idx
]);
996 rx_ring
->total_bytes
= 0;
997 rx_ring
->total_packets
= 0;
998 r_idx
= find_next_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
,
1002 if (!q_vector
->rxr_count
)
1005 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
1006 rx_ring
= &(adapter
->rx_ring
[r_idx
]);
1007 /* disable interrupts on this vector only */
1008 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC
, rx_ring
->v_idx
);
1009 netif_rx_schedule(adapter
->netdev
, &q_vector
->napi
);
1014 static irqreturn_t
ixgbe_msix_clean_many(int irq
, void *data
)
1016 ixgbe_msix_clean_rx(irq
, data
);
1017 ixgbe_msix_clean_tx(irq
, data
);
1023 * ixgbe_clean_rxonly - msix (aka one shot) rx clean routine
1024 * @napi: napi struct with our devices info in it
1025 * @budget: amount of work driver is allowed to do this pass, in packets
1027 * This function is optimized for cleaning one queue only on a single
1030 static int ixgbe_clean_rxonly(struct napi_struct
*napi
, int budget
)
1032 struct ixgbe_q_vector
*q_vector
=
1033 container_of(napi
, struct ixgbe_q_vector
, napi
);
1034 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1035 struct ixgbe_ring
*rx_ring
= NULL
;
1039 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
1040 rx_ring
= &(adapter
->rx_ring
[r_idx
]);
1041 #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
1042 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
1043 ixgbe_update_rx_dca(adapter
, rx_ring
);
1046 ixgbe_clean_rx_irq(adapter
, rx_ring
, &work_done
, budget
);
1048 /* If all Rx work done, exit the polling mode */
1049 if (work_done
< budget
) {
1050 netif_rx_complete(adapter
->netdev
, napi
);
1051 if (adapter
->itr_setting
& 3)
1052 ixgbe_set_itr_msix(q_vector
);
1053 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1054 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMS
, rx_ring
->v_idx
);
1061 * ixgbe_clean_rxonly_many - msix (aka one shot) rx clean routine
1062 * @napi: napi struct with our devices info in it
1063 * @budget: amount of work driver is allowed to do this pass, in packets
1065 * This function will clean more than one rx queue associated with a
1068 static int ixgbe_clean_rxonly_many(struct napi_struct
*napi
, int budget
)
1070 struct ixgbe_q_vector
*q_vector
=
1071 container_of(napi
, struct ixgbe_q_vector
, napi
);
1072 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1073 struct net_device
*netdev
= adapter
->netdev
;
1074 struct ixgbe_ring
*rx_ring
= NULL
;
1075 int work_done
= 0, i
;
1077 u16 enable_mask
= 0;
1079 /* attempt to distribute budget to each queue fairly, but don't allow
1080 * the budget to go below 1 because we'll exit polling */
1081 budget
/= (q_vector
->rxr_count
?: 1);
1082 budget
= max(budget
, 1);
1083 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
1084 for (i
= 0; i
< q_vector
->rxr_count
; i
++) {
1085 rx_ring
= &(adapter
->rx_ring
[r_idx
]);
1086 #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
1087 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
1088 ixgbe_update_rx_dca(adapter
, rx_ring
);
1090 ixgbe_clean_rx_irq(adapter
, rx_ring
, &work_done
, budget
);
1091 enable_mask
|= rx_ring
->v_idx
;
1092 r_idx
= find_next_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
,
1096 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
1097 rx_ring
= &(adapter
->rx_ring
[r_idx
]);
1098 /* If all Rx work done, exit the polling mode */
1099 if (work_done
< budget
) {
1100 netif_rx_complete(netdev
, napi
);
1101 if (adapter
->itr_setting
& 3)
1102 ixgbe_set_itr_msix(q_vector
);
1103 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1104 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMS
, enable_mask
);
1110 static inline void map_vector_to_rxq(struct ixgbe_adapter
*a
, int v_idx
,
1113 a
->q_vector
[v_idx
].adapter
= a
;
1114 set_bit(r_idx
, a
->q_vector
[v_idx
].rxr_idx
);
1115 a
->q_vector
[v_idx
].rxr_count
++;
1116 a
->rx_ring
[r_idx
].v_idx
= 1 << v_idx
;
1119 static inline void map_vector_to_txq(struct ixgbe_adapter
*a
, int v_idx
,
1122 a
->q_vector
[v_idx
].adapter
= a
;
1123 set_bit(r_idx
, a
->q_vector
[v_idx
].txr_idx
);
1124 a
->q_vector
[v_idx
].txr_count
++;
1125 a
->tx_ring
[r_idx
].v_idx
= 1 << v_idx
;
1129 * ixgbe_map_rings_to_vectors - Maps descriptor rings to vectors
1130 * @adapter: board private structure to initialize
1131 * @vectors: allotted vector count for descriptor rings
1133 * This function maps descriptor rings to the queue-specific vectors
1134 * we were allotted through the MSI-X enabling code. Ideally, we'd have
1135 * one vector per ring/queue, but on a constrained vector budget, we
1136 * group the rings as "efficiently" as possible. You would add new
1137 * mapping configurations in here.
1139 static int ixgbe_map_rings_to_vectors(struct ixgbe_adapter
*adapter
,
1143 int rxr_idx
= 0, txr_idx
= 0;
1144 int rxr_remaining
= adapter
->num_rx_queues
;
1145 int txr_remaining
= adapter
->num_tx_queues
;
1150 /* No mapping required if MSI-X is disabled. */
1151 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
))
1155 * The ideal configuration...
1156 * We have enough vectors to map one per queue.
1158 if (vectors
== adapter
->num_rx_queues
+ adapter
->num_tx_queues
) {
1159 for (; rxr_idx
< rxr_remaining
; v_start
++, rxr_idx
++)
1160 map_vector_to_rxq(adapter
, v_start
, rxr_idx
);
1162 for (; txr_idx
< txr_remaining
; v_start
++, txr_idx
++)
1163 map_vector_to_txq(adapter
, v_start
, txr_idx
);
1169 * If we don't have enough vectors for a 1-to-1
1170 * mapping, we'll have to group them so there are
1171 * multiple queues per vector.
1173 /* Re-adjusting *qpv takes care of the remainder. */
1174 for (i
= v_start
; i
< vectors
; i
++) {
1175 rqpv
= DIV_ROUND_UP(rxr_remaining
, vectors
- i
);
1176 for (j
= 0; j
< rqpv
; j
++) {
1177 map_vector_to_rxq(adapter
, i
, rxr_idx
);
1182 for (i
= v_start
; i
< vectors
; i
++) {
1183 tqpv
= DIV_ROUND_UP(txr_remaining
, vectors
- i
);
1184 for (j
= 0; j
< tqpv
; j
++) {
1185 map_vector_to_txq(adapter
, i
, txr_idx
);
1196 * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
1197 * @adapter: board private structure
1199 * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
1200 * interrupts from the kernel.
1202 static int ixgbe_request_msix_irqs(struct ixgbe_adapter
*adapter
)
1204 struct net_device
*netdev
= adapter
->netdev
;
1205 irqreturn_t (*handler
)(int, void *);
1206 int i
, vector
, q_vectors
, err
;
1208 /* Decrement for Other and TCP Timer vectors */
1209 q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
1211 /* Map the Tx/Rx rings to the vectors we were allotted. */
1212 err
= ixgbe_map_rings_to_vectors(adapter
, q_vectors
);
1216 #define SET_HANDLER(_v) ((!(_v)->rxr_count) ? &ixgbe_msix_clean_tx : \
1217 (!(_v)->txr_count) ? &ixgbe_msix_clean_rx : \
1218 &ixgbe_msix_clean_many)
1219 for (vector
= 0; vector
< q_vectors
; vector
++) {
1220 handler
= SET_HANDLER(&adapter
->q_vector
[vector
]);
1221 sprintf(adapter
->name
[vector
], "%s:v%d-%s",
1222 netdev
->name
, vector
,
1223 (handler
== &ixgbe_msix_clean_rx
) ? "Rx" :
1224 ((handler
== &ixgbe_msix_clean_tx
) ? "Tx" : "TxRx"));
1225 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
1226 handler
, 0, adapter
->name
[vector
],
1227 &(adapter
->q_vector
[vector
]));
1230 "request_irq failed for MSIX interrupt "
1231 "Error: %d\n", err
);
1232 goto free_queue_irqs
;
1236 sprintf(adapter
->name
[vector
], "%s:lsc", netdev
->name
);
1237 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
1238 &ixgbe_msix_lsc
, 0, adapter
->name
[vector
], netdev
);
1241 "request_irq for msix_lsc failed: %d\n", err
);
1242 goto free_queue_irqs
;
1248 for (i
= vector
- 1; i
>= 0; i
--)
1249 free_irq(adapter
->msix_entries
[--vector
].vector
,
1250 &(adapter
->q_vector
[i
]));
1251 adapter
->flags
&= ~IXGBE_FLAG_MSIX_ENABLED
;
1252 pci_disable_msix(adapter
->pdev
);
1253 kfree(adapter
->msix_entries
);
1254 adapter
->msix_entries
= NULL
;
1259 static void ixgbe_set_itr(struct ixgbe_adapter
*adapter
)
1261 struct ixgbe_hw
*hw
= &adapter
->hw
;
1262 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
;
1264 u32 new_itr
= q_vector
->eitr
;
1265 struct ixgbe_ring
*rx_ring
= &adapter
->rx_ring
[0];
1266 struct ixgbe_ring
*tx_ring
= &adapter
->tx_ring
[0];
1268 q_vector
->tx_itr
= ixgbe_update_itr(adapter
, new_itr
,
1270 tx_ring
->total_packets
,
1271 tx_ring
->total_bytes
);
1272 q_vector
->rx_itr
= ixgbe_update_itr(adapter
, new_itr
,
1274 rx_ring
->total_packets
,
1275 rx_ring
->total_bytes
);
1277 current_itr
= max(q_vector
->rx_itr
, q_vector
->tx_itr
);
1279 switch (current_itr
) {
1280 /* counts and packets in update_itr are dependent on these numbers */
1281 case lowest_latency
:
1285 new_itr
= 20000; /* aka hwitr = ~200 */
1294 if (new_itr
!= q_vector
->eitr
) {
1296 /* do an exponential smoothing */
1297 new_itr
= ((q_vector
->eitr
* 90)/100) + ((new_itr
* 10)/100);
1298 q_vector
->eitr
= new_itr
;
1299 itr_reg
= EITR_INTS_PER_SEC_TO_REG(new_itr
);
1300 /* must write high and low 16 bits to reset counter */
1301 IXGBE_WRITE_REG(hw
, IXGBE_EITR(0), itr_reg
| (itr_reg
)<<16);
1307 static inline void ixgbe_irq_enable(struct ixgbe_adapter
*adapter
);
1310 * ixgbe_intr - legacy mode Interrupt Handler
1311 * @irq: interrupt number
1312 * @data: pointer to a network interface device structure
1313 * @pt_regs: CPU registers structure
1315 static irqreturn_t
ixgbe_intr(int irq
, void *data
)
1317 struct net_device
*netdev
= data
;
1318 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
1319 struct ixgbe_hw
*hw
= &adapter
->hw
;
1323 /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
1324 * therefore no explict interrupt disable is necessary */
1325 eicr
= IXGBE_READ_REG(hw
, IXGBE_EICR
);
1327 /* shared interrupt alert!
1328 * make sure interrupts are enabled because the read will
1329 * have disabled interrupts due to EIAM */
1330 ixgbe_irq_enable(adapter
);
1331 return IRQ_NONE
; /* Not our interrupt */
1334 if (eicr
& IXGBE_EICR_LSC
)
1335 ixgbe_check_lsc(adapter
);
1337 if (netif_rx_schedule_prep(netdev
, &adapter
->q_vector
[0].napi
)) {
1338 adapter
->tx_ring
[0].total_packets
= 0;
1339 adapter
->tx_ring
[0].total_bytes
= 0;
1340 adapter
->rx_ring
[0].total_packets
= 0;
1341 adapter
->rx_ring
[0].total_bytes
= 0;
1342 /* would disable interrupts here but EIAM disabled it */
1343 __netif_rx_schedule(netdev
, &adapter
->q_vector
[0].napi
);
1349 static inline void ixgbe_reset_q_vectors(struct ixgbe_adapter
*adapter
)
1351 int i
, q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
1353 for (i
= 0; i
< q_vectors
; i
++) {
1354 struct ixgbe_q_vector
*q_vector
= &adapter
->q_vector
[i
];
1355 bitmap_zero(q_vector
->rxr_idx
, MAX_RX_QUEUES
);
1356 bitmap_zero(q_vector
->txr_idx
, MAX_TX_QUEUES
);
1357 q_vector
->rxr_count
= 0;
1358 q_vector
->txr_count
= 0;
1363 * ixgbe_request_irq - initialize interrupts
1364 * @adapter: board private structure
1366 * Attempts to configure interrupts using the best available
1367 * capabilities of the hardware and kernel.
1369 static int ixgbe_request_irq(struct ixgbe_adapter
*adapter
)
1371 struct net_device
*netdev
= adapter
->netdev
;
1374 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
1375 err
= ixgbe_request_msix_irqs(adapter
);
1376 } else if (adapter
->flags
& IXGBE_FLAG_MSI_ENABLED
) {
1377 err
= request_irq(adapter
->pdev
->irq
, &ixgbe_intr
, 0,
1378 netdev
->name
, netdev
);
1380 err
= request_irq(adapter
->pdev
->irq
, &ixgbe_intr
, IRQF_SHARED
,
1381 netdev
->name
, netdev
);
1385 DPRINTK(PROBE
, ERR
, "request_irq failed, Error %d\n", err
);
1390 static void ixgbe_free_irq(struct ixgbe_adapter
*adapter
)
1392 struct net_device
*netdev
= adapter
->netdev
;
1394 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
1397 q_vectors
= adapter
->num_msix_vectors
;
1400 free_irq(adapter
->msix_entries
[i
].vector
, netdev
);
1403 for (; i
>= 0; i
--) {
1404 free_irq(adapter
->msix_entries
[i
].vector
,
1405 &(adapter
->q_vector
[i
]));
1408 ixgbe_reset_q_vectors(adapter
);
1410 free_irq(adapter
->pdev
->irq
, netdev
);
1415 * ixgbe_irq_disable - Mask off interrupt generation on the NIC
1416 * @adapter: board private structure
1418 static inline void ixgbe_irq_disable(struct ixgbe_adapter
*adapter
)
1420 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC
, ~0);
1421 IXGBE_WRITE_FLUSH(&adapter
->hw
);
1422 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
1424 for (i
= 0; i
< adapter
->num_msix_vectors
; i
++)
1425 synchronize_irq(adapter
->msix_entries
[i
].vector
);
1427 synchronize_irq(adapter
->pdev
->irq
);
1432 * ixgbe_irq_enable - Enable default interrupt generation settings
1433 * @adapter: board private structure
1435 static inline void ixgbe_irq_enable(struct ixgbe_adapter
*adapter
)
1438 mask
= IXGBE_EIMS_ENABLE_MASK
;
1439 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMS
, mask
);
1440 IXGBE_WRITE_FLUSH(&adapter
->hw
);
1444 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
1447 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter
*adapter
)
1449 struct ixgbe_hw
*hw
= &adapter
->hw
;
1451 IXGBE_WRITE_REG(hw
, IXGBE_EITR(0),
1452 EITR_INTS_PER_SEC_TO_REG(adapter
->eitr_param
));
1454 ixgbe_set_ivar(adapter
, IXGBE_IVAR_RX_QUEUE(0), 0);
1455 ixgbe_set_ivar(adapter
, IXGBE_IVAR_TX_QUEUE(0), 0);
1457 map_vector_to_rxq(adapter
, 0, 0);
1458 map_vector_to_txq(adapter
, 0, 0);
1460 DPRINTK(HW
, INFO
, "Legacy interrupt IVAR setup done\n");
1464 * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
1465 * @adapter: board private structure
1467 * Configure the Tx unit of the MAC after a reset.
1469 static void ixgbe_configure_tx(struct ixgbe_adapter
*adapter
)
1472 struct ixgbe_hw
*hw
= &adapter
->hw
;
1473 u32 i
, j
, tdlen
, txctrl
;
1475 /* Setup the HW Tx Head and Tail descriptor pointers */
1476 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
1477 struct ixgbe_ring
*ring
= &adapter
->tx_ring
[i
];
1480 tdlen
= ring
->count
* sizeof(union ixgbe_adv_tx_desc
);
1481 IXGBE_WRITE_REG(hw
, IXGBE_TDBAL(j
),
1482 (tdba
& DMA_32BIT_MASK
));
1483 IXGBE_WRITE_REG(hw
, IXGBE_TDBAH(j
), (tdba
>> 32));
1485 (ring
->count
* sizeof(union ixgbe_adv_tx_desc
));
1486 tdwba
|= IXGBE_TDWBAL_HEAD_WB_ENABLE
;
1487 IXGBE_WRITE_REG(hw
, IXGBE_TDWBAL(j
), tdwba
& DMA_32BIT_MASK
);
1488 IXGBE_WRITE_REG(hw
, IXGBE_TDWBAH(j
), (tdwba
>> 32));
1489 IXGBE_WRITE_REG(hw
, IXGBE_TDLEN(j
), tdlen
);
1490 IXGBE_WRITE_REG(hw
, IXGBE_TDH(j
), 0);
1491 IXGBE_WRITE_REG(hw
, IXGBE_TDT(j
), 0);
1492 adapter
->tx_ring
[i
].head
= IXGBE_TDH(j
);
1493 adapter
->tx_ring
[i
].tail
= IXGBE_TDT(j
);
1494 /* Disable Tx Head Writeback RO bit, since this hoses
1495 * bookkeeping if things aren't delivered in order.
1497 txctrl
= IXGBE_READ_REG(hw
, IXGBE_DCA_TXCTRL(j
));
1498 txctrl
&= ~IXGBE_DCA_TXCTRL_TX_WB_RO_EN
;
1499 IXGBE_WRITE_REG(hw
, IXGBE_DCA_TXCTRL(j
), txctrl
);
1503 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
1505 static void ixgbe_configure_srrctl(struct ixgbe_adapter
*adapter
, int index
)
1507 struct ixgbe_ring
*rx_ring
;
1512 /* program one srrctl register per VMDq index */
1513 if (adapter
->flags
& IXGBE_FLAG_VMDQ_ENABLED
) {
1515 mask
= (unsigned long) adapter
->ring_feature
[RING_F_RSS
].mask
;
1516 len
= sizeof(adapter
->ring_feature
[RING_F_VMDQ
].mask
) * 8;
1517 shift
= find_first_bit(&mask
, len
);
1518 queue0
= index
& mask
;
1519 index
= (index
& mask
) >> shift
;
1520 /* program one srrctl per RSS queue since RDRXCTL.MVMEN is enabled */
1522 mask
= (unsigned long) adapter
->ring_feature
[RING_F_RSS
].mask
;
1523 queue0
= index
& mask
;
1524 index
= index
& mask
;
1527 rx_ring
= &adapter
->rx_ring
[queue0
];
1529 srrctl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_SRRCTL(index
));
1531 srrctl
&= ~IXGBE_SRRCTL_BSIZEHDR_MASK
;
1532 srrctl
&= ~IXGBE_SRRCTL_BSIZEPKT_MASK
;
1534 if (adapter
->flags
& IXGBE_FLAG_RX_PS_ENABLED
) {
1535 srrctl
|= IXGBE_RXBUFFER_2048
>> IXGBE_SRRCTL_BSIZEPKT_SHIFT
;
1536 srrctl
|= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS
;
1537 srrctl
|= ((IXGBE_RX_HDR_SIZE
<<
1538 IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT
) &
1539 IXGBE_SRRCTL_BSIZEHDR_MASK
);
1541 srrctl
|= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF
;
1543 if (rx_ring
->rx_buf_len
== MAXIMUM_ETHERNET_VLAN_SIZE
)
1544 srrctl
|= IXGBE_RXBUFFER_2048
>>
1545 IXGBE_SRRCTL_BSIZEPKT_SHIFT
;
1547 srrctl
|= rx_ring
->rx_buf_len
>>
1548 IXGBE_SRRCTL_BSIZEPKT_SHIFT
;
1550 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_SRRCTL(index
), srrctl
);
1554 * ixgbe_get_skb_hdr - helper function for LRO header processing
1555 * @skb: pointer to sk_buff to be added to LRO packet
1556 * @iphdr: pointer to tcp header structure
1557 * @tcph: pointer to tcp header structure
1558 * @hdr_flags: pointer to header flags
1559 * @priv: private data
1561 static int ixgbe_get_skb_hdr(struct sk_buff
*skb
, void **iphdr
, void **tcph
,
1562 u64
*hdr_flags
, void *priv
)
1564 union ixgbe_adv_rx_desc
*rx_desc
= priv
;
1566 /* Verify that this is a valid IPv4 TCP packet */
1567 if (!((ixgbe_get_pkt_info(rx_desc
) & IXGBE_RXDADV_PKTTYPE_IPV4
) &&
1568 (ixgbe_get_pkt_info(rx_desc
) & IXGBE_RXDADV_PKTTYPE_TCP
)))
1571 /* Set network headers */
1572 skb_reset_network_header(skb
);
1573 skb_set_transport_header(skb
, ip_hdrlen(skb
));
1574 *iphdr
= ip_hdr(skb
);
1575 *tcph
= tcp_hdr(skb
);
1576 *hdr_flags
= LRO_IPV4
| LRO_TCP
;
1580 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1581 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1584 * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
1585 * @adapter: board private structure
1587 * Configure the Rx unit of the MAC after a reset.
1589 static void ixgbe_configure_rx(struct ixgbe_adapter
*adapter
)
1592 struct ixgbe_hw
*hw
= &adapter
->hw
;
1593 struct net_device
*netdev
= adapter
->netdev
;
1594 int max_frame
= netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
1596 u32 rdlen
, rxctrl
, rxcsum
;
1597 static const u32 seed
[10] = { 0xE291D73D, 0x1805EC6C, 0x2A94B30D,
1598 0xA54F2BEC, 0xEA49AF7C, 0xE214AD3D, 0xB855AABE,
1599 0x6A3E67EA, 0x14364D17, 0x3BED200D};
1606 /* Decide whether to use packet split mode or not */
1607 adapter
->flags
|= IXGBE_FLAG_RX_PS_ENABLED
;
1609 /* Set the RX buffer length according to the mode */
1610 if (adapter
->flags
& IXGBE_FLAG_RX_PS_ENABLED
) {
1611 rx_buf_len
= IXGBE_RX_HDR_SIZE
;
1613 if (netdev
->mtu
<= ETH_DATA_LEN
)
1614 rx_buf_len
= MAXIMUM_ETHERNET_VLAN_SIZE
;
1616 rx_buf_len
= ALIGN(max_frame
, 1024);
1619 fctrl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_FCTRL
);
1620 fctrl
|= IXGBE_FCTRL_BAM
;
1621 fctrl
|= IXGBE_FCTRL_DPF
; /* discard pause frames when FC enabled */
1622 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_FCTRL
, fctrl
);
1624 hlreg0
= IXGBE_READ_REG(hw
, IXGBE_HLREG0
);
1625 if (adapter
->netdev
->mtu
<= ETH_DATA_LEN
)
1626 hlreg0
&= ~IXGBE_HLREG0_JUMBOEN
;
1628 hlreg0
|= IXGBE_HLREG0_JUMBOEN
;
1629 IXGBE_WRITE_REG(hw
, IXGBE_HLREG0
, hlreg0
);
1631 pages
= PAGE_USE_COUNT(adapter
->netdev
->mtu
);
1633 rdlen
= adapter
->rx_ring
[0].count
* sizeof(union ixgbe_adv_rx_desc
);
1634 /* disable receives while setting up the descriptors */
1635 rxctrl
= IXGBE_READ_REG(hw
, IXGBE_RXCTRL
);
1636 IXGBE_WRITE_REG(hw
, IXGBE_RXCTRL
, rxctrl
& ~IXGBE_RXCTRL_RXEN
);
1638 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1639 * the Base and Length of the Rx Descriptor Ring */
1640 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
1641 rdba
= adapter
->rx_ring
[i
].dma
;
1642 j
= adapter
->rx_ring
[i
].reg_idx
;
1643 IXGBE_WRITE_REG(hw
, IXGBE_RDBAL(j
), (rdba
& DMA_32BIT_MASK
));
1644 IXGBE_WRITE_REG(hw
, IXGBE_RDBAH(j
), (rdba
>> 32));
1645 IXGBE_WRITE_REG(hw
, IXGBE_RDLEN(j
), rdlen
);
1646 IXGBE_WRITE_REG(hw
, IXGBE_RDH(j
), 0);
1647 IXGBE_WRITE_REG(hw
, IXGBE_RDT(j
), 0);
1648 adapter
->rx_ring
[i
].head
= IXGBE_RDH(j
);
1649 adapter
->rx_ring
[i
].tail
= IXGBE_RDT(j
);
1650 adapter
->rx_ring
[i
].rx_buf_len
= rx_buf_len
;
1651 /* Intitial LRO Settings */
1652 adapter
->rx_ring
[i
].lro_mgr
.max_aggr
= IXGBE_MAX_LRO_AGGREGATE
;
1653 adapter
->rx_ring
[i
].lro_mgr
.max_desc
= IXGBE_MAX_LRO_DESCRIPTORS
;
1654 adapter
->rx_ring
[i
].lro_mgr
.get_skb_header
= ixgbe_get_skb_hdr
;
1655 adapter
->rx_ring
[i
].lro_mgr
.features
= LRO_F_EXTRACT_VLAN_ID
;
1656 if (!(adapter
->flags
& IXGBE_FLAG_IN_NETPOLL
))
1657 adapter
->rx_ring
[i
].lro_mgr
.features
|= LRO_F_NAPI
;
1658 adapter
->rx_ring
[i
].lro_mgr
.dev
= adapter
->netdev
;
1659 adapter
->rx_ring
[i
].lro_mgr
.ip_summed
= CHECKSUM_UNNECESSARY
;
1660 adapter
->rx_ring
[i
].lro_mgr
.ip_summed_aggr
= CHECKSUM_UNNECESSARY
;
1662 ixgbe_configure_srrctl(adapter
, j
);
1666 * For VMDq support of different descriptor types or
1667 * buffer sizes through the use of multiple SRRCTL
1668 * registers, RDRXCTL.MVMEN must be set to 1
1670 * also, the manual doesn't mention it clearly but DCA hints
1671 * will only use queue 0's tags unless this bit is set. Side
1672 * effects of setting this bit are only that SRRCTL must be
1673 * fully programmed [0..15]
1675 rdrxctl
= IXGBE_READ_REG(hw
, IXGBE_RDRXCTL
);
1676 rdrxctl
|= IXGBE_RDRXCTL_MVMEN
;
1677 IXGBE_WRITE_REG(hw
, IXGBE_RDRXCTL
, rdrxctl
);
1680 if (adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
) {
1681 /* Fill out redirection table */
1682 for (i
= 0, j
= 0; i
< 128; i
++, j
++) {
1683 if (j
== adapter
->ring_feature
[RING_F_RSS
].indices
)
1685 /* reta = 4-byte sliding window of
1686 * 0x00..(indices-1)(indices-1)00..etc. */
1687 reta
= (reta
<< 8) | (j
* 0x11);
1689 IXGBE_WRITE_REG(hw
, IXGBE_RETA(i
>> 2), reta
);
1692 /* Fill out hash function seeds */
1693 for (i
= 0; i
< 10; i
++)
1694 IXGBE_WRITE_REG(hw
, IXGBE_RSSRK(i
), seed
[i
]);
1696 mrqc
= IXGBE_MRQC_RSSEN
1697 /* Perform hash on these packet types */
1698 | IXGBE_MRQC_RSS_FIELD_IPV4
1699 | IXGBE_MRQC_RSS_FIELD_IPV4_TCP
1700 | IXGBE_MRQC_RSS_FIELD_IPV4_UDP
1701 | IXGBE_MRQC_RSS_FIELD_IPV6_EX_TCP
1702 | IXGBE_MRQC_RSS_FIELD_IPV6_EX
1703 | IXGBE_MRQC_RSS_FIELD_IPV6
1704 | IXGBE_MRQC_RSS_FIELD_IPV6_TCP
1705 | IXGBE_MRQC_RSS_FIELD_IPV6_UDP
1706 | IXGBE_MRQC_RSS_FIELD_IPV6_EX_UDP
;
1707 IXGBE_WRITE_REG(hw
, IXGBE_MRQC
, mrqc
);
1710 rxcsum
= IXGBE_READ_REG(hw
, IXGBE_RXCSUM
);
1712 if (adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
||
1713 adapter
->flags
& IXGBE_FLAG_RX_CSUM_ENABLED
) {
1714 /* Disable indicating checksum in descriptor, enables
1716 rxcsum
|= IXGBE_RXCSUM_PCSD
;
1718 if (!(rxcsum
& IXGBE_RXCSUM_PCSD
)) {
1719 /* Enable IPv4 payload checksum for UDP fragments
1720 * if PCSD is not set */
1721 rxcsum
|= IXGBE_RXCSUM_IPPCSE
;
1724 IXGBE_WRITE_REG(hw
, IXGBE_RXCSUM
, rxcsum
);
1727 static void ixgbe_vlan_rx_register(struct net_device
*netdev
,
1728 struct vlan_group
*grp
)
1730 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
1733 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1734 ixgbe_irq_disable(adapter
);
1735 adapter
->vlgrp
= grp
;
1738 /* enable VLAN tag insert/strip */
1739 ctrl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_VLNCTRL
);
1740 ctrl
|= IXGBE_VLNCTRL_VME
;
1741 ctrl
&= ~IXGBE_VLNCTRL_CFIEN
;
1742 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_VLNCTRL
, ctrl
);
1745 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1746 ixgbe_irq_enable(adapter
);
1749 static void ixgbe_vlan_rx_add_vid(struct net_device
*netdev
, u16 vid
)
1751 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
1752 struct ixgbe_hw
*hw
= &adapter
->hw
;
1754 /* add VID to filter table */
1755 hw
->mac
.ops
.set_vfta(&adapter
->hw
, vid
, 0, true);
1758 static void ixgbe_vlan_rx_kill_vid(struct net_device
*netdev
, u16 vid
)
1760 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
1761 struct ixgbe_hw
*hw
= &adapter
->hw
;
1763 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1764 ixgbe_irq_disable(adapter
);
1766 vlan_group_set_device(adapter
->vlgrp
, vid
, NULL
);
1768 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1769 ixgbe_irq_enable(adapter
);
1771 /* remove VID from filter table */
1772 hw
->mac
.ops
.set_vfta(&adapter
->hw
, vid
, 0, false);
1775 static void ixgbe_restore_vlan(struct ixgbe_adapter
*adapter
)
1777 ixgbe_vlan_rx_register(adapter
->netdev
, adapter
->vlgrp
);
1779 if (adapter
->vlgrp
) {
1781 for (vid
= 0; vid
< VLAN_GROUP_ARRAY_LEN
; vid
++) {
1782 if (!vlan_group_get_device(adapter
->vlgrp
, vid
))
1784 ixgbe_vlan_rx_add_vid(adapter
->netdev
, vid
);
1789 static u8
*ixgbe_addr_list_itr(struct ixgbe_hw
*hw
, u8
**mc_addr_ptr
, u32
*vmdq
)
1791 struct dev_mc_list
*mc_ptr
;
1792 u8
*addr
= *mc_addr_ptr
;
1795 mc_ptr
= container_of(addr
, struct dev_mc_list
, dmi_addr
[0]);
1797 *mc_addr_ptr
= mc_ptr
->next
->dmi_addr
;
1799 *mc_addr_ptr
= NULL
;
1805 * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
1806 * @netdev: network interface device structure
1808 * The set_rx_method entry point is called whenever the unicast/multicast
1809 * address list or the network interface flags are updated. This routine is
1810 * responsible for configuring the hardware for proper unicast, multicast and
1813 static void ixgbe_set_rx_mode(struct net_device
*netdev
)
1815 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
1816 struct ixgbe_hw
*hw
= &adapter
->hw
;
1818 u8
*addr_list
= NULL
;
1821 /* Check for Promiscuous and All Multicast modes */
1823 fctrl
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
1824 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
1826 if (netdev
->flags
& IFF_PROMISC
) {
1827 hw
->addr_ctrl
.user_set_promisc
= 1;
1828 fctrl
|= (IXGBE_FCTRL_UPE
| IXGBE_FCTRL_MPE
);
1829 vlnctrl
&= ~IXGBE_VLNCTRL_VFE
;
1831 if (netdev
->flags
& IFF_ALLMULTI
) {
1832 fctrl
|= IXGBE_FCTRL_MPE
;
1833 fctrl
&= ~IXGBE_FCTRL_UPE
;
1835 fctrl
&= ~(IXGBE_FCTRL_UPE
| IXGBE_FCTRL_MPE
);
1837 vlnctrl
|= IXGBE_VLNCTRL_VFE
;
1838 hw
->addr_ctrl
.user_set_promisc
= 0;
1841 IXGBE_WRITE_REG(hw
, IXGBE_FCTRL
, fctrl
);
1842 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
1844 /* reprogram secondary unicast list */
1845 addr_count
= netdev
->uc_count
;
1847 addr_list
= netdev
->uc_list
->dmi_addr
;
1848 hw
->mac
.ops
.update_uc_addr_list(hw
, addr_list
, addr_count
,
1849 ixgbe_addr_list_itr
);
1851 /* reprogram multicast list */
1852 addr_count
= netdev
->mc_count
;
1854 addr_list
= netdev
->mc_list
->dmi_addr
;
1855 hw
->mac
.ops
.update_mc_addr_list(hw
, addr_list
, addr_count
,
1856 ixgbe_addr_list_itr
);
1859 static void ixgbe_napi_enable_all(struct ixgbe_adapter
*adapter
)
1862 struct ixgbe_q_vector
*q_vector
;
1863 int q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
1865 /* legacy and MSI only use one vector */
1866 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
))
1869 for (q_idx
= 0; q_idx
< q_vectors
; q_idx
++) {
1870 struct napi_struct
*napi
;
1871 q_vector
= &adapter
->q_vector
[q_idx
];
1872 if (!q_vector
->rxr_count
)
1874 napi
= &q_vector
->napi
;
1875 if ((adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) &&
1876 (q_vector
->rxr_count
> 1))
1877 napi
->poll
= &ixgbe_clean_rxonly_many
;
1883 static void ixgbe_napi_disable_all(struct ixgbe_adapter
*adapter
)
1886 struct ixgbe_q_vector
*q_vector
;
1887 int q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
1889 /* legacy and MSI only use one vector */
1890 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
))
1893 for (q_idx
= 0; q_idx
< q_vectors
; q_idx
++) {
1894 q_vector
= &adapter
->q_vector
[q_idx
];
1895 if (!q_vector
->rxr_count
)
1897 napi_disable(&q_vector
->napi
);
1901 static void ixgbe_configure(struct ixgbe_adapter
*adapter
)
1903 struct net_device
*netdev
= adapter
->netdev
;
1906 ixgbe_set_rx_mode(netdev
);
1908 ixgbe_restore_vlan(adapter
);
1910 ixgbe_configure_tx(adapter
);
1911 ixgbe_configure_rx(adapter
);
1912 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
1913 ixgbe_alloc_rx_buffers(adapter
, &adapter
->rx_ring
[i
],
1914 (adapter
->rx_ring
[i
].count
- 1));
1917 static int ixgbe_up_complete(struct ixgbe_adapter
*adapter
)
1919 struct net_device
*netdev
= adapter
->netdev
;
1920 struct ixgbe_hw
*hw
= &adapter
->hw
;
1922 int max_frame
= netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
1923 u32 txdctl
, rxdctl
, mhadd
;
1926 ixgbe_get_hw_control(adapter
);
1928 if ((adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) ||
1929 (adapter
->flags
& IXGBE_FLAG_MSI_ENABLED
)) {
1930 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
1931 gpie
= (IXGBE_GPIE_MSIX_MODE
| IXGBE_GPIE_EIAME
|
1932 IXGBE_GPIE_PBA_SUPPORT
| IXGBE_GPIE_OCD
);
1937 /* XXX: to interrupt immediately for EICS writes, enable this */
1938 /* gpie |= IXGBE_GPIE_EIMEN; */
1939 IXGBE_WRITE_REG(hw
, IXGBE_GPIE
, gpie
);
1942 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)) {
1943 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
1944 * specifically only auto mask tx and rx interrupts */
1945 IXGBE_WRITE_REG(hw
, IXGBE_EIAM
, IXGBE_EICS_RTX_QUEUE
);
1948 mhadd
= IXGBE_READ_REG(hw
, IXGBE_MHADD
);
1949 if (max_frame
!= (mhadd
>> IXGBE_MHADD_MFS_SHIFT
)) {
1950 mhadd
&= ~IXGBE_MHADD_MFS_MASK
;
1951 mhadd
|= max_frame
<< IXGBE_MHADD_MFS_SHIFT
;
1953 IXGBE_WRITE_REG(hw
, IXGBE_MHADD
, mhadd
);
1956 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
1957 j
= adapter
->tx_ring
[i
].reg_idx
;
1958 txdctl
= IXGBE_READ_REG(hw
, IXGBE_TXDCTL(j
));
1959 /* enable WTHRESH=8 descriptors, to encourage burst writeback */
1960 txdctl
|= (8 << 16);
1961 txdctl
|= IXGBE_TXDCTL_ENABLE
;
1962 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(j
), txdctl
);
1965 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
1966 j
= adapter
->rx_ring
[i
].reg_idx
;
1967 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(j
));
1968 /* enable PTHRESH=32 descriptors (half the internal cache)
1969 * and HTHRESH=0 descriptors (to minimize latency on fetch),
1970 * this also removes a pesky rx_no_buffer_count increment */
1972 rxdctl
|= IXGBE_RXDCTL_ENABLE
;
1973 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(j
), rxdctl
);
1975 /* enable all receives */
1976 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXCTRL
);
1977 rxdctl
|= (IXGBE_RXCTRL_DMBYPS
| IXGBE_RXCTRL_RXEN
);
1978 IXGBE_WRITE_REG(hw
, IXGBE_RXCTRL
, rxdctl
);
1980 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)
1981 ixgbe_configure_msix(adapter
);
1983 ixgbe_configure_msi_and_legacy(adapter
);
1985 clear_bit(__IXGBE_DOWN
, &adapter
->state
);
1986 ixgbe_napi_enable_all(adapter
);
1988 /* clear any pending interrupts, may auto mask */
1989 IXGBE_READ_REG(hw
, IXGBE_EICR
);
1991 ixgbe_irq_enable(adapter
);
1993 /* bring the link up in the watchdog, this could race with our first
1994 * link up interrupt but shouldn't be a problem */
1995 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_UPDATE
;
1996 adapter
->link_check_timeout
= jiffies
;
1997 mod_timer(&adapter
->watchdog_timer
, jiffies
);
2001 void ixgbe_reinit_locked(struct ixgbe_adapter
*adapter
)
2003 WARN_ON(in_interrupt());
2004 while (test_and_set_bit(__IXGBE_RESETTING
, &adapter
->state
))
2006 ixgbe_down(adapter
);
2008 clear_bit(__IXGBE_RESETTING
, &adapter
->state
);
2011 int ixgbe_up(struct ixgbe_adapter
*adapter
)
2013 /* hardware has been reset, we need to reload some things */
2014 ixgbe_configure(adapter
);
2016 return ixgbe_up_complete(adapter
);
2019 void ixgbe_reset(struct ixgbe_adapter
*adapter
)
2021 struct ixgbe_hw
*hw
= &adapter
->hw
;
2022 if (hw
->mac
.ops
.init_hw(hw
))
2023 dev_err(&adapter
->pdev
->dev
, "Hardware Error\n");
2025 /* reprogram the RAR[0] in case user changed it. */
2026 hw
->mac
.ops
.set_rar(hw
, 0, hw
->mac
.addr
, 0, IXGBE_RAH_AV
);
2031 static int ixgbe_resume(struct pci_dev
*pdev
)
2033 struct net_device
*netdev
= pci_get_drvdata(pdev
);
2034 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
2037 pci_set_power_state(pdev
, PCI_D0
);
2038 pci_restore_state(pdev
);
2039 err
= pci_enable_device(pdev
);
2041 printk(KERN_ERR
"ixgbe: Cannot enable PCI device from " \
2045 pci_set_master(pdev
);
2047 pci_enable_wake(pdev
, PCI_D3hot
, 0);
2048 pci_enable_wake(pdev
, PCI_D3cold
, 0);
2050 if (netif_running(netdev
)) {
2051 err
= ixgbe_request_irq(adapter
);
2056 ixgbe_reset(adapter
);
2058 if (netif_running(netdev
))
2061 netif_device_attach(netdev
);
2068 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
2069 * @adapter: board private structure
2070 * @rx_ring: ring to free buffers from
2072 static void ixgbe_clean_rx_ring(struct ixgbe_adapter
*adapter
,
2073 struct ixgbe_ring
*rx_ring
)
2075 struct pci_dev
*pdev
= adapter
->pdev
;
2079 /* Free all the Rx ring sk_buffs */
2081 for (i
= 0; i
< rx_ring
->count
; i
++) {
2082 struct ixgbe_rx_buffer
*rx_buffer_info
;
2084 rx_buffer_info
= &rx_ring
->rx_buffer_info
[i
];
2085 if (rx_buffer_info
->dma
) {
2086 pci_unmap_single(pdev
, rx_buffer_info
->dma
,
2087 rx_ring
->rx_buf_len
,
2088 PCI_DMA_FROMDEVICE
);
2089 rx_buffer_info
->dma
= 0;
2091 if (rx_buffer_info
->skb
) {
2092 dev_kfree_skb(rx_buffer_info
->skb
);
2093 rx_buffer_info
->skb
= NULL
;
2095 if (!rx_buffer_info
->page
)
2097 pci_unmap_page(pdev
, rx_buffer_info
->page_dma
, PAGE_SIZE
/ 2,
2098 PCI_DMA_FROMDEVICE
);
2099 rx_buffer_info
->page_dma
= 0;
2100 put_page(rx_buffer_info
->page
);
2101 rx_buffer_info
->page
= NULL
;
2102 rx_buffer_info
->page_offset
= 0;
2105 size
= sizeof(struct ixgbe_rx_buffer
) * rx_ring
->count
;
2106 memset(rx_ring
->rx_buffer_info
, 0, size
);
2108 /* Zero out the descriptor ring */
2109 memset(rx_ring
->desc
, 0, rx_ring
->size
);
2111 rx_ring
->next_to_clean
= 0;
2112 rx_ring
->next_to_use
= 0;
2114 writel(0, adapter
->hw
.hw_addr
+ rx_ring
->head
);
2115 writel(0, adapter
->hw
.hw_addr
+ rx_ring
->tail
);
2119 * ixgbe_clean_tx_ring - Free Tx Buffers
2120 * @adapter: board private structure
2121 * @tx_ring: ring to be cleaned
2123 static void ixgbe_clean_tx_ring(struct ixgbe_adapter
*adapter
,
2124 struct ixgbe_ring
*tx_ring
)
2126 struct ixgbe_tx_buffer
*tx_buffer_info
;
2130 /* Free all the Tx ring sk_buffs */
2132 for (i
= 0; i
< tx_ring
->count
; i
++) {
2133 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
2134 ixgbe_unmap_and_free_tx_resource(adapter
, tx_buffer_info
);
2137 size
= sizeof(struct ixgbe_tx_buffer
) * tx_ring
->count
;
2138 memset(tx_ring
->tx_buffer_info
, 0, size
);
2140 /* Zero out the descriptor ring */
2141 memset(tx_ring
->desc
, 0, tx_ring
->size
);
2143 tx_ring
->next_to_use
= 0;
2144 tx_ring
->next_to_clean
= 0;
2146 writel(0, adapter
->hw
.hw_addr
+ tx_ring
->head
);
2147 writel(0, adapter
->hw
.hw_addr
+ tx_ring
->tail
);
2151 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
2152 * @adapter: board private structure
2154 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter
*adapter
)
2158 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2159 ixgbe_clean_rx_ring(adapter
, &adapter
->rx_ring
[i
]);
2163 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
2164 * @adapter: board private structure
2166 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter
*adapter
)
2170 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
2171 ixgbe_clean_tx_ring(adapter
, &adapter
->tx_ring
[i
]);
2174 void ixgbe_down(struct ixgbe_adapter
*adapter
)
2176 struct net_device
*netdev
= adapter
->netdev
;
2177 struct ixgbe_hw
*hw
= &adapter
->hw
;
2182 /* signal that we are down to the interrupt handler */
2183 set_bit(__IXGBE_DOWN
, &adapter
->state
);
2185 /* disable receives */
2186 rxctrl
= IXGBE_READ_REG(hw
, IXGBE_RXCTRL
);
2187 IXGBE_WRITE_REG(hw
, IXGBE_RXCTRL
, rxctrl
& ~IXGBE_RXCTRL_RXEN
);
2189 netif_tx_disable(netdev
);
2191 IXGBE_WRITE_FLUSH(hw
);
2194 netif_tx_stop_all_queues(netdev
);
2196 ixgbe_irq_disable(adapter
);
2198 ixgbe_napi_disable_all(adapter
);
2200 del_timer_sync(&adapter
->watchdog_timer
);
2201 cancel_work_sync(&adapter
->watchdog_task
);
2203 /* disable transmits in the hardware now that interrupts are off */
2204 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
2205 j
= adapter
->tx_ring
[i
].reg_idx
;
2206 txdctl
= IXGBE_READ_REG(hw
, IXGBE_TXDCTL(j
));
2207 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(j
),
2208 (txdctl
& ~IXGBE_TXDCTL_ENABLE
));
2211 netif_carrier_off(netdev
);
2213 #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
2214 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
2215 adapter
->flags
&= ~IXGBE_FLAG_DCA_ENABLED
;
2216 dca_remove_requester(&adapter
->pdev
->dev
);
2220 if (!pci_channel_offline(adapter
->pdev
))
2221 ixgbe_reset(adapter
);
2222 ixgbe_clean_all_tx_rings(adapter
);
2223 ixgbe_clean_all_rx_rings(adapter
);
2225 #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
2226 /* since we reset the hardware DCA settings were cleared */
2227 if (dca_add_requester(&adapter
->pdev
->dev
) == 0) {
2228 adapter
->flags
|= IXGBE_FLAG_DCA_ENABLED
;
2229 /* always use CB2 mode, difference is masked
2230 * in the CB driver */
2231 IXGBE_WRITE_REG(hw
, IXGBE_DCA_CTRL
, 2);
2232 ixgbe_setup_dca(adapter
);
2237 static int ixgbe_suspend(struct pci_dev
*pdev
, pm_message_t state
)
2239 struct net_device
*netdev
= pci_get_drvdata(pdev
);
2240 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
2245 netif_device_detach(netdev
);
2247 if (netif_running(netdev
)) {
2248 ixgbe_down(adapter
);
2249 ixgbe_free_irq(adapter
);
2253 retval
= pci_save_state(pdev
);
2258 pci_enable_wake(pdev
, PCI_D3hot
, 0);
2259 pci_enable_wake(pdev
, PCI_D3cold
, 0);
2261 ixgbe_release_hw_control(adapter
);
2263 pci_disable_device(pdev
);
2265 pci_set_power_state(pdev
, pci_choose_state(pdev
, state
));
2270 static void ixgbe_shutdown(struct pci_dev
*pdev
)
2272 ixgbe_suspend(pdev
, PMSG_SUSPEND
);
2276 * ixgbe_poll - NAPI Rx polling callback
2277 * @napi: structure for representing this polling device
2278 * @budget: how many packets driver is allowed to clean
2280 * This function is used for legacy and MSI, NAPI mode
2282 static int ixgbe_poll(struct napi_struct
*napi
, int budget
)
2284 struct ixgbe_q_vector
*q_vector
= container_of(napi
,
2285 struct ixgbe_q_vector
, napi
);
2286 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
2287 int tx_cleaned
= 0, work_done
= 0;
2289 #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
2290 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
2291 ixgbe_update_tx_dca(adapter
, adapter
->tx_ring
);
2292 ixgbe_update_rx_dca(adapter
, adapter
->rx_ring
);
2296 tx_cleaned
= ixgbe_clean_tx_irq(adapter
, adapter
->tx_ring
);
2297 ixgbe_clean_rx_irq(adapter
, adapter
->rx_ring
, &work_done
, budget
);
2302 /* If budget not fully consumed, exit the polling mode */
2303 if (work_done
< budget
) {
2304 netif_rx_complete(adapter
->netdev
, napi
);
2305 if (adapter
->itr_setting
& 3)
2306 ixgbe_set_itr(adapter
);
2307 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
2308 ixgbe_irq_enable(adapter
);
2315 * ixgbe_tx_timeout - Respond to a Tx Hang
2316 * @netdev: network interface device structure
2318 static void ixgbe_tx_timeout(struct net_device
*netdev
)
2320 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
2322 /* Do the reset outside of interrupt context */
2323 schedule_work(&adapter
->reset_task
);
2326 static void ixgbe_reset_task(struct work_struct
*work
)
2328 struct ixgbe_adapter
*adapter
;
2329 adapter
= container_of(work
, struct ixgbe_adapter
, reset_task
);
2331 adapter
->tx_timeout_count
++;
2333 ixgbe_reinit_locked(adapter
);
2336 static void ixgbe_set_num_queues(struct ixgbe_adapter
*adapter
)
2338 int nrq
= 1, ntq
= 1;
2339 int feature_mask
= 0, rss_i
, rss_m
;
2341 /* Number of supported queues */
2342 switch (adapter
->hw
.mac
.type
) {
2343 case ixgbe_mac_82598EB
:
2344 rss_i
= adapter
->ring_feature
[RING_F_RSS
].indices
;
2346 feature_mask
|= IXGBE_FLAG_RSS_ENABLED
;
2348 switch (adapter
->flags
& feature_mask
) {
2349 case (IXGBE_FLAG_RSS_ENABLED
):
2363 adapter
->ring_feature
[RING_F_RSS
].indices
= rss_i
;
2364 adapter
->ring_feature
[RING_F_RSS
].mask
= rss_m
;
2372 adapter
->num_rx_queues
= nrq
;
2373 adapter
->num_tx_queues
= ntq
;
2376 static void ixgbe_acquire_msix_vectors(struct ixgbe_adapter
*adapter
,
2379 int err
, vector_threshold
;
2381 /* We'll want at least 3 (vector_threshold):
2384 * 3) Other (Link Status Change, etc.)
2385 * 4) TCP Timer (optional)
2387 vector_threshold
= MIN_MSIX_COUNT
;
2389 /* The more we get, the more we will assign to Tx/Rx Cleanup
2390 * for the separate queues...where Rx Cleanup >= Tx Cleanup.
2391 * Right now, we simply care about how many we'll get; we'll
2392 * set them up later while requesting irq's.
2394 while (vectors
>= vector_threshold
) {
2395 err
= pci_enable_msix(adapter
->pdev
, adapter
->msix_entries
,
2397 if (!err
) /* Success in acquiring all requested vectors. */
2400 vectors
= 0; /* Nasty failure, quit now */
2401 else /* err == number of vectors we should try again with */
2405 if (vectors
< vector_threshold
) {
2406 /* Can't allocate enough MSI-X interrupts? Oh well.
2407 * This just means we'll go with either a single MSI
2408 * vector or fall back to legacy interrupts.
2410 DPRINTK(HW
, DEBUG
, "Unable to allocate MSI-X interrupts\n");
2411 adapter
->flags
&= ~IXGBE_FLAG_MSIX_ENABLED
;
2412 kfree(adapter
->msix_entries
);
2413 adapter
->msix_entries
= NULL
;
2414 adapter
->flags
&= ~IXGBE_FLAG_RSS_ENABLED
;
2415 ixgbe_set_num_queues(adapter
);
2417 adapter
->flags
|= IXGBE_FLAG_MSIX_ENABLED
; /* Woot! */
2418 adapter
->num_msix_vectors
= vectors
;
2423 * ixgbe_cache_ring_register - Descriptor ring to register mapping
2424 * @adapter: board private structure to initialize
2426 * Once we know the feature-set enabled for the device, we'll cache
2427 * the register offset the descriptor ring is assigned to.
2429 static void __devinit
ixgbe_cache_ring_register(struct ixgbe_adapter
*adapter
)
2431 /* TODO: Remove all uses of the indices in the cases where multiple
2432 * features are OR'd together, if the feature set makes sense.
2434 int feature_mask
= 0, rss_i
;
2435 int i
, txr_idx
, rxr_idx
;
2437 /* Number of supported queues */
2438 switch (adapter
->hw
.mac
.type
) {
2439 case ixgbe_mac_82598EB
:
2440 rss_i
= adapter
->ring_feature
[RING_F_RSS
].indices
;
2443 feature_mask
|= IXGBE_FLAG_RSS_ENABLED
;
2444 switch (adapter
->flags
& feature_mask
) {
2445 case (IXGBE_FLAG_RSS_ENABLED
):
2446 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2447 adapter
->rx_ring
[i
].reg_idx
= i
;
2448 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
2449 adapter
->tx_ring
[i
].reg_idx
= i
;
2462 * ixgbe_alloc_queues - Allocate memory for all rings
2463 * @adapter: board private structure to initialize
2465 * We allocate one ring per queue at run-time since we don't know the
2466 * number of queues at compile-time. The polling_netdev array is
2467 * intended for Multiqueue, but should work fine with a single queue.
2469 static int __devinit
ixgbe_alloc_queues(struct ixgbe_adapter
*adapter
)
2473 adapter
->tx_ring
= kcalloc(adapter
->num_tx_queues
,
2474 sizeof(struct ixgbe_ring
), GFP_KERNEL
);
2475 if (!adapter
->tx_ring
)
2476 goto err_tx_ring_allocation
;
2478 adapter
->rx_ring
= kcalloc(adapter
->num_rx_queues
,
2479 sizeof(struct ixgbe_ring
), GFP_KERNEL
);
2480 if (!adapter
->rx_ring
)
2481 goto err_rx_ring_allocation
;
2483 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
2484 adapter
->tx_ring
[i
].count
= adapter
->tx_ring_count
;
2485 adapter
->tx_ring
[i
].queue_index
= i
;
2488 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
2489 adapter
->rx_ring
[i
].count
= adapter
->rx_ring_count
;
2490 adapter
->rx_ring
[i
].queue_index
= i
;
2493 ixgbe_cache_ring_register(adapter
);
2497 err_rx_ring_allocation
:
2498 kfree(adapter
->tx_ring
);
2499 err_tx_ring_allocation
:
2504 * ixgbe_set_interrupt_capability - set MSI-X or MSI if supported
2505 * @adapter: board private structure to initialize
2507 * Attempt to configure the interrupts using the best available
2508 * capabilities of the hardware and the kernel.
2510 static int __devinit
ixgbe_set_interrupt_capability(struct ixgbe_adapter
2514 int vector
, v_budget
;
2517 * It's easy to be greedy for MSI-X vectors, but it really
2518 * doesn't do us much good if we have a lot more vectors
2519 * than CPU's. So let's be conservative and only ask for
2520 * (roughly) twice the number of vectors as there are CPU's.
2522 v_budget
= min(adapter
->num_rx_queues
+ adapter
->num_tx_queues
,
2523 (int)(num_online_cpus() * 2)) + NON_Q_VECTORS
;
2526 * At the same time, hardware can only support a maximum of
2527 * MAX_MSIX_COUNT vectors. With features such as RSS and VMDq,
2528 * we can easily reach upwards of 64 Rx descriptor queues and
2529 * 32 Tx queues. Thus, we cap it off in those rare cases where
2530 * the cpu count also exceeds our vector limit.
2532 v_budget
= min(v_budget
, MAX_MSIX_COUNT
);
2534 /* A failure in MSI-X entry allocation isn't fatal, but it does
2535 * mean we disable MSI-X capabilities of the adapter. */
2536 adapter
->msix_entries
= kcalloc(v_budget
,
2537 sizeof(struct msix_entry
), GFP_KERNEL
);
2538 if (!adapter
->msix_entries
) {
2539 adapter
->flags
&= ~IXGBE_FLAG_RSS_ENABLED
;
2540 ixgbe_set_num_queues(adapter
);
2541 kfree(adapter
->tx_ring
);
2542 kfree(adapter
->rx_ring
);
2543 err
= ixgbe_alloc_queues(adapter
);
2545 DPRINTK(PROBE
, ERR
, "Unable to allocate memory "
2553 for (vector
= 0; vector
< v_budget
; vector
++)
2554 adapter
->msix_entries
[vector
].entry
= vector
;
2556 ixgbe_acquire_msix_vectors(adapter
, v_budget
);
2558 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)
2562 err
= pci_enable_msi(adapter
->pdev
);
2564 adapter
->flags
|= IXGBE_FLAG_MSI_ENABLED
;
2566 DPRINTK(HW
, DEBUG
, "Unable to allocate MSI interrupt, "
2567 "falling back to legacy. Error: %d\n", err
);
2573 /* Notify the stack of the (possibly) reduced Tx Queue count. */
2574 adapter
->netdev
->real_num_tx_queues
= adapter
->num_tx_queues
;
2579 static void ixgbe_reset_interrupt_capability(struct ixgbe_adapter
*adapter
)
2581 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
2582 adapter
->flags
&= ~IXGBE_FLAG_MSIX_ENABLED
;
2583 pci_disable_msix(adapter
->pdev
);
2584 kfree(adapter
->msix_entries
);
2585 adapter
->msix_entries
= NULL
;
2586 } else if (adapter
->flags
& IXGBE_FLAG_MSI_ENABLED
) {
2587 adapter
->flags
&= ~IXGBE_FLAG_MSI_ENABLED
;
2588 pci_disable_msi(adapter
->pdev
);
2594 * ixgbe_init_interrupt_scheme - Determine proper interrupt scheme
2595 * @adapter: board private structure to initialize
2597 * We determine which interrupt scheme to use based on...
2598 * - Kernel support (MSI, MSI-X)
2599 * - which can be user-defined (via MODULE_PARAM)
2600 * - Hardware queue count (num_*_queues)
2601 * - defined by miscellaneous hardware support/features (RSS, etc.)
2603 static int __devinit
ixgbe_init_interrupt_scheme(struct ixgbe_adapter
*adapter
)
2607 /* Number of supported queues */
2608 ixgbe_set_num_queues(adapter
);
2610 err
= ixgbe_alloc_queues(adapter
);
2612 DPRINTK(PROBE
, ERR
, "Unable to allocate memory for queues\n");
2613 goto err_alloc_queues
;
2616 err
= ixgbe_set_interrupt_capability(adapter
);
2618 DPRINTK(PROBE
, ERR
, "Unable to setup interrupt capabilities\n");
2619 goto err_set_interrupt
;
2622 DPRINTK(DRV
, INFO
, "Multiqueue %s: Rx Queue count = %u, "
2623 "Tx Queue count = %u\n",
2624 (adapter
->num_rx_queues
> 1) ? "Enabled" :
2625 "Disabled", adapter
->num_rx_queues
, adapter
->num_tx_queues
);
2627 set_bit(__IXGBE_DOWN
, &adapter
->state
);
2632 kfree(adapter
->tx_ring
);
2633 kfree(adapter
->rx_ring
);
2639 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
2640 * @adapter: board private structure to initialize
2642 * ixgbe_sw_init initializes the Adapter private data structure.
2643 * Fields are initialized based on PCI device information and
2644 * OS network device settings (MTU size).
2646 static int __devinit
ixgbe_sw_init(struct ixgbe_adapter
*adapter
)
2648 struct ixgbe_hw
*hw
= &adapter
->hw
;
2649 struct pci_dev
*pdev
= adapter
->pdev
;
2652 /* PCI config space info */
2654 hw
->vendor_id
= pdev
->vendor
;
2655 hw
->device_id
= pdev
->device
;
2656 hw
->revision_id
= pdev
->revision
;
2657 hw
->subsystem_vendor_id
= pdev
->subsystem_vendor
;
2658 hw
->subsystem_device_id
= pdev
->subsystem_device
;
2660 /* Set capability flags */
2661 rss
= min(IXGBE_MAX_RSS_INDICES
, (int)num_online_cpus());
2662 adapter
->ring_feature
[RING_F_RSS
].indices
= rss
;
2663 adapter
->flags
|= IXGBE_FLAG_RSS_ENABLED
;
2665 /* default flow control settings */
2666 hw
->fc
.original_type
= ixgbe_fc_none
;
2667 hw
->fc
.type
= ixgbe_fc_none
;
2668 hw
->fc
.high_water
= IXGBE_DEFAULT_FCRTH
;
2669 hw
->fc
.low_water
= IXGBE_DEFAULT_FCRTL
;
2670 hw
->fc
.pause_time
= IXGBE_DEFAULT_FCPAUSE
;
2671 hw
->fc
.send_xon
= true;
2673 /* select 10G link by default */
2674 hw
->mac
.link_mode_select
= IXGBE_AUTOC_LMS_10G_LINK_NO_AN
;
2676 /* enable itr by default in dynamic mode */
2677 adapter
->itr_setting
= 1;
2678 adapter
->eitr_param
= 20000;
2680 /* set defaults for eitr in MegaBytes */
2681 adapter
->eitr_low
= 10;
2682 adapter
->eitr_high
= 20;
2684 /* set default ring sizes */
2685 adapter
->tx_ring_count
= IXGBE_DEFAULT_TXD
;
2686 adapter
->rx_ring_count
= IXGBE_DEFAULT_RXD
;
2688 /* initialize eeprom parameters */
2689 if (ixgbe_init_eeprom_params_generic(hw
)) {
2690 dev_err(&pdev
->dev
, "EEPROM initialization failed\n");
2694 /* enable rx csum by default */
2695 adapter
->flags
|= IXGBE_FLAG_RX_CSUM_ENABLED
;
2697 set_bit(__IXGBE_DOWN
, &adapter
->state
);
2703 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
2704 * @adapter: board private structure
2705 * @tx_ring: tx descriptor ring (for a specific queue) to setup
2707 * Return 0 on success, negative on failure
2709 int ixgbe_setup_tx_resources(struct ixgbe_adapter
*adapter
,
2710 struct ixgbe_ring
*tx_ring
)
2712 struct pci_dev
*pdev
= adapter
->pdev
;
2715 size
= sizeof(struct ixgbe_tx_buffer
) * tx_ring
->count
;
2716 tx_ring
->tx_buffer_info
= vmalloc(size
);
2717 if (!tx_ring
->tx_buffer_info
)
2719 memset(tx_ring
->tx_buffer_info
, 0, size
);
2721 /* round up to nearest 4K */
2722 tx_ring
->size
= tx_ring
->count
* sizeof(union ixgbe_adv_tx_desc
) +
2724 tx_ring
->size
= ALIGN(tx_ring
->size
, 4096);
2726 tx_ring
->desc
= pci_alloc_consistent(pdev
, tx_ring
->size
,
2731 tx_ring
->next_to_use
= 0;
2732 tx_ring
->next_to_clean
= 0;
2733 tx_ring
->work_limit
= tx_ring
->count
;
2737 vfree(tx_ring
->tx_buffer_info
);
2738 tx_ring
->tx_buffer_info
= NULL
;
2739 DPRINTK(PROBE
, ERR
, "Unable to allocate memory for the transmit "
2740 "descriptor ring\n");
2745 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
2746 * @adapter: board private structure
2747 * @rx_ring: rx descriptor ring (for a specific queue) to setup
2749 * Returns 0 on success, negative on failure
2751 int ixgbe_setup_rx_resources(struct ixgbe_adapter
*adapter
,
2752 struct ixgbe_ring
*rx_ring
)
2754 struct pci_dev
*pdev
= adapter
->pdev
;
2757 size
= sizeof(struct net_lro_desc
) * IXGBE_MAX_LRO_DESCRIPTORS
;
2758 rx_ring
->lro_mgr
.lro_arr
= vmalloc(size
);
2759 if (!rx_ring
->lro_mgr
.lro_arr
)
2761 memset(rx_ring
->lro_mgr
.lro_arr
, 0, size
);
2763 size
= sizeof(struct ixgbe_rx_buffer
) * rx_ring
->count
;
2764 rx_ring
->rx_buffer_info
= vmalloc(size
);
2765 if (!rx_ring
->rx_buffer_info
) {
2767 "vmalloc allocation failed for the rx desc ring\n");
2770 memset(rx_ring
->rx_buffer_info
, 0, size
);
2772 /* Round up to nearest 4K */
2773 rx_ring
->size
= rx_ring
->count
* sizeof(union ixgbe_adv_rx_desc
);
2774 rx_ring
->size
= ALIGN(rx_ring
->size
, 4096);
2776 rx_ring
->desc
= pci_alloc_consistent(pdev
, rx_ring
->size
, &rx_ring
->dma
);
2778 if (!rx_ring
->desc
) {
2780 "Memory allocation failed for the rx desc ring\n");
2781 vfree(rx_ring
->rx_buffer_info
);
2785 rx_ring
->next_to_clean
= 0;
2786 rx_ring
->next_to_use
= 0;
2791 vfree(rx_ring
->lro_mgr
.lro_arr
);
2792 rx_ring
->lro_mgr
.lro_arr
= NULL
;
2797 * ixgbe_free_tx_resources - Free Tx Resources per Queue
2798 * @adapter: board private structure
2799 * @tx_ring: Tx descriptor ring for a specific queue
2801 * Free all transmit software resources
2803 void ixgbe_free_tx_resources(struct ixgbe_adapter
*adapter
,
2804 struct ixgbe_ring
*tx_ring
)
2806 struct pci_dev
*pdev
= adapter
->pdev
;
2808 ixgbe_clean_tx_ring(adapter
, tx_ring
);
2810 vfree(tx_ring
->tx_buffer_info
);
2811 tx_ring
->tx_buffer_info
= NULL
;
2813 pci_free_consistent(pdev
, tx_ring
->size
, tx_ring
->desc
, tx_ring
->dma
);
2815 tx_ring
->desc
= NULL
;
2819 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
2820 * @adapter: board private structure
2822 * Free all transmit software resources
2824 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter
*adapter
)
2828 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
2829 ixgbe_free_tx_resources(adapter
, &adapter
->tx_ring
[i
]);
2833 * ixgbe_ree_rx_resources - Free Rx Resources
2834 * @adapter: board private structure
2835 * @rx_ring: ring to clean the resources from
2837 * Free all receive software resources
2839 void ixgbe_free_rx_resources(struct ixgbe_adapter
*adapter
,
2840 struct ixgbe_ring
*rx_ring
)
2842 struct pci_dev
*pdev
= adapter
->pdev
;
2844 vfree(rx_ring
->lro_mgr
.lro_arr
);
2845 rx_ring
->lro_mgr
.lro_arr
= NULL
;
2847 ixgbe_clean_rx_ring(adapter
, rx_ring
);
2849 vfree(rx_ring
->rx_buffer_info
);
2850 rx_ring
->rx_buffer_info
= NULL
;
2852 pci_free_consistent(pdev
, rx_ring
->size
, rx_ring
->desc
, rx_ring
->dma
);
2854 rx_ring
->desc
= NULL
;
2858 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
2859 * @adapter: board private structure
2861 * Free all receive software resources
2863 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter
*adapter
)
2867 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2868 ixgbe_free_rx_resources(adapter
, &adapter
->rx_ring
[i
]);
2872 * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
2873 * @adapter: board private structure
2875 * If this function returns with an error, then it's possible one or
2876 * more of the rings is populated (while the rest are not). It is the
2877 * callers duty to clean those orphaned rings.
2879 * Return 0 on success, negative on failure
2881 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter
*adapter
)
2885 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
2886 err
= ixgbe_setup_tx_resources(adapter
, &adapter
->tx_ring
[i
]);
2889 "Allocation for Tx Queue %u failed\n", i
);
2898 * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
2899 * @adapter: board private structure
2901 * If this function returns with an error, then it's possible one or
2902 * more of the rings is populated (while the rest are not). It is the
2903 * callers duty to clean those orphaned rings.
2905 * Return 0 on success, negative on failure
2908 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter
*adapter
)
2912 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
2913 err
= ixgbe_setup_rx_resources(adapter
, &adapter
->rx_ring
[i
]);
2916 "Allocation for Rx Queue %u failed\n", i
);
2925 * ixgbe_change_mtu - Change the Maximum Transfer Unit
2926 * @netdev: network interface device structure
2927 * @new_mtu: new value for maximum frame size
2929 * Returns 0 on success, negative on failure
2931 static int ixgbe_change_mtu(struct net_device
*netdev
, int new_mtu
)
2933 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
2934 int max_frame
= new_mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
2936 /* MTU < 68 is an error and causes problems on some kernels */
2937 if ((new_mtu
< 68) || (max_frame
> IXGBE_MAX_JUMBO_FRAME_SIZE
))
2940 DPRINTK(PROBE
, INFO
, "changing MTU from %d to %d\n",
2941 netdev
->mtu
, new_mtu
);
2942 /* must set new MTU before calling down or up */
2943 netdev
->mtu
= new_mtu
;
2945 if (netif_running(netdev
))
2946 ixgbe_reinit_locked(adapter
);
2952 * ixgbe_open - Called when a network interface is made active
2953 * @netdev: network interface device structure
2955 * Returns 0 on success, negative value on failure
2957 * The open entry point is called when a network interface is made
2958 * active by the system (IFF_UP). At this point all resources needed
2959 * for transmit and receive operations are allocated, the interrupt
2960 * handler is registered with the OS, the watchdog timer is started,
2961 * and the stack is notified that the interface is ready.
2963 static int ixgbe_open(struct net_device
*netdev
)
2965 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
2968 /* disallow open during test */
2969 if (test_bit(__IXGBE_TESTING
, &adapter
->state
))
2972 /* allocate transmit descriptors */
2973 err
= ixgbe_setup_all_tx_resources(adapter
);
2977 /* allocate receive descriptors */
2978 err
= ixgbe_setup_all_rx_resources(adapter
);
2982 ixgbe_configure(adapter
);
2984 err
= ixgbe_request_irq(adapter
);
2988 err
= ixgbe_up_complete(adapter
);
2992 netif_tx_start_all_queues(netdev
);
2997 ixgbe_release_hw_control(adapter
);
2998 ixgbe_free_irq(adapter
);
3000 ixgbe_free_all_rx_resources(adapter
);
3002 ixgbe_free_all_tx_resources(adapter
);
3004 ixgbe_reset(adapter
);
3010 * ixgbe_close - Disables a network interface
3011 * @netdev: network interface device structure
3013 * Returns 0, this is not allowed to fail
3015 * The close entry point is called when an interface is de-activated
3016 * by the OS. The hardware is still under the drivers control, but
3017 * needs to be disabled. A global MAC reset is issued to stop the
3018 * hardware, and all transmit and receive resources are freed.
3020 static int ixgbe_close(struct net_device
*netdev
)
3022 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3024 ixgbe_down(adapter
);
3025 ixgbe_free_irq(adapter
);
3027 ixgbe_free_all_tx_resources(adapter
);
3028 ixgbe_free_all_rx_resources(adapter
);
3030 ixgbe_release_hw_control(adapter
);
3036 * ixgbe_update_stats - Update the board statistics counters.
3037 * @adapter: board private structure
3039 void ixgbe_update_stats(struct ixgbe_adapter
*adapter
)
3041 struct ixgbe_hw
*hw
= &adapter
->hw
;
3043 u32 i
, missed_rx
= 0, mpc
, bprc
, lxon
, lxoff
, xon_off_tot
;
3045 adapter
->stats
.crcerrs
+= IXGBE_READ_REG(hw
, IXGBE_CRCERRS
);
3046 for (i
= 0; i
< 8; i
++) {
3047 /* for packet buffers not used, the register should read 0 */
3048 mpc
= IXGBE_READ_REG(hw
, IXGBE_MPC(i
));
3050 adapter
->stats
.mpc
[i
] += mpc
;
3051 total_mpc
+= adapter
->stats
.mpc
[i
];
3052 adapter
->stats
.rnbc
[i
] += IXGBE_READ_REG(hw
, IXGBE_RNBC(i
));
3054 adapter
->stats
.gprc
+= IXGBE_READ_REG(hw
, IXGBE_GPRC
);
3055 /* work around hardware counting issue */
3056 adapter
->stats
.gprc
-= missed_rx
;
3058 /* 82598 hardware only has a 32 bit counter in the high register */
3059 adapter
->stats
.gorc
+= IXGBE_READ_REG(hw
, IXGBE_GORCH
);
3060 adapter
->stats
.gotc
+= IXGBE_READ_REG(hw
, IXGBE_GOTCH
);
3061 adapter
->stats
.tor
+= IXGBE_READ_REG(hw
, IXGBE_TORH
);
3062 bprc
= IXGBE_READ_REG(hw
, IXGBE_BPRC
);
3063 adapter
->stats
.bprc
+= bprc
;
3064 adapter
->stats
.mprc
+= IXGBE_READ_REG(hw
, IXGBE_MPRC
);
3065 adapter
->stats
.mprc
-= bprc
;
3066 adapter
->stats
.roc
+= IXGBE_READ_REG(hw
, IXGBE_ROC
);
3067 adapter
->stats
.prc64
+= IXGBE_READ_REG(hw
, IXGBE_PRC64
);
3068 adapter
->stats
.prc127
+= IXGBE_READ_REG(hw
, IXGBE_PRC127
);
3069 adapter
->stats
.prc255
+= IXGBE_READ_REG(hw
, IXGBE_PRC255
);
3070 adapter
->stats
.prc511
+= IXGBE_READ_REG(hw
, IXGBE_PRC511
);
3071 adapter
->stats
.prc1023
+= IXGBE_READ_REG(hw
, IXGBE_PRC1023
);
3072 adapter
->stats
.prc1522
+= IXGBE_READ_REG(hw
, IXGBE_PRC1522
);
3073 adapter
->stats
.rlec
+= IXGBE_READ_REG(hw
, IXGBE_RLEC
);
3074 adapter
->stats
.lxonrxc
+= IXGBE_READ_REG(hw
, IXGBE_LXONRXC
);
3075 adapter
->stats
.lxoffrxc
+= IXGBE_READ_REG(hw
, IXGBE_LXOFFRXC
);
3076 lxon
= IXGBE_READ_REG(hw
, IXGBE_LXONTXC
);
3077 adapter
->stats
.lxontxc
+= lxon
;
3078 lxoff
= IXGBE_READ_REG(hw
, IXGBE_LXOFFTXC
);
3079 adapter
->stats
.lxofftxc
+= lxoff
;
3080 adapter
->stats
.ruc
+= IXGBE_READ_REG(hw
, IXGBE_RUC
);
3081 adapter
->stats
.gptc
+= IXGBE_READ_REG(hw
, IXGBE_GPTC
);
3082 adapter
->stats
.mptc
+= IXGBE_READ_REG(hw
, IXGBE_MPTC
);
3084 * 82598 errata - tx of flow control packets is included in tx counters
3086 xon_off_tot
= lxon
+ lxoff
;
3087 adapter
->stats
.gptc
-= xon_off_tot
;
3088 adapter
->stats
.mptc
-= xon_off_tot
;
3089 adapter
->stats
.gotc
-= (xon_off_tot
* (ETH_ZLEN
+ ETH_FCS_LEN
));
3090 adapter
->stats
.ruc
+= IXGBE_READ_REG(hw
, IXGBE_RUC
);
3091 adapter
->stats
.rfc
+= IXGBE_READ_REG(hw
, IXGBE_RFC
);
3092 adapter
->stats
.rjc
+= IXGBE_READ_REG(hw
, IXGBE_RJC
);
3093 adapter
->stats
.tpr
+= IXGBE_READ_REG(hw
, IXGBE_TPR
);
3094 adapter
->stats
.ptc64
+= IXGBE_READ_REG(hw
, IXGBE_PTC64
);
3095 adapter
->stats
.ptc64
-= xon_off_tot
;
3096 adapter
->stats
.ptc127
+= IXGBE_READ_REG(hw
, IXGBE_PTC127
);
3097 adapter
->stats
.ptc255
+= IXGBE_READ_REG(hw
, IXGBE_PTC255
);
3098 adapter
->stats
.ptc511
+= IXGBE_READ_REG(hw
, IXGBE_PTC511
);
3099 adapter
->stats
.ptc1023
+= IXGBE_READ_REG(hw
, IXGBE_PTC1023
);
3100 adapter
->stats
.ptc1522
+= IXGBE_READ_REG(hw
, IXGBE_PTC1522
);
3101 adapter
->stats
.bptc
+= IXGBE_READ_REG(hw
, IXGBE_BPTC
);
3103 /* Fill out the OS statistics structure */
3104 adapter
->net_stats
.multicast
= adapter
->stats
.mprc
;
3107 adapter
->net_stats
.rx_errors
= adapter
->stats
.crcerrs
+
3108 adapter
->stats
.rlec
;
3109 adapter
->net_stats
.rx_dropped
= 0;
3110 adapter
->net_stats
.rx_length_errors
= adapter
->stats
.rlec
;
3111 adapter
->net_stats
.rx_crc_errors
= adapter
->stats
.crcerrs
;
3112 adapter
->net_stats
.rx_missed_errors
= total_mpc
;
3116 * ixgbe_watchdog - Timer Call-back
3117 * @data: pointer to adapter cast into an unsigned long
3119 static void ixgbe_watchdog(unsigned long data
)
3121 struct ixgbe_adapter
*adapter
= (struct ixgbe_adapter
*)data
;
3122 struct ixgbe_hw
*hw
= &adapter
->hw
;
3124 /* Do the watchdog outside of interrupt context due to the lovely
3125 * delays that some of the newer hardware requires */
3126 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
3127 /* Cause software interrupt to ensure rx rings are cleaned */
3128 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
3130 (1 << (adapter
->num_msix_vectors
- NON_Q_VECTORS
)) - 1;
3131 IXGBE_WRITE_REG(hw
, IXGBE_EICS
, eics
);
3133 /* For legacy and MSI interrupts don't set any bits that
3134 * are enabled for EIAM, because this operation would
3135 * set *both* EIMS and EICS for any bit in EIAM */
3136 IXGBE_WRITE_REG(hw
, IXGBE_EICS
,
3137 (IXGBE_EICS_TCP_TIMER
| IXGBE_EICS_OTHER
));
3139 /* Reset the timer */
3140 mod_timer(&adapter
->watchdog_timer
,
3141 round_jiffies(jiffies
+ 2 * HZ
));
3144 schedule_work(&adapter
->watchdog_task
);
3148 * ixgbe_watchdog_task - worker thread to bring link up
3149 * @work: pointer to work_struct containing our data
3151 static void ixgbe_watchdog_task(struct work_struct
*work
)
3153 struct ixgbe_adapter
*adapter
= container_of(work
,
3154 struct ixgbe_adapter
,
3156 struct net_device
*netdev
= adapter
->netdev
;
3157 struct ixgbe_hw
*hw
= &adapter
->hw
;
3158 u32 link_speed
= adapter
->link_speed
;
3159 bool link_up
= adapter
->link_up
;
3161 adapter
->flags
|= IXGBE_FLAG_IN_WATCHDOG_TASK
;
3163 if (adapter
->flags
& IXGBE_FLAG_NEED_LINK_UPDATE
) {
3164 hw
->mac
.ops
.check_link(hw
, &link_speed
, &link_up
, false);
3166 time_after(jiffies
, (adapter
->link_check_timeout
+
3167 IXGBE_TRY_LINK_TIMEOUT
))) {
3168 IXGBE_WRITE_REG(hw
, IXGBE_EIMS
, IXGBE_EIMC_LSC
);
3169 adapter
->flags
&= ~IXGBE_FLAG_NEED_LINK_UPDATE
;
3171 adapter
->link_up
= link_up
;
3172 adapter
->link_speed
= link_speed
;
3176 if (!netif_carrier_ok(netdev
)) {
3177 u32 frctl
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
3178 u32 rmcs
= IXGBE_READ_REG(hw
, IXGBE_RMCS
);
3179 #define FLOW_RX (frctl & IXGBE_FCTRL_RFCE)
3180 #define FLOW_TX (rmcs & IXGBE_RMCS_TFCE_802_3X)
3181 DPRINTK(LINK
, INFO
, "NIC Link is Up %s, "
3182 "Flow Control: %s\n",
3183 (link_speed
== IXGBE_LINK_SPEED_10GB_FULL
?
3185 (link_speed
== IXGBE_LINK_SPEED_1GB_FULL
?
3186 "1 Gbps" : "unknown speed")),
3187 ((FLOW_RX
&& FLOW_TX
) ? "RX/TX" :
3189 (FLOW_TX
? "TX" : "None"))));
3191 netif_carrier_on(netdev
);
3192 netif_tx_wake_all_queues(netdev
);
3194 /* Force detection of hung controller */
3195 adapter
->detect_tx_hung
= true;
3198 adapter
->link_up
= false;
3199 adapter
->link_speed
= 0;
3200 if (netif_carrier_ok(netdev
)) {
3201 DPRINTK(LINK
, INFO
, "NIC Link is Down\n");
3202 netif_carrier_off(netdev
);
3203 netif_tx_stop_all_queues(netdev
);
3207 ixgbe_update_stats(adapter
);
3208 adapter
->flags
&= ~IXGBE_FLAG_IN_WATCHDOG_TASK
;
3211 static int ixgbe_tso(struct ixgbe_adapter
*adapter
,
3212 struct ixgbe_ring
*tx_ring
, struct sk_buff
*skb
,
3213 u32 tx_flags
, u8
*hdr_len
)
3215 struct ixgbe_adv_tx_context_desc
*context_desc
;
3218 struct ixgbe_tx_buffer
*tx_buffer_info
;
3219 u32 vlan_macip_lens
= 0, type_tucmd_mlhl
= 0;
3220 u32 mss_l4len_idx
= 0, l4len
;
3222 if (skb_is_gso(skb
)) {
3223 if (skb_header_cloned(skb
)) {
3224 err
= pskb_expand_head(skb
, 0, 0, GFP_ATOMIC
);
3228 l4len
= tcp_hdrlen(skb
);
3231 if (skb
->protocol
== htons(ETH_P_IP
)) {
3232 struct iphdr
*iph
= ip_hdr(skb
);
3235 tcp_hdr(skb
)->check
= ~csum_tcpudp_magic(iph
->saddr
,
3239 adapter
->hw_tso_ctxt
++;
3240 } else if (skb_shinfo(skb
)->gso_type
== SKB_GSO_TCPV6
) {
3241 ipv6_hdr(skb
)->payload_len
= 0;
3242 tcp_hdr(skb
)->check
=
3243 ~csum_ipv6_magic(&ipv6_hdr(skb
)->saddr
,
3244 &ipv6_hdr(skb
)->daddr
,
3246 adapter
->hw_tso6_ctxt
++;
3249 i
= tx_ring
->next_to_use
;
3251 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
3252 context_desc
= IXGBE_TX_CTXTDESC_ADV(*tx_ring
, i
);
3254 /* VLAN MACLEN IPLEN */
3255 if (tx_flags
& IXGBE_TX_FLAGS_VLAN
)
3257 (tx_flags
& IXGBE_TX_FLAGS_VLAN_MASK
);
3258 vlan_macip_lens
|= ((skb_network_offset(skb
)) <<
3259 IXGBE_ADVTXD_MACLEN_SHIFT
);
3260 *hdr_len
+= skb_network_offset(skb
);
3262 (skb_transport_header(skb
) - skb_network_header(skb
));
3264 (skb_transport_header(skb
) - skb_network_header(skb
));
3265 context_desc
->vlan_macip_lens
= cpu_to_le32(vlan_macip_lens
);
3266 context_desc
->seqnum_seed
= 0;
3268 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
3269 type_tucmd_mlhl
|= (IXGBE_TXD_CMD_DEXT
|
3270 IXGBE_ADVTXD_DTYP_CTXT
);
3272 if (skb
->protocol
== htons(ETH_P_IP
))
3273 type_tucmd_mlhl
|= IXGBE_ADVTXD_TUCMD_IPV4
;
3274 type_tucmd_mlhl
|= IXGBE_ADVTXD_TUCMD_L4T_TCP
;
3275 context_desc
->type_tucmd_mlhl
= cpu_to_le32(type_tucmd_mlhl
);
3279 (skb_shinfo(skb
)->gso_size
<< IXGBE_ADVTXD_MSS_SHIFT
);
3280 mss_l4len_idx
|= (l4len
<< IXGBE_ADVTXD_L4LEN_SHIFT
);
3281 /* use index 1 for TSO */
3282 mss_l4len_idx
|= (1 << IXGBE_ADVTXD_IDX_SHIFT
);
3283 context_desc
->mss_l4len_idx
= cpu_to_le32(mss_l4len_idx
);
3285 tx_buffer_info
->time_stamp
= jiffies
;
3286 tx_buffer_info
->next_to_watch
= i
;
3289 if (i
== tx_ring
->count
)
3291 tx_ring
->next_to_use
= i
;
3298 static bool ixgbe_tx_csum(struct ixgbe_adapter
*adapter
,
3299 struct ixgbe_ring
*tx_ring
,
3300 struct sk_buff
*skb
, u32 tx_flags
)
3302 struct ixgbe_adv_tx_context_desc
*context_desc
;
3304 struct ixgbe_tx_buffer
*tx_buffer_info
;
3305 u32 vlan_macip_lens
= 0, type_tucmd_mlhl
= 0;
3307 if (skb
->ip_summed
== CHECKSUM_PARTIAL
||
3308 (tx_flags
& IXGBE_TX_FLAGS_VLAN
)) {
3309 i
= tx_ring
->next_to_use
;
3310 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
3311 context_desc
= IXGBE_TX_CTXTDESC_ADV(*tx_ring
, i
);
3313 if (tx_flags
& IXGBE_TX_FLAGS_VLAN
)
3315 (tx_flags
& IXGBE_TX_FLAGS_VLAN_MASK
);
3316 vlan_macip_lens
|= (skb_network_offset(skb
) <<
3317 IXGBE_ADVTXD_MACLEN_SHIFT
);
3318 if (skb
->ip_summed
== CHECKSUM_PARTIAL
)
3319 vlan_macip_lens
|= (skb_transport_header(skb
) -
3320 skb_network_header(skb
));
3322 context_desc
->vlan_macip_lens
= cpu_to_le32(vlan_macip_lens
);
3323 context_desc
->seqnum_seed
= 0;
3325 type_tucmd_mlhl
|= (IXGBE_TXD_CMD_DEXT
|
3326 IXGBE_ADVTXD_DTYP_CTXT
);
3328 if (skb
->ip_summed
== CHECKSUM_PARTIAL
) {
3329 switch (skb
->protocol
) {
3330 case __constant_htons(ETH_P_IP
):
3331 type_tucmd_mlhl
|= IXGBE_ADVTXD_TUCMD_IPV4
;
3332 if (ip_hdr(skb
)->protocol
== IPPROTO_TCP
)
3334 IXGBE_ADVTXD_TUCMD_L4T_TCP
;
3337 case __constant_htons(ETH_P_IPV6
):
3338 /* XXX what about other V6 headers?? */
3339 if (ipv6_hdr(skb
)->nexthdr
== IPPROTO_TCP
)
3341 IXGBE_ADVTXD_TUCMD_L4T_TCP
;
3345 if (unlikely(net_ratelimit())) {
3346 DPRINTK(PROBE
, WARNING
,
3347 "partial checksum but proto=%x!\n",
3354 context_desc
->type_tucmd_mlhl
= cpu_to_le32(type_tucmd_mlhl
);
3355 /* use index zero for tx checksum offload */
3356 context_desc
->mss_l4len_idx
= 0;
3358 tx_buffer_info
->time_stamp
= jiffies
;
3359 tx_buffer_info
->next_to_watch
= i
;
3360 adapter
->hw_csum_tx_good
++;
3362 if (i
== tx_ring
->count
)
3364 tx_ring
->next_to_use
= i
;
3371 static int ixgbe_tx_map(struct ixgbe_adapter
*adapter
,
3372 struct ixgbe_ring
*tx_ring
,
3373 struct sk_buff
*skb
, unsigned int first
)
3375 struct ixgbe_tx_buffer
*tx_buffer_info
;
3376 unsigned int len
= skb
->len
;
3377 unsigned int offset
= 0, size
, count
= 0, i
;
3378 unsigned int nr_frags
= skb_shinfo(skb
)->nr_frags
;
3381 len
-= skb
->data_len
;
3383 i
= tx_ring
->next_to_use
;
3386 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
3387 size
= min(len
, (uint
)IXGBE_MAX_DATA_PER_TXD
);
3389 tx_buffer_info
->length
= size
;
3390 tx_buffer_info
->dma
= pci_map_single(adapter
->pdev
,
3392 size
, PCI_DMA_TODEVICE
);
3393 tx_buffer_info
->time_stamp
= jiffies
;
3394 tx_buffer_info
->next_to_watch
= i
;
3400 if (i
== tx_ring
->count
)
3404 for (f
= 0; f
< nr_frags
; f
++) {
3405 struct skb_frag_struct
*frag
;
3407 frag
= &skb_shinfo(skb
)->frags
[f
];
3409 offset
= frag
->page_offset
;
3412 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
3413 size
= min(len
, (uint
)IXGBE_MAX_DATA_PER_TXD
);
3415 tx_buffer_info
->length
= size
;
3416 tx_buffer_info
->dma
= pci_map_page(adapter
->pdev
,
3419 size
, PCI_DMA_TODEVICE
);
3420 tx_buffer_info
->time_stamp
= jiffies
;
3421 tx_buffer_info
->next_to_watch
= i
;
3427 if (i
== tx_ring
->count
)
3432 i
= tx_ring
->count
- 1;
3435 tx_ring
->tx_buffer_info
[i
].skb
= skb
;
3436 tx_ring
->tx_buffer_info
[first
].next_to_watch
= i
;
3441 static void ixgbe_tx_queue(struct ixgbe_adapter
*adapter
,
3442 struct ixgbe_ring
*tx_ring
,
3443 int tx_flags
, int count
, u32 paylen
, u8 hdr_len
)
3445 union ixgbe_adv_tx_desc
*tx_desc
= NULL
;
3446 struct ixgbe_tx_buffer
*tx_buffer_info
;
3447 u32 olinfo_status
= 0, cmd_type_len
= 0;
3449 u32 txd_cmd
= IXGBE_TXD_CMD_EOP
| IXGBE_TXD_CMD_RS
| IXGBE_TXD_CMD_IFCS
;
3451 cmd_type_len
|= IXGBE_ADVTXD_DTYP_DATA
;
3453 cmd_type_len
|= IXGBE_ADVTXD_DCMD_IFCS
| IXGBE_ADVTXD_DCMD_DEXT
;
3455 if (tx_flags
& IXGBE_TX_FLAGS_VLAN
)
3456 cmd_type_len
|= IXGBE_ADVTXD_DCMD_VLE
;
3458 if (tx_flags
& IXGBE_TX_FLAGS_TSO
) {
3459 cmd_type_len
|= IXGBE_ADVTXD_DCMD_TSE
;
3461 olinfo_status
|= IXGBE_TXD_POPTS_TXSM
<<
3462 IXGBE_ADVTXD_POPTS_SHIFT
;
3464 /* use index 1 context for tso */
3465 olinfo_status
|= (1 << IXGBE_ADVTXD_IDX_SHIFT
);
3466 if (tx_flags
& IXGBE_TX_FLAGS_IPV4
)
3467 olinfo_status
|= IXGBE_TXD_POPTS_IXSM
<<
3468 IXGBE_ADVTXD_POPTS_SHIFT
;
3470 } else if (tx_flags
& IXGBE_TX_FLAGS_CSUM
)
3471 olinfo_status
|= IXGBE_TXD_POPTS_TXSM
<<
3472 IXGBE_ADVTXD_POPTS_SHIFT
;
3474 olinfo_status
|= ((paylen
- hdr_len
) << IXGBE_ADVTXD_PAYLEN_SHIFT
);
3476 i
= tx_ring
->next_to_use
;
3478 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
3479 tx_desc
= IXGBE_TX_DESC_ADV(*tx_ring
, i
);
3480 tx_desc
->read
.buffer_addr
= cpu_to_le64(tx_buffer_info
->dma
);
3481 tx_desc
->read
.cmd_type_len
=
3482 cpu_to_le32(cmd_type_len
| tx_buffer_info
->length
);
3483 tx_desc
->read
.olinfo_status
= cpu_to_le32(olinfo_status
);
3486 if (i
== tx_ring
->count
)
3490 tx_desc
->read
.cmd_type_len
|= cpu_to_le32(txd_cmd
);
3493 * Force memory writes to complete before letting h/w
3494 * know there are new descriptors to fetch. (Only
3495 * applicable for weak-ordered memory model archs,
3500 tx_ring
->next_to_use
= i
;
3501 writel(i
, adapter
->hw
.hw_addr
+ tx_ring
->tail
);
3504 static int __ixgbe_maybe_stop_tx(struct net_device
*netdev
,
3505 struct ixgbe_ring
*tx_ring
, int size
)
3507 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3509 netif_stop_subqueue(netdev
, tx_ring
->queue_index
);
3510 /* Herbert's original patch had:
3511 * smp_mb__after_netif_stop_queue();
3512 * but since that doesn't exist yet, just open code it. */
3515 /* We need to check again in a case another CPU has just
3516 * made room available. */
3517 if (likely(IXGBE_DESC_UNUSED(tx_ring
) < size
))
3520 /* A reprieve! - use start_queue because it doesn't call schedule */
3521 netif_start_subqueue(netdev
, tx_ring
->queue_index
);
3522 ++adapter
->restart_queue
;
3526 static int ixgbe_maybe_stop_tx(struct net_device
*netdev
,
3527 struct ixgbe_ring
*tx_ring
, int size
)
3529 if (likely(IXGBE_DESC_UNUSED(tx_ring
) >= size
))
3531 return __ixgbe_maybe_stop_tx(netdev
, tx_ring
, size
);
3535 static int ixgbe_xmit_frame(struct sk_buff
*skb
, struct net_device
*netdev
)
3537 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3538 struct ixgbe_ring
*tx_ring
;
3539 unsigned int len
= skb
->len
;
3541 unsigned int tx_flags
= 0;
3544 unsigned int mss
= 0;
3547 unsigned int nr_frags
= skb_shinfo(skb
)->nr_frags
;
3548 len
-= skb
->data_len
;
3549 r_idx
= (adapter
->num_tx_queues
- 1) & skb
->queue_mapping
;
3550 tx_ring
= &adapter
->tx_ring
[r_idx
];
3553 if (skb
->len
<= 0) {
3555 return NETDEV_TX_OK
;
3557 mss
= skb_shinfo(skb
)->gso_size
;
3561 else if (skb
->ip_summed
== CHECKSUM_PARTIAL
)
3564 count
+= TXD_USE_COUNT(len
);
3565 for (f
= 0; f
< nr_frags
; f
++)
3566 count
+= TXD_USE_COUNT(skb_shinfo(skb
)->frags
[f
].size
);
3568 if (ixgbe_maybe_stop_tx(netdev
, tx_ring
, count
)) {
3570 return NETDEV_TX_BUSY
;
3572 if (adapter
->vlgrp
&& vlan_tx_tag_present(skb
)) {
3573 tx_flags
|= IXGBE_TX_FLAGS_VLAN
;
3574 tx_flags
|= (vlan_tx_tag_get(skb
) << IXGBE_TX_FLAGS_VLAN_SHIFT
);
3577 if (skb
->protocol
== htons(ETH_P_IP
))
3578 tx_flags
|= IXGBE_TX_FLAGS_IPV4
;
3579 first
= tx_ring
->next_to_use
;
3580 tso
= ixgbe_tso(adapter
, tx_ring
, skb
, tx_flags
, &hdr_len
);
3582 dev_kfree_skb_any(skb
);
3583 return NETDEV_TX_OK
;
3587 tx_flags
|= IXGBE_TX_FLAGS_TSO
;
3588 else if (ixgbe_tx_csum(adapter
, tx_ring
, skb
, tx_flags
) &&
3589 (skb
->ip_summed
== CHECKSUM_PARTIAL
))
3590 tx_flags
|= IXGBE_TX_FLAGS_CSUM
;
3592 ixgbe_tx_queue(adapter
, tx_ring
, tx_flags
,
3593 ixgbe_tx_map(adapter
, tx_ring
, skb
, first
),
3596 netdev
->trans_start
= jiffies
;
3598 ixgbe_maybe_stop_tx(netdev
, tx_ring
, DESC_NEEDED
);
3600 return NETDEV_TX_OK
;
3604 * ixgbe_get_stats - Get System Network Statistics
3605 * @netdev: network interface device structure
3607 * Returns the address of the device statistics structure.
3608 * The statistics are actually updated from the timer callback.
3610 static struct net_device_stats
*ixgbe_get_stats(struct net_device
*netdev
)
3612 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3614 /* only return the current stats */
3615 return &adapter
->net_stats
;
3619 * ixgbe_set_mac - Change the Ethernet Address of the NIC
3620 * @netdev: network interface device structure
3621 * @p: pointer to an address structure
3623 * Returns 0 on success, negative on failure
3625 static int ixgbe_set_mac(struct net_device
*netdev
, void *p
)
3627 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3628 struct sockaddr
*addr
= p
;
3630 if (!is_valid_ether_addr(addr
->sa_data
))
3631 return -EADDRNOTAVAIL
;
3633 memcpy(netdev
->dev_addr
, addr
->sa_data
, netdev
->addr_len
);
3634 memcpy(adapter
->hw
.mac
.addr
, addr
->sa_data
, netdev
->addr_len
);
3636 adapter
->hw
.mac
.ops
.set_rar(&adapter
->hw
, 0, adapter
->hw
.mac
.addr
, 0, IXGBE_RAH_AV
);
3641 #ifdef CONFIG_NET_POLL_CONTROLLER
3643 * Polling 'interrupt' - used by things like netconsole to send skbs
3644 * without having to re-enable interrupts. It's not called while
3645 * the interrupt routine is executing.
3647 static void ixgbe_netpoll(struct net_device
*netdev
)
3649 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3651 disable_irq(adapter
->pdev
->irq
);
3652 adapter
->flags
|= IXGBE_FLAG_IN_NETPOLL
;
3653 ixgbe_intr(adapter
->pdev
->irq
, netdev
);
3654 adapter
->flags
&= ~IXGBE_FLAG_IN_NETPOLL
;
3655 enable_irq(adapter
->pdev
->irq
);
3660 * ixgbe_link_config - set up initial link with default speed and duplex
3661 * @hw: pointer to private hardware struct
3663 * Returns 0 on success, negative on failure
3665 static int ixgbe_link_config(struct ixgbe_hw
*hw
)
3667 u32 autoneg
= IXGBE_LINK_SPEED_10GB_FULL
;
3669 /* must always autoneg for both 1G and 10G link */
3670 hw
->mac
.autoneg
= true;
3672 return hw
->mac
.ops
.setup_link_speed(hw
, autoneg
, true, true);
3676 * ixgbe_napi_add_all - prep napi structs for use
3677 * @adapter: private struct
3678 * helper function to napi_add each possible q_vector->napi
3680 static void ixgbe_napi_add_all(struct ixgbe_adapter
*adapter
)
3682 int i
, q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
3683 int (*poll
)(struct napi_struct
*, int);
3685 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
3686 poll
= &ixgbe_clean_rxonly
;
3689 /* only one q_vector for legacy modes */
3693 for (i
= 0; i
< q_vectors
; i
++) {
3694 struct ixgbe_q_vector
*q_vector
= &adapter
->q_vector
[i
];
3695 netif_napi_add(adapter
->netdev
, &q_vector
->napi
,
3701 * ixgbe_probe - Device Initialization Routine
3702 * @pdev: PCI device information struct
3703 * @ent: entry in ixgbe_pci_tbl
3705 * Returns 0 on success, negative on failure
3707 * ixgbe_probe initializes an adapter identified by a pci_dev structure.
3708 * The OS initialization, configuring of the adapter private structure,
3709 * and a hardware reset occur.
3711 static int __devinit
ixgbe_probe(struct pci_dev
*pdev
,
3712 const struct pci_device_id
*ent
)
3714 struct net_device
*netdev
;
3715 struct ixgbe_adapter
*adapter
= NULL
;
3716 struct ixgbe_hw
*hw
;
3717 const struct ixgbe_info
*ii
= ixgbe_info_tbl
[ent
->driver_data
];
3718 static int cards_found
;
3719 int i
, err
, pci_using_dac
;
3720 u16 link_status
, link_speed
, link_width
;
3723 err
= pci_enable_device(pdev
);
3727 if (!pci_set_dma_mask(pdev
, DMA_64BIT_MASK
) &&
3728 !pci_set_consistent_dma_mask(pdev
, DMA_64BIT_MASK
)) {
3731 err
= pci_set_dma_mask(pdev
, DMA_32BIT_MASK
);
3733 err
= pci_set_consistent_dma_mask(pdev
, DMA_32BIT_MASK
);
3735 dev_err(&pdev
->dev
, "No usable DMA configuration, "
3743 err
= pci_request_regions(pdev
, ixgbe_driver_name
);
3745 dev_err(&pdev
->dev
, "pci_request_regions failed 0x%x\n", err
);
3749 pci_set_master(pdev
);
3750 pci_save_state(pdev
);
3752 netdev
= alloc_etherdev_mq(sizeof(struct ixgbe_adapter
), MAX_TX_QUEUES
);
3755 goto err_alloc_etherdev
;
3758 SET_NETDEV_DEV(netdev
, &pdev
->dev
);
3760 pci_set_drvdata(pdev
, netdev
);
3761 adapter
= netdev_priv(netdev
);
3763 adapter
->netdev
= netdev
;
3764 adapter
->pdev
= pdev
;
3767 adapter
->msg_enable
= (1 << DEFAULT_DEBUG_LEVEL_SHIFT
) - 1;
3769 hw
->hw_addr
= ioremap(pci_resource_start(pdev
, 0),
3770 pci_resource_len(pdev
, 0));
3776 for (i
= 1; i
<= 5; i
++) {
3777 if (pci_resource_len(pdev
, i
) == 0)
3781 netdev
->open
= &ixgbe_open
;
3782 netdev
->stop
= &ixgbe_close
;
3783 netdev
->hard_start_xmit
= &ixgbe_xmit_frame
;
3784 netdev
->get_stats
= &ixgbe_get_stats
;
3785 netdev
->set_rx_mode
= &ixgbe_set_rx_mode
;
3786 netdev
->set_multicast_list
= &ixgbe_set_rx_mode
;
3787 netdev
->set_mac_address
= &ixgbe_set_mac
;
3788 netdev
->change_mtu
= &ixgbe_change_mtu
;
3789 ixgbe_set_ethtool_ops(netdev
);
3790 netdev
->tx_timeout
= &ixgbe_tx_timeout
;
3791 netdev
->watchdog_timeo
= 5 * HZ
;
3792 netdev
->vlan_rx_register
= ixgbe_vlan_rx_register
;
3793 netdev
->vlan_rx_add_vid
= ixgbe_vlan_rx_add_vid
;
3794 netdev
->vlan_rx_kill_vid
= ixgbe_vlan_rx_kill_vid
;
3795 #ifdef CONFIG_NET_POLL_CONTROLLER
3796 netdev
->poll_controller
= ixgbe_netpoll
;
3798 strcpy(netdev
->name
, pci_name(pdev
));
3800 adapter
->bd_number
= cards_found
;
3803 memcpy(&hw
->mac
.ops
, ii
->mac_ops
, sizeof(hw
->mac
.ops
));
3804 hw
->mac
.type
= ii
->mac
;
3807 memcpy(&hw
->eeprom
.ops
, ii
->eeprom_ops
, sizeof(hw
->eeprom
.ops
));
3808 eec
= IXGBE_READ_REG(hw
, IXGBE_EEC
);
3809 /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
3810 if (!(eec
& (1 << 8)))
3811 hw
->eeprom
.ops
.read
= &ixgbe_read_eeprom_bit_bang_generic
;
3814 memcpy(&hw
->phy
.ops
, ii
->phy_ops
, sizeof(hw
->phy
.ops
));
3815 /* phy->sfp_type = ixgbe_sfp_type_unknown; */
3817 err
= ii
->get_invariants(hw
);
3821 /* setup the private structure */
3822 err
= ixgbe_sw_init(adapter
);
3826 /* reset_hw fills in the perm_addr as well */
3827 err
= hw
->mac
.ops
.reset_hw(hw
);
3829 dev_err(&adapter
->pdev
->dev
, "HW Init failed: %d\n", err
);
3833 netdev
->features
= NETIF_F_SG
|
3835 NETIF_F_HW_VLAN_TX
|
3836 NETIF_F_HW_VLAN_RX
|
3837 NETIF_F_HW_VLAN_FILTER
;
3839 netdev
->features
|= NETIF_F_IPV6_CSUM
;
3840 netdev
->features
|= NETIF_F_TSO
;
3841 netdev
->features
|= NETIF_F_TSO6
;
3842 netdev
->features
|= NETIF_F_LRO
;
3844 netdev
->vlan_features
|= NETIF_F_TSO
;
3845 netdev
->vlan_features
|= NETIF_F_TSO6
;
3846 netdev
->vlan_features
|= NETIF_F_IP_CSUM
;
3847 netdev
->vlan_features
|= NETIF_F_SG
;
3850 netdev
->features
|= NETIF_F_HIGHDMA
;
3852 /* make sure the EEPROM is good */
3853 if (hw
->eeprom
.ops
.validate_checksum(hw
, NULL
) < 0) {
3854 dev_err(&pdev
->dev
, "The EEPROM Checksum Is Not Valid\n");
3859 memcpy(netdev
->dev_addr
, hw
->mac
.perm_addr
, netdev
->addr_len
);
3860 memcpy(netdev
->perm_addr
, hw
->mac
.perm_addr
, netdev
->addr_len
);
3862 if (ixgbe_validate_mac_addr(netdev
->perm_addr
)) {
3863 dev_err(&pdev
->dev
, "invalid MAC address\n");
3868 init_timer(&adapter
->watchdog_timer
);
3869 adapter
->watchdog_timer
.function
= &ixgbe_watchdog
;
3870 adapter
->watchdog_timer
.data
= (unsigned long)adapter
;
3872 INIT_WORK(&adapter
->reset_task
, ixgbe_reset_task
);
3873 INIT_WORK(&adapter
->watchdog_task
, ixgbe_watchdog_task
);
3875 err
= ixgbe_init_interrupt_scheme(adapter
);
3879 /* print bus type/speed/width info */
3880 pci_read_config_word(pdev
, IXGBE_PCI_LINK_STATUS
, &link_status
);
3881 link_speed
= link_status
& IXGBE_PCI_LINK_SPEED
;
3882 link_width
= link_status
& IXGBE_PCI_LINK_WIDTH
;
3883 dev_info(&pdev
->dev
, "(PCI Express:%s:%s) "
3884 "%02x:%02x:%02x:%02x:%02x:%02x\n",
3885 ((link_speed
== IXGBE_PCI_LINK_SPEED_5000
) ? "5.0Gb/s" :
3886 (link_speed
== IXGBE_PCI_LINK_SPEED_2500
) ? "2.5Gb/s" :
3888 ((link_width
== IXGBE_PCI_LINK_WIDTH_8
) ? "Width x8" :
3889 (link_width
== IXGBE_PCI_LINK_WIDTH_4
) ? "Width x4" :
3890 (link_width
== IXGBE_PCI_LINK_WIDTH_2
) ? "Width x2" :
3891 (link_width
== IXGBE_PCI_LINK_WIDTH_1
) ? "Width x1" :
3893 netdev
->dev_addr
[0], netdev
->dev_addr
[1], netdev
->dev_addr
[2],
3894 netdev
->dev_addr
[3], netdev
->dev_addr
[4], netdev
->dev_addr
[5]);
3895 ixgbe_read_pba_num_generic(hw
, &part_num
);
3896 dev_info(&pdev
->dev
, "MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
3897 hw
->mac
.type
, hw
->phy
.type
,
3898 (part_num
>> 8), (part_num
& 0xff));
3900 if (link_width
<= IXGBE_PCI_LINK_WIDTH_4
) {
3901 dev_warn(&pdev
->dev
, "PCI-Express bandwidth available for "
3902 "this card is not sufficient for optimal "
3904 dev_warn(&pdev
->dev
, "For optimal performance a x8 "
3905 "PCI-Express slot is required.\n");
3908 /* reset the hardware with the new settings */
3909 hw
->mac
.ops
.start_hw(hw
);
3911 /* link_config depends on start_hw being called at least once */
3912 err
= ixgbe_link_config(hw
);
3914 dev_err(&pdev
->dev
, "setup_link_speed FAILED %d\n", err
);
3918 netif_carrier_off(netdev
);
3919 netif_tx_stop_all_queues(netdev
);
3921 ixgbe_napi_add_all(adapter
);
3923 strcpy(netdev
->name
, "eth%d");
3924 err
= register_netdev(netdev
);
3928 #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
3929 if (dca_add_requester(&pdev
->dev
) == 0) {
3930 adapter
->flags
|= IXGBE_FLAG_DCA_ENABLED
;
3931 /* always use CB2 mode, difference is masked
3932 * in the CB driver */
3933 IXGBE_WRITE_REG(hw
, IXGBE_DCA_CTRL
, 2);
3934 ixgbe_setup_dca(adapter
);
3938 dev_info(&pdev
->dev
, "Intel(R) 10 Gigabit Network Connection\n");
3943 ixgbe_release_hw_control(adapter
);
3946 ixgbe_reset_interrupt_capability(adapter
);
3948 iounmap(hw
->hw_addr
);
3950 free_netdev(netdev
);
3952 pci_release_regions(pdev
);
3955 pci_disable_device(pdev
);
3960 * ixgbe_remove - Device Removal Routine
3961 * @pdev: PCI device information struct
3963 * ixgbe_remove is called by the PCI subsystem to alert the driver
3964 * that it should release a PCI device. The could be caused by a
3965 * Hot-Plug event, or because the driver is going to be removed from
3968 static void __devexit
ixgbe_remove(struct pci_dev
*pdev
)
3970 struct net_device
*netdev
= pci_get_drvdata(pdev
);
3971 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3973 set_bit(__IXGBE_DOWN
, &adapter
->state
);
3974 del_timer_sync(&adapter
->watchdog_timer
);
3976 flush_scheduled_work();
3978 #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
3979 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
3980 adapter
->flags
&= ~IXGBE_FLAG_DCA_ENABLED
;
3981 dca_remove_requester(&pdev
->dev
);
3982 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
, 1);
3986 unregister_netdev(netdev
);
3988 ixgbe_reset_interrupt_capability(adapter
);
3990 ixgbe_release_hw_control(adapter
);
3992 iounmap(adapter
->hw
.hw_addr
);
3993 pci_release_regions(pdev
);
3995 DPRINTK(PROBE
, INFO
, "complete\n");
3996 kfree(adapter
->tx_ring
);
3997 kfree(adapter
->rx_ring
);
3999 free_netdev(netdev
);
4001 pci_disable_device(pdev
);
4005 * ixgbe_io_error_detected - called when PCI error is detected
4006 * @pdev: Pointer to PCI device
4007 * @state: The current pci connection state
4009 * This function is called after a PCI bus error affecting
4010 * this device has been detected.
4012 static pci_ers_result_t
ixgbe_io_error_detected(struct pci_dev
*pdev
,
4013 pci_channel_state_t state
)
4015 struct net_device
*netdev
= pci_get_drvdata(pdev
);
4016 struct ixgbe_adapter
*adapter
= netdev
->priv
;
4018 netif_device_detach(netdev
);
4020 if (netif_running(netdev
))
4021 ixgbe_down(adapter
);
4022 pci_disable_device(pdev
);
4024 /* Request a slot slot reset. */
4025 return PCI_ERS_RESULT_NEED_RESET
;
4029 * ixgbe_io_slot_reset - called after the pci bus has been reset.
4030 * @pdev: Pointer to PCI device
4032 * Restart the card from scratch, as if from a cold-boot.
4034 static pci_ers_result_t
ixgbe_io_slot_reset(struct pci_dev
*pdev
)
4036 struct net_device
*netdev
= pci_get_drvdata(pdev
);
4037 struct ixgbe_adapter
*adapter
= netdev
->priv
;
4039 if (pci_enable_device(pdev
)) {
4041 "Cannot re-enable PCI device after reset.\n");
4042 return PCI_ERS_RESULT_DISCONNECT
;
4044 pci_set_master(pdev
);
4045 pci_restore_state(pdev
);
4047 pci_enable_wake(pdev
, PCI_D3hot
, 0);
4048 pci_enable_wake(pdev
, PCI_D3cold
, 0);
4050 ixgbe_reset(adapter
);
4052 return PCI_ERS_RESULT_RECOVERED
;
4056 * ixgbe_io_resume - called when traffic can start flowing again.
4057 * @pdev: Pointer to PCI device
4059 * This callback is called when the error recovery driver tells us that
4060 * its OK to resume normal operation.
4062 static void ixgbe_io_resume(struct pci_dev
*pdev
)
4064 struct net_device
*netdev
= pci_get_drvdata(pdev
);
4065 struct ixgbe_adapter
*adapter
= netdev
->priv
;
4067 if (netif_running(netdev
)) {
4068 if (ixgbe_up(adapter
)) {
4069 DPRINTK(PROBE
, INFO
, "ixgbe_up failed after reset\n");
4074 netif_device_attach(netdev
);
4078 static struct pci_error_handlers ixgbe_err_handler
= {
4079 .error_detected
= ixgbe_io_error_detected
,
4080 .slot_reset
= ixgbe_io_slot_reset
,
4081 .resume
= ixgbe_io_resume
,
4084 static struct pci_driver ixgbe_driver
= {
4085 .name
= ixgbe_driver_name
,
4086 .id_table
= ixgbe_pci_tbl
,
4087 .probe
= ixgbe_probe
,
4088 .remove
= __devexit_p(ixgbe_remove
),
4090 .suspend
= ixgbe_suspend
,
4091 .resume
= ixgbe_resume
,
4093 .shutdown
= ixgbe_shutdown
,
4094 .err_handler
= &ixgbe_err_handler
4098 * ixgbe_init_module - Driver Registration Routine
4100 * ixgbe_init_module is the first routine called when the driver is
4101 * loaded. All it does is register with the PCI subsystem.
4103 static int __init
ixgbe_init_module(void)
4106 printk(KERN_INFO
"%s: %s - version %s\n", ixgbe_driver_name
,
4107 ixgbe_driver_string
, ixgbe_driver_version
);
4109 printk(KERN_INFO
"%s: %s\n", ixgbe_driver_name
, ixgbe_copyright
);
4111 #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
4112 dca_register_notify(&dca_notifier
);
4115 ret
= pci_register_driver(&ixgbe_driver
);
4118 module_init(ixgbe_init_module
);
4121 * ixgbe_exit_module - Driver Exit Cleanup Routine
4123 * ixgbe_exit_module is called just before the driver is removed
4126 static void __exit
ixgbe_exit_module(void)
4128 #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
4129 dca_unregister_notify(&dca_notifier
);
4131 pci_unregister_driver(&ixgbe_driver
);
4134 #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
4135 static int ixgbe_notify_dca(struct notifier_block
*nb
, unsigned long event
,
4140 ret_val
= driver_for_each_device(&ixgbe_driver
.driver
, NULL
, &event
,
4141 __ixgbe_notify_dca
);
4143 return ret_val
? NOTIFY_BAD
: NOTIFY_DONE
;
4145 #endif /* CONFIG_DCA or CONFIG_DCA_MODULE */
4147 module_exit(ixgbe_exit_module
);