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Staging: me4000: fix various checkpatch.pl warnings about bracing
[linux-2.6/mini2440.git] / drivers / staging / me4000 / me4000.c
blob7f7c88e014afe134e3370a4510b7240924280aa6
1 /* Device driver for Meilhaus ME-4000 board family.
2 * ================================================
3 *
4 * Copyright (C) 2003 Meilhaus Electronic GmbH (support@meilhaus.de)
5 *
6 * This file is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 *
20 * Author: Guenter Gebhardt <g.gebhardt@meilhaus.de>
21 */
22
23 #include <linux/module.h>
24 #include <linux/fs.h>
25 #include <linux/sched.h>
26 #include <linux/interrupt.h>
27 #include <linux/pci.h>
28 #include <linux/errno.h>
29 #include <linux/delay.h>
30 #include <linux/mm.h>
31 #include <linux/unistd.h>
32 #include <linux/list.h>
33 #include <linux/proc_fs.h>
34 #include <linux/types.h>
35 #include <linux/poll.h>
36 #include <linux/vmalloc.h>
37 #include <linux/slab.h>
38 #include <asm/pgtable.h>
39 #include <linux/uaccess.h>
40 #include <linux/io.h>
41 #include <asm/system.h>
42
43 /* Include-File for the Meilhaus ME-4000 I/O board */
44 #include "me4000.h"
45 #include "me4000_firmware.h"
46 #include "me4610_firmware.h"
47
48 /* Administrative stuff for modinfo */
49 MODULE_AUTHOR("Guenter Gebhardt <g.gebhardt@meilhaus.de>");
50 MODULE_DESCRIPTION
51 ("Device Driver Module for Meilhaus ME-4000 boards version 1.0.5");
52 MODULE_SUPPORTED_DEVICE("Meilhaus ME-4000 Multi I/O boards");
53 MODULE_LICENSE("GPL");
54
55 /* Board specific data are kept in a global list */
56 static LIST_HEAD(me4000_board_info_list);
57
58 /* Major Device Numbers. 0 means to get it automatically from the System */
59 static int me4000_ao_major_driver_no;
60 static int me4000_ai_major_driver_no;
61 static int me4000_dio_major_driver_no;
62 static int me4000_cnt_major_driver_no;
63 static int me4000_ext_int_major_driver_no;
64
65 /* Let the user specify a custom major driver number */
66 module_param(me4000_ao_major_driver_no, int, 0);
67 MODULE_PARM_DESC(me4000_ao_major_driver_no,
68 "Major driver number for analog output (default 0)");
69
70 module_param(me4000_ai_major_driver_no, int, 0);
71 MODULE_PARM_DESC(me4000_ai_major_driver_no,
72 "Major driver number for analog input (default 0)");
73
74 module_param(me4000_dio_major_driver_no, int, 0);
75 MODULE_PARM_DESC(me4000_dio_major_driver_no,
76 "Major driver number digital I/O (default 0)");
77
78 module_param(me4000_cnt_major_driver_no, int, 0);
79 MODULE_PARM_DESC(me4000_cnt_major_driver_no,
80 "Major driver number for counter (default 0)");
81
82 module_param(me4000_ext_int_major_driver_no, int, 0);
83 MODULE_PARM_DESC(me4000_ext_int_major_driver_no,
84 "Major driver number for external interrupt (default 0)");
85
86 /*-----------------------------------------------------------------------------
87 Board detection and initialization
88 ---------------------------------------------------------------------------*/
89 static int me4000_probe(struct pci_dev *dev, const struct pci_device_id *id);
90 static int me4000_xilinx_download(struct me4000_info *);
91 static int me4000_reset_board(struct me4000_info *);
92
93 static void clear_board_info_list(void);
94 static void release_ao_contexts(struct me4000_info *board_info);
95 /*-----------------------------------------------------------------------------
96 Stuff used by all device parts
97 ---------------------------------------------------------------------------*/
98 static int me4000_open(struct inode *, struct file *);
99 static int me4000_release(struct inode *, struct file *);
100
101 static int me4000_get_user_info(struct me4000_user_info *,
102 struct me4000_info *board_info);
103 static int me4000_read_procmem(char *, char **, off_t, int, int *, void *);
104
105 /*-----------------------------------------------------------------------------
106 Analog output stuff
107 ---------------------------------------------------------------------------*/
108 static ssize_t me4000_ao_write_sing(struct file *, const char *, size_t,
109 loff_t *);
110 static ssize_t me4000_ao_write_wrap(struct file *, const char *, size_t,
111 loff_t *);
112 static ssize_t me4000_ao_write_cont(struct file *, const char *, size_t,
113 loff_t *);
114
115 static int me4000_ao_ioctl_sing(struct inode *, struct file *, unsigned int,
116 unsigned long);
117 static int me4000_ao_ioctl_wrap(struct inode *, struct file *, unsigned int,
118 unsigned long);
119 static int me4000_ao_ioctl_cont(struct inode *, struct file *, unsigned int,
120 unsigned long);
121
122 static unsigned int me4000_ao_poll_cont(struct file *, poll_table *);
123 static int me4000_ao_fsync_cont(struct file *, struct dentry *, int);
124
125 static int me4000_ao_start(unsigned long *, struct me4000_ao_context *);
126 static int me4000_ao_stop(struct me4000_ao_context *);
127 static int me4000_ao_immediate_stop(struct me4000_ao_context *);
128 static int me4000_ao_timer_set_divisor(u32 *, struct me4000_ao_context *);
129 static int me4000_ao_preload(struct me4000_ao_context *);
130 static int me4000_ao_preload_update(struct me4000_ao_context *);
131 static int me4000_ao_ex_trig_set_edge(int *, struct me4000_ao_context *);
132 static int me4000_ao_ex_trig_enable(struct me4000_ao_context *);
133 static int me4000_ao_ex_trig_disable(struct me4000_ao_context *);
134 static int me4000_ao_prepare(struct me4000_ao_context *ao_info);
135 static int me4000_ao_reset(struct me4000_ao_context *ao_info);
136 static int me4000_ao_enable_do(struct me4000_ao_context *);
137 static int me4000_ao_disable_do(struct me4000_ao_context *);
138 static int me4000_ao_fsm_state(int *, struct me4000_ao_context *);
139
140 static int me4000_ao_simultaneous_ex_trig(struct me4000_ao_context *ao_context);
141 static int me4000_ao_simultaneous_sw(struct me4000_ao_context *ao_context);
142 static int me4000_ao_simultaneous_disable(struct me4000_ao_context *ao_context);
143 static int me4000_ao_simultaneous_update(
144 struct me4000_ao_channel_list *channels,
145 struct me4000_ao_context *ao_context);
146
147 static int me4000_ao_synchronous_ex_trig(struct me4000_ao_context *ao_context);
148 static int me4000_ao_synchronous_sw(struct me4000_ao_context *ao_context);
149 static int me4000_ao_synchronous_disable(struct me4000_ao_context *ao_context);
150
151 static int me4000_ao_ex_trig_timeout(unsigned long *arg,
152 struct me4000_ao_context *ao_context);
153 static int me4000_ao_get_free_buffer(unsigned long *arg,
154 struct me4000_ao_context *ao_context);
155
156 /*-----------------------------------------------------------------------------
157 Analog input stuff
158 ---------------------------------------------------------------------------*/
159 static int me4000_ai_single(struct me4000_ai_single *,
160 struct me4000_ai_context *);
161 static int me4000_ai_ioctl_sing(struct inode *, struct file *, unsigned int,
162 unsigned long);
163
164 static ssize_t me4000_ai_read(struct file *, char *, size_t, loff_t *);
165 static int me4000_ai_ioctl_sw(struct inode *, struct file *, unsigned int,
166 unsigned long);
167 static unsigned int me4000_ai_poll(struct file *, poll_table *);
168 static int me4000_ai_fasync(int fd, struct file *file_p, int mode);
169
170 static int me4000_ai_ioctl_ext(struct inode *, struct file *, unsigned int,
171 unsigned long);
172
173 static int me4000_ai_prepare(struct me4000_ai_context *ai_context);
174 static int me4000_ai_reset(struct me4000_ai_context *ai_context);
175 static int me4000_ai_config(struct me4000_ai_config *,
176 struct me4000_ai_context *);
177 static int me4000_ai_start(struct me4000_ai_context *);
178 static int me4000_ai_start_ex(unsigned long *, struct me4000_ai_context *);
179 static int me4000_ai_stop(struct me4000_ai_context *);
180 static int me4000_ai_immediate_stop(struct me4000_ai_context *);
181 static int me4000_ai_ex_trig_enable(struct me4000_ai_context *);
182 static int me4000_ai_ex_trig_disable(struct me4000_ai_context *);
183 static int me4000_ai_ex_trig_setup(struct me4000_ai_trigger *,
184 struct me4000_ai_context *);
185 static int me4000_ai_sc_setup(struct me4000_ai_sc *arg,
186 struct me4000_ai_context *ai_context);
187 static int me4000_ai_offset_enable(struct me4000_ai_context *ai_context);
188 static int me4000_ai_offset_disable(struct me4000_ai_context *ai_context);
189 static int me4000_ai_fullscale_enable(struct me4000_ai_context *ai_context);
190 static int me4000_ai_fullscale_disable(struct me4000_ai_context *ai_context);
191 static int me4000_ai_fsm_state(int *arg, struct me4000_ai_context *ai_context);
192 static int me4000_ai_get_count_buffer(unsigned long *arg,
193 struct me4000_ai_context *ai_context);
194
195 /*-----------------------------------------------------------------------------
196 EEPROM stuff
197 ---------------------------------------------------------------------------*/
198 static int me4000_eeprom_read(struct me4000_eeprom *arg,
199 struct me4000_ai_context *ai_context);
200 static int me4000_eeprom_write(struct me4000_eeprom *arg,
201 struct me4000_ai_context *ai_context);
202
203 /*-----------------------------------------------------------------------------
204 Digital I/O stuff
205 ---------------------------------------------------------------------------*/
206 static int me4000_dio_ioctl(struct inode *, struct file *, unsigned int,
207 unsigned long);
208 static int me4000_dio_config(struct me4000_dio_config *,
209 struct me4000_dio_context *);
210 static int me4000_dio_get_byte(struct me4000_dio_byte *,
211 struct me4000_dio_context *);
212 static int me4000_dio_set_byte(struct me4000_dio_byte *,
213 struct me4000_dio_context *);
214 static int me4000_dio_reset(struct me4000_dio_context *);
215
216 /*-----------------------------------------------------------------------------
217 Counter stuff
218 ---------------------------------------------------------------------------*/
219 static int me4000_cnt_ioctl(struct inode *, struct file *, unsigned int,
220 unsigned long);
221 static int me4000_cnt_config(struct me4000_cnt_config *,
222 struct me4000_cnt_context *);
223 static int me4000_cnt_read(struct me4000_cnt *, struct me4000_cnt_context *);
224 static int me4000_cnt_write(struct me4000_cnt *, struct me4000_cnt_context *);
225 static int me4000_cnt_reset(struct me4000_cnt_context *);
226
227 /*-----------------------------------------------------------------------------
228 External interrupt routines
229 ---------------------------------------------------------------------------*/
230 static int me4000_ext_int_ioctl(struct inode *, struct file *, unsigned int,
231 unsigned long);
232 static int me4000_ext_int_enable(struct me4000_ext_int_context *);
233 static int me4000_ext_int_disable(struct me4000_ext_int_context *);
234 static int me4000_ext_int_count(unsigned long *arg,
235 struct me4000_ext_int_context *ext_int_context);
236 static int me4000_ext_int_fasync(int fd, struct file *file_ptr, int mode);
237
238 /*-----------------------------------------------------------------------------
239 The interrupt service routines
240 ---------------------------------------------------------------------------*/
241 static irqreturn_t me4000_ao_isr(int, void *);
242 static irqreturn_t me4000_ai_isr(int, void *);
243 static irqreturn_t me4000_ext_int_isr(int, void *);
244
245 /*-----------------------------------------------------------------------------
246 Inline functions
247 ---------------------------------------------------------------------------*/
248
249 static inline int me4000_buf_count(struct me4000_circ_buf buf, int size)
250 {
251 return (buf.head - buf.tail) & (size - 1);
252 }
253
254 static inline int me4000_buf_space(struct me4000_circ_buf buf, int size)
255 {
256 return (buf.tail - (buf.head + 1)) & (size - 1);
257 }
258
259 static inline int me4000_values_to_end(struct me4000_circ_buf buf, int size)
260 {
261 int end;
262 int n;
263 end = size - buf.tail;
264 n = (buf.head + end) & (size - 1);
265 return (n < end) ? n : end;
266 }
267
268 static inline int me4000_space_to_end(struct me4000_circ_buf buf, int size)
269 {
270 int end;
271 int n;
272
273 end = size - 1 - buf.head;
274 n = (end + buf.tail) & (size - 1);
275 return (n <= end) ? n : (end + 1);
276 }
277
278 static inline void me4000_outb(unsigned char value, unsigned long port)
279 {
280 PORT_PDEBUG("--> 0x%02X port 0x%04lX\n", value, port);
281 outb(value, port);
282 }
283
284 static inline void me4000_outl(unsigned long value, unsigned long port)
285 {
286 PORT_PDEBUG("--> 0x%08lX port 0x%04lX\n", value, port);
287 outl(value, port);
288 }
289
290 static inline unsigned long me4000_inl(unsigned long port)
291 {
292 unsigned long value;
293 value = inl(port);
294 PORT_PDEBUG("<-- 0x%08lX port 0x%04lX\n", value, port);
295 return value;
296 }
297
298 static inline unsigned char me4000_inb(unsigned long port)
299 {
300 unsigned char value;
301 value = inb(port);
302 PORT_PDEBUG("<-- 0x%08X port 0x%04lX\n", value, port);
303 return value;
304 }
305
306 static struct pci_driver me4000_driver = {
307 .name = ME4000_NAME,
308 .id_table = me4000_pci_table,
309 .probe = me4000_probe
310 };
311
312 static struct file_operations me4000_ao_fops_sing = {
313 .owner = THIS_MODULE,
314 .write = me4000_ao_write_sing,
315 .ioctl = me4000_ao_ioctl_sing,
316 .open = me4000_open,
317 .release = me4000_release,
318 };
319
320 static struct file_operations me4000_ao_fops_wrap = {
321 .owner = THIS_MODULE,
322 .write = me4000_ao_write_wrap,
323 .ioctl = me4000_ao_ioctl_wrap,
324 .open = me4000_open,
325 .release = me4000_release,
326 };
327
328 static struct file_operations me4000_ao_fops_cont = {
329 .owner = THIS_MODULE,
330 .write = me4000_ao_write_cont,
331 .poll = me4000_ao_poll_cont,
332 .ioctl = me4000_ao_ioctl_cont,
333 .open = me4000_open,
334 .release = me4000_release,
335 .fsync = me4000_ao_fsync_cont,
336 };
337
338 static struct file_operations me4000_ai_fops_sing = {
339 .owner = THIS_MODULE,
340 .ioctl = me4000_ai_ioctl_sing,
341 .open = me4000_open,
342 .release = me4000_release,
343 };
344
345 static struct file_operations me4000_ai_fops_cont_sw = {
346 .owner = THIS_MODULE,
347 .read = me4000_ai_read,
348 .poll = me4000_ai_poll,
349 .ioctl = me4000_ai_ioctl_sw,
350 .open = me4000_open,
351 .release = me4000_release,
352 .fasync = me4000_ai_fasync,
353 };
354
355 static struct file_operations me4000_ai_fops_cont_et = {
356 .owner = THIS_MODULE,
357 .read = me4000_ai_read,
358 .poll = me4000_ai_poll,
359 .ioctl = me4000_ai_ioctl_ext,
360 .open = me4000_open,
361 .release = me4000_release,
362 };
363
364 static struct file_operations me4000_ai_fops_cont_et_value = {
365 .owner = THIS_MODULE,
366 .read = me4000_ai_read,
367 .poll = me4000_ai_poll,
368 .ioctl = me4000_ai_ioctl_ext,
369 .open = me4000_open,
370 .release = me4000_release,
371 };
372
373 static struct file_operations me4000_ai_fops_cont_et_chanlist = {
374 .owner = THIS_MODULE,
375 .read = me4000_ai_read,
376 .poll = me4000_ai_poll,
377 .ioctl = me4000_ai_ioctl_ext,
378 .open = me4000_open,
379 .release = me4000_release,
380 };
381
382 static struct file_operations me4000_dio_fops = {
383 .owner = THIS_MODULE,
384 .ioctl = me4000_dio_ioctl,
385 .open = me4000_open,
386 .release = me4000_release,
387 };
388
389 static struct file_operations me4000_cnt_fops = {
390 .owner = THIS_MODULE,
391 .ioctl = me4000_cnt_ioctl,
392 .open = me4000_open,
393 .release = me4000_release,
394 };
395
396 static struct file_operations me4000_ext_int_fops = {
397 .owner = THIS_MODULE,
398 .ioctl = me4000_ext_int_ioctl,
399 .open = me4000_open,
400 .release = me4000_release,
401 .fasync = me4000_ext_int_fasync,
402 };
403
404 static struct file_operations *me4000_ao_fops_array[] = {
405 &me4000_ao_fops_sing, // single operations
406 &me4000_ao_fops_wrap, // wraparound operations
407 &me4000_ao_fops_cont, // continous operations
408 };
409
410 static struct file_operations *me4000_ai_fops_array[] = {
411 &me4000_ai_fops_sing, // single operations
412 &me4000_ai_fops_cont_sw, // continuous operations with software start
413 &me4000_ai_fops_cont_et, // continous operations with external trigger
414 &me4000_ai_fops_cont_et_value, // sample values by external trigger
415 &me4000_ai_fops_cont_et_chanlist, // work through one channel list by external trigger
416 };
417
418 static int __init me4000_init_module(void)
419 {
420 int result;
421
422 CALL_PDEBUG("init_module() is executed\n");
423
424 /* Register driver capabilities */
425 result = pci_register_driver(&me4000_driver);
426 PDEBUG("init_module():%d devices detected\n", result);
427 if (result < 0) {
428 printk(KERN_ERR "ME4000:init_module():Can't register driver\n");
429 goto INIT_ERROR_1;
430 }
431
432 /* Allocate major number for analog output */
433 result =
434 register_chrdev(me4000_ao_major_driver_no, ME4000_AO_NAME,
435 &me4000_ao_fops_sing);
436 if (result < 0) {
437 printk(KERN_ERR "ME4000:init_module():Can't get AO major no\n");
438 goto INIT_ERROR_2;
439 } else {
440 me4000_ao_major_driver_no = result;
441 }
442 PDEBUG("init_module():Major driver number for AO = %ld\n",
443 me4000_ao_major_driver_no);
444
445 /* Allocate major number for analog input */
446 result =
447 register_chrdev(me4000_ai_major_driver_no, ME4000_AI_NAME,
448 &me4000_ai_fops_sing);
449 if (result < 0) {
450 printk(KERN_ERR "ME4000:init_module():Can't get AI major no\n");
451 goto INIT_ERROR_3;
452 } else {
453 me4000_ai_major_driver_no = result;
454 }
455 PDEBUG("init_module():Major driver number for AI = %ld\n",
456 me4000_ai_major_driver_no);
457
458 /* Allocate major number for digital I/O */
459 result =
460 register_chrdev(me4000_dio_major_driver_no, ME4000_DIO_NAME,
461 &me4000_dio_fops);
462 if (result < 0) {
463 printk(KERN_ERR
464 "ME4000:init_module():Can't get DIO major no\n");
465 goto INIT_ERROR_4;
466 } else {
467 me4000_dio_major_driver_no = result;
468 }
469 PDEBUG("init_module():Major driver number for DIO = %ld\n",
470 me4000_dio_major_driver_no);
471
472 /* Allocate major number for counter */
473 result =
474 register_chrdev(me4000_cnt_major_driver_no, ME4000_CNT_NAME,
475 &me4000_cnt_fops);
476 if (result < 0) {
477 printk(KERN_ERR
478 "ME4000:init_module():Can't get CNT major no\n");
479 goto INIT_ERROR_5;
480 } else {
481 me4000_cnt_major_driver_no = result;
482 }
483 PDEBUG("init_module():Major driver number for CNT = %ld\n",
484 me4000_cnt_major_driver_no);
485
486 /* Allocate major number for external interrupt */
487 result =
488 register_chrdev(me4000_ext_int_major_driver_no, ME4000_EXT_INT_NAME,
489 &me4000_ext_int_fops);
490 if (result < 0) {
491 printk(KERN_ERR
492 "ME4000:init_module():Can't get major no for external interrupt\n");
493 goto INIT_ERROR_6;
494 } else {
495 me4000_ext_int_major_driver_no = result;
496 }
497 PDEBUG
498 ("init_module():Major driver number for external interrupt = %ld\n",
499 me4000_ext_int_major_driver_no);
500
501 /* Create the /proc/me4000 entry */
502 if (!create_proc_read_entry
503 ("me4000", 0, NULL, me4000_read_procmem, NULL)) {
504 result = -ENODEV;
505 printk(KERN_ERR
506 "ME4000:init_module():Can't create proc entry\n");
507 goto INIT_ERROR_7;
508 }
509
510 return 0;
511
512 INIT_ERROR_7:
513 unregister_chrdev(me4000_ext_int_major_driver_no, ME4000_EXT_INT_NAME);
514
515 INIT_ERROR_6:
516 unregister_chrdev(me4000_cnt_major_driver_no, ME4000_CNT_NAME);
517
518 INIT_ERROR_5:
519 unregister_chrdev(me4000_dio_major_driver_no, ME4000_DIO_NAME);
520
521 INIT_ERROR_4:
522 unregister_chrdev(me4000_ai_major_driver_no, ME4000_AI_NAME);
523
524 INIT_ERROR_3:
525 unregister_chrdev(me4000_ao_major_driver_no, ME4000_AO_NAME);
526
527 INIT_ERROR_2:
528 pci_unregister_driver(&me4000_driver);
529 clear_board_info_list();
530
531 INIT_ERROR_1:
532 return result;
533 }
534
535 module_init(me4000_init_module);
536
537 static void clear_board_info_list(void)
538 {
539 struct me4000_info *board_info, *board_info_safe;
540 struct me4000_ao_context *ao_context, *ao_context_safe;
541
542 /* Clear context lists */
543 list_for_each_entry(board_info, &me4000_board_info_list, list) {
544 /* Clear analog output context list */
545 list_for_each_entry_safe(ao_context, ao_context_safe,
546 &board_info->ao_context_list, list) {
547 me4000_ao_reset(ao_context);
548 free_irq(ao_context->irq, ao_context);
549 kfree(ao_context->circ_buf.buf);
550 list_del(&ao_context->list);
551 kfree(ao_context);
552 }
553
554 /* Clear analog input context */
555 kfree(board_info->ai_context->circ_buf.buf);
556 kfree(board_info->ai_context);
557
558 /* Clear digital I/O context */
559 kfree(board_info->dio_context);
560
561 /* Clear counter context */
562 kfree(board_info->cnt_context);
563
564 /* Clear external interrupt context */
565 kfree(board_info->ext_int_context);
566 }
567
568 /* Clear the board info list */
569 list_for_each_entry_safe(board_info, board_info_safe,
570 &me4000_board_info_list, list) {
571 pci_release_regions(board_info->pci_dev_p);
572 list_del(&board_info->list);
573 kfree(board_info);
574 }
575 }
576
577 static int get_registers(struct pci_dev *dev, struct me4000_info *board_info)
578 {
579
580 /*--------------------------- plx regbase ---------------------------------*/
581
582 board_info->plx_regbase = pci_resource_start(dev, 1);
583 if (board_info->plx_regbase == 0) {
584 printk(KERN_ERR
585 "ME4000:get_registers():PCI base address 1 is not available\n");
586 return -ENODEV;
587 }
588 board_info->plx_regbase_size = pci_resource_len(dev, 1);
589
590 PDEBUG
591 ("get_registers():PLX configuration registers at address 0x%4lX [0x%4lX]\n",
592 board_info->plx_regbase, board_info->plx_regbase_size);
593
594 /*--------------------------- me4000 regbase ------------------------------*/
595
596 board_info->me4000_regbase = pci_resource_start(dev, 2);
597 if (board_info->me4000_regbase == 0) {
598 printk(KERN_ERR
599 "ME4000:get_registers():PCI base address 2 is not available\n");
600 return -ENODEV;
601 }
602 board_info->me4000_regbase_size = pci_resource_len(dev, 2);
603
604 PDEBUG("get_registers():ME4000 registers at address 0x%4lX [0x%4lX]\n",
605 board_info->me4000_regbase, board_info->me4000_regbase_size);
606
607 /*--------------------------- timer regbase ------------------------------*/
608
609 board_info->timer_regbase = pci_resource_start(dev, 3);
610 if (board_info->timer_regbase == 0) {
611 printk(KERN_ERR
612 "ME4000:get_registers():PCI base address 3 is not available\n");
613 return -ENODEV;
614 }
615 board_info->timer_regbase_size = pci_resource_len(dev, 3);
616
617 PDEBUG("get_registers():Timer registers at address 0x%4lX [0x%4lX]\n",
618 board_info->timer_regbase, board_info->timer_regbase_size);
619
620 /*--------------------------- program regbase ------------------------------*/
621
622 board_info->program_regbase = pci_resource_start(dev, 5);
623 if (board_info->program_regbase == 0) {
624 printk(KERN_ERR
625 "get_registers():ME4000:PCI base address 5 is not available\n");
626 return -ENODEV;
627 }
628 board_info->program_regbase_size = pci_resource_len(dev, 5);
629
630 PDEBUG("get_registers():Program registers at address 0x%4lX [0x%4lX]\n",
631 board_info->program_regbase, board_info->program_regbase_size);
632
633 return 0;
634 }
635
636 static int init_board_info(struct pci_dev *pci_dev_p,
637 struct me4000_info *board_info)
638 {
639 int i;
640 int result;
641 struct list_head *board_p;
642 board_info->pci_dev_p = pci_dev_p;
643
644 for (i = 0; i < ARRAY_SIZE(me4000_boards); i++) {
645 if (me4000_boards[i].device_id == pci_dev_p->device) {
646 board_info->board_p = &me4000_boards[i];
647 break;
648 }
649 }
650 if (i == ARRAY_SIZE(me4000_boards)) {
651 printk(KERN_ERR
652 "ME4000:init_board_info():Device ID not valid\n");
653 return -ENODEV;
654 }
655
656 /* Get the index of the board in the global list */
657 i = 0;
658 list_for_each(board_p, &me4000_board_info_list) {
659 if (board_p == &board_info->list) {
660 board_info->board_count = i;
661 break;
662 }
663 i++;
664 }
665 if (board_p == &me4000_board_info_list) {
666 printk(KERN_ERR
667 "ME4000:init_board_info():Cannot get index of board\n");
668 return -ENODEV;
669 }
670
671 /* Init list head for analog output contexts */
672 INIT_LIST_HEAD(&board_info->ao_context_list);
673
674 /* Init spin locks */
675 spin_lock_init(&board_info->preload_lock);
676 spin_lock_init(&board_info->ai_ctrl_lock);
677
678 /* Get the serial number */
679 result = pci_read_config_dword(pci_dev_p, 0x2C, &board_info->serial_no);
680 if (result != PCIBIOS_SUCCESSFUL) {
681 printk(KERN_WARNING
682 "ME4000:init_board_info: Can't get serial_no\n");
683 return result;
684 }
685 PDEBUG("init_board_info():serial_no = 0x%x\n", board_info->serial_no);
686
687 /* Get the hardware revision */
688 result =
689 pci_read_config_byte(pci_dev_p, 0x08, &board_info->hw_revision);
690 if (result != PCIBIOS_SUCCESSFUL) {
691 printk(KERN_WARNING
692 "ME4000:init_board_info():Can't get hw_revision\n");
693 return result;
694 }
695 PDEBUG("init_board_info():hw_revision = 0x%x\n",
696 board_info->hw_revision);
697
698 /* Get the vendor id */
699 board_info->vendor_id = pci_dev_p->vendor;
700 PDEBUG("init_board_info():vendor_id = 0x%x\n", board_info->vendor_id);
701
702 /* Get the device id */
703 board_info->device_id = pci_dev_p->device;
704 PDEBUG("init_board_info():device_id = 0x%x\n", board_info->device_id);
705
706 /* Get the pci device number */
707 board_info->pci_dev_no = PCI_FUNC(pci_dev_p->devfn);
708 PDEBUG("init_board_info():pci_func_no = 0x%x\n",
709 board_info->pci_func_no);
710
711 /* Get the pci slot number */
712 board_info->pci_dev_no = PCI_SLOT(pci_dev_p->devfn);
713 PDEBUG("init_board_info():pci_dev_no = 0x%x\n", board_info->pci_dev_no);
714
715 /* Get the pci bus number */
716 board_info->pci_bus_no = pci_dev_p->bus->number;
717 PDEBUG("init_board_info():pci_bus_no = 0x%x\n", board_info->pci_bus_no);
718
719 /* Get the irq assigned to the board */
720 board_info->irq = pci_dev_p->irq;
721 PDEBUG("init_board_info():irq = %d\n", board_info->irq);
722
723 return 0;
724 }
725
726 static int alloc_ao_contexts(struct me4000_info *info)
727 {
728 int i;
729 int err;
730 struct me4000_ao_context *ao_context;
731
732 for (i = 0; i < info->board_p->ao.count; i++) {
733 ao_context = kzalloc(sizeof(struct me4000_ao_context),
734 GFP_KERNEL);
735 if (!ao_context) {
736 printk(KERN_ERR
737 "alloc_ao_contexts():Can't get memory for ao context\n");
738 release_ao_contexts(info);
739 return -ENOMEM;
740 }
741
742 spin_lock_init(&ao_context->use_lock);
743 spin_lock_init(&ao_context->int_lock);
744 ao_context->irq = info->irq;
745 init_waitqueue_head(&ao_context->wait_queue);
746 ao_context->board_info = info;
747
748 if (info->board_p->ao.fifo_count) {
749 /* Allocate circular buffer */
750 ao_context->circ_buf.buf =
751 kzalloc(ME4000_AO_BUFFER_SIZE, GFP_KERNEL);
752 if (!ao_context->circ_buf.buf) {
753 printk(KERN_ERR
754 "alloc_ao_contexts():Can't get circular buffer\n");
755 release_ao_contexts(info);
756 return -ENOMEM;
757 }
758
759 /* Clear the circular buffer */
760 ao_context->circ_buf.head = 0;
761 ao_context->circ_buf.tail = 0;
762 }
763
764 switch (i) {
765 case 0:
766 ao_context->ctrl_reg =
767 info->me4000_regbase + ME4000_AO_00_CTRL_REG;
768 ao_context->status_reg =
769 info->me4000_regbase + ME4000_AO_00_STATUS_REG;
770 ao_context->fifo_reg =
771 info->me4000_regbase + ME4000_AO_00_FIFO_REG;
772 ao_context->single_reg =
773 info->me4000_regbase + ME4000_AO_00_SINGLE_REG;
774 ao_context->timer_reg =
775 info->me4000_regbase + ME4000_AO_00_TIMER_REG;
776 ao_context->irq_status_reg =
777 info->me4000_regbase + ME4000_IRQ_STATUS_REG;
778 ao_context->preload_reg =
779 info->me4000_regbase + ME4000_AO_LOADSETREG_XX;
780 break;
781 case 1:
782 ao_context->ctrl_reg =
783 info->me4000_regbase + ME4000_AO_01_CTRL_REG;
784 ao_context->status_reg =
785 info->me4000_regbase + ME4000_AO_01_STATUS_REG;
786 ao_context->fifo_reg =
787 info->me4000_regbase + ME4000_AO_01_FIFO_REG;
788 ao_context->single_reg =
789 info->me4000_regbase + ME4000_AO_01_SINGLE_REG;
790 ao_context->timer_reg =
791 info->me4000_regbase + ME4000_AO_01_TIMER_REG;
792 ao_context->irq_status_reg =
793 info->me4000_regbase + ME4000_IRQ_STATUS_REG;
794 ao_context->preload_reg =
795 info->me4000_regbase + ME4000_AO_LOADSETREG_XX;
796 break;
797 case 2:
798 ao_context->ctrl_reg =
799 info->me4000_regbase + ME4000_AO_02_CTRL_REG;
800 ao_context->status_reg =
801 info->me4000_regbase + ME4000_AO_02_STATUS_REG;
802 ao_context->fifo_reg =
803 info->me4000_regbase + ME4000_AO_02_FIFO_REG;
804 ao_context->single_reg =
805 info->me4000_regbase + ME4000_AO_02_SINGLE_REG;
806 ao_context->timer_reg =
807 info->me4000_regbase + ME4000_AO_02_TIMER_REG;
808 ao_context->irq_status_reg =
809 info->me4000_regbase + ME4000_IRQ_STATUS_REG;
810 ao_context->preload_reg =
811 info->me4000_regbase + ME4000_AO_LOADSETREG_XX;
812 break;
813 case 3:
814 ao_context->ctrl_reg =
815 info->me4000_regbase + ME4000_AO_03_CTRL_REG;
816 ao_context->status_reg =
817 info->me4000_regbase + ME4000_AO_03_STATUS_REG;
818 ao_context->fifo_reg =
819 info->me4000_regbase + ME4000_AO_03_FIFO_REG;
820 ao_context->single_reg =
821 info->me4000_regbase + ME4000_AO_03_SINGLE_REG;
822 ao_context->timer_reg =
823 info->me4000_regbase + ME4000_AO_03_TIMER_REG;
824 ao_context->irq_status_reg =
825 info->me4000_regbase + ME4000_IRQ_STATUS_REG;
826 ao_context->preload_reg =
827 info->me4000_regbase + ME4000_AO_LOADSETREG_XX;
828 break;
829 default:
830 break;
831 }
832
833 if (info->board_p->ao.fifo_count) {
834 /* Request the interrupt line */
835 err =
836 request_irq(ao_context->irq, me4000_ao_isr,
837 IRQF_DISABLED | IRQF_SHARED,
838 ME4000_NAME, ao_context);
839 if (err) {
840 printk(KERN_ERR
841 "%s:Can't get interrupt line", __func__);
842 kfree(ao_context->circ_buf.buf);
843 kfree(ao_context);
844 release_ao_contexts(info);
845 return -ENODEV;
846 }
847 }
848
849 list_add_tail(&ao_context->list, &info->ao_context_list);
850 ao_context->index = i;
851 }
852
853 return 0;
854 }
855
856 static void release_ao_contexts(struct me4000_info *board_info)
857 {
858 struct me4000_ao_context *ao_context, *ao_context_safe;
859
860 /* Clear analog output context list */
861 list_for_each_entry_safe(ao_context, ao_context_safe,
862 &board_info->ao_context_list, list) {
863 free_irq(ao_context->irq, ao_context);
864 kfree(ao_context->circ_buf.buf);
865 list_del(&ao_context->list);
866 kfree(ao_context);
867 }
868 }
869
870 static int alloc_ai_context(struct me4000_info *info)
871 {
872 struct me4000_ai_context *ai_context;
873
874 if (info->board_p->ai.count) {
875 ai_context = kzalloc(sizeof(struct me4000_ai_context),
876 GFP_KERNEL);
877 if (!ai_context) {
878 printk(KERN_ERR
879 "ME4000:alloc_ai_context():Can't get memory for ai context\n");
880 return -ENOMEM;
881 }
882
883 info->ai_context = ai_context;
884
885 spin_lock_init(&ai_context->use_lock);
886 spin_lock_init(&ai_context->int_lock);
887 ai_context->number = 0;
888 ai_context->irq = info->irq;
889 init_waitqueue_head(&ai_context->wait_queue);
890 ai_context->board_info = info;
891
892 ai_context->ctrl_reg =
893 info->me4000_regbase + ME4000_AI_CTRL_REG;
894 ai_context->status_reg =
895 info->me4000_regbase + ME4000_AI_STATUS_REG;
896 ai_context->channel_list_reg =
897 info->me4000_regbase + ME4000_AI_CHANNEL_LIST_REG;
898 ai_context->data_reg =
899 info->me4000_regbase + ME4000_AI_DATA_REG;
900 ai_context->chan_timer_reg =
901 info->me4000_regbase + ME4000_AI_CHAN_TIMER_REG;
902 ai_context->chan_pre_timer_reg =
903 info->me4000_regbase + ME4000_AI_CHAN_PRE_TIMER_REG;
904 ai_context->scan_timer_low_reg =
905 info->me4000_regbase + ME4000_AI_SCAN_TIMER_LOW_REG;
906 ai_context->scan_timer_high_reg =
907 info->me4000_regbase + ME4000_AI_SCAN_TIMER_HIGH_REG;
908 ai_context->scan_pre_timer_low_reg =
909 info->me4000_regbase + ME4000_AI_SCAN_PRE_TIMER_LOW_REG;
910 ai_context->scan_pre_timer_high_reg =
911 info->me4000_regbase + ME4000_AI_SCAN_PRE_TIMER_HIGH_REG;
912 ai_context->start_reg =
913 info->me4000_regbase + ME4000_AI_START_REG;
914 ai_context->irq_status_reg =
915 info->me4000_regbase + ME4000_IRQ_STATUS_REG;
916 ai_context->sample_counter_reg =
917 info->me4000_regbase + ME4000_AI_SAMPLE_COUNTER_REG;
918 }
919
920 return 0;
921 }
922
923 static int alloc_dio_context(struct me4000_info *info)
924 {
925 struct me4000_dio_context *dio_context;
926
927 if (info->board_p->dio.count) {
928 dio_context = kzalloc(sizeof(struct me4000_dio_context),
929 GFP_KERNEL);
930 if (!dio_context) {
931 printk(KERN_ERR
932 "ME4000:alloc_dio_context():Can't get memory for dio context\n");
933 return -ENOMEM;
934 }
935
936 info->dio_context = dio_context;
937
938 spin_lock_init(&dio_context->use_lock);
939 dio_context->board_info = info;
940
941 dio_context->dio_count = info->board_p->dio.count;
942
943 dio_context->dir_reg =
944 info->me4000_regbase + ME4000_DIO_DIR_REG;
945 dio_context->ctrl_reg =
946 info->me4000_regbase + ME4000_DIO_CTRL_REG;
947 dio_context->port_0_reg =
948 info->me4000_regbase + ME4000_DIO_PORT_0_REG;
949 dio_context->port_1_reg =
950 info->me4000_regbase + ME4000_DIO_PORT_1_REG;
951 dio_context->port_2_reg =
952 info->me4000_regbase + ME4000_DIO_PORT_2_REG;
953 dio_context->port_3_reg =
954 info->me4000_regbase + ME4000_DIO_PORT_3_REG;
955 }
956
957 return 0;
958 }
959
960 static int alloc_cnt_context(struct me4000_info *info)
961 {
962 struct me4000_cnt_context *cnt_context;
963
964 if (info->board_p->cnt.count) {
965 cnt_context = kzalloc(sizeof(struct me4000_cnt_context),
966 GFP_KERNEL);
967 if (!cnt_context) {
968 printk(KERN_ERR
969 "ME4000:alloc_cnt_context():Can't get memory for cnt context\n");
970 return -ENOMEM;
971 }
972
973 info->cnt_context = cnt_context;
974
975 spin_lock_init(&cnt_context->use_lock);
976 cnt_context->board_info = info;
977
978 cnt_context->ctrl_reg =
979 info->timer_regbase + ME4000_CNT_CTRL_REG;
980 cnt_context->counter_0_reg =
981 info->timer_regbase + ME4000_CNT_COUNTER_0_REG;
982 cnt_context->counter_1_reg =
983 info->timer_regbase + ME4000_CNT_COUNTER_1_REG;
984 cnt_context->counter_2_reg =
985 info->timer_regbase + ME4000_CNT_COUNTER_2_REG;
986 }
987
988 return 0;
989 }
990
991 static int alloc_ext_int_context(struct me4000_info *info)
992 {
993 struct me4000_ext_int_context *ext_int_context;
994
995 if (info->board_p->cnt.count) {
996 ext_int_context =
997 kzalloc(sizeof(struct me4000_ext_int_context), GFP_KERNEL);
998 if (!ext_int_context) {
999 printk(KERN_ERR
1000 "ME4000:alloc_ext_int_context():Can't get memory for cnt context\n");
1001 return -ENOMEM;
1002 }
1003
1004 info->ext_int_context = ext_int_context;
1005
1006 spin_lock_init(&ext_int_context->use_lock);
1007 ext_int_context->board_info = info;
1008
1009 ext_int_context->fasync_ptr = NULL;
1010 ext_int_context->irq = info->irq;
1011
1012 ext_int_context->ctrl_reg =
1013 info->me4000_regbase + ME4000_AI_CTRL_REG;
1014 ext_int_context->irq_status_reg =
1015 info->me4000_regbase + ME4000_IRQ_STATUS_REG;
1016 }
1017
1018 return 0;
1019 }
1020
1021 static int me4000_probe(struct pci_dev *dev, const struct pci_device_id *id)
1022 {
1023 int result = 0;
1024 struct me4000_info *board_info;
1025
1026 CALL_PDEBUG("me4000_probe() is executed\n");
1027
1028 /* Allocate structure for board context */
1029 board_info = kzalloc(sizeof(struct me4000_info), GFP_KERNEL);
1030 if (!board_info) {
1031 printk(KERN_ERR
1032 "ME4000:Can't get memory for board info structure\n");
1033 result = -ENOMEM;
1034 goto PROBE_ERROR_1;
1035 }
1036
1037 /* Add to global linked list */
1038 list_add_tail(&board_info->list, &me4000_board_info_list);
1039
1040 /* Get the PCI base registers */
1041 result = get_registers(dev, board_info);
1042 if (result) {
1043 printk(KERN_ERR "%s:Cannot get registers\n", __func__);
1044 goto PROBE_ERROR_2;
1045 }
1046
1047 /* Enable the device */
1048 result = pci_enable_device(dev);
1049 if (result < 0) {
1050 printk(KERN_ERR "%s:Cannot enable PCI device\n", __func__);
1051 goto PROBE_ERROR_2;
1052 }
1053
1054 /* Request the PCI register regions */
1055 result = pci_request_regions(dev, ME4000_NAME);
1056 if (result < 0) {
1057 printk(KERN_ERR "%s:Cannot request I/O regions\n", __func__);
1058 goto PROBE_ERROR_2;
1059 }
1060
1061 /* Initialize board info */
1062 result = init_board_info(dev, board_info);
1063 if (result) {
1064 printk(KERN_ERR "%s:Cannot init baord info\n", __func__);
1065 goto PROBE_ERROR_3;
1066 }
1067
1068 /* Download the xilinx firmware */
1069 result = me4000_xilinx_download(board_info);
1070 if (result) {
1071 printk(KERN_ERR "%s:Can't download firmware\n", __func__);
1072 goto PROBE_ERROR_3;
1073 }
1074
1075 /* Make a hardware reset */
1076 result = me4000_reset_board(board_info);
1077 if (result) {
1078 printk(KERN_ERR "%s :Can't reset board\n", __func__);
1079 goto PROBE_ERROR_3;
1080 }
1081
1082 /* Allocate analog output context structures */
1083 result = alloc_ao_contexts(board_info);
1084 if (result) {
1085 printk(KERN_ERR "%s:Cannot allocate ao contexts\n", __func__);
1086 goto PROBE_ERROR_3;
1087 }
1088
1089 /* Allocate analog input context */
1090 result = alloc_ai_context(board_info);
1091 if (result) {
1092 printk(KERN_ERR "%s:Cannot allocate ai context\n", __func__);
1093 goto PROBE_ERROR_4;
1094 }
1095
1096 /* Allocate digital I/O context */
1097 result = alloc_dio_context(board_info);
1098 if (result) {
1099 printk(KERN_ERR "%s:Cannot allocate dio context\n", __func__);
1100 goto PROBE_ERROR_5;
1101 }
1102
1103 /* Allocate counter context */
1104 result = alloc_cnt_context(board_info);
1105 if (result) {
1106 printk(KERN_ERR "%s:Cannot allocate cnt context\n", __func__);
1107 goto PROBE_ERROR_6;
1108 }
1109
1110 /* Allocate external interrupt context */
1111 result = alloc_ext_int_context(board_info);
1112 if (result) {
1113 printk(KERN_ERR
1114 "%s:Cannot allocate ext_int context\n", __func__);
1115 goto PROBE_ERROR_7;
1116 }
1117
1118 return 0;
1119
1120 PROBE_ERROR_7:
1121 kfree(board_info->cnt_context);
1122
1123 PROBE_ERROR_6:
1124 kfree(board_info->dio_context);
1125
1126 PROBE_ERROR_5:
1127 kfree(board_info->ai_context);
1128
1129 PROBE_ERROR_4:
1130 release_ao_contexts(board_info);
1131
1132 PROBE_ERROR_3:
1133 pci_release_regions(dev);
1134
1135 PROBE_ERROR_2:
1136 list_del(&board_info->list);
1137 kfree(board_info);
1138
1139 PROBE_ERROR_1:
1140 return result;
1141 }
1142
1143 static int me4000_xilinx_download(struct me4000_info *info)
1144 {
1145 int size = 0;
1146 u32 value = 0;
1147 int idx = 0;
1148 unsigned char *firm;
1149 wait_queue_head_t queue;
1150
1151 CALL_PDEBUG("me4000_xilinx_download() is executed\n");
1152
1153 init_waitqueue_head(&queue);
1154
1155 firm = (info->device_id == 0x4610) ? xilinx_firm_4610 : xilinx_firm;
1156
1157 /*
1158 * Set PLX local interrupt 2 polarity to high.
1159 * Interrupt is thrown by init pin of xilinx.
1160 */
1161 outl(0x10, info->plx_regbase + PLX_INTCSR);
1162
1163 /* Set /CS and /WRITE of the Xilinx */
1164 value = inl(info->plx_regbase + PLX_ICR);
1165 value |= 0x100;
1166 outl(value, info->plx_regbase + PLX_ICR);
1167
1168 /* Init Xilinx with CS1 */
1169 inb(info->program_regbase + 0xC8);
1170
1171 /* Wait until /INIT pin is set */
1172 udelay(20);
1173 if (!(inl(info->plx_regbase + PLX_INTCSR) & 0x20)) {
1174 printk(KERN_ERR "%s:Can't init Xilinx\n", __func__);
1175 return -EIO;
1176 }
1177
1178 /* Reset /CS and /WRITE of the Xilinx */
1179 value = inl(info->plx_regbase + PLX_ICR);
1180 value &= ~0x100;
1181 outl(value, info->plx_regbase + PLX_ICR);
1182
1183 /* Download Xilinx firmware */
1184 size = (firm[0] << 24) + (firm[1] << 16) + (firm[2] << 8) + firm[3];
1185 udelay(10);
1186
1187 for (idx = 0; idx < size; idx++) {
1188 outb(firm[16 + idx], info->program_regbase);
1189
1190 udelay(10);
1191
1192 /* Check if BUSY flag is low */
1193 if (inl(info->plx_regbase + PLX_ICR) & 0x20) {
1194 printk(KERN_ERR
1195 "%s:Xilinx is still busy (idx = %d)\n", __func__,
1196 idx);
1197 return -EIO;
1198 }
1199 }
1200
1201 PDEBUG("me4000_xilinx_download():%d bytes written\n", idx);
1202
1203 /* If done flag is high download was successful */
1204 if (inl(info->plx_regbase + PLX_ICR) & 0x4) {
1205 PDEBUG("me4000_xilinx_download():Done flag is set\n");
1206 PDEBUG("me4000_xilinx_download():Download was successful\n");
1207 } else {
1208 printk(KERN_ERR
1209 "ME4000:%s:DONE flag is not set\n", __func__);
1210 printk(KERN_ERR
1211 "ME4000:%s:Download not succesful\n", __func__);
1212 return -EIO;
1213 }
1214
1215 /* Set /CS and /WRITE */
1216 value = inl(info->plx_regbase + PLX_ICR);
1217 value |= 0x100;
1218 outl(value, info->plx_regbase + PLX_ICR);
1219
1220 return 0;
1221 }
1222
1223 static int me4000_reset_board(struct me4000_info *info)
1224 {
1225 unsigned long icr;
1226
1227 CALL_PDEBUG("me4000_reset_board() is executed\n");
1228
1229 /* Make a hardware reset */
1230 icr = me4000_inl(info->plx_regbase + PLX_ICR);
1231 icr |= 0x40000000;
1232 me4000_outl(icr, info->plx_regbase + PLX_ICR);
1233 icr &= ~0x40000000;
1234 me4000_outl(icr, info->plx_regbase + PLX_ICR);
1235
1236 /* Set both stop bits in the analog input control register */
1237 me4000_outl(ME4000_AI_CTRL_BIT_IMMEDIATE_STOP | ME4000_AI_CTRL_BIT_STOP,
1238 info->me4000_regbase + ME4000_AI_CTRL_REG);
1239
1240 /* Set both stop bits in the analog output control register */
1241 me4000_outl(ME4000_AO_CTRL_BIT_IMMEDIATE_STOP | ME4000_AO_CTRL_BIT_STOP,
1242 info->me4000_regbase + ME4000_AO_00_CTRL_REG);
1243 me4000_outl(ME4000_AO_CTRL_BIT_IMMEDIATE_STOP | ME4000_AO_CTRL_BIT_STOP,
1244 info->me4000_regbase + ME4000_AO_01_CTRL_REG);
1245 me4000_outl(ME4000_AO_CTRL_BIT_IMMEDIATE_STOP | ME4000_AO_CTRL_BIT_STOP,
1246 info->me4000_regbase + ME4000_AO_02_CTRL_REG);
1247 me4000_outl(ME4000_AO_CTRL_BIT_IMMEDIATE_STOP | ME4000_AO_CTRL_BIT_STOP,
1248 info->me4000_regbase + ME4000_AO_03_CTRL_REG);
1249
1250 /* 0x8000 to the DACs means an output voltage of 0V */
1251 me4000_outl(0x8000, info->me4000_regbase + ME4000_AO_00_SINGLE_REG);
1252 me4000_outl(0x8000, info->me4000_regbase + ME4000_AO_01_SINGLE_REG);
1253 me4000_outl(0x8000, info->me4000_regbase + ME4000_AO_02_SINGLE_REG);
1254 me4000_outl(0x8000, info->me4000_regbase + ME4000_AO_03_SINGLE_REG);
1255
1256 /* Enable interrupts on the PLX */
1257 me4000_outl(0x43, info->plx_regbase + PLX_INTCSR);
1258
1259 /* Set the adustment register for AO demux */
1260 me4000_outl(ME4000_AO_DEMUX_ADJUST_VALUE,
1261 info->me4000_regbase + ME4000_AO_DEMUX_ADJUST_REG);
1262
1263 /* Set digital I/O direction for port 0 to output on isolated versions */
1264 if (!(me4000_inl(info->me4000_regbase + ME4000_DIO_DIR_REG) & 0x1))
1265 me4000_outl(0x1, info->me4000_regbase + ME4000_DIO_CTRL_REG);
1266
1267 return 0;
1268 }
1269
1270 static int me4000_open(struct inode *inode_p, struct file *file_p)
1271 {
1272 int board, dev, mode;
1273 int err = 0;
1274 int i;
1275 struct list_head *ptr;
1276 struct me4000_info *board_info = NULL;
1277 struct me4000_ao_context *ao_context = NULL;
1278 struct me4000_ai_context *ai_context = NULL;
1279 struct me4000_dio_context *dio_context = NULL;
1280 struct me4000_cnt_context *cnt_context = NULL;
1281 struct me4000_ext_int_context *ext_int_context = NULL;
1282
1283 CALL_PDEBUG("me4000_open() is executed\n");
1284
1285 /* Analog output */
1286 if (MAJOR(inode_p->i_rdev) == me4000_ao_major_driver_no) {
1287 board = AO_BOARD(inode_p->i_rdev);
1288 dev = AO_PORT(inode_p->i_rdev);
1289 mode = AO_MODE(inode_p->i_rdev);
1290
1291 PDEBUG("me4000_open():board = %d ao = %d mode = %d\n", board,
1292 dev, mode);
1293
1294 /* Search for the board context */
1295 i = 0;
1296 list_for_each(ptr, &me4000_board_info_list) {
1297 if (i == board)
1298 break;
1299 i++;
1300 }
1301 board_info = list_entry(ptr, struct me4000_info, list);
1302
1303 if (ptr == &me4000_board_info_list) {
1304 printk(KERN_ERR
1305 "ME4000:me4000_open():Board %d not in device list\n",
1306 board);
1307 return -ENODEV;
1308 }
1309
1310 /* Search for the dac context */
1311 i = 0;
1312 list_for_each(ptr, &board_info->ao_context_list) {
1313 if (i == dev)
1314 break;
1315 i++;
1316 }
1317 ao_context = list_entry(ptr, struct me4000_ao_context, list);
1318
1319 if (ptr == &board_info->ao_context_list) {
1320 printk(KERN_ERR
1321 "ME4000:me4000_open():Device %d not in device list\n",
1322 dev);
1323 return -ENODEV;
1324 }
1325
1326 /* Check if mode is valid */
1327 if (mode > 2) {
1328 printk(KERN_ERR
1329 "ME4000:me4000_open():Mode is not valid\n");
1330 return -ENODEV;
1331 }
1332
1333 /* Check if mode is valid for this AO */
1334 if ((mode != ME4000_AO_CONV_MODE_SINGLE)
1335 && (dev >= board_info->board_p->ao.fifo_count)) {
1336 printk(KERN_ERR
1337 "ME4000:me4000_open():AO %d only in single mode available\n",
1338 dev);
1339 return -ENODEV;
1340 }
1341
1342 /* Check if already opened */
1343 spin_lock(&ao_context->use_lock);
1344 if (ao_context->dac_in_use) {
1345 printk(KERN_ERR
1346 "ME4000:me4000_open():AO %d already in use\n",
1347 dev);
1348 spin_unlock(&ao_context->use_lock);
1349 return -EBUSY;
1350 }
1351 ao_context->dac_in_use = 1;
1352 spin_unlock(&ao_context->use_lock);
1353
1354 ao_context->mode = mode;
1355
1356 /* Hold the context in private data */
1357 file_p->private_data = ao_context;
1358
1359 /* Set file operations pointer */
1360 file_p->f_op = me4000_ao_fops_array[mode];
1361
1362 err = me4000_ao_prepare(ao_context);
1363 if (err) {
1364 ao_context->dac_in_use = 0;
1365 return 1;
1366 }
1367 }
1368 /* Analog input */
1369 else if (MAJOR(inode_p->i_rdev) == me4000_ai_major_driver_no) {
1370 board = AI_BOARD(inode_p->i_rdev);
1371 mode = AI_MODE(inode_p->i_rdev);
1372
1373 PDEBUG("me4000_open():ai board = %d mode = %d\n", board, mode);
1374
1375 /* Search for the board context */
1376 i = 0;
1377 list_for_each(ptr, &me4000_board_info_list) {
1378 if (i == board)
1379 break;
1380 i++;
1381 }
1382 board_info = list_entry(ptr, struct me4000_info, list);
1383
1384 if (ptr == &me4000_board_info_list) {
1385 printk(KERN_ERR
1386 "ME4000:me4000_open():Board %d not in device list\n",
1387 board);
1388 return -ENODEV;
1389 }
1390
1391 ai_context = board_info->ai_context;
1392
1393 /* Check if mode is valid */
1394 if (mode > 5) {
1395 printk(KERN_ERR
1396 "ME4000:me4000_open():Mode is not valid\n");
1397 return -EINVAL;
1398 }
1399
1400 /* Check if already opened */
1401 spin_lock(&ai_context->use_lock);
1402 if (ai_context->in_use) {
1403 printk(KERN_ERR
1404 "ME4000:me4000_open():AI already in use\n");
1405 spin_unlock(&ai_context->use_lock);
1406 return -EBUSY;
1407 }
1408 ai_context->in_use = 1;
1409 spin_unlock(&ai_context->use_lock);
1410
1411 ai_context->mode = mode;
1412
1413 /* Hold the context in private data */
1414 file_p->private_data = ai_context;
1415
1416 /* Set file operations pointer */
1417 file_p->f_op = me4000_ai_fops_array[mode];
1418
1419 /* Prepare analog input */
1420 me4000_ai_prepare(ai_context);
1421 }
1422 /* Digital I/O */
1423 else if (MAJOR(inode_p->i_rdev) == me4000_dio_major_driver_no) {
1424 board = DIO_BOARD(inode_p->i_rdev);
1425 dev = 0;
1426 mode = 0;
1427
1428 PDEBUG("me4000_open():board = %d\n", board);
1429
1430 /* Search for the board context */
1431 list_for_each_entry(board_info, &me4000_board_info_list, list) {
1432 if (board_info->board_count == board)
1433 break;
1434 }
1435
1436 if (&board_info->list == &me4000_board_info_list) {
1437 printk(KERN_ERR
1438 "ME4000:me4000_open():Board %d not in device list\n",
1439 board);
1440 return -ENODEV;
1441 }
1442
1443 /* Search for the dio context */
1444 dio_context = board_info->dio_context;
1445
1446 /* Check if already opened */
1447 spin_lock(&dio_context->use_lock);
1448 if (dio_context->in_use) {
1449 printk(KERN_ERR
1450 "ME4000:me4000_open():DIO already in use\n");
1451 spin_unlock(&dio_context->use_lock);
1452 return -EBUSY;
1453 }
1454 dio_context->in_use = 1;
1455 spin_unlock(&dio_context->use_lock);
1456
1457 /* Hold the context in private data */
1458 file_p->private_data = dio_context;
1459
1460 /* Set file operations pointer to single functions */
1461 file_p->f_op = &me4000_dio_fops;
1462
1463 //me4000_dio_reset(dio_context);
1464 }
1465 /* Counters */
1466 else if (MAJOR(inode_p->i_rdev) == me4000_cnt_major_driver_no) {
1467 board = CNT_BOARD(inode_p->i_rdev);
1468 dev = 0;
1469 mode = 0;
1470
1471 PDEBUG("me4000_open():board = %d\n", board);
1472
1473 /* Search for the board context */
1474 list_for_each_entry(board_info, &me4000_board_info_list, list) {
1475 if (board_info->board_count == board)
1476 break;
1477 }
1478
1479 if (&board_info->list == &me4000_board_info_list) {
1480 printk(KERN_ERR
1481 "ME4000:me4000_open():Board %d not in device list\n",
1482 board);
1483 return -ENODEV;
1484 }
1485
1486 /* Get the cnt context */
1487 cnt_context = board_info->cnt_context;
1488
1489 /* Check if already opened */
1490 spin_lock(&cnt_context->use_lock);
1491 if (cnt_context->in_use) {
1492 printk(KERN_ERR
1493 "ME4000:me4000_open():CNT already in use\n");
1494 spin_unlock(&cnt_context->use_lock);
1495 return -EBUSY;
1496 }
1497 cnt_context->in_use = 1;
1498 spin_unlock(&cnt_context->use_lock);
1499
1500 /* Hold the context in private data */
1501 file_p->private_data = cnt_context;
1502
1503 /* Set file operations pointer to single functions */
1504 file_p->f_op = &me4000_cnt_fops;
1505 }
1506 /* External Interrupt */
1507 else if (MAJOR(inode_p->i_rdev) == me4000_ext_int_major_driver_no) {
1508 board = EXT_INT_BOARD(inode_p->i_rdev);
1509 dev = 0;
1510 mode = 0;
1511
1512 PDEBUG("me4000_open():board = %d\n", board);
1513
1514 /* Search for the board context */
1515 list_for_each_entry(board_info, &me4000_board_info_list, list) {
1516 if (board_info->board_count == board)
1517 break;
1518 }
1519
1520 if (&board_info->list == &me4000_board_info_list) {
1521 printk(KERN_ERR
1522 "ME4000:me4000_open():Board %d not in device list\n",
1523 board);
1524 return -ENODEV;
1525 }
1526
1527 /* Get the external interrupt context */
1528 ext_int_context = board_info->ext_int_context;
1529
1530 /* Check if already opened */
1531 spin_lock(&cnt_context->use_lock);
1532 if (ext_int_context->in_use) {
1533 printk(KERN_ERR
1534 "ME4000:me4000_open():External interrupt already in use\n");
1535 spin_unlock(&ext_int_context->use_lock);
1536 return -EBUSY;
1537 }
1538 ext_int_context->in_use = 1;
1539 spin_unlock(&ext_int_context->use_lock);
1540
1541 /* Hold the context in private data */
1542 file_p->private_data = ext_int_context;
1543
1544 /* Set file operations pointer to single functions */
1545 file_p->f_op = &me4000_ext_int_fops;
1546
1547 /* Request the interrupt line */
1548 err =
1549 request_irq(ext_int_context->irq, me4000_ext_int_isr,
1550 IRQF_DISABLED | IRQF_SHARED, ME4000_NAME,
1551 ext_int_context);
1552 if (err) {
1553 printk(KERN_ERR
1554 "ME4000:me4000_open():Can't get interrupt line");
1555 ext_int_context->in_use = 0;
1556 return -ENODEV;
1557 }
1558
1559 /* Reset the counter */
1560 me4000_ext_int_disable(ext_int_context);
1561 } else {
1562 printk(KERN_ERR "ME4000:me4000_open():Major number unknown\n");
1563 return -EINVAL;
1564 }
1565
1566 return 0;
1567 }
1568
1569 static int me4000_release(struct inode *inode_p, struct file *file_p)
1570 {
1571 struct me4000_ao_context *ao_context;
1572 struct me4000_ai_context *ai_context;
1573 struct me4000_dio_context *dio_context;
1574 struct me4000_cnt_context *cnt_context;
1575 struct me4000_ext_int_context *ext_int_context;
1576
1577 CALL_PDEBUG("me4000_release() is executed\n");
1578
1579 if (MAJOR(inode_p->i_rdev) == me4000_ao_major_driver_no) {
1580 ao_context = file_p->private_data;
1581
1582 /* Mark DAC as unused */
1583 ao_context->dac_in_use = 0;
1584 } else if (MAJOR(inode_p->i_rdev) == me4000_ai_major_driver_no) {
1585 ai_context = file_p->private_data;
1586
1587 /* Reset the analog input */
1588 me4000_ai_reset(ai_context);
1589
1590 /* Free the interrupt and the circular buffer */
1591 if (ai_context->mode) {
1592 free_irq(ai_context->irq, ai_context);
1593 kfree(ai_context->circ_buf.buf);
1594 ai_context->circ_buf.buf = NULL;
1595 ai_context->circ_buf.head = 0;
1596 ai_context->circ_buf.tail = 0;
1597 }
1598
1599 /* Mark AI as unused */
1600 ai_context->in_use = 0;
1601 } else if (MAJOR(inode_p->i_rdev) == me4000_dio_major_driver_no) {
1602 dio_context = file_p->private_data;
1603
1604 /* Mark digital I/O as unused */
1605 dio_context->in_use = 0;
1606 } else if (MAJOR(inode_p->i_rdev) == me4000_cnt_major_driver_no) {
1607 cnt_context = file_p->private_data;
1608
1609 /* Mark counters as unused */
1610 cnt_context->in_use = 0;
1611 } else if (MAJOR(inode_p->i_rdev) == me4000_ext_int_major_driver_no) {
1612 ext_int_context = file_p->private_data;
1613
1614 /* Disable the externel interrupt */
1615 me4000_ext_int_disable(ext_int_context);
1616
1617 free_irq(ext_int_context->irq, ext_int_context);
1618
1619 /* Mark as unused */
1620 ext_int_context->in_use = 0;
1621 } else {
1622 printk(KERN_ERR
1623 "ME4000:me4000_release():Major number unknown\n");
1624 return -EINVAL;
1625 }
1626
1627 return 0;
1628 }
1629
1630 /*------------------------------- Analog output stuff --------------------------------------*/
1631
1632 static int me4000_ao_prepare(struct me4000_ao_context *ao_context)
1633 {
1634 unsigned long flags;
1635
1636 CALL_PDEBUG("me4000_ao_prepare() is executed\n");
1637
1638 if (ao_context->mode == ME4000_AO_CONV_MODE_CONTINUOUS) {
1639 /* Only do anything if not already in the correct mode */
1640 unsigned long mode = me4000_inl(ao_context->ctrl_reg);
1641 if ((mode & ME4000_AO_CONV_MODE_CONTINUOUS)
1642 && (mode & ME4000_AO_CTRL_BIT_ENABLE_FIFO)) {
1643 return 0;
1644 }
1645
1646 /* Stop any conversion */
1647 me4000_ao_immediate_stop(ao_context);
1648
1649 /* Set the control register to default state */
1650 spin_lock_irqsave(&ao_context->int_lock, flags);
1651 me4000_outl(ME4000_AO_CONV_MODE_CONTINUOUS |
1652 ME4000_AO_CTRL_BIT_ENABLE_FIFO |
1653 ME4000_AO_CTRL_BIT_STOP |
1654 ME4000_AO_CTRL_BIT_IMMEDIATE_STOP,
1655 ao_context->ctrl_reg);
1656 spin_unlock_irqrestore(&ao_context->int_lock, flags);
1657
1658 /* Set to fastest sample rate */
1659 me4000_outl(65, ao_context->timer_reg);
1660 } else if (ao_context->mode == ME4000_AO_CONV_MODE_WRAPAROUND) {
1661 /* Only do anything if not already in the correct mode */
1662 unsigned long mode = me4000_inl(ao_context->ctrl_reg);
1663 if ((mode & ME4000_AO_CONV_MODE_WRAPAROUND)
1664 && (mode & ME4000_AO_CTRL_BIT_ENABLE_FIFO)) {
1665 return 0;
1666 }
1667
1668 /* Stop any conversion */
1669 me4000_ao_immediate_stop(ao_context);
1670
1671 /* Set the control register to default state */
1672 spin_lock_irqsave(&ao_context->int_lock, flags);
1673 me4000_outl(ME4000_AO_CONV_MODE_WRAPAROUND |
1674 ME4000_AO_CTRL_BIT_ENABLE_FIFO |
1675 ME4000_AO_CTRL_BIT_STOP |
1676 ME4000_AO_CTRL_BIT_IMMEDIATE_STOP,
1677 ao_context->ctrl_reg);
1678 spin_unlock_irqrestore(&ao_context->int_lock, flags);
1679
1680 /* Set to fastest sample rate */
1681 me4000_outl(65, ao_context->timer_reg);
1682 } else if (ao_context->mode == ME4000_AO_CONV_MODE_SINGLE) {
1683 /* Only do anything if not already in the correct mode */
1684 unsigned long mode = me4000_inl(ao_context->ctrl_reg);
1685 if (!
1686 (mode &
1687 (ME4000_AO_CONV_MODE_WRAPAROUND |
1688 ME4000_AO_CONV_MODE_CONTINUOUS))) {
1689 return 0;
1690 }
1691
1692 /* Stop any conversion */
1693 me4000_ao_immediate_stop(ao_context);
1694
1695 /* Clear the control register */
1696 spin_lock_irqsave(&ao_context->int_lock, flags);
1697 me4000_outl(0x0, ao_context->ctrl_reg);
1698 spin_unlock_irqrestore(&ao_context->int_lock, flags);
1699
1700 /* Set voltage to 0V */
1701 me4000_outl(0x8000, ao_context->single_reg);
1702 } else {
1703 printk(KERN_ERR
1704 "ME4000:me4000_ao_prepare():Invalid mode specified\n");
1705 return -EINVAL;
1706 }
1707
1708 return 0;
1709 }
1710
1711 static int me4000_ao_reset(struct me4000_ao_context *ao_context)
1712 {
1713 u32 tmp;
1714 wait_queue_head_t queue;
1715 unsigned long flags;
1716
1717 CALL_PDEBUG("me4000_ao_reset() is executed\n");
1718
1719 init_waitqueue_head(&queue);
1720
1721 if (ao_context->mode == ME4000_AO_CONV_MODE_WRAPAROUND) {
1722 /*
1723 * First stop conversion of the DAC before reconfigure.
1724 * This is essantial, cause of the state machine.
1725 * If not stopped before configuring mode, it could
1726 * walk in a undefined state.
1727 */
1728 tmp = me4000_inl(ao_context->ctrl_reg);
1729 tmp |= ME4000_AO_CTRL_BIT_IMMEDIATE_STOP;
1730 me4000_outl(tmp, ao_context->ctrl_reg);
1731
1732 wait_event_timeout(queue,
1733 (inl(ao_context->status_reg) &
1734 ME4000_AO_STATUS_BIT_FSM) == 0,
1735 1);
1736
1737 /* Set to transparent mode */
1738 me4000_ao_simultaneous_disable(ao_context);
1739
1740 /* Set to single mode in order to set default voltage */
1741 me4000_outl(0x0, ao_context->ctrl_reg);
1742
1743 /* Set voltage to 0V */
1744 me4000_outl(0x8000, ao_context->single_reg);
1745
1746 /* Set to fastest sample rate */
1747 me4000_outl(65, ao_context->timer_reg);
1748
1749 /* Set the original mode and enable FIFO */
1750 me4000_outl(ME4000_AO_CONV_MODE_WRAPAROUND |
1751 ME4000_AO_CTRL_BIT_ENABLE_FIFO |
1752 ME4000_AO_CTRL_BIT_STOP |
1753 ME4000_AO_CTRL_BIT_IMMEDIATE_STOP,
1754 ao_context->ctrl_reg);
1755 } else if (ao_context->mode == ME4000_AO_CONV_MODE_CONTINUOUS) {
1756 /*
1757 * First stop conversion of the DAC before reconfigure.
1758 * This is essantial, cause of the state machine.
1759 * If not stopped before configuring mode, it could
1760 * walk in a undefined state.
1761 */
1762 spin_lock_irqsave(&ao_context->int_lock, flags);
1763 tmp = me4000_inl(ao_context->ctrl_reg);
1764 tmp |= ME4000_AO_CTRL_BIT_STOP;
1765 me4000_outl(tmp, ao_context->ctrl_reg);
1766 spin_unlock_irqrestore(&ao_context->int_lock, flags);
1767
1768 wait_event_timeout(queue,
1769 (inl(ao_context->status_reg) &
1770 ME4000_AO_STATUS_BIT_FSM) == 0,
1771 1);
1772
1773 /* Clear the circular buffer */
1774 ao_context->circ_buf.head = 0;
1775 ao_context->circ_buf.tail = 0;
1776
1777 /* Set to transparent mode */
1778 me4000_ao_simultaneous_disable(ao_context);
1779
1780 /* Set to single mode in order to set default voltage */
1781 spin_lock_irqsave(&ao_context->int_lock, flags);
1782 tmp = me4000_inl(ao_context->ctrl_reg);
1783 me4000_outl(0x0, ao_context->ctrl_reg);
1784
1785 /* Set voltage to 0V */
1786 me4000_outl(0x8000, ao_context->single_reg);
1787
1788 /* Set to fastest sample rate */
1789 me4000_outl(65, ao_context->timer_reg);
1790
1791 /* Set the original mode and enable FIFO */
1792 me4000_outl(ME4000_AO_CONV_MODE_CONTINUOUS |
1793 ME4000_AO_CTRL_BIT_ENABLE_FIFO |
1794 ME4000_AO_CTRL_BIT_STOP |
1795 ME4000_AO_CTRL_BIT_IMMEDIATE_STOP,
1796 ao_context->ctrl_reg);
1797 spin_unlock_irqrestore(&ao_context->int_lock, flags);
1798 } else {
1799 /* Set to transparent mode */
1800 me4000_ao_simultaneous_disable(ao_context);
1801
1802 /* Set voltage to 0V */
1803 me4000_outl(0x8000, ao_context->single_reg);
1804 }
1805
1806 return 0;
1807 }
1808
1809 static ssize_t me4000_ao_write_sing(struct file *filep, const char *buff,
1810 size_t cnt, loff_t *offp)
1811 {
1812 struct me4000_ao_context *ao_context = filep->private_data;
1813 u32 value;
1814 const u16 *buffer = (const u16 *)buff;
1815
1816 CALL_PDEBUG("me4000_ao_write_sing() is executed\n");
1817
1818 if (cnt != 2) {
1819 printk(KERN_ERR
1820 "%s:Write count is not 2\n", __func__);
1821 return -EINVAL;
1822 }
1823
1824 if (get_user(value, buffer)) {
1825 printk(KERN_ERR
1826 "%s:Cannot copy data from user\n", __func__);
1827 return -EFAULT;
1828 }
1829
1830 me4000_outl(value, ao_context->single_reg);
1831
1832 return 2;
1833 }
1834
1835 static ssize_t me4000_ao_write_wrap(struct file *filep, const char *buff,
1836 size_t cnt, loff_t *offp)
1837 {
1838 struct me4000_ao_context *ao_context = filep->private_data;
1839 size_t i;
1840 u32 value;
1841 u32 tmp;
1842 const u16 *buffer = (const u16 *)buff;
1843 size_t count = cnt / 2;
1844
1845 CALL_PDEBUG("me4000_ao_write_wrap() is executed\n");
1846
1847 /* Check if a conversion is already running */
1848 if (inl(ao_context->status_reg) & ME4000_AO_STATUS_BIT_FSM) {
1849 printk(KERN_ERR
1850 "%s:There is already a conversion running\n", __func__);
1851 return -EBUSY;
1852 }
1853
1854 if (count > ME4000_AO_FIFO_COUNT) {
1855 printk(KERN_ERR
1856 "%s:Can't load more than %d values\n", __func__,
1857 ME4000_AO_FIFO_COUNT);
1858 return -ENOSPC;
1859 }
1860
1861 /* Reset the FIFO */
1862 tmp = inl(ao_context->ctrl_reg);
1863 tmp &= ~ME4000_AO_CTRL_BIT_ENABLE_FIFO;
1864 outl(tmp, ao_context->ctrl_reg);
1865 tmp |= ME4000_AO_CTRL_BIT_ENABLE_FIFO;
1866 outl(tmp, ao_context->ctrl_reg);
1867
1868 for (i = 0; i < count; i++) {
1869 if (get_user(value, buffer + i)) {
1870 printk(KERN_ERR
1871 "%s:Cannot copy data from user\n", __func__);
1872 return -EFAULT;
1873 }
1874 if (((ao_context->fifo_reg & 0xFF) == ME4000_AO_01_FIFO_REG)
1875 || ((ao_context->fifo_reg & 0xFF) == ME4000_AO_03_FIFO_REG))
1876 value = value << 16;
1877 outl(value, ao_context->fifo_reg);
1878 }
1879 CALL_PDEBUG("me4000_ao_write_wrap() is leaved with %d\n", i * 2);
1880
1881 return i * 2;
1882 }
1883
1884 static ssize_t me4000_ao_write_cont(struct file *filep, const char *buff,
1885 size_t cnt, loff_t *offp)
1886 {
1887 struct me4000_ao_context *ao_context = filep->private_data;
1888 const u16 *buffer = (const u16 *)buff;
1889 size_t count = cnt / 2;
1890 unsigned long flags;
1891 u32 tmp;
1892 int c = 0;
1893 int k = 0;
1894 int ret = 0;
1895 u16 svalue;
1896 u32 lvalue;
1897 int i;
1898 wait_queue_head_t queue;
1899
1900 CALL_PDEBUG("me4000_ao_write_cont() is executed\n");
1901
1902 init_waitqueue_head(&queue);
1903
1904 /* Check count */
1905 if (count <= 0) {
1906 PDEBUG("me4000_ao_write_cont():Count is 0\n");
1907 return 0;
1908 }
1909
1910 if (filep->f_flags & O_APPEND) {
1911 PDEBUG("me4000_ao_write_cont():Append data to data stream\n");
1912 while (count > 0) {
1913 if (filep->f_flags & O_NONBLOCK) {
1914 if (ao_context->pipe_flag) {
1915 printk(KERN_ERR
1916 "ME4000:me4000_ao_write_cont():Broken pipe in nonblocking write\n");
1917 return -EPIPE;
1918 }
1919 c = me4000_space_to_end(ao_context->circ_buf,
1920 ME4000_AO_BUFFER_COUNT);
1921 if (!c) {
1922 PDEBUG
1923 ("me4000_ao_write_cont():Returning from nonblocking write\n");
1924 break;
1925 }
1926 } else {
1927 wait_event_interruptible(ao_context->wait_queue,
1928 (c =
1929 me4000_space_to_end
1930 (ao_context->circ_buf,
1931 ME4000_AO_BUFFER_COUNT)));
1932 if (ao_context->pipe_flag) {
1933 printk(KERN_ERR
1934 "me4000_ao_write_cont():Broken pipe in blocking write\n");
1935 return -EPIPE;
1936 }
1937 if (signal_pending(current)) {
1938 printk(KERN_ERR
1939 "me4000_ao_write_cont():Wait for free buffer interrupted from signal\n");
1940 return -EINTR;
1941 }
1942 }
1943
1944 PDEBUG("me4000_ao_write_cont():Space to end = %d\n", c);
1945
1946 /* Only able to write size of free buffer or size of count */
1947 if (count < c)
1948 c = count;
1949
1950 k = 2 * c;
1951 k -= copy_from_user(ao_context->circ_buf.buf +
1952 ao_context->circ_buf.head, buffer,
1953 k);
1954 c = k / 2;
1955 PDEBUG
1956 ("me4000_ao_write_cont():Copy %d values from user space\n",
1957 c);
1958
1959 if (!c)
1960 return -EFAULT;
1961
1962 ao_context->circ_buf.head =
1963 (ao_context->circ_buf.head +
1964 c) & (ME4000_AO_BUFFER_COUNT - 1);
1965 buffer += c;
1966 count -= c;
1967 ret += c;
1968
1969 /* Values are now available so enable interrupts */
1970 spin_lock_irqsave(&ao_context->int_lock, flags);
1971 if (me4000_buf_count
1972 (ao_context->circ_buf, ME4000_AO_BUFFER_COUNT)) {
1973 tmp = me4000_inl(ao_context->ctrl_reg);
1974 tmp |= ME4000_AO_CTRL_BIT_ENABLE_IRQ;
1975 me4000_outl(tmp, ao_context->ctrl_reg);
1976 }
1977 spin_unlock_irqrestore(&ao_context->int_lock, flags);
1978 }
1979
1980 /* Wait until the state machine is stopped if O_SYNC is set */
1981 if (filep->f_flags & O_SYNC) {
1982 while (inl(ao_context->status_reg) &
1983 ME4000_AO_STATUS_BIT_FSM) {
1984 interruptible_sleep_on_timeout(&queue, 1);
1985 if (ao_context->pipe_flag) {
1986 PDEBUG
1987 ("me4000_ao_write_cont():Broken pipe detected after sync\n");
1988 return -EPIPE;
1989 }
1990 if (signal_pending(current)) {
1991 printk(KERN_ERR
1992 "me4000_ao_write_cont():Wait on state machine after sync interrupted\n");
1993 return -EINTR;
1994 }
1995 }
1996 }
1997 } else {
1998 PDEBUG("me4000_ao_write_cont():Preload DAC FIFO\n");
1999 if ((me4000_inl(ao_context->status_reg) &
2000 ME4000_AO_STATUS_BIT_FSM)) {
2001 printk(KERN_ERR
2002 "me4000_ao_write_cont():Can't Preload DAC FIFO while conversion is running\n");
2003 return -EBUSY;
2004 }
2005
2006 /* Clear the FIFO */
2007 spin_lock_irqsave(&ao_context->int_lock, flags);
2008 tmp = me4000_inl(ao_context->ctrl_reg);
2009 tmp &=
2010 ~(ME4000_AO_CTRL_BIT_ENABLE_FIFO |
2011 ME4000_AO_CTRL_BIT_ENABLE_IRQ);
2012 me4000_outl(tmp, ao_context->ctrl_reg);
2013 tmp |= ME4000_AO_CTRL_BIT_ENABLE_FIFO;
2014 me4000_outl(tmp, ao_context->ctrl_reg);
2015 spin_unlock_irqrestore(&ao_context->int_lock, flags);
2016
2017 /* Clear the circular buffer */
2018 ao_context->circ_buf.head = 0;
2019 ao_context->circ_buf.tail = 0;
2020
2021 /* Reset the broken pipe flag */
2022 ao_context->pipe_flag = 0;
2023
2024 /* Only able to write size of fifo or count */
2025 c = ME4000_AO_FIFO_COUNT;
2026 if (count < c)
2027 c = count;
2028
2029 PDEBUG
2030 ("me4000_ao_write_cont():Write %d values to DAC on 0x%lX\n",
2031 c, ao_context->fifo_reg);
2032
2033 /* Write values to the fifo */
2034 for (i = 0; i < c; i++) {
2035 if (get_user(svalue, buffer))
2036 return -EFAULT;
2037
2038 if (((ao_context->fifo_reg & 0xFF) ==
2039 ME4000_AO_01_FIFO_REG)
2040 || ((ao_context->fifo_reg & 0xFF) ==
2041 ME4000_AO_03_FIFO_REG)) {
2042 lvalue = ((u32) svalue) << 16;
2043 } else
2044 lvalue = (u32) svalue;
2045
2046 outl(lvalue, ao_context->fifo_reg);
2047 buffer++;
2048 }
2049 count -= c;
2050 ret += c;
2051
2052 while (1) {
2053 /* Get free buffer */
2054 c = me4000_space_to_end(ao_context->circ_buf,
2055 ME4000_AO_BUFFER_COUNT);
2056
2057 if (c == 0)
2058 return 2 * ret;
2059
2060 /* Only able to write size of free buffer or size of count */
2061 if (count < c)
2062 c = count;
2063
2064 /* If count = 0 return to user */
2065 if (c <= 0) {
2066 PDEBUG
2067 ("me4000_ao_write_cont():Count reached 0\n");
2068 break;
2069 }
2070
2071 k = 2 * c;
2072 k -= copy_from_user(ao_context->circ_buf.buf +
2073 ao_context->circ_buf.head, buffer,
2074 k);
2075 c = k / 2;
2076 PDEBUG
2077 ("me4000_ao_write_cont():Wrote %d values to buffer\n",
2078 c);
2079
2080 if (!c)
2081 return -EFAULT;
2082
2083 ao_context->circ_buf.head =
2084 (ao_context->circ_buf.head +
2085 c) & (ME4000_AO_BUFFER_COUNT - 1);
2086 buffer += c;
2087 count -= c;
2088 ret += c;
2089
2090 /* If values in the buffer are available so enable interrupts */
2091 spin_lock_irqsave(&ao_context->int_lock, flags);
2092 if (me4000_buf_count
2093 (ao_context->circ_buf, ME4000_AO_BUFFER_COUNT)) {
2094 PDEBUG
2095 ("me4000_ao_write_cont():Enable Interrupts\n");
2096 tmp = me4000_inl(ao_context->ctrl_reg);
2097 tmp |= ME4000_AO_CTRL_BIT_ENABLE_IRQ;
2098 me4000_outl(tmp, ao_context->ctrl_reg);
2099 }
2100 spin_unlock_irqrestore(&ao_context->int_lock, flags);
2101 }
2102 }
2103
2104 if (filep->f_flags & O_NONBLOCK)
2105 return (ret == 0) ? -EAGAIN : 2 * ret;
2106
2107 return 2 * ret;
2108 }
2109
2110 static unsigned int me4000_ao_poll_cont(struct file *file_p, poll_table *wait)
2111 {
2112 struct me4000_ao_context *ao_context;
2113 unsigned long mask = 0;
2114
2115 CALL_PDEBUG("me4000_ao_poll_cont() is executed\n");
2116
2117 ao_context = file_p->private_data;
2118
2119 poll_wait(file_p, &ao_context->wait_queue, wait);
2120
2121 /* Get free buffer */
2122 if (me4000_space_to_end(ao_context->circ_buf, ME4000_AO_BUFFER_COUNT))
2123 mask |= POLLOUT | POLLWRNORM;
2124
2125 CALL_PDEBUG("me4000_ao_poll_cont():Return mask %lX\n", mask);
2126
2127 return mask;
2128 }
2129
2130 static int me4000_ao_fsync_cont(struct file *file_p, struct dentry *dentry_p,
2131 int datasync)
2132 {
2133 struct me4000_ao_context *ao_context;
2134 wait_queue_head_t queue;
2135
2136 CALL_PDEBUG("me4000_ao_fsync_cont() is executed\n");
2137
2138 ao_context = file_p->private_data;
2139 init_waitqueue_head(&queue);
2140
2141 while (inl(ao_context->status_reg) & ME4000_AO_STATUS_BIT_FSM) {
2142 interruptible_sleep_on_timeout(&queue, 1);
2143 wait_event_interruptible_timeout(queue,
2144 !(inl(ao_context->status_reg) & ME4000_AO_STATUS_BIT_FSM),
2145 1);
2146 if (ao_context->pipe_flag) {
2147 printk(KERN_ERR
2148 "%s:Broken pipe detected\n", __func__);
2149 return -EPIPE;
2150 }
2151
2152 if (signal_pending(current)) {
2153 printk(KERN_ERR
2154 "%s:Wait on state machine interrupted\n",
2155 __func__);
2156 return -EINTR;
2157 }
2158 }
2159
2160 return 0;
2161 }
2162
2163 static int me4000_ao_ioctl_sing(struct inode *inode_p, struct file *file_p,
2164 unsigned int service, unsigned long arg)
2165 {
2166 struct me4000_ao_context *ao_context;
2167
2168 CALL_PDEBUG("me4000_ao_ioctl_sing() is executed\n");
2169
2170 ao_context = file_p->private_data;
2171
2172 if (_IOC_TYPE(service) != ME4000_MAGIC) {
2173 return -ENOTTY;
2174 PDEBUG("me4000_ao_ioctl_sing():Wrong magic number\n");
2175 }
2176
2177 switch (service) {
2178 case ME4000_AO_EX_TRIG_SETUP:
2179 return me4000_ao_ex_trig_set_edge((int *)arg, ao_context);
2180 case ME4000_AO_EX_TRIG_ENABLE:
2181 return me4000_ao_ex_trig_enable(ao_context);
2182 case ME4000_AO_EX_TRIG_DISABLE:
2183 return me4000_ao_ex_trig_disable(ao_context);
2184 case ME4000_AO_PRELOAD:
2185 return me4000_ao_preload(ao_context);
2186 case ME4000_AO_PRELOAD_UPDATE:
2187 return me4000_ao_preload_update(ao_context);
2188 case ME4000_GET_USER_INFO:
2189 return me4000_get_user_info((struct me4000_user_info *)arg,
2190 ao_context->board_info);
2191 case ME4000_AO_SIMULTANEOUS_EX_TRIG:
2192 return me4000_ao_simultaneous_ex_trig(ao_context);
2193 case ME4000_AO_SIMULTANEOUS_SW:
2194 return me4000_ao_simultaneous_sw(ao_context);
2195 case ME4000_AO_SIMULTANEOUS_DISABLE:
2196 return me4000_ao_simultaneous_disable(ao_context);
2197 case ME4000_AO_SIMULTANEOUS_UPDATE:
2198 return
2199 me4000_ao_simultaneous_update(
2200 (struct me4000_ao_channel_list *)arg,
2201 ao_context);
2202 case ME4000_AO_EX_TRIG_TIMEOUT:
2203 return me4000_ao_ex_trig_timeout((unsigned long *)arg,
2204 ao_context);
2205 case ME4000_AO_DISABLE_DO:
2206 return me4000_ao_disable_do(ao_context);
2207 default:
2208 printk(KERN_ERR
2209 "me4000_ao_ioctl_sing():Service number invalid\n");
2210 return -ENOTTY;
2211 }
2212
2213 return 0;
2214 }
2215
2216 static int me4000_ao_ioctl_wrap(struct inode *inode_p, struct file *file_p,
2217 unsigned int service, unsigned long arg)
2218 {
2219 struct me4000_ao_context *ao_context;
2220
2221 CALL_PDEBUG("me4000_ao_ioctl_wrap() is executed\n");
2222
2223 ao_context = file_p->private_data;
2224
2225 if (_IOC_TYPE(service) != ME4000_MAGIC) {
2226 return -ENOTTY;
2227 PDEBUG("me4000_ao_ioctl_wrap():Wrong magic number\n");
2228 }
2229
2230 switch (service) {
2231 case ME4000_AO_START:
2232 return me4000_ao_start((unsigned long *)arg, ao_context);
2233 case ME4000_AO_STOP:
2234 return me4000_ao_stop(ao_context);
2235 case ME4000_AO_IMMEDIATE_STOP:
2236 return me4000_ao_immediate_stop(ao_context);
2237 case ME4000_AO_RESET:
2238 return me4000_ao_reset(ao_context);
2239 case ME4000_AO_TIMER_SET_DIVISOR:
2240 return me4000_ao_timer_set_divisor((u32 *) arg, ao_context);
2241 case ME4000_AO_EX_TRIG_SETUP:
2242 return me4000_ao_ex_trig_set_edge((int *)arg, ao_context);
2243 case ME4000_AO_EX_TRIG_ENABLE:
2244 return me4000_ao_ex_trig_enable(ao_context);
2245 case ME4000_AO_EX_TRIG_DISABLE:
2246 return me4000_ao_ex_trig_disable(ao_context);
2247 case ME4000_GET_USER_INFO:
2248 return me4000_get_user_info((struct me4000_user_info *)arg,
2249 ao_context->board_info);
2250 case ME4000_AO_FSM_STATE:
2251 return me4000_ao_fsm_state((int *)arg, ao_context);
2252 case ME4000_AO_ENABLE_DO:
2253 return me4000_ao_enable_do(ao_context);
2254 case ME4000_AO_DISABLE_DO:
2255 return me4000_ao_disable_do(ao_context);
2256 case ME4000_AO_SYNCHRONOUS_EX_TRIG:
2257 return me4000_ao_synchronous_ex_trig(ao_context);
2258 case ME4000_AO_SYNCHRONOUS_SW:
2259 return me4000_ao_synchronous_sw(ao_context);
2260 case ME4000_AO_SYNCHRONOUS_DISABLE:
2261 return me4000_ao_synchronous_disable(ao_context);
2262 default:
2263 return -ENOTTY;
2264 }
2265 return 0;
2266 }
2267
2268 static int me4000_ao_ioctl_cont(struct inode *inode_p, struct file *file_p,
2269 unsigned int service, unsigned long arg)
2270 {
2271 struct me4000_ao_context *ao_context;
2272
2273 CALL_PDEBUG("me4000_ao_ioctl_cont() is executed\n");
2274
2275 ao_context = file_p->private_data;
2276
2277 if (_IOC_TYPE(service) != ME4000_MAGIC) {
2278 return -ENOTTY;
2279 PDEBUG("me4000_ao_ioctl_cont():Wrong magic number\n");
2280 }
2281
2282 switch (service) {
2283 case ME4000_AO_START:
2284 return me4000_ao_start((unsigned long *)arg, ao_context);
2285 case ME4000_AO_STOP:
2286 return me4000_ao_stop(ao_context);
2287 case ME4000_AO_IMMEDIATE_STOP:
2288 return me4000_ao_immediate_stop(ao_context);
2289 case ME4000_AO_RESET:
2290 return me4000_ao_reset(ao_context);
2291 case ME4000_AO_TIMER_SET_DIVISOR:
2292 return me4000_ao_timer_set_divisor((u32 *) arg, ao_context);
2293 case ME4000_AO_EX_TRIG_SETUP:
2294 return me4000_ao_ex_trig_set_edge((int *)arg, ao_context);
2295 case ME4000_AO_EX_TRIG_ENABLE:
2296 return me4000_ao_ex_trig_enable(ao_context);
2297 case ME4000_AO_EX_TRIG_DISABLE:
2298 return me4000_ao_ex_trig_disable(ao_context);
2299 case ME4000_AO_ENABLE_DO:
2300 return me4000_ao_enable_do(ao_context);
2301 case ME4000_AO_DISABLE_DO:
2302 return me4000_ao_disable_do(ao_context);
2303 case ME4000_AO_FSM_STATE:
2304 return me4000_ao_fsm_state((int *)arg, ao_context);
2305 case ME4000_GET_USER_INFO:
2306 return me4000_get_user_info((struct me4000_user_info *)arg,
2307 ao_context->board_info);
2308 case ME4000_AO_SYNCHRONOUS_EX_TRIG:
2309 return me4000_ao_synchronous_ex_trig(ao_context);
2310 case ME4000_AO_SYNCHRONOUS_SW:
2311 return me4000_ao_synchronous_sw(ao_context);
2312 case ME4000_AO_SYNCHRONOUS_DISABLE:
2313 return me4000_ao_synchronous_disable(ao_context);
2314 case ME4000_AO_GET_FREE_BUFFER:
2315 return me4000_ao_get_free_buffer((unsigned long *)arg,
2316 ao_context);
2317 default:
2318 return -ENOTTY;
2319 }
2320 return 0;
2321 }
2322
2323 static int me4000_ao_start(unsigned long *arg,
2324 struct me4000_ao_context *ao_context)
2325 {
2326 u32 tmp;
2327 wait_queue_head_t queue;
2328 unsigned long ref;
2329 unsigned long timeout;
2330 unsigned long flags;
2331
2332 CALL_PDEBUG("me4000_ao_start() is executed\n");
2333
2334 if (get_user(timeout, arg)) {
2335 printk(KERN_ERR
2336 "me4000_ao_start():Cannot copy data from user\n");
2337 return -EFAULT;
2338 }
2339
2340 init_waitqueue_head(&queue);
2341
2342 spin_lock_irqsave(&ao_context->int_lock, flags);
2343 tmp = inl(ao_context->ctrl_reg);
2344 tmp &= ~(ME4000_AO_CTRL_BIT_STOP | ME4000_AO_CTRL_BIT_IMMEDIATE_STOP);
2345 me4000_outl(tmp, ao_context->ctrl_reg);
2346 spin_unlock_irqrestore(&ao_context->int_lock, flags);
2347
2348 if ((tmp & ME4000_AO_CTRL_BIT_ENABLE_EX_TRIG)) {
2349 if (timeout) {
2350 ref = jiffies;
2351 while (!
2352 (inl(ao_context->status_reg) &
2353 ME4000_AO_STATUS_BIT_FSM)) {
2354 interruptible_sleep_on_timeout(&queue, 1);
2355 if (signal_pending(current)) {
2356 printk(KERN_ERR
2357 "ME4000:me4000_ao_start():Wait on start of state machine interrupted\n");
2358 return -EINTR;
2359 }
2360 /* kernel 2.6 has different definitions for HZ
2361 * in user and kernel space */
2362 if ((jiffies - ref) > (timeout * HZ / USER_HZ)) {
2363 printk(KERN_ERR
2364 "ME4000:me4000_ao_start():Timeout reached\n");
2365 return -EIO;
2366 }
2367 }
2368 }
2369 } else {
2370 me4000_outl(0x8000, ao_context->single_reg);
2371 }
2372
2373 return 0;
2374 }
2375
2376 static int me4000_ao_stop(struct me4000_ao_context *ao_context)
2377 {
2378 u32 tmp;
2379 wait_queue_head_t queue;
2380 unsigned long flags;
2381
2382 init_waitqueue_head(&queue);
2383
2384 CALL_PDEBUG("me4000_ao_stop() is executed\n");
2385
2386 /* Set the stop bit */
2387 spin_lock_irqsave(&ao_context->int_lock, flags);
2388 tmp = inl(ao_context->ctrl_reg);
2389 tmp |= ME4000_AO_CTRL_BIT_STOP;
2390 me4000_outl(tmp, ao_context->ctrl_reg);
2391 spin_unlock_irqrestore(&ao_context->int_lock, flags);
2392
2393 while (inl(ao_context->status_reg) & ME4000_AO_STATUS_BIT_FSM) {
2394 interruptible_sleep_on_timeout(&queue, 1);
2395 if (signal_pending(current)) {
2396 printk(KERN_ERR
2397 "me4000_ao_stop():Wait on state machine after stop interrupted\n");
2398 return -EINTR;
2399 }
2400 }
2401
2402 /* Clear the stop bit */
2403 //tmp &= ~ME4000_AO_CTRL_BIT_STOP;
2404 //me4000_outl(tmp, ao_context->ctrl_reg);
2405
2406 return 0;
2407 }
2408
2409 static int me4000_ao_immediate_stop(struct me4000_ao_context *ao_context)
2410 {
2411 u32 tmp;
2412 wait_queue_head_t queue;
2413 unsigned long flags;
2414
2415 init_waitqueue_head(&queue);
2416
2417 CALL_PDEBUG("me4000_ao_immediate_stop() is executed\n");
2418
2419 spin_lock_irqsave(&ao_context->int_lock, flags);
2420 tmp = inl(ao_context->ctrl_reg);
2421 tmp |= ME4000_AO_CTRL_BIT_STOP | ME4000_AO_CTRL_BIT_IMMEDIATE_STOP;
2422 me4000_outl(tmp, ao_context->ctrl_reg);
2423 spin_unlock_irqrestore(&ao_context->int_lock, flags);
2424
2425 while (inl(ao_context->status_reg) & ME4000_AO_STATUS_BIT_FSM) {
2426 interruptible_sleep_on_timeout(&queue, 1);
2427 if (signal_pending(current)) {
2428 printk(KERN_ERR
2429 "me4000_ao_immediate_stop():Wait on state machine after stop interrupted\n");
2430 return -EINTR;
2431 }
2432 }
2433
2434 /* Clear the stop bits */
2435 //tmp &= ~(ME4000_AO_CTRL_BIT_STOP | ME4000_AO_CTRL_BIT_IMMEDIATE_STOP);
2436 //me4000_outl(tmp, ao_context->ctrl_reg);
2437
2438 return 0;
2439 }
2440
2441 static int me4000_ao_timer_set_divisor(u32 *arg,
2442 struct me4000_ao_context *ao_context)
2443 {
2444 u32 divisor;
2445 u32 tmp;
2446
2447 CALL_PDEBUG("me4000_ao_timer set_divisor() is executed\n");
2448
2449 if (get_user(divisor, arg))
2450 return -EFAULT;
2451
2452 /* Check if the state machine is stopped */
2453 tmp = me4000_inl(ao_context->status_reg);
2454 if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2455 printk(KERN_ERR
2456 "me4000_ao_timer_set_divisor():Can't set timer while DAC is running\n");
2457 return -EBUSY;
2458 }
2459
2460 PDEBUG("me4000_ao_timer set_divisor():Divisor from user = %d\n",
2461 divisor);
2462
2463 /* Check if the divisor is right. ME4000_AO_MIN_TICKS is the lowest */
2464 if (divisor < ME4000_AO_MIN_TICKS) {
2465 printk(KERN_ERR
2466 "ME4000:me4000_ao_timer set_divisor():Divisor to low\n");
2467 return -EINVAL;
2468 }
2469
2470 /* Fix bug in Firmware */
2471 divisor -= 2;
2472
2473 PDEBUG("me4000_ao_timer set_divisor():Divisor to HW = %d\n", divisor);
2474
2475 /* Write the divisor */
2476 me4000_outl(divisor, ao_context->timer_reg);
2477
2478 return 0;
2479 }
2480
2481 static int me4000_ao_ex_trig_set_edge(int *arg,
2482 struct me4000_ao_context *ao_context)
2483 {
2484 int mode;
2485 u32 tmp;
2486 unsigned long flags;
2487
2488 CALL_PDEBUG("me4000_ao_ex_trig_set_edge() is executed\n");
2489
2490 if (get_user(mode, arg))
2491 return -EFAULT;
2492
2493 /* Check if the state machine is stopped */
2494 tmp = me4000_inl(ao_context->status_reg);
2495 if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2496 printk(KERN_ERR
2497 "me4000_ao_ex_trig_set_edge():Can't set trigger while DAC is running\n");
2498 return -EBUSY;
2499 }
2500
2501 if (mode == ME4000_AO_TRIGGER_EXT_EDGE_RISING) {
2502 spin_lock_irqsave(&ao_context->int_lock, flags);
2503 tmp = me4000_inl(ao_context->ctrl_reg);
2504 tmp &=
2505 ~(ME4000_AO_CTRL_BIT_EX_TRIG_EDGE |
2506 ME4000_AO_CTRL_BIT_EX_TRIG_BOTH);
2507 me4000_outl(tmp, ao_context->ctrl_reg);
2508 spin_unlock_irqrestore(&ao_context->int_lock, flags);
2509 } else if (mode == ME4000_AO_TRIGGER_EXT_EDGE_FALLING) {
2510 spin_lock_irqsave(&ao_context->int_lock, flags);
2511 tmp = me4000_inl(ao_context->ctrl_reg);
2512 tmp &= ~ME4000_AO_CTRL_BIT_EX_TRIG_BOTH;
2513 tmp |= ME4000_AO_CTRL_BIT_EX_TRIG_EDGE;
2514 me4000_outl(tmp, ao_context->ctrl_reg);
2515 spin_unlock_irqrestore(&ao_context->int_lock, flags);
2516 } else if (mode == ME4000_AO_TRIGGER_EXT_EDGE_BOTH) {
2517 spin_lock_irqsave(&ao_context->int_lock, flags);
2518 tmp = me4000_inl(ao_context->ctrl_reg);
2519 tmp |=
2520 ME4000_AO_CTRL_BIT_EX_TRIG_EDGE |
2521 ME4000_AO_CTRL_BIT_EX_TRIG_BOTH;
2522 me4000_outl(tmp, ao_context->ctrl_reg);
2523 spin_unlock_irqrestore(&ao_context->int_lock, flags);
2524 } else {
2525 printk(KERN_ERR
2526 "me4000_ao_ex_trig_set_edge():Invalid trigger mode\n");
2527 return -EINVAL;
2528 }
2529
2530 return 0;
2531 }
2532
2533 static int me4000_ao_ex_trig_enable(struct me4000_ao_context *ao_context)
2534 {
2535 u32 tmp;
2536 unsigned long flags;
2537
2538 CALL_PDEBUG("me4000_ao_ex_trig_enable() is executed\n");
2539
2540 /* Check if the state machine is stopped */
2541 tmp = me4000_inl(ao_context->status_reg);
2542 if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2543 printk(KERN_ERR
2544 "me4000_ao_ex_trig_enable():Can't enable trigger while DAC is running\n");
2545 return -EBUSY;
2546 }
2547
2548 spin_lock_irqsave(&ao_context->int_lock, flags);
2549 tmp = me4000_inl(ao_context->ctrl_reg);
2550 tmp |= ME4000_AO_CTRL_BIT_ENABLE_EX_TRIG;
2551 me4000_outl(tmp, ao_context->ctrl_reg);
2552 spin_unlock_irqrestore(&ao_context->int_lock, flags);
2553
2554 return 0;
2555 }
2556
2557 static int me4000_ao_ex_trig_disable(struct me4000_ao_context *ao_context)
2558 {
2559 u32 tmp;
2560 unsigned long flags;
2561
2562 CALL_PDEBUG("me4000_ao_ex_trig_disable() is executed\n");
2563
2564 /* Check if the state machine is stopped */
2565 tmp = me4000_inl(ao_context->status_reg);
2566 if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2567 printk(KERN_ERR
2568 "me4000_ao_ex_trig_disable():Can't disable trigger while DAC is running\n");
2569 return -EBUSY;
2570 }
2571
2572 spin_lock_irqsave(&ao_context->int_lock, flags);
2573 tmp = me4000_inl(ao_context->ctrl_reg);
2574 tmp &= ~ME4000_AO_CTRL_BIT_ENABLE_EX_TRIG;
2575 me4000_outl(tmp, ao_context->ctrl_reg);
2576 spin_unlock_irqrestore(&ao_context->int_lock, flags);
2577
2578 return 0;
2579 }
2580
2581 static int me4000_ao_simultaneous_disable(struct me4000_ao_context *ao_context)
2582 {
2583 u32 tmp;
2584
2585 CALL_PDEBUG("me4000_ao_simultaneous_disable() is executed\n");
2586
2587 /* Check if the state machine is stopped */
2588 /* Be careful here because this function is called from
2589 me4000_ao_synchronous disable */
2590 tmp = me4000_inl(ao_context->status_reg);
2591 if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2592 printk(KERN_ERR
2593 "me4000_ao_simultaneous_disable():Can't disable while DAC is running\n");
2594 return -EBUSY;
2595 }
2596
2597 spin_lock(&ao_context->board_info->preload_lock);
2598 tmp = me4000_inl(ao_context->preload_reg);
2599 tmp &= ~(0x1 << ao_context->index); // Disable preload bit
2600 tmp &= ~(0x1 << (ao_context->index + 16)); // Disable hw simultaneous bit
2601 me4000_outl(tmp, ao_context->preload_reg);
2602 spin_unlock(&ao_context->board_info->preload_lock);
2603
2604 return 0;
2605 }
2606
2607 static int me4000_ao_simultaneous_ex_trig(struct me4000_ao_context *ao_context)
2608 {
2609 u32 tmp;
2610
2611 CALL_PDEBUG("me4000_ao_simultaneous_ex_trig() is executed\n");
2612
2613 spin_lock(&ao_context->board_info->preload_lock);
2614 tmp = me4000_inl(ao_context->preload_reg);
2615 tmp |= (0x1 << ao_context->index); // Enable preload bit
2616 tmp |= (0x1 << (ao_context->index + 16)); // Enable hw simultaneous bit
2617 me4000_outl(tmp, ao_context->preload_reg);
2618 spin_unlock(&ao_context->board_info->preload_lock);
2619
2620 return 0;
2621 }
2622
2623 static int me4000_ao_simultaneous_sw(struct me4000_ao_context *ao_context)
2624 {
2625 u32 tmp;
2626
2627 CALL_PDEBUG("me4000_ao_simultaneous_sw() is executed\n");
2628
2629 spin_lock(&ao_context->board_info->preload_lock);
2630 tmp = me4000_inl(ao_context->preload_reg);
2631 tmp |= (0x1 << ao_context->index); // Enable preload bit
2632 tmp &= ~(0x1 << (ao_context->index + 16)); // Disable hw simultaneous bit
2633 me4000_outl(tmp, ao_context->preload_reg);
2634 spin_unlock(&ao_context->board_info->preload_lock);
2635
2636 return 0;
2637 }
2638
2639 static int me4000_ao_preload(struct me4000_ao_context *ao_context)
2640 {
2641 CALL_PDEBUG("me4000_ao_preload() is executed\n");
2642 return me4000_ao_simultaneous_sw(ao_context);
2643 }
2644
2645 static int me4000_ao_preload_update(struct me4000_ao_context *ao_context)
2646 {
2647 u32 tmp;
2648 u32 ctrl;
2649 struct list_head *entry;
2650
2651 CALL_PDEBUG("me4000_ao_preload_update() is executed\n");
2652
2653 spin_lock(&ao_context->board_info->preload_lock);
2654 tmp = me4000_inl(ao_context->preload_reg);
2655 list_for_each(entry, &ao_context->board_info->ao_context_list) {
2656 /* The channels we update must be in the following state :
2657 - Mode A
2658 - Hardware trigger is disabled
2659 - Corresponding simultaneous bit is reset
2660 */
2661 ctrl = me4000_inl(ao_context->ctrl_reg);
2662 if (!
2663 (ctrl &
2664 (ME4000_AO_CTRL_BIT_MODE_0 | ME4000_AO_CTRL_BIT_MODE_1 |
2665 ME4000_AO_CTRL_BIT_ENABLE_EX_TRIG))) {
2666 if (!
2667 (tmp &
2668 (0x1 <<
2669 (((struct me4000_ao_context *)entry)->index
2670 + 16)))) {
2671 tmp &=
2672 ~(0x1 <<
2673 (((struct me4000_ao_context *)entry)->
2674 index));
2675 }
2676 }
2677 }
2678 me4000_outl(tmp, ao_context->preload_reg);
2679 spin_unlock(&ao_context->board_info->preload_lock);
2680
2681 return 0;
2682 }
2683
2684 static int me4000_ao_simultaneous_update(struct me4000_ao_channel_list *arg,
2685 struct me4000_ao_context *ao_context)
2686 {
2687 int err;
2688 int i;
2689 u32 tmp;
2690 struct me4000_ao_channel_list channels;
2691
2692 CALL_PDEBUG("me4000_ao_simultaneous_update() is executed\n");
2693
2694 /* Copy data from user */
2695 err = copy_from_user(&channels, arg,
2696 sizeof(struct me4000_ao_channel_list));
2697 if (err) {
2698 printk(KERN_ERR
2699 "ME4000:me4000_ao_simultaneous_update():Can't copy command\n");
2700 return -EFAULT;
2701 }
2702
2703 channels.list =
2704 kzalloc(sizeof(unsigned long) * channels.count, GFP_KERNEL);
2705 if (!channels.list) {
2706 printk(KERN_ERR
2707 "ME4000:me4000_ao_simultaneous_update():Can't get buffer\n");
2708 return -ENOMEM;
2709 }
2710
2711 /* Copy channel list from user */
2712 err =
2713 copy_from_user(channels.list, arg->list,
2714 sizeof(unsigned long) * channels.count);
2715 if (err) {
2716 printk(KERN_ERR
2717 "ME4000:me4000_ao_simultaneous_update():Can't copy list\n");
2718 kfree(channels.list);
2719 return -EFAULT;
2720 }
2721
2722 spin_lock(&ao_context->board_info->preload_lock);
2723 tmp = me4000_inl(ao_context->preload_reg);
2724 for (i = 0; i < channels.count; i++) {
2725 if (channels.list[i] >
2726 ao_context->board_info->board_p->ao.count) {
2727 spin_unlock(&ao_context->board_info->preload_lock);
2728 kfree(channels.list);
2729 printk(KERN_ERR
2730 "ME4000:me4000_ao_simultaneous_update():Invalid board number specified\n");
2731 return -EFAULT;
2732 }
2733 tmp &= ~(0x1 << channels.list[i]); // Clear the preload bit
2734 tmp &= ~(0x1 << (channels.list[i] + 16)); // Clear the hw simultaneous bit
2735 }
2736 me4000_outl(tmp, ao_context->preload_reg);
2737 spin_unlock(&ao_context->board_info->preload_lock);
2738 kfree(channels.list);
2739
2740 return 0;
2741 }
2742
2743 static int me4000_ao_synchronous_ex_trig(struct me4000_ao_context *ao_context)
2744 {
2745 u32 tmp;
2746 unsigned long flags;
2747
2748 CALL_PDEBUG("me4000_ao_synchronous_ex_trig() is executed\n");
2749
2750 /* Check if the state machine is stopped */
2751 tmp = me4000_inl(ao_context->status_reg);
2752 if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2753 printk(KERN_ERR
2754 "me4000_ao_synchronous_ex_trig(): DAC is running\n");
2755 return -EBUSY;
2756 }
2757
2758 spin_lock(&ao_context->board_info->preload_lock);
2759 tmp = me4000_inl(ao_context->preload_reg);
2760 tmp &= ~(0x1 << ao_context->index); // Disable synchronous sw bit
2761 tmp |= 0x1 << (ao_context->index + 16); // Enable synchronous hw bit
2762 me4000_outl(tmp, ao_context->preload_reg);
2763 spin_unlock(&ao_context->board_info->preload_lock);
2764
2765 /* Make runnable */
2766 spin_lock_irqsave(&ao_context->int_lock, flags);
2767 tmp = me4000_inl(ao_context->ctrl_reg);
2768 if (tmp & (ME4000_AO_CTRL_BIT_MODE_0 | ME4000_AO_CTRL_BIT_MODE_1)) {
2769 tmp &=
2770 ~(ME4000_AO_CTRL_BIT_STOP |
2771 ME4000_AO_CTRL_BIT_IMMEDIATE_STOP);
2772 me4000_outl(tmp, ao_context->ctrl_reg);
2773 }
2774 spin_unlock_irqrestore(&ao_context->int_lock, flags);
2775
2776 return 0;
2777 }
2778
2779 static int me4000_ao_synchronous_sw(struct me4000_ao_context *ao_context)
2780 {
2781 u32 tmp;
2782 unsigned long flags;
2783
2784 CALL_PDEBUG("me4000_ao_synchronous_sw() is executed\n");
2785
2786 /* Check if the state machine is stopped */
2787 tmp = me4000_inl(ao_context->status_reg);
2788 if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2789 printk(KERN_ERR "me4000_ao_synchronous_sw(): DAC is running\n");
2790 return -EBUSY;
2791 }
2792
2793 spin_lock(&ao_context->board_info->preload_lock);
2794 tmp = me4000_inl(ao_context->preload_reg);
2795 tmp |= 0x1 << ao_context->index; // Enable synchronous sw bit
2796 tmp &= ~(0x1 << (ao_context->index + 16)); // Disable synchronous hw bit
2797 me4000_outl(tmp, ao_context->preload_reg);
2798 spin_unlock(&ao_context->board_info->preload_lock);
2799
2800 /* Make runnable */
2801 spin_lock_irqsave(&ao_context->int_lock, flags);
2802 tmp = me4000_inl(ao_context->ctrl_reg);
2803 if (tmp & (ME4000_AO_CTRL_BIT_MODE_0 | ME4000_AO_CTRL_BIT_MODE_1)) {
2804 tmp &=
2805 ~(ME4000_AO_CTRL_BIT_STOP |
2806 ME4000_AO_CTRL_BIT_IMMEDIATE_STOP);
2807 me4000_outl(tmp, ao_context->ctrl_reg);
2808 }
2809 spin_unlock_irqrestore(&ao_context->int_lock, flags);
2810
2811 return 0;
2812 }
2813
2814 static int me4000_ao_synchronous_disable(struct me4000_ao_context *ao_context)
2815 {
2816 return me4000_ao_simultaneous_disable(ao_context);
2817 }
2818
2819 static int me4000_ao_get_free_buffer(unsigned long *arg,
2820 struct me4000_ao_context *ao_context)
2821 {
2822 unsigned long c;
2823 int err;
2824
2825 c = me4000_buf_space(ao_context->circ_buf, ME4000_AO_BUFFER_COUNT);
2826
2827 err = copy_to_user(arg, &c, sizeof(unsigned long));
2828 if (err) {
2829 printk(KERN_ERR
2830 "%s:Can't copy to user space\n", __func__);
2831 return -EFAULT;
2832 }
2833
2834 return 0;
2835 }
2836
2837 static int me4000_ao_ex_trig_timeout(unsigned long *arg,
2838 struct me4000_ao_context *ao_context)
2839 {
2840 u32 tmp;
2841 wait_queue_head_t queue;
2842 unsigned long ref;
2843 unsigned long timeout;
2844
2845 CALL_PDEBUG("me4000_ao_ex_trig_timeout() is executed\n");
2846
2847 if (get_user(timeout, arg)) {
2848 printk(KERN_ERR
2849 "me4000_ao_ex_trig_timeout():Cannot copy data from user\n");
2850 return -EFAULT;
2851 }
2852
2853 init_waitqueue_head(&queue);
2854
2855 tmp = inl(ao_context->ctrl_reg);
2856
2857 if ((tmp & ME4000_AO_CTRL_BIT_ENABLE_EX_TRIG)) {
2858 if (timeout) {
2859 ref = jiffies;
2860 while ((inl(ao_context->status_reg) &
2861 ME4000_AO_STATUS_BIT_FSM)) {
2862 interruptible_sleep_on_timeout(&queue, 1);
2863 if (signal_pending(current)) {
2864 printk(KERN_ERR
2865 "ME4000:me4000_ao_ex_trig_timeout():Wait on start of state machine interrupted\n");
2866 return -EINTR;
2867 }
2868 /* kernel 2.6 has different definitions for HZ
2869 * in user and kernel space */
2870 if ((jiffies - ref) > (timeout * HZ / USER_HZ)) {
2871 printk(KERN_ERR
2872 "ME4000:me4000_ao_ex_trig_timeout():Timeout reached\n");
2873 return -EIO;
2874 }
2875 }
2876 } else {
2877 while ((inl(ao_context->status_reg) &
2878 ME4000_AO_STATUS_BIT_FSM)) {
2879 interruptible_sleep_on_timeout(&queue, 1);
2880 if (signal_pending(current)) {
2881 printk(KERN_ERR
2882 "ME4000:me4000_ao_ex_trig_timeout():Wait on start of state machine interrupted\n");
2883 return -EINTR;
2884 }
2885 }
2886 }
2887 } else {
2888 printk(KERN_ERR
2889 "ME4000:me4000_ao_ex_trig_timeout():External Trigger is not enabled\n");
2890 return -EINVAL;
2891 }
2892
2893 return 0;
2894 }
2895
2896 static int me4000_ao_enable_do(struct me4000_ao_context *ao_context)
2897 {
2898 u32 tmp;
2899 unsigned long flags;
2900
2901 CALL_PDEBUG("me4000_ao_enable_do() is executed\n");
2902
2903 /* Only available for analog output 3 */
2904 if (ao_context->index != 3) {
2905 printk(KERN_ERR
2906 "me4000_ao_enable_do():Only available for analog output 3\n");
2907 return -ENOTTY;
2908 }
2909
2910 /* Check if the state machine is stopped */
2911 tmp = me4000_inl(ao_context->status_reg);
2912 if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2913 printk(KERN_ERR "me4000_ao_enable_do(): DAC is running\n");
2914 return -EBUSY;
2915 }
2916
2917 /* Set the stop bit */
2918 spin_lock_irqsave(&ao_context->int_lock, flags);
2919 tmp = inl(ao_context->ctrl_reg);
2920 tmp |= ME4000_AO_CTRL_BIT_ENABLE_DO;
2921 me4000_outl(tmp, ao_context->ctrl_reg);
2922 spin_unlock_irqrestore(&ao_context->int_lock, flags);
2923
2924 return 0;
2925 }
2926
2927 static int me4000_ao_disable_do(struct me4000_ao_context *ao_context)
2928 {
2929 u32 tmp;
2930 unsigned long flags;
2931
2932 CALL_PDEBUG("me4000_ao_disable_do() is executed\n");
2933
2934 /* Only available for analog output 3 */
2935 if (ao_context->index != 3) {
2936 printk(KERN_ERR
2937 "me4000_ao_disable():Only available for analog output 3\n");
2938 return -ENOTTY;
2939 }
2940
2941 /* Check if the state machine is stopped */
2942 tmp = me4000_inl(ao_context->status_reg);
2943 if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2944 printk(KERN_ERR "me4000_ao_disable_do(): DAC is running\n");
2945 return -EBUSY;
2946 }
2947
2948 spin_lock_irqsave(&ao_context->int_lock, flags);
2949 tmp = inl(ao_context->ctrl_reg);
2950 tmp &= ~(ME4000_AO_CTRL_BIT_ENABLE_DO);
2951 me4000_outl(tmp, ao_context->ctrl_reg);
2952 spin_unlock_irqrestore(&ao_context->int_lock, flags);
2953
2954 return 0;
2955 }
2956
2957 static int me4000_ao_fsm_state(int *arg, struct me4000_ao_context *ao_context)
2958 {
2959 unsigned long tmp;
2960
2961 CALL_PDEBUG("me4000_ao_fsm_state() is executed\n");
2962
2963 tmp =
2964 (me4000_inl(ao_context->status_reg) & ME4000_AO_STATUS_BIT_FSM) ? 1
2965 : 0;
2966
2967 if (ao_context->pipe_flag) {
2968 printk(KERN_ERR "me4000_ao_fsm_state():Broken pipe detected\n");
2969 return -EPIPE;
2970 }
2971
2972 if (put_user(tmp, arg)) {
2973 printk(KERN_ERR "me4000_ao_fsm_state():Cannot copy to user\n");
2974 return -EFAULT;
2975 }
2976
2977 return 0;
2978 }
2979
2980 /*------------------------- Analog input stuff -------------------------------*/
2981
2982 static int me4000_ai_prepare(struct me4000_ai_context *ai_context)
2983 {
2984 wait_queue_head_t queue;
2985 int err;
2986
2987 CALL_PDEBUG("me4000_ai_prepare() is executed\n");
2988
2989 init_waitqueue_head(&queue);
2990
2991 /* Set the new mode and stop bits */
2992 me4000_outl(ai_context->
2993 mode | ME4000_AI_CTRL_BIT_STOP |
2994 ME4000_AI_CTRL_BIT_IMMEDIATE_STOP, ai_context->ctrl_reg);
2995
2996 /* Set the timer registers */
2997 ai_context->chan_timer = 66;
2998 ai_context->chan_pre_timer = 66;
2999 ai_context->scan_timer_low = 0;
3000 ai_context->scan_timer_high = 0;
3001
3002 me4000_outl(65, ai_context->chan_timer_reg);
3003 me4000_outl(65, ai_context->chan_pre_timer_reg);
3004 me4000_outl(0, ai_context->scan_timer_low_reg);
3005 me4000_outl(0, ai_context->scan_timer_high_reg);
3006 me4000_outl(0, ai_context->scan_pre_timer_low_reg);
3007 me4000_outl(0, ai_context->scan_pre_timer_high_reg);
3008
3009 ai_context->channel_list_count = 0;
3010
3011 if (ai_context->mode) {
3012 /* Request the interrupt line */
3013 err =
3014 request_irq(ai_context->irq, me4000_ai_isr,
3015 IRQF_DISABLED | IRQF_SHARED, ME4000_NAME,
3016 ai_context);
3017 if (err) {
3018 printk(KERN_ERR
3019 "ME4000:me4000_ai_prepare():Can't get interrupt line");
3020 return -ENODEV;
3021 }
3022
3023 /* Allocate circular buffer */
3024 ai_context->circ_buf.buf =
3025 kzalloc(ME4000_AI_BUFFER_SIZE, GFP_KERNEL);
3026 if (!ai_context->circ_buf.buf) {
3027 printk(KERN_ERR
3028 "ME4000:me4000_ai_prepare():Can't get circular buffer\n");
3029 free_irq(ai_context->irq, ai_context);
3030 return -ENOMEM;
3031 }
3032
3033 /* Clear the circular buffer */
3034 ai_context->circ_buf.head = 0;
3035 ai_context->circ_buf.tail = 0;
3036 }
3037
3038 return 0;
3039 }
3040
3041 static int me4000_ai_reset(struct me4000_ai_context *ai_context)
3042 {
3043 wait_queue_head_t queue;
3044 u32 tmp;
3045 unsigned long flags;
3046
3047 CALL_PDEBUG("me4000_ai_reset() is executed\n");
3048
3049 init_waitqueue_head(&queue);
3050
3051 /*
3052 * First stop conversion of the state machine before reconfigure.
3053 * If not stopped before configuring mode, it could
3054 * walk in a undefined state.
3055 */
3056 spin_lock_irqsave(&ai_context->int_lock, flags);
3057 tmp = me4000_inl(ai_context->ctrl_reg);
3058 tmp |= ME4000_AI_CTRL_BIT_IMMEDIATE_STOP;
3059 me4000_outl(tmp, ai_context->ctrl_reg);
3060 spin_unlock_irqrestore(&ai_context->int_lock, flags);
3061
3062 while (inl(ai_context->status_reg) & ME4000_AI_STATUS_BIT_FSM) {
3063 interruptible_sleep_on_timeout(&queue, 1);
3064 if (signal_pending(current)) {
3065 printk(KERN_ERR
3066 "me4000_ai_reset():Wait on state machine after stop interrupted\n");
3067 return -EINTR;
3068 }
3069 }
3070
3071 /* Clear the control register and set the stop bits */
3072 spin_lock_irqsave(&ai_context->int_lock, flags);
3073 tmp = me4000_inl(ai_context->ctrl_reg);
3074 me4000_outl(ME4000_AI_CTRL_BIT_IMMEDIATE_STOP | ME4000_AI_CTRL_BIT_STOP,
3075 ai_context->ctrl_reg);
3076 spin_unlock_irqrestore(&ai_context->int_lock, flags);
3077
3078 /* Reset timer registers */
3079 ai_context->chan_timer = 66;
3080 ai_context->chan_pre_timer = 66;
3081 ai_context->scan_timer_low = 0;
3082 ai_context->scan_timer_high = 0;
3083 ai_context->sample_counter = 0;
3084 ai_context->sample_counter_reload = 0;
3085
3086 me4000_outl(65, ai_context->chan_timer_reg);
3087 me4000_outl(65, ai_context->chan_pre_timer_reg);
3088 me4000_outl(0, ai_context->scan_timer_low_reg);
3089 me4000_outl(0, ai_context->scan_timer_high_reg);
3090 me4000_outl(0, ai_context->scan_pre_timer_low_reg);
3091 me4000_outl(0, ai_context->scan_pre_timer_high_reg);
3092 me4000_outl(0, ai_context->sample_counter_reg);
3093
3094 ai_context->channel_list_count = 0;
3095
3096 /* Clear the circular buffer */
3097 ai_context->circ_buf.head = 0;
3098 ai_context->circ_buf.tail = 0;
3099
3100 return 0;
3101 }
3102
3103 static int me4000_ai_ioctl_sing(struct inode *inode_p, struct file *file_p,
3104 unsigned int service, unsigned long arg)
3105 {
3106 struct me4000_ai_context *ai_context;
3107
3108 CALL_PDEBUG("me4000_ai_ioctl_sing() is executed\n");
3109
3110 ai_context = file_p->private_data;
3111
3112 if (_IOC_TYPE(service) != ME4000_MAGIC) {
3113 printk(KERN_ERR "me4000_ai_ioctl_sing():Wrong magic number\n");
3114 return -ENOTTY;
3115 }
3116 if (_IOC_NR(service) > ME4000_IOCTL_MAXNR) {
3117 printk(KERN_ERR
3118 "me4000_ai_ioctl_sing():Service number to high\n");
3119 return -ENOTTY;
3120 }
3121
3122 switch (service) {
3123 case ME4000_AI_SINGLE:
3124 return me4000_ai_single((struct me4000_ai_single *)arg,
3125 ai_context);
3126 case ME4000_AI_EX_TRIG_ENABLE:
3127 return me4000_ai_ex_trig_enable(ai_context);
3128 case ME4000_AI_EX_TRIG_DISABLE:
3129 return me4000_ai_ex_trig_disable(ai_context);
3130 case ME4000_AI_EX_TRIG_SETUP:
3131 return me4000_ai_ex_trig_setup((struct me4000_ai_trigger *)arg,
3132 ai_context);
3133 case ME4000_GET_USER_INFO:
3134 return me4000_get_user_info((struct me4000_user_info *)arg,
3135 ai_context->board_info);
3136 case ME4000_AI_OFFSET_ENABLE:
3137 return me4000_ai_offset_enable(ai_context);
3138 case ME4000_AI_OFFSET_DISABLE:
3139 return me4000_ai_offset_disable(ai_context);
3140 case ME4000_AI_FULLSCALE_ENABLE:
3141 return me4000_ai_fullscale_enable(ai_context);
3142 case ME4000_AI_FULLSCALE_DISABLE:
3143 return me4000_ai_fullscale_disable(ai_context);
3144 case ME4000_AI_EEPROM_READ:
3145 return me4000_eeprom_read((struct me4000_eeprom *)arg,
3146 ai_context);
3147 case ME4000_AI_EEPROM_WRITE:
3148 return me4000_eeprom_write((struct me4000_eeprom *)arg,
3149 ai_context);
3150 default:
3151 printk(KERN_ERR
3152 "me4000_ai_ioctl_sing():Invalid service number\n");
3153 return -ENOTTY;
3154 }
3155 return 0;
3156 }
3157
3158 static int me4000_ai_single(struct me4000_ai_single *arg,
3159 struct me4000_ai_context *ai_context)
3160 {
3161 struct me4000_ai_single cmd;
3162 int err;
3163 u32 tmp;
3164 wait_queue_head_t queue;
3165 unsigned long jiffy;
3166
3167 CALL_PDEBUG("me4000_ai_single() is executed\n");
3168
3169 init_waitqueue_head(&queue);
3170
3171 /* Copy data from user */
3172 err = copy_from_user(&cmd, arg, sizeof(struct me4000_ai_single));
3173 if (err) {
3174 printk(KERN_ERR
3175 "ME4000:me4000_ai_single():Can't copy from user space\n");
3176 return -EFAULT;
3177 }
3178
3179 /* Check range parameter */
3180 switch (cmd.range) {
3181 case ME4000_AI_LIST_RANGE_BIPOLAR_10:
3182 case ME4000_AI_LIST_RANGE_BIPOLAR_2_5:
3183 case ME4000_AI_LIST_RANGE_UNIPOLAR_10:
3184 case ME4000_AI_LIST_RANGE_UNIPOLAR_2_5:
3185 break;
3186 default:
3187 printk(KERN_ERR
3188 "ME4000:me4000_ai_single():Invalid range specified\n");
3189 return -EINVAL;
3190 }
3191
3192 /* Check mode and channel number */
3193 switch (cmd.mode) {
3194 case ME4000_AI_LIST_INPUT_SINGLE_ENDED:
3195 if (cmd.channel >= ai_context->board_info->board_p->ai.count) {
3196 printk(KERN_ERR
3197 "ME4000:me4000_ai_single():Analog input is not available\n");
3198 return -EINVAL;
3199 }
3200 break;
3201 case ME4000_AI_LIST_INPUT_DIFFERENTIAL:
3202 if (cmd.channel >=
3203 ai_context->board_info->board_p->ai.diff_count) {
3204 printk(KERN_ERR
3205 "ME4000:me4000_ai_single():Analog input is not available in differential mode\n");
3206 return -EINVAL;
3207 }
3208 break;
3209 default:
3210 printk(KERN_ERR
3211 "ME4000:me4000_ai_single():Invalid mode specified\n");
3212 return -EINVAL;
3213 }
3214
3215 /* Clear channel list, data fifo and both stop bits */
3216 tmp = me4000_inl(ai_context->ctrl_reg);
3217 tmp &=
3218 ~(ME4000_AI_CTRL_BIT_CHANNEL_FIFO | ME4000_AI_CTRL_BIT_DATA_FIFO |
3219 ME4000_AI_CTRL_BIT_STOP | ME4000_AI_CTRL_BIT_IMMEDIATE_STOP);
3220 me4000_outl(tmp, ai_context->ctrl_reg);
3221
3222 /* Enable channel list and data fifo */
3223 tmp |= ME4000_AI_CTRL_BIT_CHANNEL_FIFO | ME4000_AI_CTRL_BIT_DATA_FIFO;
3224 me4000_outl(tmp, ai_context->ctrl_reg);
3225
3226 /* Generate channel list entry */
3227 me4000_outl(cmd.channel | cmd.range | cmd.
3228 mode | ME4000_AI_LIST_LAST_ENTRY,
3229 ai_context->channel_list_reg);
3230
3231 /* Set the timer to maximum */
3232 me4000_outl(66, ai_context->chan_timer_reg);
3233 me4000_outl(66, ai_context->chan_pre_timer_reg);
3234
3235 if (tmp & ME4000_AI_CTRL_BIT_EX_TRIG) {
3236 jiffy = jiffies;
3237 while (!
3238 (me4000_inl(ai_context->status_reg) &
3239 ME4000_AI_STATUS_BIT_EF_DATA)) {
3240 interruptible_sleep_on_timeout(&queue, 1);
3241 if (signal_pending(current)) {
3242 printk(KERN_ERR
3243 "ME4000:me4000_ai_single():Wait on start of state machine interrupted\n");
3244 return -EINTR;
3245 }
3246 /* 2.6 has different definitions for HZ in user and kernel space */
3247 if (((jiffies - jiffy) > (cmd.timeout * HZ / USER_HZ)) && cmd.timeout) {
3248 printk(KERN_ERR
3249 "ME4000:me4000_ai_single():Timeout reached\n");
3250 return -EIO;
3251 }
3252 }
3253 } else {
3254 /* Start conversion */
3255 me4000_inl(ai_context->start_reg);
3256
3257 /* Wait until ready */
3258 udelay(10);
3259 if (!
3260 (me4000_inl(ai_context->status_reg) &
3261 ME4000_AI_STATUS_BIT_EF_DATA)) {
3262 printk(KERN_ERR
3263 "ME4000:me4000_ai_single():Value not available after wait\n");
3264 return -EIO;
3265 }
3266 }
3267
3268 /* Read value from data fifo */
3269 cmd.value = me4000_inl(ai_context->data_reg) & 0xFFFF;
3270
3271 /* Copy result back to user */
3272 err = copy_to_user(arg, &cmd, sizeof(struct me4000_ai_single));
3273 if (err) {
3274 printk(KERN_ERR
3275 "ME4000:me4000_ai_single():Can't copy to user space\n");
3276 return -EFAULT;
3277 }
3278
3279 return 0;
3280 }
3281
3282 static int me4000_ai_ioctl_sw(struct inode *inode_p, struct file *file_p,
3283 unsigned int service, unsigned long arg)
3284 {
3285 struct me4000_ai_context *ai_context;
3286
3287 CALL_PDEBUG("me4000_ai_ioctl_sw() is executed\n");
3288
3289 ai_context = file_p->private_data;
3290
3291 if (_IOC_TYPE(service) != ME4000_MAGIC) {
3292 printk(KERN_ERR "me4000_ai_ioctl_sw():Wrong magic number\n");
3293 return -ENOTTY;
3294 }
3295 if (_IOC_NR(service) > ME4000_IOCTL_MAXNR) {
3296 printk(KERN_ERR
3297 "me4000_ai_ioctl_sw():Service number to high\n");
3298 return -ENOTTY;
3299 }
3300
3301 switch (service) {
3302 case ME4000_AI_SC_SETUP:
3303 return me4000_ai_sc_setup((struct me4000_ai_sc *)arg,
3304 ai_context);
3305 case ME4000_AI_CONFIG:
3306 return me4000_ai_config((struct me4000_ai_config *)arg,
3307 ai_context);
3308 case ME4000_AI_START:
3309 return me4000_ai_start(ai_context);
3310 case ME4000_AI_STOP:
3311 return me4000_ai_stop(ai_context);
3312 case ME4000_AI_IMMEDIATE_STOP:
3313 return me4000_ai_immediate_stop(ai_context);
3314 case ME4000_AI_FSM_STATE:
3315 return me4000_ai_fsm_state((int *)arg, ai_context);
3316 case ME4000_GET_USER_INFO:
3317 return me4000_get_user_info((struct me4000_user_info *)arg,
3318 ai_context->board_info);
3319 case ME4000_AI_EEPROM_READ:
3320 return me4000_eeprom_read((struct me4000_eeprom *)arg,
3321 ai_context);
3322 case ME4000_AI_EEPROM_WRITE:
3323 return me4000_eeprom_write((struct me4000_eeprom *)arg,
3324 ai_context);
3325 case ME4000_AI_GET_COUNT_BUFFER:
3326 return me4000_ai_get_count_buffer((unsigned long *)arg,
3327 ai_context);
3328 default:
3329 printk(KERN_ERR
3330 "%s:Invalid service number %d\n", __func__, service);
3331 return -ENOTTY;
3332 }
3333 return 0;
3334 }
3335
3336 static int me4000_ai_ioctl_ext(struct inode *inode_p, struct file *file_p,
3337 unsigned int service, unsigned long arg)
3338 {
3339 struct me4000_ai_context *ai_context;
3340
3341 CALL_PDEBUG("me4000_ai_ioctl_ext() is executed\n");
3342
3343 ai_context = file_p->private_data;
3344
3345 if (_IOC_TYPE(service) != ME4000_MAGIC) {
3346 printk(KERN_ERR "me4000_ai_ioctl_ext():Wrong magic number\n");
3347 return -ENOTTY;
3348 }
3349 if (_IOC_NR(service) > ME4000_IOCTL_MAXNR) {
3350 printk(KERN_ERR
3351 "me4000_ai_ioctl_ext():Service number to high\n");
3352 return -ENOTTY;
3353 }
3354
3355 switch (service) {
3356 case ME4000_AI_SC_SETUP:
3357 return me4000_ai_sc_setup((struct me4000_ai_sc *)arg,
3358 ai_context);
3359 case ME4000_AI_CONFIG:
3360 return me4000_ai_config((struct me4000_ai_config *)arg,
3361 ai_context);
3362 case ME4000_AI_START:
3363 return me4000_ai_start_ex((unsigned long *)arg, ai_context);
3364 case ME4000_AI_STOP:
3365 return me4000_ai_stop(ai_context);
3366 case ME4000_AI_IMMEDIATE_STOP:
3367 return me4000_ai_immediate_stop(ai_context);
3368 case ME4000_AI_EX_TRIG_ENABLE:
3369 return me4000_ai_ex_trig_enable(ai_context);
3370 case ME4000_AI_EX_TRIG_DISABLE:
3371 return me4000_ai_ex_trig_disable(ai_context);
3372 case ME4000_AI_EX_TRIG_SETUP:
3373 return me4000_ai_ex_trig_setup((struct me4000_ai_trigger *)arg,
3374 ai_context);
3375 case ME4000_AI_FSM_STATE:
3376 return me4000_ai_fsm_state((int *)arg, ai_context);
3377 case ME4000_GET_USER_INFO:
3378 return me4000_get_user_info((struct me4000_user_info *)arg,
3379 ai_context->board_info);
3380 case ME4000_AI_GET_COUNT_BUFFER:
3381 return me4000_ai_get_count_buffer((unsigned long *)arg,
3382 ai_context);
3383 default:
3384 printk(KERN_ERR
3385 "%s:Invalid service number %d\n", __func__ , service);
3386 return -ENOTTY;
3387 }
3388 return 0;
3389 }
3390
3391 static int me4000_ai_fasync(int fd, struct file *file_p, int mode)
3392 {
3393 struct me4000_ai_context *ai_context;
3394
3395 CALL_PDEBUG("me4000_ao_fasync_cont() is executed\n");
3396
3397 ai_context = file_p->private_data;
3398 return fasync_helper(fd, file_p, mode, &ai_context->fasync_p);
3399 }
3400
3401 static int me4000_ai_config(struct me4000_ai_config *arg,
3402 struct me4000_ai_context *ai_context)
3403 {
3404 struct me4000_ai_config cmd;
3405 u32 *list = NULL;
3406 u32 mode;
3407 int i;
3408 int err;
3409 wait_queue_head_t queue;
3410 u64 scan;
3411 u32 tmp;
3412
3413 CALL_PDEBUG("me4000_ai_config() is executed\n");
3414
3415 init_waitqueue_head(&queue);
3416
3417 /* Check if conversion is stopped */
3418 if (inl(ai_context->ctrl_reg) & ME4000_AI_STATUS_BIT_FSM) {
3419 printk(KERN_ERR
3420 "ME4000:me4000_ai_config():Conversion is not stopped\n");
3421 err = -EBUSY;
3422 goto AI_CONFIG_ERR;
3423 }
3424
3425 /* Copy data from user */
3426 err = copy_from_user(&cmd, arg, sizeof(struct me4000_ai_config));
3427 if (err) {
3428 printk(KERN_ERR
3429 "ME4000:me4000_ai_config():Can't copy from user space\n");
3430 err = -EFAULT;
3431 goto AI_CONFIG_ERR;
3432 }
3433
3434 PDEBUG
3435 ("me4000_ai_config():chan = %ld, pre_chan = %ld, scan_low = %ld, scan_high = %ld, count = %ld\n",
3436 cmd.timer.chan, cmd.timer.pre_chan, cmd.timer.scan_low,
3437 cmd.timer.scan_high, cmd.channel_list.count);
3438
3439 /* Check whether sample and hold is available for this board */
3440 if (cmd.sh) {
3441 if (!ai_context->board_info->board_p->ai.sh_count) {
3442 printk(KERN_ERR
3443 "ME4000:me4000_ai_config():Sample and Hold is not available for this board\n");
3444 err = -ENODEV;
3445 goto AI_CONFIG_ERR;
3446 }
3447 }
3448
3449 /* Check the channel list size */
3450 if (cmd.channel_list.count > ME4000_AI_CHANNEL_LIST_COUNT) {
3451 printk(KERN_ERR
3452 "me4000_ai_config():Channel list is to large\n");
3453 err = -EINVAL;
3454 goto AI_CONFIG_ERR;
3455 }
3456
3457 /* Copy channel list from user */
3458 list = kmalloc(sizeof(u32) * cmd.channel_list.count, GFP_KERNEL);
3459 if (!list) {
3460 printk(KERN_ERR
3461 "ME4000:me4000_ai_config():Can't get memory for channel list\n");
3462 err = -ENOMEM;
3463 goto AI_CONFIG_ERR;
3464 }
3465 err =
3466 copy_from_user(list, cmd.channel_list.list,
3467 sizeof(u32) * cmd.channel_list.count);
3468 if (err) {
3469 printk(KERN_ERR
3470 "ME4000:me4000_ai_config():Can't copy from user space\n");
3471 err = -EFAULT;
3472 goto AI_CONFIG_ERR;
3473 }
3474
3475 /* Check if last entry bit is set */
3476 if (!(list[cmd.channel_list.count - 1] & ME4000_AI_LIST_LAST_ENTRY)) {
3477 printk(KERN_WARNING
3478 "me4000_ai_config():Last entry bit is not set\n");
3479 list[cmd.channel_list.count - 1] |= ME4000_AI_LIST_LAST_ENTRY;
3480 }
3481
3482 /* Check whether mode is equal for all entries */
3483 mode = list[0] & 0x20;
3484 for (i = 0; i < cmd.channel_list.count; i++) {
3485 if ((list[i] & 0x20) != mode) {
3486 printk(KERN_ERR
3487 "ME4000:me4000_ai_config():Mode is not equal for all entries\n");
3488 err = -EINVAL;
3489 goto AI_CONFIG_ERR;
3490 }
3491 }
3492
3493 /* Check whether channels are available for this mode */
3494 if (mode == ME4000_AI_LIST_INPUT_SINGLE_ENDED) {
3495 for (i = 0; i < cmd.channel_list.count; i++) {
3496 if ((list[i] & 0x1F) >=
3497 ai_context->board_info->board_p->ai.count) {
3498 printk(KERN_ERR
3499 "ME4000:me4000_ai_config():Channel is not available for single ended\n");
3500 err = -EINVAL;
3501 goto AI_CONFIG_ERR;
3502 }
3503 }
3504 } else if (mode == ME4000_AI_LIST_INPUT_DIFFERENTIAL) {
3505 for (i = 0; i < cmd.channel_list.count; i++) {
3506 if ((list[i] & 0x1F) >=
3507 ai_context->board_info->board_p->ai.diff_count) {
3508 printk(KERN_ERR
3509 "ME4000:me4000_ai_config():Channel is not available for differential\n");
3510 err = -EINVAL;
3511 goto AI_CONFIG_ERR;
3512 }
3513 }
3514 }
3515
3516 /* Check if bipolar is set for all entries when in differential mode */
3517 if (mode == ME4000_AI_LIST_INPUT_DIFFERENTIAL) {
3518 for (i = 0; i < cmd.channel_list.count; i++) {
3519 if ((list[i] & 0xC0) != ME4000_AI_LIST_RANGE_BIPOLAR_10
3520 && (list[i] & 0xC0) !=
3521 ME4000_AI_LIST_RANGE_BIPOLAR_2_5) {
3522 printk(KERN_ERR
3523 "ME4000:me4000_ai_config():Bipolar is not selected in differential mode\n");
3524 err = -EINVAL;
3525 goto AI_CONFIG_ERR;
3526 }
3527 }
3528 }
3529
3530 if (ai_context->mode != ME4000_AI_ACQ_MODE_EXT_SINGLE_VALUE) {
3531 /* Check for minimum channel divisor */
3532 if (cmd.timer.chan < ME4000_AI_MIN_TICKS) {
3533 printk(KERN_ERR
3534 "ME4000:me4000_ai_config():Channel timer divisor is to low\n");
3535 err = -EINVAL;
3536 goto AI_CONFIG_ERR;
3537 }
3538
3539 /* Check if minimum channel divisor is adjusted when sample and hold is activated */
3540 if ((cmd.sh) && (cmd.timer.chan != ME4000_AI_MIN_TICKS)) {
3541 printk(KERN_ERR
3542 "ME4000:me4000_ai_config():Channel timer divisor must be at minimum when sample and hold is activated\n");
3543 err = -EINVAL;
3544 goto AI_CONFIG_ERR;
3545 }
3546
3547 /* Check for minimum channel pre divisor */
3548 if (cmd.timer.pre_chan < ME4000_AI_MIN_TICKS) {
3549 printk(KERN_ERR
3550 "ME4000:me4000_ai_config():Channel pre timer divisor is to low\n");
3551 err = -EINVAL;
3552 goto AI_CONFIG_ERR;
3553 }
3554
3555 /* Write the channel timers */
3556 me4000_outl(cmd.timer.chan - 1, ai_context->chan_timer_reg);
3557 me4000_outl(cmd.timer.pre_chan - 1,
3558 ai_context->chan_pre_timer_reg);
3559
3560 /* Save the timer values in the board context */
3561 ai_context->chan_timer = cmd.timer.chan;
3562 ai_context->chan_pre_timer = cmd.timer.pre_chan;
3563
3564 if (ai_context->mode != ME4000_AI_ACQ_MODE_EXT_SINGLE_CHANLIST) {
3565 /* Check for scan timer divisor */
3566 scan =
3567 (u64) cmd.timer.scan_low | ((u64) cmd.timer.
3568 scan_high << 32);
3569 if (scan != 0) {
3570 if (scan <
3571 cmd.channel_list.count * cmd.timer.chan +
3572 1) {
3573 printk(KERN_ERR
3574 "ME4000:me4000_ai_config():Scan timer divisor is to low\n");
3575 err = -EINVAL;
3576 goto AI_CONFIG_ERR;
3577 }
3578 }
3579
3580 /* Write the scan timers */
3581 if (scan != 0) {
3582 scan--;
3583 tmp = (u32) (scan & 0xFFFFFFFF);
3584 me4000_outl(tmp,
3585 ai_context->scan_timer_low_reg);
3586 tmp = (u32) ((scan >> 32) & 0xFFFFFFFF);
3587 me4000_outl(tmp,
3588 ai_context->scan_timer_high_reg);
3589
3590 scan =
3591 scan - (cmd.timer.chan - 1) +
3592 (cmd.timer.pre_chan - 1);
3593 tmp = (u32) (scan & 0xFFFFFFFF);
3594 me4000_outl(tmp,
3595 ai_context->scan_pre_timer_low_reg);
3596 tmp = (u32) ((scan >> 32) & 0xFFFFFFFF);
3597 me4000_outl(tmp,
3598 ai_context->
3599 scan_pre_timer_high_reg);
3600 } else {
3601 me4000_outl(0x0,
3602 ai_context->scan_timer_low_reg);
3603 me4000_outl(0x0,
3604 ai_context->scan_timer_high_reg);
3605
3606 me4000_outl(0x0,
3607 ai_context->scan_pre_timer_low_reg);
3608 me4000_outl(0x0,
3609 ai_context->
3610 scan_pre_timer_high_reg);
3611 }
3612
3613 ai_context->scan_timer_low = cmd.timer.scan_low;
3614 ai_context->scan_timer_high = cmd.timer.scan_high;
3615 }
3616 }
3617
3618 /* Clear the channel list */
3619 tmp = me4000_inl(ai_context->ctrl_reg);
3620 tmp &= ~ME4000_AI_CTRL_BIT_CHANNEL_FIFO;
3621 me4000_outl(tmp, ai_context->ctrl_reg);
3622 tmp |= ME4000_AI_CTRL_BIT_CHANNEL_FIFO;
3623 me4000_outl(tmp, ai_context->ctrl_reg);
3624
3625 /* Write the channel list */
3626 for (i = 0; i < cmd.channel_list.count; i++)
3627 me4000_outl(list[i], ai_context->channel_list_reg);
3628
3629 /* Setup sample and hold */
3630 if (cmd.sh) {
3631 tmp |= ME4000_AI_CTRL_BIT_SAMPLE_HOLD;
3632 me4000_outl(tmp, ai_context->ctrl_reg);
3633 } else {
3634 tmp &= ~ME4000_AI_CTRL_BIT_SAMPLE_HOLD;
3635 me4000_outl(tmp, ai_context->ctrl_reg);
3636 }
3637
3638 /* Save the channel list size in the board context */
3639 ai_context->channel_list_count = cmd.channel_list.count;
3640
3641 kfree(list);
3642
3643 return 0;
3644
3645 AI_CONFIG_ERR:
3646
3647 /* Reset the timers */
3648 ai_context->chan_timer = 66;
3649 ai_context->chan_pre_timer = 66;
3650 ai_context->scan_timer_low = 0;
3651 ai_context->scan_timer_high = 0;
3652
3653 me4000_outl(65, ai_context->chan_timer_reg);
3654 me4000_outl(65, ai_context->chan_pre_timer_reg);
3655 me4000_outl(0, ai_context->scan_timer_high_reg);
3656 me4000_outl(0, ai_context->scan_timer_low_reg);
3657 me4000_outl(0, ai_context->scan_pre_timer_high_reg);
3658 me4000_outl(0, ai_context->scan_pre_timer_low_reg);
3659
3660 ai_context->channel_list_count = 0;
3661
3662 tmp = me4000_inl(ai_context->ctrl_reg);
3663 tmp &=
3664 ~(ME4000_AI_CTRL_BIT_CHANNEL_FIFO | ME4000_AI_CTRL_BIT_SAMPLE_HOLD);
3665
3666 kfree(list);
3667
3668 return err;
3669
3670 }
3671
3672 static int ai_common_start(struct me4000_ai_context *ai_context)
3673 {
3674 u32 tmp;
3675 CALL_PDEBUG("ai_common_start() is executed\n");
3676
3677 tmp = me4000_inl(ai_context->ctrl_reg);
3678
3679 /* Check if conversion is stopped */
3680 if (tmp & ME4000_AI_STATUS_BIT_FSM) {
3681 printk(KERN_ERR
3682 "ME4000:ai_common_start():Conversion is not stopped\n");
3683 return -EBUSY;
3684 }
3685
3686 /* Clear data fifo, disable all interrupts, clear sample counter reload */
3687 tmp &= ~(ME4000_AI_CTRL_BIT_DATA_FIFO | ME4000_AI_CTRL_BIT_LE_IRQ |
3688 ME4000_AI_CTRL_BIT_HF_IRQ | ME4000_AI_CTRL_BIT_SC_IRQ |
3689 ME4000_AI_CTRL_BIT_SC_RELOAD);
3690
3691 me4000_outl(tmp, ai_context->ctrl_reg);
3692
3693 /* Clear circular buffer */
3694 ai_context->circ_buf.head = 0;
3695 ai_context->circ_buf.tail = 0;
3696
3697 /* Enable data fifo */
3698 tmp |= ME4000_AI_CTRL_BIT_DATA_FIFO;
3699
3700 /* Determine interrupt setup */
3701 if (ai_context->sample_counter && !ai_context->sample_counter_reload) {
3702 /* Enable Half Full Interrupt and Sample Counter Interrupt */
3703 tmp |= ME4000_AI_CTRL_BIT_SC_IRQ | ME4000_AI_CTRL_BIT_HF_IRQ;
3704 } else if (ai_context->sample_counter
3705 && ai_context->sample_counter_reload) {
3706 if (ai_context->sample_counter <= ME4000_AI_FIFO_COUNT / 2) {
3707 /* Enable only Sample Counter Interrupt */
3708 tmp |=
3709 ME4000_AI_CTRL_BIT_SC_IRQ |
3710 ME4000_AI_CTRL_BIT_SC_RELOAD;
3711 } else {
3712 /* Enable Half Full Interrupt and Sample Counter Interrupt */
3713 tmp |=
3714 ME4000_AI_CTRL_BIT_SC_IRQ |
3715 ME4000_AI_CTRL_BIT_HF_IRQ |
3716 ME4000_AI_CTRL_BIT_SC_RELOAD;
3717 }
3718 } else {
3719 /* Enable only Half Full Interrupt */
3720 tmp |= ME4000_AI_CTRL_BIT_HF_IRQ;
3721 }
3722
3723 /* Clear the stop bits */
3724 tmp &= ~(ME4000_AI_CTRL_BIT_STOP | ME4000_AI_CTRL_BIT_IMMEDIATE_STOP);
3725
3726 /* Write setup to hardware */
3727 me4000_outl(tmp, ai_context->ctrl_reg);
3728
3729 /* Write sample counter */
3730 me4000_outl(ai_context->sample_counter, ai_context->sample_counter_reg);
3731
3732 return 0;
3733 }
3734
3735 static int me4000_ai_start(struct me4000_ai_context *ai_context)
3736 {
3737 int err;
3738 CALL_PDEBUG("me4000_ai_start() is executed\n");
3739
3740 /* Prepare Hardware */
3741 err = ai_common_start(ai_context);
3742 if (err)
3743 return err;
3744
3745 /* Start conversion by dummy read */
3746 me4000_inl(ai_context->start_reg);
3747
3748 return 0;
3749 }
3750
3751 static int me4000_ai_start_ex(unsigned long *arg,
3752 struct me4000_ai_context *ai_context)
3753 {
3754 int err;
3755 wait_queue_head_t queue;
3756 unsigned long ref;
3757 unsigned long timeout;
3758
3759 CALL_PDEBUG("me4000_ai_start_ex() is executed\n");
3760
3761 if (get_user(timeout, arg)) {
3762 printk(KERN_ERR
3763 "me4000_ai_start_ex():Cannot copy data from user\n");
3764 return -EFAULT;
3765 }
3766
3767 init_waitqueue_head(&queue);
3768
3769 /* Prepare Hardware */
3770 err = ai_common_start(ai_context);
3771 if (err)
3772 return err;
3773
3774 if (timeout) {
3775 ref = jiffies;
3776 while (!(inl(ai_context->status_reg) & ME4000_AI_STATUS_BIT_FSM)) {
3777 interruptible_sleep_on_timeout(&queue, 1);
3778 if (signal_pending(current)) {
3779 printk(KERN_ERR
3780 "ME4000:me4000_ai_start_ex():Wait on start of state machine interrupted\n");
3781 return -EINTR;
3782 }
3783 /* 2.6 has different definitions for HZ in user and kernel space */
3784 if ((jiffies - ref) > (timeout * HZ / USER_HZ)) {
3785 printk(KERN_ERR
3786 "ME4000:me4000_ai_start_ex():Timeout reached\n");
3787 return -EIO;
3788 }
3789 }
3790 } else {
3791 while (!(inl(ai_context->status_reg) & ME4000_AI_STATUS_BIT_FSM)) {
3792 interruptible_sleep_on_timeout(&queue, 1);
3793 if (signal_pending(current)) {
3794 printk(KERN_ERR
3795 "ME4000:me4000_ai_start_ex():Wait on start of state machine interrupted\n");
3796 return -EINTR;
3797 }
3798 }
3799 }
3800
3801 return 0;
3802 }
3803
3804 static int me4000_ai_stop(struct me4000_ai_context *ai_context)
3805 {
3806 wait_queue_head_t queue;
3807 u32 tmp;
3808 unsigned long flags;
3809
3810 CALL_PDEBUG("me4000_ai_stop() is executed\n");
3811
3812 init_waitqueue_head(&queue);
3813
3814 /* Disable irqs and clear data fifo */
3815 spin_lock_irqsave(&ai_context->int_lock, flags);
3816 tmp = me4000_inl(ai_context->ctrl_reg);
3817 tmp &=
3818 ~(ME4000_AI_CTRL_BIT_HF_IRQ | ME4000_AI_CTRL_BIT_SC_IRQ |
3819 ME4000_AI_CTRL_BIT_DATA_FIFO);
3820 /* Stop conversion of the state machine */
3821 tmp |= ME4000_AI_CTRL_BIT_STOP;
3822 me4000_outl(tmp, ai_context->ctrl_reg);
3823 spin_unlock_irqrestore(&ai_context->int_lock, flags);
3824
3825 /* Clear circular buffer */
3826 ai_context->circ_buf.head = 0;
3827 ai_context->circ_buf.tail = 0;
3828
3829 while (inl(ai_context->status_reg) & ME4000_AI_STATUS_BIT_FSM) {
3830 interruptible_sleep_on_timeout(&queue, 1);
3831 if (signal_pending(current)) {
3832 printk(KERN_ERR
3833 "ME4000:me4000_ai_stop():Wait on state machine after stop interrupted\n");
3834 return -EINTR;
3835 }
3836 }
3837
3838 return 0;
3839 }
3840
3841 static int me4000_ai_immediate_stop(struct me4000_ai_context *ai_context)
3842 {
3843 wait_queue_head_t queue;
3844 u32 tmp;
3845 unsigned long flags;
3846
3847 CALL_PDEBUG("me4000_ai_stop() is executed\n");
3848
3849 init_waitqueue_head(&queue);
3850
3851 /* Disable irqs and clear data fifo */
3852 spin_lock_irqsave(&ai_context->int_lock, flags);
3853 tmp = me4000_inl(ai_context->ctrl_reg);
3854 tmp &=
3855 ~(ME4000_AI_CTRL_BIT_HF_IRQ | ME4000_AI_CTRL_BIT_SC_IRQ |
3856 ME4000_AI_CTRL_BIT_DATA_FIFO);
3857 /* Stop conversion of the state machine */
3858 tmp |= ME4000_AI_CTRL_BIT_IMMEDIATE_STOP;
3859 me4000_outl(tmp, ai_context->ctrl_reg);
3860 spin_unlock_irqrestore(&ai_context->int_lock, flags);
3861
3862 /* Clear circular buffer */
3863 ai_context->circ_buf.head = 0;
3864 ai_context->circ_buf.tail = 0;
3865
3866 while (inl(ai_context->status_reg) & ME4000_AI_STATUS_BIT_FSM) {
3867 interruptible_sleep_on_timeout(&queue, 1);
3868 if (signal_pending(current)) {
3869 printk(KERN_ERR
3870 "ME4000:me4000_ai_stop():Wait on state machine after stop interrupted\n");
3871 return -EINTR;
3872 }
3873 }
3874
3875 return 0;
3876 }
3877
3878 static int me4000_ai_ex_trig_enable(struct me4000_ai_context *ai_context)
3879 {
3880 u32 tmp;
3881 unsigned long flags;
3882
3883 CALL_PDEBUG("me4000_ai_ex_trig_enable() is executed\n");
3884
3885 spin_lock_irqsave(&ai_context->int_lock, flags);
3886 tmp = me4000_inl(ai_context->ctrl_reg);
3887 tmp |= ME4000_AI_CTRL_BIT_EX_TRIG;
3888 me4000_outl(tmp, ai_context->ctrl_reg);
3889 spin_unlock_irqrestore(&ai_context->int_lock, flags);
3890
3891 return 0;
3892 }
3893
3894 static int me4000_ai_ex_trig_disable(struct me4000_ai_context *ai_context)
3895 {
3896 u32 tmp;
3897 unsigned long flags;
3898
3899 CALL_PDEBUG("me4000_ai_ex_trig_disable() is executed\n");
3900
3901 spin_lock_irqsave(&ai_context->int_lock, flags);
3902 tmp = me4000_inl(ai_context->ctrl_reg);
3903 tmp &= ~ME4000_AI_CTRL_BIT_EX_TRIG;
3904 me4000_outl(tmp, ai_context->ctrl_reg);
3905 spin_unlock_irqrestore(&ai_context->int_lock, flags);
3906
3907 return 0;
3908 }
3909
3910 static int me4000_ai_ex_trig_setup(struct me4000_ai_trigger *arg,
3911 struct me4000_ai_context *ai_context)
3912 {
3913 struct me4000_ai_trigger cmd;
3914 int err;
3915 u32 tmp;
3916 unsigned long flags;
3917
3918 CALL_PDEBUG("me4000_ai_ex_trig_setup() is executed\n");
3919
3920 /* Copy data from user */
3921 err = copy_from_user(&cmd, arg, sizeof(struct me4000_ai_trigger));
3922 if (err) {
3923 printk(KERN_ERR
3924 "ME4000:me4000_ai_ex_trig_setup():Can't copy from user space\n");
3925 return -EFAULT;
3926 }
3927
3928 spin_lock_irqsave(&ai_context->int_lock, flags);
3929 tmp = me4000_inl(ai_context->ctrl_reg);
3930
3931 if (cmd.mode == ME4000_AI_TRIGGER_EXT_DIGITAL) {
3932 tmp &= ~ME4000_AI_CTRL_BIT_EX_TRIG_ANALOG;
3933 } else if (cmd.mode == ME4000_AI_TRIGGER_EXT_ANALOG) {
3934 if (!ai_context->board_info->board_p->ai.ex_trig_analog) {
3935 printk(KERN_ERR
3936 "ME4000:me4000_ai_ex_trig_setup():No analog trigger available\n");
3937 return -EINVAL;
3938 }
3939 tmp |= ME4000_AI_CTRL_BIT_EX_TRIG_ANALOG;
3940 } else {
3941 spin_unlock_irqrestore(&ai_context->int_lock, flags);
3942 printk(KERN_ERR
3943 "ME4000:me4000_ai_ex_trig_setup():Invalid trigger mode specified\n");
3944 return -EINVAL;
3945 }
3946
3947 if (cmd.edge == ME4000_AI_TRIGGER_EXT_EDGE_RISING) {
3948 tmp &=
3949 ~(ME4000_AI_CTRL_BIT_EX_TRIG_BOTH |
3950 ME4000_AI_CTRL_BIT_EX_TRIG_FALLING);
3951 } else if (cmd.edge == ME4000_AI_TRIGGER_EXT_EDGE_FALLING) {
3952 tmp |= ME4000_AI_CTRL_BIT_EX_TRIG_FALLING;
3953 tmp &= ~ME4000_AI_CTRL_BIT_EX_TRIG_BOTH;
3954 } else if (cmd.edge == ME4000_AI_TRIGGER_EXT_EDGE_BOTH) {
3955 tmp |=
3956 ME4000_AI_CTRL_BIT_EX_TRIG_BOTH |
3957 ME4000_AI_CTRL_BIT_EX_TRIG_FALLING;
3958 } else {
3959 spin_unlock_irqrestore(&ai_context->int_lock, flags);
3960 printk(KERN_ERR
3961 "ME4000:me4000_ai_ex_trig_setup():Invalid trigger edge specified\n");
3962 return -EINVAL;
3963 }
3964
3965 me4000_outl(tmp, ai_context->ctrl_reg);
3966 spin_unlock_irqrestore(&ai_context->int_lock, flags);
3967 return 0;
3968 }
3969
3970 static int me4000_ai_sc_setup(struct me4000_ai_sc *arg,
3971 struct me4000_ai_context *ai_context)
3972 {
3973 struct me4000_ai_sc cmd;
3974 int err;
3975
3976 CALL_PDEBUG("me4000_ai_sc_setup() is executed\n");
3977
3978 /* Copy data from user */
3979 err = copy_from_user(&cmd, arg, sizeof(struct me4000_ai_sc));
3980 if (err) {
3981 printk(KERN_ERR
3982 "ME4000:me4000_ai_sc_setup():Can't copy from user space\n");
3983 return -EFAULT;
3984 }
3985
3986 ai_context->sample_counter = cmd.value;
3987 ai_context->sample_counter_reload = cmd.reload;
3988
3989 return 0;
3990 }
3991
3992 static ssize_t me4000_ai_read(struct file *filep, char *buff, size_t cnt,
3993 loff_t *offp)
3994 {
3995 struct me4000_ai_context *ai_context = filep->private_data;
3996 s16 *buffer = (s16 *) buff;
3997 size_t count = cnt / 2;
3998 unsigned long flags;
3999 int tmp;
4000 int c = 0;
4001 int k = 0;
4002 int ret = 0;
4003 wait_queue_t wait;
4004
4005 CALL_PDEBUG("me4000_ai_read() is executed\n");
4006
4007 init_waitqueue_entry(&wait, current);
4008
4009 /* Check count */
4010 if (count <= 0) {
4011 PDEBUG("me4000_ai_read():Count is 0\n");
4012 return 0;
4013 }
4014
4015 while (count > 0) {
4016 if (filep->f_flags & O_NONBLOCK) {
4017 c = me4000_values_to_end(ai_context->circ_buf,
4018 ME4000_AI_BUFFER_COUNT);
4019 if (!c) {
4020 PDEBUG
4021 ("me4000_ai_read():Returning from nonblocking read\n");
4022 break;
4023 }
4024 } else {
4025 /* Check if conversion is still running */
4026 if (!
4027 (me4000_inl(ai_context->status_reg) &
4028 ME4000_AI_STATUS_BIT_FSM)) {
4029 printk(KERN_ERR
4030 "ME4000:me4000_ai_read():Conversion interrupted\n");
4031 return -EPIPE;
4032 }
4033
4034 wait_event_interruptible(ai_context->wait_queue,
4035 (me4000_values_to_end
4036 (ai_context->circ_buf,
4037 ME4000_AI_BUFFER_COUNT)));
4038 if (signal_pending(current)) {
4039 printk(KERN_ERR
4040 "ME4000:me4000_ai_read():Wait on values interrupted from signal\n");
4041 return -EINTR;
4042 }
4043 }
4044
4045 /* Only read count values or as much as available */
4046 c = me4000_values_to_end(ai_context->circ_buf,
4047 ME4000_AI_BUFFER_COUNT);
4048 PDEBUG("me4000_ai_read():%d values to end\n", c);
4049 if (count < c)
4050 c = count;
4051
4052 PDEBUG("me4000_ai_read():Copy %d values to user space\n", c);
4053 k = 2 * c;
4054 k -= copy_to_user(buffer,
4055 ai_context->circ_buf.buf +
4056 ai_context->circ_buf.tail, k);
4057 c = k / 2;
4058 if (!c) {
4059 printk(KERN_ERR
4060 "ME4000:me4000_ai_read():Cannot copy new values to user\n");
4061 return -EFAULT;
4062 }
4063
4064 ai_context->circ_buf.tail =
4065 (ai_context->circ_buf.tail + c) & (ME4000_AI_BUFFER_COUNT -
4066 1);
4067 buffer += c;
4068 count -= c;
4069 ret += c;
4070
4071 spin_lock_irqsave(&ai_context->int_lock, flags);
4072 if (me4000_buf_space
4073 (ai_context->circ_buf, ME4000_AI_BUFFER_COUNT)) {
4074 tmp = me4000_inl(ai_context->ctrl_reg);
4075
4076 /* Determine interrupt setup */
4077 if (ai_context->sample_counter
4078 && !ai_context->sample_counter_reload) {
4079 /* Enable Half Full Interrupt and Sample Counter Interrupt */
4080 tmp |=
4081 ME4000_AI_CTRL_BIT_SC_IRQ |
4082 ME4000_AI_CTRL_BIT_HF_IRQ;
4083 } else if (ai_context->sample_counter
4084 && ai_context->sample_counter_reload) {
4085 if (ai_context->sample_counter <
4086 ME4000_AI_FIFO_COUNT / 2) {
4087 /* Enable only Sample Counter Interrupt */
4088 tmp |= ME4000_AI_CTRL_BIT_SC_IRQ;
4089 } else {
4090 /* Enable Half Full Interrupt and Sample Counter Interrupt */
4091 tmp |=
4092 ME4000_AI_CTRL_BIT_SC_IRQ |
4093 ME4000_AI_CTRL_BIT_HF_IRQ;
4094 }
4095 } else {
4096 /* Enable only Half Full Interrupt */
4097 tmp |= ME4000_AI_CTRL_BIT_HF_IRQ;
4098 }
4099
4100 me4000_outl(tmp, ai_context->ctrl_reg);
4101 }
4102 spin_unlock_irqrestore(&ai_context->int_lock, flags);
4103 }
4104
4105 /* Check if conversion is still running */
4106 if (!(me4000_inl(ai_context->status_reg) & ME4000_AI_STATUS_BIT_FSM)) {
4107 printk(KERN_ERR
4108 "ME4000:me4000_ai_read():Conversion not running after complete read\n");
4109 return -EPIPE;
4110 }
4111
4112 if (filep->f_flags & O_NONBLOCK)
4113 return (k == 0) ? -EAGAIN : 2 * ret;
4114
4115 CALL_PDEBUG("me4000_ai_read() is leaved\n");
4116 return ret * 2;
4117 }
4118
4119 static unsigned int me4000_ai_poll(struct file *file_p, poll_table *wait)
4120 {
4121 struct me4000_ai_context *ai_context;
4122 unsigned long mask = 0;
4123
4124 CALL_PDEBUG("me4000_ai_poll() is executed\n");
4125
4126 ai_context = file_p->private_data;
4127
4128 /* Register wait queue */
4129 poll_wait(file_p, &ai_context->wait_queue, wait);
4130
4131 /* Get available values */
4132 if (me4000_values_to_end(ai_context->circ_buf, ME4000_AI_BUFFER_COUNT))
4133 mask |= POLLIN | POLLRDNORM;
4134
4135 PDEBUG("me4000_ai_poll():Return mask %lX\n", mask);
4136
4137 return mask;
4138 }
4139
4140 static int me4000_ai_offset_enable(struct me4000_ai_context *ai_context)
4141 {
4142 unsigned long tmp;
4143
4144 CALL_PDEBUG("me4000_ai_offset_enable() is executed\n");
4145
4146 tmp = me4000_inl(ai_context->ctrl_reg);
4147 tmp |= ME4000_AI_CTRL_BIT_OFFSET;
4148 me4000_outl(tmp, ai_context->ctrl_reg);
4149
4150 return 0;
4151 }
4152
4153 static int me4000_ai_offset_disable(struct me4000_ai_context *ai_context)
4154 {
4155 unsigned long tmp;
4156
4157 CALL_PDEBUG("me4000_ai_offset_disable() is executed\n");
4158
4159 tmp = me4000_inl(ai_context->ctrl_reg);
4160 tmp &= ~ME4000_AI_CTRL_BIT_OFFSET;
4161 me4000_outl(tmp, ai_context->ctrl_reg);
4162
4163 return 0;
4164 }
4165
4166 static int me4000_ai_fullscale_enable(struct me4000_ai_context *ai_context)
4167 {
4168 unsigned long tmp;
4169
4170 CALL_PDEBUG("me4000_ai_fullscale_enable() is executed\n");
4171
4172 tmp = me4000_inl(ai_context->ctrl_reg);
4173 tmp |= ME4000_AI_CTRL_BIT_FULLSCALE;
4174 me4000_outl(tmp, ai_context->ctrl_reg);
4175
4176 return 0;
4177 }
4178
4179 static int me4000_ai_fullscale_disable(struct me4000_ai_context *ai_context)
4180 {
4181 unsigned long tmp;
4182
4183 CALL_PDEBUG("me4000_ai_fullscale_disable() is executed\n");
4184
4185 tmp = me4000_inl(ai_context->ctrl_reg);
4186 tmp &= ~ME4000_AI_CTRL_BIT_FULLSCALE;
4187 me4000_outl(tmp, ai_context->ctrl_reg);
4188
4189 return 0;
4190 }
4191
4192 static int me4000_ai_fsm_state(int *arg, struct me4000_ai_context *ai_context)
4193 {
4194 unsigned long tmp;
4195
4196 CALL_PDEBUG("me4000_ai_fsm_state() is executed\n");
4197
4198 tmp =
4199 (me4000_inl(ai_context->status_reg) & ME4000_AI_STATUS_BIT_FSM) ? 1
4200 : 0;
4201
4202 if (put_user(tmp, arg)) {
4203 printk(KERN_ERR "me4000_ai_fsm_state():Cannot copy to user\n");
4204 return -EFAULT;
4205 }
4206
4207 return 0;
4208 }
4209
4210 static int me4000_ai_get_count_buffer(unsigned long *arg,
4211 struct me4000_ai_context *ai_context)
4212 {
4213 unsigned long c;
4214 int err;
4215
4216 c = me4000_buf_count(ai_context->circ_buf, ME4000_AI_BUFFER_COUNT);
4217
4218 err = copy_to_user(arg, &c, sizeof(unsigned long));
4219 if (err) {
4220 printk(KERN_ERR
4221 "%s:Can't copy to user space\n", __func__);
4222 return -EFAULT;
4223 }
4224
4225 return 0;
4226 }
4227
4228 /*---------------------------------- EEPROM stuff ---------------------------*/
4229
4230 static int eeprom_write_cmd(struct me4000_ai_context *ai_context, unsigned long cmd,
4231 int length)
4232 {
4233 int i;
4234 unsigned long value;
4235
4236 CALL_PDEBUG("eeprom_write_cmd() is executed\n");
4237
4238 PDEBUG("eeprom_write_cmd():Write command 0x%08lX with length = %d\n",
4239 cmd, length);
4240
4241 /* Get the ICR register and clear the related bits */
4242 value = me4000_inl(ai_context->board_info->plx_regbase + PLX_ICR);
4243 value &= ~(PLX_ICR_MASK_EEPROM);
4244 me4000_outl(value, ai_context->board_info->plx_regbase + PLX_ICR);
4245
4246 /* Raise the chip select */
4247 value |= PLX_ICR_BIT_EEPROM_CHIP_SELECT;
4248 me4000_outl(value, ai_context->board_info->plx_regbase + PLX_ICR);
4249 udelay(EEPROM_DELAY);
4250
4251 for (i = 0; i < length; i++) {
4252 if (cmd & ((0x1 << (length - 1)) >> i))
4253 value |= PLX_ICR_BIT_EEPROM_WRITE;
4254 else
4255 value &= ~PLX_ICR_BIT_EEPROM_WRITE;
4256
4257 /* Write to EEPROM */
4258 me4000_outl(value,
4259 ai_context->board_info->plx_regbase + PLX_ICR);
4260 udelay(EEPROM_DELAY);
4261
4262 /* Raising edge of the clock */
4263 value |= PLX_ICR_BIT_EEPROM_CLOCK_SET;
4264 me4000_outl(value,
4265 ai_context->board_info->plx_regbase + PLX_ICR);
4266 udelay(EEPROM_DELAY);
4267
4268 /* Falling edge of the clock */
4269 value &= ~PLX_ICR_BIT_EEPROM_CLOCK_SET;
4270 me4000_outl(value,
4271 ai_context->board_info->plx_regbase + PLX_ICR);
4272 udelay(EEPROM_DELAY);
4273 }
4274
4275 /* Clear the chip select */
4276 value &= ~PLX_ICR_BIT_EEPROM_CHIP_SELECT;
4277 me4000_outl(value, ai_context->board_info->plx_regbase + PLX_ICR);
4278 udelay(EEPROM_DELAY);
4279
4280 /* Wait until hardware is ready for sure */
4281 mdelay(10);
4282
4283 return 0;
4284 }
4285
4286 static unsigned short eeprom_read_cmd(struct me4000_ai_context *ai_context,
4287 unsigned long cmd, int length)
4288 {
4289 int i;
4290 unsigned long value;
4291 unsigned short id = 0;
4292
4293 CALL_PDEBUG("eeprom_read_cmd() is executed\n");
4294
4295 PDEBUG("eeprom_read_cmd():Read command 0x%08lX with length = %d\n", cmd,
4296 length);
4297
4298 /* Get the ICR register and clear the related bits */
4299 value = me4000_inl(ai_context->board_info->plx_regbase + PLX_ICR);
4300 value &= ~(PLX_ICR_MASK_EEPROM);
4301
4302 me4000_outl(value, ai_context->board_info->plx_regbase + PLX_ICR);
4303
4304 /* Raise the chip select */
4305 value |= PLX_ICR_BIT_EEPROM_CHIP_SELECT;
4306 me4000_outl(value, ai_context->board_info->plx_regbase + PLX_ICR);
4307 udelay(EEPROM_DELAY);
4308
4309 /* Write the read command to the eeprom */
4310 for (i = 0; i < length; i++) {
4311 if (cmd & ((0x1 << (length - 1)) >> i))
4312 value |= PLX_ICR_BIT_EEPROM_WRITE;
4313 else
4314 value &= ~PLX_ICR_BIT_EEPROM_WRITE;
4315
4316 me4000_outl(value,
4317 ai_context->board_info->plx_regbase + PLX_ICR);
4318 udelay(EEPROM_DELAY);
4319
4320 /* Raising edge of the clock */
4321 value |= PLX_ICR_BIT_EEPROM_CLOCK_SET;
4322 me4000_outl(value,
4323 ai_context->board_info->plx_regbase + PLX_ICR);
4324 udelay(EEPROM_DELAY);
4325
4326 /* Falling edge of the clock */
4327 value &= ~PLX_ICR_BIT_EEPROM_CLOCK_SET;
4328 me4000_outl(value,
4329 ai_context->board_info->plx_regbase + PLX_ICR);
4330 udelay(EEPROM_DELAY);
4331 }
4332
4333 /* Read the value from the eeprom */
4334 for (i = 0; i < 16; i++) {
4335 /* Raising edge of the clock */
4336 value |= PLX_ICR_BIT_EEPROM_CLOCK_SET;
4337 me4000_outl(value,
4338 ai_context->board_info->plx_regbase + PLX_ICR);
4339 udelay(EEPROM_DELAY);
4340
4341 if (me4000_inl(ai_context->board_info->plx_regbase + PLX_ICR) &
4342 PLX_ICR_BIT_EEPROM_READ) {
4343 id |= (0x8000 >> i);
4344 PDEBUG("eeprom_read_cmd():OR with 0x%04X\n",
4345 (0x8000 >> i));
4346 } else {
4347 PDEBUG("eeprom_read_cmd():Dont't OR\n");
4348 }
4349
4350 /* Falling edge of the clock */
4351 value &= ~PLX_ICR_BIT_EEPROM_CLOCK_SET;
4352 me4000_outl(value,
4353 ai_context->board_info->plx_regbase + PLX_ICR);
4354 udelay(EEPROM_DELAY);
4355 }
4356
4357 /* Clear the chip select */
4358 value &= ~PLX_ICR_BIT_EEPROM_CHIP_SELECT;
4359 me4000_outl(value, ai_context->board_info->plx_regbase + PLX_ICR);
4360 udelay(EEPROM_DELAY);
4361
4362 return id;
4363 }
4364
4365 static int me4000_eeprom_write(struct me4000_eeprom *arg,
4366 struct me4000_ai_context *ai_context)
4367 {
4368 int err;
4369 struct me4000_eeprom setup;
4370 unsigned long cmd;
4371 unsigned long date_high;
4372 unsigned long date_low;
4373
4374 CALL_PDEBUG("me4000_eeprom_write() is executed\n");
4375
4376 err = copy_from_user(&setup, arg, sizeof(setup));
4377 if (err) {
4378 printk(KERN_ERR
4379 "ME4000:me4000_eeprom_write():Cannot copy from user\n");
4380 return err;
4381 }
4382
4383 /* Enable writing */
4384 eeprom_write_cmd(ai_context, ME4000_EEPROM_CMD_WRITE_ENABLE,
4385 ME4000_EEPROM_CMD_LENGTH_WRITE_ENABLE);
4386
4387 /* Command for date */
4388 date_high = (setup.date & 0xFFFF0000) >> 16;
4389 date_low = (setup.date & 0x0000FFFF);
4390
4391 cmd =
4392 ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_DATE_HIGH <<
4393 ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4394 (unsigned
4395 long)
4396 date_high);
4397 err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4398 if (err)
4399 return err;
4400
4401 cmd =
4402 ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_DATE_LOW <<
4403 ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4404 (unsigned
4405 long)
4406 date_low);
4407 err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4408 if (err)
4409 return err;
4410
4411 /* Command for unipolar 10V offset */
4412 cmd =
4413 ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_1_UNI_OFFSET <<
4414 ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4415 (unsigned
4416 long)
4417 setup.
4418 uni_10_offset);
4419 err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4420 if (err)
4421 return err;
4422
4423 /* Command for unipolar 10V fullscale */
4424 cmd =
4425 ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_1_UNI_FULLSCALE <<
4426 ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4427 (unsigned
4428 long)
4429 setup.
4430 uni_10_fullscale);
4431 err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4432 if (err)
4433 return err;
4434
4435 /* Command for unipolar 2,5V offset */
4436 cmd =
4437 ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_4_UNI_OFFSET <<
4438 ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4439 (unsigned
4440 long)
4441 setup.
4442 uni_2_5_offset);
4443 err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4444 if (err)
4445 return err;
4446
4447 /* Command for unipolar 2,5V fullscale */
4448 cmd =
4449 ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_4_UNI_FULLSCALE <<
4450 ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4451 (unsigned
4452 long)
4453 setup.
4454 uni_2_5_fullscale);
4455 err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4456 if (err)
4457 return err;
4458
4459 /* Command for bipolar 10V offset */
4460 cmd =
4461 ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_1_BI_OFFSET <<
4462 ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4463 (unsigned
4464 long)
4465 setup.
4466 bi_10_offset);
4467 err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4468 if (err)
4469 return err;
4470
4471 /* Command for bipolar 10V fullscale */
4472 cmd =
4473 ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_1_BI_FULLSCALE <<
4474 ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4475 (unsigned
4476 long)
4477 setup.
4478 bi_10_fullscale);
4479 err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4480 if (err)
4481 return err;
4482
4483 /* Command for bipolar 2,5V offset */
4484 cmd =
4485 ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_4_BI_OFFSET <<
4486 ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4487 (unsigned
4488 long)
4489 setup.
4490 bi_2_5_offset);
4491 err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4492 if (err)
4493 return err;
4494
4495 /* Command for bipolar 2,5V fullscale */
4496 cmd =
4497 ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_4_BI_FULLSCALE <<
4498 ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4499 (unsigned
4500 long)
4501 setup.
4502 bi_2_5_fullscale);
4503 err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4504 if (err)
4505 return err;
4506
4507 /* Command for differential 10V offset */
4508 cmd =
4509 ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_1_DIFF_OFFSET <<
4510 ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4511 (unsigned
4512 long)
4513 setup.
4514 diff_10_offset);
4515 err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4516 if (err)
4517 return err;
4518
4519 /* Command for differential 10V fullscale */
4520 cmd =
4521 ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_1_DIFF_FULLSCALE
4522 << ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4523 (unsigned
4524 long)
4525 setup.
4526 diff_10_fullscale);
4527 err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4528 if (err)
4529 return err;
4530
4531 /* Command for differential 2,5V offset */
4532 cmd =
4533 ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_4_DIFF_OFFSET <<
4534 ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4535 (unsigned
4536 long)
4537 setup.
4538 diff_2_5_offset);
4539 err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4540 if (err)
4541 return err;
4542
4543 /* Command for differential 2,5V fullscale */
4544 cmd =
4545 ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_4_DIFF_FULLSCALE
4546 << ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4547 (unsigned
4548 long)
4549 setup.
4550 diff_2_5_fullscale);
4551 err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4552 if (err)
4553 return err;
4554
4555 /* Disable writing */
4556 eeprom_write_cmd(ai_context, ME4000_EEPROM_CMD_WRITE_DISABLE,
4557 ME4000_EEPROM_CMD_LENGTH_WRITE_DISABLE);
4558
4559 return 0;
4560 }
4561
4562 static int me4000_eeprom_read(struct me4000_eeprom *arg,
4563 struct me4000_ai_context *ai_context)
4564 {
4565 int err;
4566 unsigned long cmd;
4567 struct me4000_eeprom setup;
4568
4569 CALL_PDEBUG("me4000_eeprom_read() is executed\n");
4570
4571 /* Command for date */
4572 cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_DATE_HIGH;
4573 setup.date =
4574 eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4575 setup.date <<= 16;
4576 cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_DATE_LOW;
4577 setup.date |=
4578 eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4579
4580 /* Command for unipolar 10V offset */
4581 cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_1_UNI_OFFSET;
4582 setup.uni_10_offset =
4583 eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4584
4585 /* Command for unipolar 10V fullscale */
4586 cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_1_UNI_FULLSCALE;
4587 setup.uni_10_fullscale =
4588 eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4589
4590 /* Command for unipolar 2,5V offset */
4591 cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_4_UNI_OFFSET;
4592 setup.uni_2_5_offset =
4593 eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4594
4595 /* Command for unipolar 2,5V fullscale */
4596 cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_4_UNI_FULLSCALE;
4597 setup.uni_2_5_fullscale =
4598 eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4599
4600 /* Command for bipolar 10V offset */
4601 cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_1_BI_OFFSET;
4602 setup.bi_10_offset =
4603 eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4604
4605 /* Command for bipolar 10V fullscale */
4606 cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_1_BI_FULLSCALE;
4607 setup.bi_10_fullscale =
4608 eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4609
4610 /* Command for bipolar 2,5V offset */
4611 cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_4_BI_OFFSET;
4612 setup.bi_2_5_offset =
4613 eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4614
4615 /* Command for bipolar 2,5V fullscale */
4616 cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_4_BI_FULLSCALE;
4617 setup.bi_2_5_fullscale =
4618 eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4619
4620 /* Command for differntial 10V offset */
4621 cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_1_DIFF_OFFSET;
4622 setup.diff_10_offset =
4623 eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4624
4625 /* Command for differential 10V fullscale */
4626 cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_1_DIFF_FULLSCALE;
4627 setup.diff_10_fullscale =
4628 eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4629
4630 /* Command for differntial 2,5V offset */
4631 cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_4_DIFF_OFFSET;
4632 setup.diff_2_5_offset =
4633 eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4634
4635 /* Command for differential 2,5V fullscale */
4636 cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_4_DIFF_FULLSCALE;
4637 setup.diff_2_5_fullscale =
4638 eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4639
4640 err = copy_to_user(arg, &setup, sizeof(setup));
4641 if (err) {
4642 printk(KERN_ERR
4643 "ME4000:me4000_eeprom_read():Cannot copy to user\n");
4644 return err;
4645 }
4646
4647 return 0;
4648 }
4649
4650 /*------------------------------------ DIO stuff ----------------------------------------------*/
4651
4652 static int me4000_dio_ioctl(struct inode *inode_p, struct file *file_p,
4653 unsigned int service, unsigned long arg)
4654 {
4655 struct me4000_dio_context *dio_context;
4656
4657 CALL_PDEBUG("me4000_dio_ioctl() is executed\n");
4658
4659 dio_context = file_p->private_data;
4660
4661 if (_IOC_TYPE(service) != ME4000_MAGIC) {
4662 printk(KERN_ERR "me4000_dio_ioctl():Wrong magic number\n");
4663 return -ENOTTY;
4664 }
4665 if (_IOC_NR(service) > ME4000_IOCTL_MAXNR) {
4666 printk(KERN_ERR "me4000_dio_ioctl():Service number to high\n");
4667 return -ENOTTY;
4668 }
4669
4670 switch (service) {
4671 case ME4000_DIO_CONFIG:
4672 return me4000_dio_config((struct me4000_dio_config *)arg,
4673 dio_context);
4674 case ME4000_DIO_SET_BYTE:
4675 return me4000_dio_set_byte((struct me4000_dio_byte *)arg,
4676 dio_context);
4677 case ME4000_DIO_GET_BYTE:
4678 return me4000_dio_get_byte((struct me4000_dio_byte *)arg,
4679 dio_context);
4680 case ME4000_DIO_RESET:
4681 return me4000_dio_reset(dio_context);
4682 default:
4683 printk(KERN_ERR
4684 "ME4000:me4000_dio_ioctl():Invalid service number %d\n",
4685 service);
4686 return -ENOTTY;
4687 }
4688 return 0;
4689 }
4690
4691 static int me4000_dio_config(struct me4000_dio_config *arg,
4692 struct me4000_dio_context *dio_context)
4693 {
4694 struct me4000_dio_config cmd;
4695 u32 tmp;
4696 int err;
4697
4698 CALL_PDEBUG("me4000_dio_config() is executed\n");
4699
4700 /* Copy data from user */
4701 err = copy_from_user(&cmd, arg, sizeof(struct me4000_dio_config));
4702 if (err) {
4703 printk(KERN_ERR
4704 "ME4000:me4000_dio_config():Can't copy from user space\n");
4705 return -EFAULT;
4706 }
4707
4708 /* Check port parameter */
4709 if (cmd.port >= dio_context->dio_count) {
4710 printk(KERN_ERR
4711 "ME4000:me4000_dio_config():Port %d is not available\n",
4712 cmd.port);
4713 return -EINVAL;
4714 }
4715
4716 PDEBUG("me4000_dio_config(): port %d, mode %d, function %d\n", cmd.port,
4717 cmd.mode, cmd.function);
4718
4719 if (cmd.port == ME4000_DIO_PORT_A) {
4720 if (cmd.mode == ME4000_DIO_PORT_INPUT) {
4721 /* Check if opto isolated version */
4722 if (!(me4000_inl(dio_context->dir_reg) & 0x1)) {
4723 printk(KERN_ERR
4724 "ME4000:me4000_dio_config():Cannot set to input on opto isolated versions\n");
4725 return -EIO;
4726 }
4727
4728 tmp = me4000_inl(dio_context->ctrl_reg);
4729 tmp &=
4730 ~(ME4000_DIO_CTRL_BIT_MODE_0 |
4731 ME4000_DIO_CTRL_BIT_MODE_1);
4732 me4000_outl(tmp, dio_context->ctrl_reg);
4733 } else if (cmd.mode == ME4000_DIO_PORT_OUTPUT) {
4734 tmp = me4000_inl(dio_context->ctrl_reg);
4735 tmp &=
4736 ~(ME4000_DIO_CTRL_BIT_MODE_0 |
4737 ME4000_DIO_CTRL_BIT_MODE_1);
4738 tmp |= ME4000_DIO_CTRL_BIT_MODE_0;
4739 me4000_outl(tmp, dio_context->ctrl_reg);
4740 } else if (cmd.mode == ME4000_DIO_FIFO_LOW) {
4741 tmp = me4000_inl(dio_context->ctrl_reg);
4742 tmp &=
4743 ~(ME4000_DIO_CTRL_BIT_MODE_0 |
4744 ME4000_DIO_CTRL_BIT_MODE_1 |
4745 ME4000_DIO_CTRL_BIT_FIFO_HIGH_0);
4746 tmp |=
4747 ME4000_DIO_CTRL_BIT_MODE_0 |
4748 ME4000_DIO_CTRL_BIT_MODE_1;
4749 me4000_outl(tmp, dio_context->ctrl_reg);
4750 } else if (cmd.mode == ME4000_DIO_FIFO_HIGH) {
4751 tmp = me4000_inl(dio_context->ctrl_reg);
4752 tmp |=
4753 ME4000_DIO_CTRL_BIT_MODE_0 |
4754 ME4000_DIO_CTRL_BIT_MODE_1 |
4755 ME4000_DIO_CTRL_BIT_FIFO_HIGH_0;
4756 me4000_outl(tmp, dio_context->ctrl_reg);
4757 } else {
4758 printk(KERN_ERR
4759 "ME4000:me4000_dio_config():Mode %d is not available\n",
4760 cmd.mode);
4761 return -EINVAL;
4762 }
4763 } else if (cmd.port == ME4000_DIO_PORT_B) {
4764 if (cmd.mode == ME4000_DIO_PORT_INPUT) {
4765 /* Only do anything when TTL version is installed */
4766 if ((me4000_inl(dio_context->dir_reg) & 0x1)) {
4767 tmp = me4000_inl(dio_context->ctrl_reg);
4768 tmp &=
4769 ~(ME4000_DIO_CTRL_BIT_MODE_2 |
4770 ME4000_DIO_CTRL_BIT_MODE_3);
4771 me4000_outl(tmp, dio_context->ctrl_reg);
4772 }
4773 } else if (cmd.mode == ME4000_DIO_PORT_OUTPUT) {
4774 /* Check if opto isolated version */
4775 if (!(me4000_inl(dio_context->dir_reg) & 0x1)) {
4776 printk(KERN_ERR
4777 "ME4000:me4000_dio_config():Cannot set to output on opto isolated versions\n");
4778 return -EIO;
4779 }
4780
4781 tmp = me4000_inl(dio_context->ctrl_reg);
4782 tmp &=
4783 ~(ME4000_DIO_CTRL_BIT_MODE_2 |
4784 ME4000_DIO_CTRL_BIT_MODE_3);
4785 tmp |= ME4000_DIO_CTRL_BIT_MODE_2;
4786 me4000_outl(tmp, dio_context->ctrl_reg);
4787 } else if (cmd.mode == ME4000_DIO_FIFO_LOW) {
4788 /* Check if opto isolated version */
4789 if (!(me4000_inl(dio_context->dir_reg) & 0x1)) {
4790 printk(KERN_ERR
4791 "ME4000:me4000_dio_config():Cannot set to FIFO low output on opto isolated versions\n");
4792 return -EIO;
4793 }
4794
4795 tmp = me4000_inl(dio_context->ctrl_reg);
4796 tmp &=
4797 ~(ME4000_DIO_CTRL_BIT_MODE_2 |
4798 ME4000_DIO_CTRL_BIT_MODE_3 |
4799 ME4000_DIO_CTRL_BIT_FIFO_HIGH_1);
4800 tmp |=
4801 ME4000_DIO_CTRL_BIT_MODE_2 |
4802 ME4000_DIO_CTRL_BIT_MODE_3;
4803 me4000_outl(tmp, dio_context->ctrl_reg);
4804 } else if (cmd.mode == ME4000_DIO_FIFO_HIGH) {
4805 /* Check if opto isolated version */
4806 if (!(me4000_inl(dio_context->dir_reg) & 0x1)) {
4807 printk(KERN_ERR
4808 "ME4000:me4000_dio_config():Cannot set to FIFO high output on opto isolated versions\n");
4809 return -EIO;
4810 }
4811
4812 tmp = me4000_inl(dio_context->ctrl_reg);
4813 tmp |=
4814 ME4000_DIO_CTRL_BIT_MODE_2 |
4815 ME4000_DIO_CTRL_BIT_MODE_3 |
4816 ME4000_DIO_CTRL_BIT_FIFO_HIGH_1;
4817 me4000_outl(tmp, dio_context->ctrl_reg);
4818 } else {
4819 printk(KERN_ERR
4820 "ME4000:me4000_dio_config():Mode %d is not available\n",
4821 cmd.mode);
4822 return -EINVAL;
4823 }
4824 } else if (cmd.port == ME4000_DIO_PORT_C) {
4825 if (cmd.mode == ME4000_DIO_PORT_INPUT) {
4826 tmp = me4000_inl(dio_context->ctrl_reg);
4827 tmp &=
4828 ~(ME4000_DIO_CTRL_BIT_MODE_4 |
4829 ME4000_DIO_CTRL_BIT_MODE_5);
4830 me4000_outl(tmp, dio_context->ctrl_reg);
4831 } else if (cmd.mode == ME4000_DIO_PORT_OUTPUT) {
4832 tmp = me4000_inl(dio_context->ctrl_reg);
4833 tmp &=
4834 ~(ME4000_DIO_CTRL_BIT_MODE_4 |
4835 ME4000_DIO_CTRL_BIT_MODE_5);
4836 tmp |= ME4000_DIO_CTRL_BIT_MODE_4;
4837 me4000_outl(tmp, dio_context->ctrl_reg);
4838 } else if (cmd.mode == ME4000_DIO_FIFO_LOW) {
4839 tmp = me4000_inl(dio_context->ctrl_reg);
4840 tmp &=
4841 ~(ME4000_DIO_CTRL_BIT_MODE_4 |
4842 ME4000_DIO_CTRL_BIT_MODE_5 |
4843 ME4000_DIO_CTRL_BIT_FIFO_HIGH_2);
4844 tmp |=
4845 ME4000_DIO_CTRL_BIT_MODE_4 |
4846 ME4000_DIO_CTRL_BIT_MODE_5;
4847 me4000_outl(tmp, dio_context->ctrl_reg);
4848 } else if (cmd.mode == ME4000_DIO_FIFO_HIGH) {
4849 tmp = me4000_inl(dio_context->ctrl_reg);
4850 tmp |=
4851 ME4000_DIO_CTRL_BIT_MODE_4 |
4852 ME4000_DIO_CTRL_BIT_MODE_5 |
4853 ME4000_DIO_CTRL_BIT_FIFO_HIGH_2;
4854 me4000_outl(tmp, dio_context->ctrl_reg);
4855 } else {
4856 printk(KERN_ERR
4857 "ME4000:me4000_dio_config():Mode %d is not available\n",
4858 cmd.mode);
4859 return -EINVAL;
4860 }
4861 } else if (cmd.port == ME4000_DIO_PORT_D) {
4862 if (cmd.mode == ME4000_DIO_PORT_INPUT) {
4863 tmp = me4000_inl(dio_context->ctrl_reg);
4864 tmp &=
4865 ~(ME4000_DIO_CTRL_BIT_MODE_6 |
4866 ME4000_DIO_CTRL_BIT_MODE_7);
4867 me4000_outl(tmp, dio_context->ctrl_reg);
4868 } else if (cmd.mode == ME4000_DIO_PORT_OUTPUT) {
4869 tmp = me4000_inl(dio_context->ctrl_reg);
4870 tmp &=
4871 ~(ME4000_DIO_CTRL_BIT_MODE_6 |
4872 ME4000_DIO_CTRL_BIT_MODE_7);
4873 tmp |= ME4000_DIO_CTRL_BIT_MODE_6;
4874 me4000_outl(tmp, dio_context->ctrl_reg);
4875 } else if (cmd.mode == ME4000_DIO_FIFO_LOW) {
4876 tmp = me4000_inl(dio_context->ctrl_reg);
4877 tmp &=
4878 ~(ME4000_DIO_CTRL_BIT_MODE_6 |
4879 ME4000_DIO_CTRL_BIT_MODE_7 |
4880 ME4000_DIO_CTRL_BIT_FIFO_HIGH_3);
4881 tmp |=
4882 ME4000_DIO_CTRL_BIT_MODE_6 |
4883 ME4000_DIO_CTRL_BIT_MODE_7;
4884 me4000_outl(tmp, dio_context->ctrl_reg);
4885 } else if (cmd.mode == ME4000_DIO_FIFO_HIGH) {
4886 tmp = me4000_inl(dio_context->ctrl_reg);
4887 tmp |=
4888 ME4000_DIO_CTRL_BIT_MODE_6 |
4889 ME4000_DIO_CTRL_BIT_MODE_7 |
4890 ME4000_DIO_CTRL_BIT_FIFO_HIGH_3;
4891 me4000_outl(tmp, dio_context->ctrl_reg);
4892 } else {
4893 printk(KERN_ERR
4894 "ME4000:me4000_dio_config():Mode %d is not available\n",
4895 cmd.mode);
4896 return -EINVAL;
4897 }
4898 } else {
4899 printk(KERN_ERR
4900 "ME4000:me4000_dio_config():Port %d is not available\n",
4901 cmd.port);
4902 return -EINVAL;
4903 }
4904
4905 PDEBUG("me4000_dio_config(): port %d, mode %d, function %d\n", cmd.port,
4906 cmd.mode, cmd.function);
4907
4908 if ((cmd.mode == ME4000_DIO_FIFO_HIGH)
4909 || (cmd.mode == ME4000_DIO_FIFO_LOW)) {
4910 tmp = me4000_inl(dio_context->ctrl_reg);
4911 tmp &=
4912 ~(ME4000_DIO_CTRL_BIT_FUNCTION_0 |
4913 ME4000_DIO_CTRL_BIT_FUNCTION_1);
4914 if (cmd.function == ME4000_DIO_FUNCTION_PATTERN) {
4915 me4000_outl(tmp, dio_context->ctrl_reg);
4916 } else if (cmd.function == ME4000_DIO_FUNCTION_DEMUX) {
4917 tmp |= ME4000_DIO_CTRL_BIT_FUNCTION_0;
4918 me4000_outl(tmp, dio_context->ctrl_reg);
4919 } else if (cmd.function == ME4000_DIO_FUNCTION_MUX) {
4920 tmp |= ME4000_DIO_CTRL_BIT_FUNCTION_1;
4921 me4000_outl(tmp, dio_context->ctrl_reg);
4922 } else {
4923 printk(KERN_ERR
4924 "ME4000:me4000_dio_config():Invalid port function specified\n");
4925 return -EINVAL;
4926 }
4927 }
4928
4929 return 0;
4930 }
4931
4932 static int me4000_dio_set_byte(struct me4000_dio_byte *arg,
4933 struct me4000_dio_context *dio_context)
4934 {
4935 struct me4000_dio_byte cmd;
4936 int err;
4937
4938 CALL_PDEBUG("me4000_dio_set_byte() is executed\n");
4939
4940 /* Copy data from user */
4941 err = copy_from_user(&cmd, arg, sizeof(struct me4000_dio_byte));
4942 if (err) {
4943 printk(KERN_ERR
4944 "ME4000:me4000_dio_set_byte():Can't copy from user space\n");
4945 return -EFAULT;
4946 }
4947
4948 /* Check port parameter */
4949 if (cmd.port >= dio_context->dio_count) {
4950 printk(KERN_ERR
4951 "ME4000:me4000_dio_set_byte():Port %d is not available\n",
4952 cmd.port);
4953 return -EINVAL;
4954 }
4955
4956 if (cmd.port == ME4000_DIO_PORT_A) {
4957 if ((me4000_inl(dio_context->ctrl_reg) & 0x3) != 0x1) {
4958 printk(KERN_ERR
4959 "ME4000:me4000_dio_set_byte():Port %d is not in output mode\n",
4960 cmd.port);
4961 return -EIO;
4962 }
4963 me4000_outl(cmd.byte, dio_context->port_0_reg);
4964 } else if (cmd.port == ME4000_DIO_PORT_B) {
4965 if ((me4000_inl(dio_context->ctrl_reg) & 0xC) != 0x4) {
4966 printk(KERN_ERR
4967 "ME4000:me4000_dio_set_byte():Port %d is not in output mode\n",
4968 cmd.port);
4969 return -EIO;
4970 }
4971 me4000_outl(cmd.byte, dio_context->port_1_reg);
4972 } else if (cmd.port == ME4000_DIO_PORT_C) {
4973 if ((me4000_inl(dio_context->ctrl_reg) & 0x30) != 0x10) {
4974 printk(KERN_ERR
4975 "ME4000:me4000_dio_set_byte():Port %d is not in output mode\n",
4976 cmd.port);
4977 return -EIO;
4978 }
4979 me4000_outl(cmd.byte, dio_context->port_2_reg);
4980 } else if (cmd.port == ME4000_DIO_PORT_D) {
4981 if ((me4000_inl(dio_context->ctrl_reg) & 0xC0) != 0x40) {
4982 printk(KERN_ERR
4983 "ME4000:me4000_dio_set_byte():Port %d is not in output mode\n",
4984 cmd.port);
4985 return -EIO;
4986 }
4987 me4000_outl(cmd.byte, dio_context->port_3_reg);
4988 } else {
4989 printk(KERN_ERR
4990 "ME4000:me4000_dio_set_byte():Port %d is not available\n",
4991 cmd.port);
4992 return -EINVAL;
4993 }
4994
4995 return 0;
4996 }
4997
4998 static int me4000_dio_get_byte(struct me4000_dio_byte *arg,
4999 struct me4000_dio_context *dio_context)
5000 {
5001 struct me4000_dio_byte cmd;
5002 int err;
5003
5004 CALL_PDEBUG("me4000_dio_get_byte() is executed\n");
5005
5006 /* Copy data from user */
5007 err = copy_from_user(&cmd, arg, sizeof(struct me4000_dio_byte));
5008 if (err) {
5009 printk(KERN_ERR
5010 "ME4000:me4000_dio_get_byte():Can't copy from user space\n");
5011 return -EFAULT;
5012 }
5013
5014 /* Check port parameter */
5015 if (cmd.port >= dio_context->dio_count) {
5016 printk(KERN_ERR
5017 "ME4000:me4000_dio_get_byte():Port %d is not available\n",
5018 cmd.port);
5019 return -EINVAL;
5020 }
5021
5022 if (cmd.port == ME4000_DIO_PORT_A) {
5023 cmd.byte = me4000_inl(dio_context->port_0_reg) & 0xFF;
5024 } else if (cmd.port == ME4000_DIO_PORT_B) {
5025 cmd.byte = me4000_inl(dio_context->port_1_reg) & 0xFF;
5026 } else if (cmd.port == ME4000_DIO_PORT_C) {
5027 cmd.byte = me4000_inl(dio_context->port_2_reg) & 0xFF;
5028 } else if (cmd.port == ME4000_DIO_PORT_D) {
5029 cmd.byte = me4000_inl(dio_context->port_3_reg) & 0xFF;
5030 } else {
5031 printk(KERN_ERR
5032 "ME4000:me4000_dio_get_byte():Port %d is not available\n",
5033 cmd.port);
5034 return -EINVAL;
5035 }
5036
5037 /* Copy result back to user */
5038 err = copy_to_user(arg, &cmd, sizeof(struct me4000_dio_byte));
5039 if (err) {
5040 printk(KERN_ERR
5041 "ME4000:me4000_dio_get_byte():Can't copy to user space\n");
5042 return -EFAULT;
5043 }
5044
5045 return 0;
5046 }
5047
5048 static int me4000_dio_reset(struct me4000_dio_context *dio_context)
5049 {
5050 CALL_PDEBUG("me4000_dio_reset() is executed\n");
5051
5052 /* Clear the control register */
5053 me4000_outl(0, dio_context->ctrl_reg);
5054
5055 /* Check for opto isolated version */
5056 if (!(me4000_inl(dio_context->dir_reg) & 0x1)) {
5057 me4000_outl(0x1, dio_context->ctrl_reg);
5058 me4000_outl(0x0, dio_context->port_0_reg);
5059 }
5060
5061 return 0;
5062 }
5063
5064 /*------------------------------------ COUNTER STUFF ------------------------------------*/
5065
5066 static int me4000_cnt_ioctl(struct inode *inode_p, struct file *file_p,
5067 unsigned int service, unsigned long arg)
5068 {
5069 struct me4000_cnt_context *cnt_context;
5070
5071 CALL_PDEBUG("me4000_cnt_ioctl() is executed\n");
5072
5073 cnt_context = file_p->private_data;
5074
5075 if (_IOC_TYPE(service) != ME4000_MAGIC) {
5076 printk(KERN_ERR "me4000_dio_ioctl():Wrong magic number\n");
5077 return -ENOTTY;
5078 }
5079 if (_IOC_NR(service) > ME4000_IOCTL_MAXNR) {
5080 printk(KERN_ERR "me4000_dio_ioctl():Service number to high\n");
5081 return -ENOTTY;
5082 }
5083
5084 switch (service) {
5085 case ME4000_CNT_READ:
5086 return me4000_cnt_read((struct me4000_cnt *)arg, cnt_context);
5087 case ME4000_CNT_WRITE:
5088 return me4000_cnt_write((struct me4000_cnt *)arg, cnt_context);
5089 case ME4000_CNT_CONFIG:
5090 return me4000_cnt_config((struct me4000_cnt_config *)arg,
5091 cnt_context);
5092 case ME4000_CNT_RESET:
5093 return me4000_cnt_reset(cnt_context);
5094 default:
5095 printk(KERN_ERR
5096 "ME4000:me4000_dio_ioctl():Invalid service number %d\n",
5097 service);
5098 return -ENOTTY;
5099 }
5100 return 0;
5101 }
5102
5103 static int me4000_cnt_config(struct me4000_cnt_config *arg,
5104 struct me4000_cnt_context *cnt_context)
5105 {
5106 struct me4000_cnt_config cmd;
5107 u8 counter;
5108 u8 mode;
5109 int err;
5110
5111 CALL_PDEBUG("me4000_cnt_config() is executed\n");
5112
5113 /* Copy data from user */
5114 err = copy_from_user(&cmd, arg, sizeof(struct me4000_cnt_config));
5115 if (err) {
5116 printk(KERN_ERR
5117 "ME4000:me4000_cnt_config():Can't copy from user space\n");
5118 return -EFAULT;
5119 }
5120
5121 /* Check counter parameter */
5122 switch (cmd.counter) {
5123 case ME4000_CNT_COUNTER_0:
5124 counter = ME4000_CNT_CTRL_BIT_COUNTER_0;
5125 break;
5126 case ME4000_CNT_COUNTER_1:
5127 counter = ME4000_CNT_CTRL_BIT_COUNTER_1;
5128 break;
5129 case ME4000_CNT_COUNTER_2:
5130 counter = ME4000_CNT_CTRL_BIT_COUNTER_2;
5131 break;
5132 default:
5133 printk(KERN_ERR
5134 "ME4000:me4000_cnt_config():Counter %d is not available\n",
5135 cmd.counter);
5136 return -EINVAL;
5137 }
5138
5139 /* Check mode parameter */
5140 switch (cmd.mode) {
5141 case ME4000_CNT_MODE_0:
5142 mode = ME4000_CNT_CTRL_BIT_MODE_0;
5143 break;
5144 case ME4000_CNT_MODE_1:
5145 mode = ME4000_CNT_CTRL_BIT_MODE_1;
5146 break;
5147 case ME4000_CNT_MODE_2:
5148 mode = ME4000_CNT_CTRL_BIT_MODE_2;
5149 break;
5150 case ME4000_CNT_MODE_3:
5151 mode = ME4000_CNT_CTRL_BIT_MODE_3;
5152 break;
5153 case ME4000_CNT_MODE_4:
5154 mode = ME4000_CNT_CTRL_BIT_MODE_4;
5155 break;
5156 case ME4000_CNT_MODE_5:
5157 mode = ME4000_CNT_CTRL_BIT_MODE_5;
5158 break;
5159 default:
5160 printk(KERN_ERR
5161 "ME4000:me4000_cnt_config():Mode %d is not available\n",
5162 cmd.mode);
5163 return -EINVAL;
5164 }
5165
5166 /* Write the control word */
5167 me4000_outb((counter | mode | 0x30), cnt_context->ctrl_reg);
5168
5169 return 0;
5170 }
5171
5172 static int me4000_cnt_read(struct me4000_cnt *arg,
5173 struct me4000_cnt_context *cnt_context)
5174 {
5175 struct me4000_cnt cmd;
5176 u8 tmp;
5177 int err;
5178
5179 CALL_PDEBUG("me4000_cnt_read() is executed\n");
5180
5181 /* Copy data from user */
5182 err = copy_from_user(&cmd, arg, sizeof(struct me4000_cnt));
5183 if (err) {
5184 printk(KERN_ERR
5185 "ME4000:me4000_cnt_read():Can't copy from user space\n");
5186 return -EFAULT;
5187 }
5188
5189 /* Read counter */
5190 switch (cmd.counter) {
5191 case ME4000_CNT_COUNTER_0:
5192 tmp = me4000_inb(cnt_context->counter_0_reg);
5193 cmd.value = tmp;
5194 tmp = me4000_inb(cnt_context->counter_0_reg);
5195 cmd.value |= ((u16) tmp) << 8;
5196 break;
5197 case ME4000_CNT_COUNTER_1:
5198 tmp = me4000_inb(cnt_context->counter_1_reg);
5199 cmd.value = tmp;
5200 tmp = me4000_inb(cnt_context->counter_1_reg);
5201 cmd.value |= ((u16) tmp) << 8;
5202 break;
5203 case ME4000_CNT_COUNTER_2:
5204 tmp = me4000_inb(cnt_context->counter_2_reg);
5205 cmd.value = tmp;
5206 tmp = me4000_inb(cnt_context->counter_2_reg);
5207 cmd.value |= ((u16) tmp) << 8;
5208 break;
5209 default:
5210 printk(KERN_ERR
5211 "ME4000:me4000_cnt_read():Counter %d is not available\n",
5212 cmd.counter);
5213 return -EINVAL;
5214 }
5215
5216 /* Copy result back to user */
5217 err = copy_to_user(arg, &cmd, sizeof(struct me4000_cnt));
5218 if (err) {
5219 printk(KERN_ERR
5220 "ME4000:me4000_cnt_read():Can't copy to user space\n");
5221 return -EFAULT;
5222 }
5223
5224 return 0;
5225 }
5226
5227 static int me4000_cnt_write(struct me4000_cnt *arg,
5228 struct me4000_cnt_context *cnt_context)
5229 {
5230 struct me4000_cnt cmd;
5231 u8 tmp;
5232 int err;
5233
5234 CALL_PDEBUG("me4000_cnt_write() is executed\n");
5235
5236 /* Copy data from user */
5237 err = copy_from_user(&cmd, arg, sizeof(struct me4000_cnt));
5238 if (err) {
5239 printk(KERN_ERR
5240 "ME4000:me4000_cnt_write():Can't copy from user space\n");
5241 return -EFAULT;
5242 }
5243
5244 /* Write counter */
5245 switch (cmd.counter) {
5246 case ME4000_CNT_COUNTER_0:
5247 tmp = cmd.value & 0xFF;
5248 me4000_outb(tmp, cnt_context->counter_0_reg);
5249 tmp = (cmd.value >> 8) & 0xFF;
5250 me4000_outb(tmp, cnt_context->counter_0_reg);
5251 break;
5252 case ME4000_CNT_COUNTER_1:
5253 tmp = cmd.value & 0xFF;
5254 me4000_outb(tmp, cnt_context->counter_1_reg);
5255 tmp = (cmd.value >> 8) & 0xFF;
5256 me4000_outb(tmp, cnt_context->counter_1_reg);
5257 break;
5258 case ME4000_CNT_COUNTER_2:
5259 tmp = cmd.value & 0xFF;
5260 me4000_outb(tmp, cnt_context->counter_2_reg);
5261 tmp = (cmd.value >> 8) & 0xFF;
5262 me4000_outb(tmp, cnt_context->counter_2_reg);
5263 break;
5264 default:
5265 printk(KERN_ERR
5266 "ME4000:me4000_cnt_write():Counter %d is not available\n",
5267 cmd.counter);
5268 return -EINVAL;
5269 }
5270
5271 return 0;
5272 }
5273
5274 static int me4000_cnt_reset(struct me4000_cnt_context *cnt_context)
5275 {
5276 CALL_PDEBUG("me4000_cnt_reset() is executed\n");
5277
5278 /* Set the mode and value for counter 0 */
5279 me4000_outb(0x30, cnt_context->ctrl_reg);
5280 me4000_outb(0x00, cnt_context->counter_0_reg);
5281 me4000_outb(0x00, cnt_context->counter_0_reg);
5282
5283 /* Set the mode and value for counter 1 */
5284 me4000_outb(0x70, cnt_context->ctrl_reg);
5285 me4000_outb(0x00, cnt_context->counter_1_reg);
5286 me4000_outb(0x00, cnt_context->counter_1_reg);
5287
5288 /* Set the mode and value for counter 2 */
5289 me4000_outb(0xB0, cnt_context->ctrl_reg);
5290 me4000_outb(0x00, cnt_context->counter_2_reg);
5291 me4000_outb(0x00, cnt_context->counter_2_reg);
5292
5293 return 0;
5294 }
5295
5296 /*------------------------------------ External Interrupt stuff ------------------------------------*/
5297
5298 static int me4000_ext_int_ioctl(struct inode *inode_p, struct file *file_p,
5299 unsigned int service, unsigned long arg)
5300 {
5301 struct me4000_ext_int_context *ext_int_context;
5302
5303 CALL_PDEBUG("me4000_ext_int_ioctl() is executed\n");
5304
5305 ext_int_context = file_p->private_data;
5306
5307 if (_IOC_TYPE(service) != ME4000_MAGIC) {
5308 printk(KERN_ERR "me4000_ext_int_ioctl():Wrong magic number\n");
5309 return -ENOTTY;
5310 }
5311 if (_IOC_NR(service) > ME4000_IOCTL_MAXNR) {
5312 printk(KERN_ERR
5313 "me4000_ext_int_ioctl():Service number to high\n");
5314 return -ENOTTY;
5315 }
5316
5317 switch (service) {
5318 case ME4000_EXT_INT_ENABLE:
5319 return me4000_ext_int_enable(ext_int_context);
5320 case ME4000_EXT_INT_DISABLE:
5321 return me4000_ext_int_disable(ext_int_context);
5322 case ME4000_EXT_INT_COUNT:
5323 return me4000_ext_int_count((unsigned long *)arg,
5324 ext_int_context);
5325 default:
5326 printk(KERN_ERR
5327 "ME4000:me4000_ext_int_ioctl():Invalid service number %d\n",
5328 service);
5329 return -ENOTTY;
5330 }
5331 return 0;
5332 }
5333
5334 static int me4000_ext_int_enable(struct me4000_ext_int_context *ext_int_context)
5335 {
5336 unsigned long tmp;
5337
5338 CALL_PDEBUG("me4000_ext_int_enable() is executed\n");
5339
5340 tmp = me4000_inl(ext_int_context->ctrl_reg);
5341 tmp |= ME4000_AI_CTRL_BIT_EX_IRQ;
5342 me4000_outl(tmp, ext_int_context->ctrl_reg);
5343
5344 return 0;
5345 }
5346
5347 static int me4000_ext_int_disable(struct me4000_ext_int_context *ext_int_context)
5348 {
5349 unsigned long tmp;
5350
5351 CALL_PDEBUG("me4000_ext_int_disable() is executed\n");
5352
5353 tmp = me4000_inl(ext_int_context->ctrl_reg);
5354 tmp &= ~ME4000_AI_CTRL_BIT_EX_IRQ;
5355 me4000_outl(tmp, ext_int_context->ctrl_reg);
5356
5357 return 0;
5358 }
5359
5360 static int me4000_ext_int_count(unsigned long *arg,
5361 struct me4000_ext_int_context *ext_int_context)
5362 {
5363
5364 CALL_PDEBUG("me4000_ext_int_count() is executed\n");
5365
5366 put_user(ext_int_context->int_count, arg);
5367 return 0;
5368 }
5369
5370 /*------------------------------------ General stuff ------------------------------------*/
5371
5372 static int me4000_get_user_info(struct me4000_user_info *arg,
5373 struct me4000_info *board_info)
5374 {
5375 struct me4000_user_info user_info;
5376
5377 CALL_PDEBUG("me4000_get_user_info() is executed\n");
5378
5379 user_info.board_count = board_info->board_count;
5380 user_info.plx_regbase = board_info->plx_regbase;
5381 user_info.plx_regbase_size = board_info->plx_regbase_size;
5382 user_info.me4000_regbase = board_info->me4000_regbase;
5383 user_info.me4000_regbase_size = board_info->me4000_regbase_size;
5384 user_info.serial_no = board_info->serial_no;
5385 user_info.hw_revision = board_info->hw_revision;
5386 user_info.vendor_id = board_info->vendor_id;
5387 user_info.device_id = board_info->device_id;
5388 user_info.pci_bus_no = board_info->pci_bus_no;
5389 user_info.pci_dev_no = board_info->pci_dev_no;
5390 user_info.pci_func_no = board_info->pci_func_no;
5391 user_info.irq = board_info->irq;
5392 user_info.irq_count = board_info->irq_count;
5393 user_info.driver_version = ME4000_DRIVER_VERSION;
5394 user_info.ao_count = board_info->board_p->ao.count;
5395 user_info.ao_fifo_count = board_info->board_p->ao.fifo_count;
5396
5397 user_info.ai_count = board_info->board_p->ai.count;
5398 user_info.ai_sh_count = board_info->board_p->ai.sh_count;
5399 user_info.ai_ex_trig_analog = board_info->board_p->ai.ex_trig_analog;
5400
5401 user_info.dio_count = board_info->board_p->dio.count;
5402
5403 user_info.cnt_count = board_info->board_p->cnt.count;
5404
5405 if (copy_to_user(arg, &user_info, sizeof(struct me4000_user_info)))
5406 return -EFAULT;
5407
5408 return 0;
5409 }
5410
5411 /*------------------------------------ ISR STUFF ------------------------------------*/
5412
5413 static int me4000_ext_int_fasync(int fd, struct file *file_ptr, int mode)
5414 {
5415 int result = 0;
5416 struct me4000_ext_int_context *ext_int_context;
5417
5418 CALL_PDEBUG("me4000_ext_int_fasync() is executed\n");
5419
5420 ext_int_context = file_ptr->private_data;
5421
5422 result =
5423 fasync_helper(fd, file_ptr, mode, &ext_int_context->fasync_ptr);
5424
5425 CALL_PDEBUG("me4000_ext_int_fasync() is leaved\n");
5426 return result;
5427 }
5428
5429 static irqreturn_t me4000_ao_isr(int irq, void *dev_id)
5430 {
5431 u32 tmp;
5432 u32 value;
5433 struct me4000_ao_context *ao_context;
5434 int i;
5435 int c = 0;
5436 int c1 = 0;
5437 //unsigned long before;
5438 //unsigned long after;
5439
5440 ISR_PDEBUG("me4000_ao_isr() is executed\n");
5441
5442 ao_context = dev_id;
5443
5444 /* Check if irq number is right */
5445 if (irq != ao_context->irq) {
5446 ISR_PDEBUG("me4000_ao_isr():incorrect interrupt num: %d\n",
5447 irq);
5448 return IRQ_NONE;
5449 }
5450
5451 /* Check if this DAC rised an interrupt */
5452 if (!
5453 ((0x1 << (ao_context->index + 3)) &
5454 me4000_inl(ao_context->irq_status_reg))) {
5455 ISR_PDEBUG("me4000_ao_isr():Not this DAC\n");
5456 return IRQ_NONE;
5457 }
5458
5459 /* Read status register to find out what happened */
5460 tmp = me4000_inl(ao_context->status_reg);
5461
5462 if (!(tmp & ME4000_AO_STATUS_BIT_EF) && (tmp & ME4000_AO_STATUS_BIT_HF)
5463 && (tmp & ME4000_AO_STATUS_BIT_HF)) {
5464 c = ME4000_AO_FIFO_COUNT;
5465 ISR_PDEBUG("me4000_ao_isr():Fifo empty\n");
5466 } else if ((tmp & ME4000_AO_STATUS_BIT_EF)
5467 && (tmp & ME4000_AO_STATUS_BIT_HF)
5468 && (tmp & ME4000_AO_STATUS_BIT_HF)) {
5469 c = ME4000_AO_FIFO_COUNT / 2;
5470 ISR_PDEBUG("me4000_ao_isr():Fifo under half full\n");
5471 } else {
5472 c = 0;
5473 ISR_PDEBUG("me4000_ao_isr():Fifo full\n");
5474 }
5475
5476 ISR_PDEBUG("me4000_ao_isr():Try to write 0x%04X values\n", c);
5477
5478 while (1) {
5479 c1 = me4000_values_to_end(ao_context->circ_buf,
5480 ME4000_AO_BUFFER_COUNT);
5481 ISR_PDEBUG("me4000_ao_isr():Values to end = %d\n", c1);
5482 if (c1 > c)
5483 c1 = c;
5484
5485 if (c1 <= 0) {
5486 ISR_PDEBUG
5487 ("me4000_ao_isr():Work done or buffer empty\n");
5488 break;
5489 }
5490 //rdtscl(before);
5491 if (((ao_context->fifo_reg & 0xFF) == ME4000_AO_01_FIFO_REG) ||
5492 ((ao_context->fifo_reg & 0xFF) == ME4000_AO_03_FIFO_REG)) {
5493 for (i = 0; i < c1; i++) {
5494 value =
5495 ((u32)
5496 (*
5497 (ao_context->circ_buf.buf +
5498 ao_context->circ_buf.tail + i))) << 16;
5499 outl(value, ao_context->fifo_reg);
5500 }
5501 } else
5502 outsw(ao_context->fifo_reg,
5503 ao_context->circ_buf.buf +
5504 ao_context->circ_buf.tail, c1);
5505
5506 //rdtscl(after);
5507 //printk(KERN_ERR"ME4000:me4000_ao_isr():Time lapse = %lu\n", after - before);
5508
5509 ao_context->circ_buf.tail =
5510 (ao_context->circ_buf.tail + c1) & (ME4000_AO_BUFFER_COUNT -
5511 1);
5512 ISR_PDEBUG("me4000_ao_isr():%d values wrote to port 0x%04X\n",
5513 c1, ao_context->fifo_reg);
5514 c -= c1;
5515 }
5516
5517 /* If there are no values left in the buffer, disable interrupts */
5518 spin_lock(&ao_context->int_lock);
5519 if (!me4000_buf_count(ao_context->circ_buf, ME4000_AO_BUFFER_COUNT)) {
5520 ISR_PDEBUG
5521 ("me4000_ao_isr():Disable Interrupt because no values left in buffer\n");
5522 tmp = me4000_inl(ao_context->ctrl_reg);
5523 tmp &= ~ME4000_AO_CTRL_BIT_ENABLE_IRQ;
5524 me4000_outl(tmp, ao_context->ctrl_reg);
5525 }
5526 spin_unlock(&ao_context->int_lock);
5527
5528 /* Reset the interrupt */
5529 spin_lock(&ao_context->int_lock);
5530 tmp = me4000_inl(ao_context->ctrl_reg);
5531 tmp |= ME4000_AO_CTRL_BIT_RESET_IRQ;
5532 me4000_outl(tmp, ao_context->ctrl_reg);
5533 tmp &= ~ME4000_AO_CTRL_BIT_RESET_IRQ;
5534 me4000_outl(tmp, ao_context->ctrl_reg);
5535
5536 /* If state machine is stopped, flow was interrupted */
5537 if (!(me4000_inl(ao_context->status_reg) & ME4000_AO_STATUS_BIT_FSM)) {
5538 printk(KERN_ERR "ME4000:me4000_ao_isr():Broken pipe\n");
5539 ao_context->pipe_flag = 1; // Set flag in order to inform write routine
5540 tmp &= ~ME4000_AO_CTRL_BIT_ENABLE_IRQ; // Disable interrupt
5541 }
5542 me4000_outl(tmp, ao_context->ctrl_reg);
5543 spin_unlock(&ao_context->int_lock);
5544
5545 /* Wake up waiting process */
5546 wake_up_interruptible(&(ao_context->wait_queue));
5547
5548 /* Count the interrupt */
5549 ao_context->board_info->irq_count++;
5550
5551 return IRQ_HANDLED;
5552 }
5553
5554 static irqreturn_t me4000_ai_isr(int irq, void *dev_id)
5555 {
5556 u32 tmp;
5557 struct me4000_ai_context *ai_context;
5558 int i;
5559 int c = 0;
5560 int c1 = 0;
5561 #ifdef ME4000_ISR_DEBUG
5562 unsigned long before;
5563 unsigned long after;
5564 #endif
5565
5566 ISR_PDEBUG("me4000_ai_isr() is executed\n");
5567
5568 #ifdef ME4000_ISR_DEBUG
5569 rdtscl(before);
5570 #endif
5571
5572 ai_context = dev_id;
5573
5574 /* Check if irq number is right */
5575 if (irq != ai_context->irq) {
5576 ISR_PDEBUG("me4000_ai_isr():incorrect interrupt num: %d\n",
5577 irq);
5578 return IRQ_NONE;
5579 }
5580
5581 if (me4000_inl(ai_context->irq_status_reg) &
5582 ME4000_IRQ_STATUS_BIT_AI_HF) {
5583 ISR_PDEBUG
5584 ("me4000_ai_isr():Fifo half full interrupt occured\n");
5585
5586 /* Read status register to find out what happened */
5587 tmp = me4000_inl(ai_context->ctrl_reg);
5588
5589 if (!(tmp & ME4000_AI_STATUS_BIT_FF_DATA) &&
5590 !(tmp & ME4000_AI_STATUS_BIT_HF_DATA)
5591 && (tmp & ME4000_AI_STATUS_BIT_EF_DATA)) {
5592 ISR_PDEBUG("me4000_ai_isr():Fifo full\n");
5593 c = ME4000_AI_FIFO_COUNT;
5594
5595 /* FIFO overflow, so stop conversion and disable all interrupts */
5596 spin_lock(&ai_context->int_lock);
5597 tmp = me4000_inl(ai_context->ctrl_reg);
5598 tmp |= ME4000_AI_CTRL_BIT_IMMEDIATE_STOP;
5599 tmp &=
5600 ~(ME4000_AI_CTRL_BIT_HF_IRQ |
5601 ME4000_AI_CTRL_BIT_SC_IRQ);
5602 outl(tmp, ai_context->ctrl_reg);
5603 spin_unlock(&ai_context->int_lock);
5604 } else if ((tmp & ME4000_AI_STATUS_BIT_FF_DATA) &&
5605 !(tmp & ME4000_AI_STATUS_BIT_HF_DATA)
5606 && (tmp & ME4000_AI_STATUS_BIT_EF_DATA)) {
5607 ISR_PDEBUG("me4000_ai_isr():Fifo half full\n");
5608 c = ME4000_AI_FIFO_COUNT / 2;
5609 } else {
5610 c = 0;
5611 ISR_PDEBUG
5612 ("me4000_ai_isr():Can't determine state of fifo\n");
5613 }
5614
5615 ISR_PDEBUG("me4000_ai_isr():Try to read %d values\n", c);
5616
5617 while (1) {
5618 c1 = me4000_space_to_end(ai_context->circ_buf,
5619 ME4000_AI_BUFFER_COUNT);
5620 ISR_PDEBUG("me4000_ai_isr():Space to end = %d\n", c1);
5621 if (c1 > c)
5622 c1 = c;
5623
5624 if (c1 <= 0) {
5625 ISR_PDEBUG
5626 ("me4000_ai_isr():Work done or buffer full\n");
5627 break;
5628 }
5629
5630 insw(ai_context->data_reg,
5631 ai_context->circ_buf.buf +
5632 ai_context->circ_buf.head, c1);
5633 ai_context->circ_buf.head =
5634 (ai_context->circ_buf.head +
5635 c1) & (ME4000_AI_BUFFER_COUNT - 1);
5636 c -= c1;
5637 }
5638
5639 /* Work is done, so reset the interrupt */
5640 ISR_PDEBUG
5641 ("me4000_ai_isr():reset interrupt fifo half full interrupt\n");
5642 spin_lock(&ai_context->int_lock);
5643 tmp = me4000_inl(ai_context->ctrl_reg);
5644 tmp |= ME4000_AI_CTRL_BIT_HF_IRQ_RESET;
5645 me4000_outl(tmp, ai_context->ctrl_reg);
5646 tmp &= ~ME4000_AI_CTRL_BIT_HF_IRQ_RESET;
5647 me4000_outl(tmp, ai_context->ctrl_reg);
5648 spin_unlock(&ai_context->int_lock);
5649 }
5650
5651 if (me4000_inl(ai_context->irq_status_reg) & ME4000_IRQ_STATUS_BIT_SC) {
5652 ISR_PDEBUG
5653 ("me4000_ai_isr():Sample counter interrupt occured\n");
5654
5655 if (!ai_context->sample_counter_reload) {
5656 ISR_PDEBUG
5657 ("me4000_ai_isr():Single data block available\n");
5658
5659 /* Poll data until fifo empty */
5660 for (i = 0;
5661 (i < ME4000_AI_FIFO_COUNT / 2)
5662 && (inl(ai_context->ctrl_reg) &
5663 ME4000_AI_STATUS_BIT_EF_DATA); i++) {
5664 if (me4000_space_to_end
5665 (ai_context->circ_buf,
5666 ME4000_AI_BUFFER_COUNT)) {
5667 *(ai_context->circ_buf.buf +
5668 ai_context->circ_buf.head) =
5669 inw(ai_context->data_reg);
5670 ai_context->circ_buf.head =
5671 (ai_context->circ_buf.head +
5672 1) & (ME4000_AI_BUFFER_COUNT - 1);
5673 } else
5674 break;
5675 }
5676 ISR_PDEBUG("me4000_ai_isr():%d values read\n", i);
5677 } else {
5678 if (ai_context->sample_counter <=
5679 ME4000_AI_FIFO_COUNT / 2) {
5680 ISR_PDEBUG
5681 ("me4000_ai_isr():Interrupt from adjustable half full threshold\n");
5682
5683 /* Read status register to find out what happened */
5684 tmp = me4000_inl(ai_context->ctrl_reg);
5685
5686 if (!(tmp & ME4000_AI_STATUS_BIT_FF_DATA) &&
5687 !(tmp & ME4000_AI_STATUS_BIT_HF_DATA)
5688 && (tmp & ME4000_AI_STATUS_BIT_EF_DATA)) {
5689 ISR_PDEBUG
5690 ("me4000_ai_isr():Fifo full\n");
5691 c = ME4000_AI_FIFO_COUNT;
5692
5693 /* FIFO overflow, so stop conversion */
5694 spin_lock(&ai_context->int_lock);
5695 tmp = me4000_inl(ai_context->ctrl_reg);
5696 tmp |=
5697 ME4000_AI_CTRL_BIT_IMMEDIATE_STOP;
5698 outl(tmp, ai_context->ctrl_reg);
5699 spin_unlock(&ai_context->int_lock);
5700 } else if ((tmp & ME4000_AI_STATUS_BIT_FF_DATA)
5701 && !(tmp &
5702 ME4000_AI_STATUS_BIT_HF_DATA)
5703 && (tmp &
5704 ME4000_AI_STATUS_BIT_EF_DATA)) {
5705 ISR_PDEBUG
5706 ("me4000_ai_isr():Fifo half full\n");
5707 c = ME4000_AI_FIFO_COUNT / 2;
5708 } else {
5709 c = ai_context->sample_counter;
5710 ISR_PDEBUG
5711 ("me4000_ai_isr():Sample count values\n");
5712 }
5713
5714 ISR_PDEBUG
5715 ("me4000_ai_isr():Try to read %d values\n",
5716 c);
5717
5718 while (1) {
5719 c1 = me4000_space_to_end(ai_context->
5720 circ_buf,
5721 ME4000_AI_BUFFER_COUNT);
5722 ISR_PDEBUG
5723 ("me4000_ai_isr():Space to end = %d\n",
5724 c1);
5725 if (c1 > c)
5726 c1 = c;
5727
5728 if (c1 <= 0) {
5729 ISR_PDEBUG
5730 ("me4000_ai_isr():Work done or buffer full\n");
5731 break;
5732 }
5733
5734 insw(ai_context->data_reg,
5735 ai_context->circ_buf.buf +
5736 ai_context->circ_buf.head, c1);
5737 ai_context->circ_buf.head =
5738 (ai_context->circ_buf.head +
5739 c1) & (ME4000_AI_BUFFER_COUNT - 1);
5740 c -= c1;
5741 }
5742 } else {
5743 ISR_PDEBUG
5744 ("me4000_ai_isr():Multiple data block available\n");
5745
5746 /* Read status register to find out what happened */
5747 tmp = me4000_inl(ai_context->ctrl_reg);
5748
5749 if (!(tmp & ME4000_AI_STATUS_BIT_FF_DATA) &&
5750 !(tmp & ME4000_AI_STATUS_BIT_HF_DATA)
5751 && (tmp & ME4000_AI_STATUS_BIT_EF_DATA)) {
5752 ISR_PDEBUG
5753 ("me4000_ai_isr():Fifo full\n");
5754 c = ME4000_AI_FIFO_COUNT;
5755
5756 /* FIFO overflow, so stop conversion */
5757 spin_lock(&ai_context->int_lock);
5758 tmp = me4000_inl(ai_context->ctrl_reg);
5759 tmp |=
5760 ME4000_AI_CTRL_BIT_IMMEDIATE_STOP;
5761 outl(tmp, ai_context->ctrl_reg);
5762 spin_unlock(&ai_context->int_lock);
5763
5764 while (1) {
5765 c1 = me4000_space_to_end
5766 (ai_context->circ_buf,
5767 ME4000_AI_BUFFER_COUNT);
5768 ISR_PDEBUG
5769 ("me4000_ai_isr():Space to end = %d\n",
5770 c1);
5771 if (c1 > c)
5772 c1 = c;
5773
5774 if (c1 <= 0) {
5775 ISR_PDEBUG
5776 ("me4000_ai_isr():Work done or buffer full\n");
5777 break;
5778 }
5779
5780 insw(ai_context->data_reg,
5781 ai_context->circ_buf.buf +
5782 ai_context->circ_buf.head,
5783 c1);
5784 ai_context->circ_buf.head =
5785 (ai_context->circ_buf.head +
5786 c1) &
5787 (ME4000_AI_BUFFER_COUNT -
5788 1);
5789 c -= c1;
5790 }
5791 } else if ((tmp & ME4000_AI_STATUS_BIT_FF_DATA)
5792 && !(tmp &
5793 ME4000_AI_STATUS_BIT_HF_DATA)
5794 && (tmp &
5795 ME4000_AI_STATUS_BIT_EF_DATA)) {
5796 ISR_PDEBUG
5797 ("me4000_ai_isr():Fifo half full\n");
5798 c = ME4000_AI_FIFO_COUNT / 2;
5799
5800 while (1) {
5801 c1 = me4000_space_to_end
5802 (ai_context->circ_buf,
5803 ME4000_AI_BUFFER_COUNT);
5804 ISR_PDEBUG
5805 ("me4000_ai_isr():Space to end = %d\n",
5806 c1);
5807 if (c1 > c)
5808 c1 = c;
5809
5810 if (c1 <= 0) {
5811 ISR_PDEBUG
5812 ("me4000_ai_isr():Work done or buffer full\n");
5813 break;
5814 }
5815
5816 insw(ai_context->data_reg,
5817 ai_context->circ_buf.buf +
5818 ai_context->circ_buf.head,
5819 c1);
5820 ai_context->circ_buf.head =
5821 (ai_context->circ_buf.head +
5822 c1) &
5823 (ME4000_AI_BUFFER_COUNT -
5824 1);
5825 c -= c1;
5826 }
5827 } else {
5828 /* Poll data until fifo empty */
5829 for (i = 0;
5830 (i < ME4000_AI_FIFO_COUNT / 2)
5831 && (inl(ai_context->ctrl_reg) &
5832 ME4000_AI_STATUS_BIT_EF_DATA);
5833 i++) {
5834 if (me4000_space_to_end
5835 (ai_context->circ_buf,
5836 ME4000_AI_BUFFER_COUNT)) {
5837 *(ai_context->circ_buf.
5838 buf +
5839 ai_context->circ_buf.
5840 head) =
5841 inw(ai_context->data_reg);
5842 ai_context->circ_buf.
5843 head =
5844 (ai_context->
5845 circ_buf.head +
5846 1) &
5847 (ME4000_AI_BUFFER_COUNT
5848 - 1);
5849 } else
5850 break;
5851 }
5852 ISR_PDEBUG
5853 ("me4000_ai_isr():%d values read\n",
5854 i);
5855 }
5856 }
5857 }
5858
5859 /* Work is done, so reset the interrupt */
5860 ISR_PDEBUG
5861 ("me4000_ai_isr():reset interrupt from sample counter\n");
5862 spin_lock(&ai_context->int_lock);
5863 tmp = me4000_inl(ai_context->ctrl_reg);
5864 tmp |= ME4000_AI_CTRL_BIT_SC_IRQ_RESET;
5865 me4000_outl(tmp, ai_context->ctrl_reg);
5866 tmp &= ~ME4000_AI_CTRL_BIT_SC_IRQ_RESET;
5867 me4000_outl(tmp, ai_context->ctrl_reg);
5868 spin_unlock(&ai_context->int_lock);
5869 }
5870
5871 /* Values are now available, so wake up waiting process */
5872 if (me4000_buf_count(ai_context->circ_buf, ME4000_AI_BUFFER_COUNT)) {
5873 ISR_PDEBUG("me4000_ai_isr():Wake up waiting process\n");
5874 wake_up_interruptible(&(ai_context->wait_queue));
5875 }
5876
5877 /* If there is no space left in the buffer, disable interrupts */
5878 spin_lock(&ai_context->int_lock);
5879 if (!me4000_buf_space(ai_context->circ_buf, ME4000_AI_BUFFER_COUNT)) {
5880 ISR_PDEBUG
5881 ("me4000_ai_isr():Disable Interrupt because no space left in buffer\n");
5882 tmp = me4000_inl(ai_context->ctrl_reg);
5883 tmp &=
5884 ~(ME4000_AI_CTRL_BIT_SC_IRQ | ME4000_AI_CTRL_BIT_HF_IRQ |
5885 ME4000_AI_CTRL_BIT_LE_IRQ);
5886 me4000_outl(tmp, ai_context->ctrl_reg);
5887 }
5888 spin_unlock(&ai_context->int_lock);
5889
5890 #ifdef ME4000_ISR_DEBUG
5891 rdtscl(after);
5892 printk(KERN_ERR "ME4000:me4000_ai_isr():Time lapse = %lu\n",
5893 after - before);
5894 #endif
5895
5896 return IRQ_HANDLED;
5897 }
5898
5899 static irqreturn_t me4000_ext_int_isr(int irq, void *dev_id)
5900 {
5901 struct me4000_ext_int_context *ext_int_context;
5902 unsigned long tmp;
5903
5904 ISR_PDEBUG("me4000_ext_int_isr() is executed\n");
5905
5906 ext_int_context = dev_id;
5907
5908 /* Check if irq number is right */
5909 if (irq != ext_int_context->irq) {
5910 ISR_PDEBUG("me4000_ext_int_isr():incorrect interrupt num: %d\n",
5911 irq);
5912 return IRQ_NONE;
5913 }
5914
5915 if (me4000_inl(ext_int_context->irq_status_reg) &
5916 ME4000_IRQ_STATUS_BIT_EX) {
5917 ISR_PDEBUG("me4000_ext_int_isr():External interrupt occured\n");
5918 tmp = me4000_inl(ext_int_context->ctrl_reg);
5919 tmp |= ME4000_AI_CTRL_BIT_EX_IRQ_RESET;
5920 me4000_outl(tmp, ext_int_context->ctrl_reg);
5921 tmp &= ~ME4000_AI_CTRL_BIT_EX_IRQ_RESET;
5922 me4000_outl(tmp, ext_int_context->ctrl_reg);
5923
5924 ext_int_context->int_count++;
5925
5926 if (ext_int_context->fasync_ptr) {
5927 ISR_PDEBUG
5928 ("me2600_ext_int_isr():Send signal to process\n");
5929 kill_fasync(&ext_int_context->fasync_ptr, SIGIO,
5930 POLL_IN);
5931 }
5932 }
5933
5934 return IRQ_HANDLED;
5935 }
5936
5937 static void __exit me4000_module_exit(void)
5938 {
5939 struct me4000_info *board_info;
5940
5941 CALL_PDEBUG("cleanup_module() is executed\n");
5942
5943 unregister_chrdev(me4000_ext_int_major_driver_no, ME4000_EXT_INT_NAME);
5944
5945 unregister_chrdev(me4000_cnt_major_driver_no, ME4000_CNT_NAME);
5946
5947 unregister_chrdev(me4000_dio_major_driver_no, ME4000_DIO_NAME);
5948
5949 unregister_chrdev(me4000_ai_major_driver_no, ME4000_AI_NAME);
5950
5951 unregister_chrdev(me4000_ao_major_driver_no, ME4000_AO_NAME);
5952
5953 remove_proc_entry("me4000", NULL);
5954
5955 pci_unregister_driver(&me4000_driver);
5956
5957 /* Reset the boards */
5958 list_for_each_entry(board_info, &me4000_board_info_list, list) {
5959 me4000_reset_board(board_info);
5960 }
5961
5962 clear_board_info_list();
5963 }
5964
5965 module_exit(me4000_module_exit);
5966
5967 static int me4000_read_procmem(char *buf, char **start, off_t offset, int count,
5968 int *eof, void *data)
5969 {
5970 int len = 0;
5971 int limit = count - 1000;
5972 struct me4000_info *board_info;
5973
5974 len += sprintf(buf + len, "\nME4000 DRIVER VERSION %X.%X.%X\n\n",
5975 (ME4000_DRIVER_VERSION & 0xFF0000) >> 16,
5976 (ME4000_DRIVER_VERSION & 0xFF00) >> 8,
5977 (ME4000_DRIVER_VERSION & 0xFF));
5978
5979 /* Search for the board context */
5980 list_for_each_entry(board_info, &me4000_board_info_list, list) {
5981 len +=
5982 sprintf(buf + len, "Board number %d:\n",
5983 board_info->board_count);
5984 len += sprintf(buf + len, "---------------\n");
5985 len +=
5986 sprintf(buf + len, "PLX base register = 0x%lX\n",
5987 board_info->plx_regbase);
5988 len +=
5989 sprintf(buf + len, "PLX base register size = 0x%X\n",
5990 (unsigned int)board_info->plx_regbase_size);
5991 len +=
5992 sprintf(buf + len, "ME4000 base register = 0x%X\n",
5993 (unsigned int)board_info->me4000_regbase);
5994 len +=
5995 sprintf(buf + len, "ME4000 base register size = 0x%X\n",
5996 (unsigned int)board_info->me4000_regbase_size);
5997 len +=
5998 sprintf(buf + len, "Serial number = 0x%X\n",
5999 board_info->serial_no);
6000 len +=
6001 sprintf(buf + len, "Hardware revision = 0x%X\n",
6002 board_info->hw_revision);
6003 len +=
6004 sprintf(buf + len, "Vendor id = 0x%X\n",
6005 board_info->vendor_id);
6006 len +=
6007 sprintf(buf + len, "Device id = 0x%X\n",
6008 board_info->device_id);
6009 len +=
6010 sprintf(buf + len, "PCI bus number = %d\n",
6011 board_info->pci_bus_no);
6012 len +=
6013 sprintf(buf + len, "PCI device number = %d\n",
6014 board_info->pci_dev_no);
6015 len +=
6016 sprintf(buf + len, "PCI function number = %d\n",
6017 board_info->pci_func_no);
6018 len += sprintf(buf + len, "IRQ = %u\n", board_info->irq);
6019 len +=
6020 sprintf(buf + len,
6021 "Count of interrupts since module was loaded = %d\n",
6022 board_info->irq_count);
6023
6024 len +=
6025 sprintf(buf + len, "Count of analog outputs = %d\n",
6026 board_info->board_p->ao.count);
6027 len +=
6028 sprintf(buf + len, "Count of analog output fifos = %d\n",
6029 board_info->board_p->ao.fifo_count);
6030
6031 len +=
6032 sprintf(buf + len, "Count of analog inputs = %d\n",
6033 board_info->board_p->ai.count);
6034 len +=
6035 sprintf(buf + len,
6036 "Count of sample and hold devices for analog input = %d\n",
6037 board_info->board_p->ai.sh_count);
6038 len +=
6039 sprintf(buf + len,
6040 "Analog external trigger available for analog input = %d\n",
6041 board_info->board_p->ai.ex_trig_analog);
6042
6043 len +=
6044 sprintf(buf + len, "Count of digital ports = %d\n",
6045 board_info->board_p->dio.count);
6046
6047 len +=
6048 sprintf(buf + len, "Count of counter devices = %d\n",
6049 board_info->board_p->cnt.count);
6050 len +=
6051 sprintf(buf + len, "AI control register = 0x%08X\n",
6052 inl(board_info->me4000_regbase +
6053 ME4000_AI_CTRL_REG));
6054
6055 len += sprintf(buf + len, "AO 0 control register = 0x%08X\n",
6056 inl(board_info->me4000_regbase +
6057 ME4000_AO_00_CTRL_REG));
6058 len +=
6059 sprintf(buf + len, "AO 0 status register = 0x%08X\n",
6060 inl(board_info->me4000_regbase +
6061 ME4000_AO_00_STATUS_REG));
6062 len +=
6063 sprintf(buf + len, "AO 1 control register = 0x%08X\n",
6064 inl(board_info->me4000_regbase +
6065 ME4000_AO_01_CTRL_REG));
6066 len +=
6067 sprintf(buf + len, "AO 1 status register = 0x%08X\n",
6068 inl(board_info->me4000_regbase +
6069 ME4000_AO_01_STATUS_REG));
6070 len +=
6071 sprintf(buf + len, "AO 2 control register = 0x%08X\n",
6072 inl(board_info->me4000_regbase +
6073 ME4000_AO_02_CTRL_REG));
6074 len +=
6075 sprintf(buf + len, "AO 2 status register = 0x%08X\n",
6076 inl(board_info->me4000_regbase +
6077 ME4000_AO_02_STATUS_REG));
6078 len +=
6079 sprintf(buf + len, "AO 3 control register = 0x%08X\n",
6080 inl(board_info->me4000_regbase +
6081 ME4000_AO_03_CTRL_REG));
6082 len +=
6083 sprintf(buf + len, "AO 3 status register = 0x%08X\n",
6084 inl(board_info->me4000_regbase +
6085 ME4000_AO_03_STATUS_REG));
6086 if (len >= limit)
6087 break;
6088 }
6089
6090 *eof = 1;
6091 return len;
6092 }
Support for the Chinese Samsung S3C2440 based development boards