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920T: Use specific 920t mtune=
[linux-2.6/mini2440.git] / drivers / char / mxser.c
blob13f8871e5b2177bb844018f6543ca2e690e973b6
1 /*
2 * mxser.c -- MOXA Smartio/Industio family multiport serial driver.
3 *
4 * Copyright (C) 1999-2006 Moxa Technologies (support@moxa.com).
5 * Copyright (C) 2006-2008 Jiri Slaby <jirislaby@gmail.com>
6 *
7 * This code is loosely based on the 1.8 moxa driver which is based on
8 * Linux serial driver, written by Linus Torvalds, Theodore T'so and
9 * others.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox
17 * <alan@lxorguk.ukuu.org.uk>. The original 1.8 code is available on
18 * www.moxa.com.
19 * - Fixed x86_64 cleanness
20 */
21
22 #include <linux/module.h>
23 #include <linux/errno.h>
24 #include <linux/signal.h>
25 #include <linux/sched.h>
26 #include <linux/timer.h>
27 #include <linux/interrupt.h>
28 #include <linux/tty.h>
29 #include <linux/tty_flip.h>
30 #include <linux/serial.h>
31 #include <linux/serial_reg.h>
32 #include <linux/major.h>
33 #include <linux/string.h>
34 #include <linux/fcntl.h>
35 #include <linux/ptrace.h>
36 #include <linux/gfp.h>
37 #include <linux/ioport.h>
38 #include <linux/mm.h>
39 #include <linux/delay.h>
40 #include <linux/pci.h>
41 #include <linux/bitops.h>
42
43 #include <asm/system.h>
44 #include <asm/io.h>
45 #include <asm/irq.h>
46 #include <asm/uaccess.h>
47
48 #include "mxser.h"
49
50 #define MXSER_VERSION "2.0.4" /* 1.12 */
51 #define MXSERMAJOR 174
52
53 #define MXSER_BOARDS 4 /* Max. boards */
54 #define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */
55 #define MXSER_PORTS (MXSER_BOARDS * MXSER_PORTS_PER_BOARD)
56 #define MXSER_ISR_PASS_LIMIT 100
57
58 /*CheckIsMoxaMust return value*/
59 #define MOXA_OTHER_UART 0x00
60 #define MOXA_MUST_MU150_HWID 0x01
61 #define MOXA_MUST_MU860_HWID 0x02
62
63 #define WAKEUP_CHARS 256
64
65 #define UART_MCR_AFE 0x20
66 #define UART_LSR_SPECIAL 0x1E
67
68 #define PCI_DEVICE_ID_POS104UL 0x1044
69 #define PCI_DEVICE_ID_CB108 0x1080
70 #define PCI_DEVICE_ID_CP102UF 0x1023
71 #define PCI_DEVICE_ID_CB114 0x1142
72 #define PCI_DEVICE_ID_CP114UL 0x1143
73 #define PCI_DEVICE_ID_CB134I 0x1341
74 #define PCI_DEVICE_ID_CP138U 0x1380
75
76
77 #define C168_ASIC_ID 1
78 #define C104_ASIC_ID 2
79 #define C102_ASIC_ID 0xB
80 #define CI132_ASIC_ID 4
81 #define CI134_ASIC_ID 3
82 #define CI104J_ASIC_ID 5
83
84 #define MXSER_HIGHBAUD 1
85 #define MXSER_HAS2 2
86
87 /* This is only for PCI */
88 static const struct {
89 int type;
90 int tx_fifo;
91 int rx_fifo;
92 int xmit_fifo_size;
93 int rx_high_water;
94 int rx_trigger;
95 int rx_low_water;
96 long max_baud;
97 } Gpci_uart_info[] = {
98 {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L},
99 {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L},
100 {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L}
101 };
102 #define UART_INFO_NUM ARRAY_SIZE(Gpci_uart_info)
103
104 struct mxser_cardinfo {
105 char *name;
106 unsigned int nports;
107 unsigned int flags;
108 };
109
110 static const struct mxser_cardinfo mxser_cards[] = {
111 /* 0*/ { "C168 series", 8, },
112 { "C104 series", 4, },
113 { "CI-104J series", 4, },
114 { "C168H/PCI series", 8, },
115 { "C104H/PCI series", 4, },
116 /* 5*/ { "C102 series", 4, MXSER_HAS2 }, /* C102-ISA */
117 { "CI-132 series", 4, MXSER_HAS2 },
118 { "CI-134 series", 4, },
119 { "CP-132 series", 2, },
120 { "CP-114 series", 4, },
121 /*10*/ { "CT-114 series", 4, },
122 { "CP-102 series", 2, MXSER_HIGHBAUD },
123 { "CP-104U series", 4, },
124 { "CP-168U series", 8, },
125 { "CP-132U series", 2, },
126 /*15*/ { "CP-134U series", 4, },
127 { "CP-104JU series", 4, },
128 { "Moxa UC7000 Serial", 8, }, /* RC7000 */
129 { "CP-118U series", 8, },
130 { "CP-102UL series", 2, },
131 /*20*/ { "CP-102U series", 2, },
132 { "CP-118EL series", 8, },
133 { "CP-168EL series", 8, },
134 { "CP-104EL series", 4, },
135 { "CB-108 series", 8, },
136 /*25*/ { "CB-114 series", 4, },
137 { "CB-134I series", 4, },
138 { "CP-138U series", 8, },
139 { "POS-104UL series", 4, },
140 { "CP-114UL series", 4, },
141 /*30*/ { "CP-102UF series", 2, }
142 };
143
144 /* driver_data correspond to the lines in the structure above
145 see also ISA probe function before you change something */
146 static struct pci_device_id mxser_pcibrds[] = {
147 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C168), .driver_data = 3 },
148 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C104), .driver_data = 4 },
149 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132), .driver_data = 8 },
150 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP114), .driver_data = 9 },
151 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CT114), .driver_data = 10 },
152 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102), .driver_data = 11 },
153 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104U), .driver_data = 12 },
154 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168U), .driver_data = 13 },
155 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132U), .driver_data = 14 },
156 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP134U), .driver_data = 15 },
157 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104JU),.driver_data = 16 },
158 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_RC7000), .driver_data = 17 },
159 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118U), .driver_data = 18 },
160 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102UL),.driver_data = 19 },
161 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102U), .driver_data = 20 },
162 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118EL),.driver_data = 21 },
163 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168EL),.driver_data = 22 },
164 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104EL),.driver_data = 23 },
165 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB108), .driver_data = 24 },
166 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB114), .driver_data = 25 },
167 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB134I), .driver_data = 26 },
168 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP138U), .driver_data = 27 },
169 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_POS104UL), .driver_data = 28 },
170 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP114UL), .driver_data = 29 },
171 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP102UF), .driver_data = 30 },
172 { }
173 };
174 MODULE_DEVICE_TABLE(pci, mxser_pcibrds);
175
176 static unsigned long ioaddr[MXSER_BOARDS];
177 static int ttymajor = MXSERMAJOR;
178
179 /* Variables for insmod */
180
181 MODULE_AUTHOR("Casper Yang");
182 MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver");
183 module_param_array(ioaddr, ulong, NULL, 0);
184 MODULE_PARM_DESC(ioaddr, "ISA io addresses to look for a moxa board");
185 module_param(ttymajor, int, 0);
186 MODULE_LICENSE("GPL");
187
188 struct mxser_log {
189 int tick;
190 unsigned long rxcnt[MXSER_PORTS];
191 unsigned long txcnt[MXSER_PORTS];
192 };
193
194 struct mxser_mon {
195 unsigned long rxcnt;
196 unsigned long txcnt;
197 unsigned long up_rxcnt;
198 unsigned long up_txcnt;
199 int modem_status;
200 unsigned char hold_reason;
201 };
202
203 struct mxser_mon_ext {
204 unsigned long rx_cnt[32];
205 unsigned long tx_cnt[32];
206 unsigned long up_rxcnt[32];
207 unsigned long up_txcnt[32];
208 int modem_status[32];
209
210 long baudrate[32];
211 int databits[32];
212 int stopbits[32];
213 int parity[32];
214 int flowctrl[32];
215 int fifo[32];
216 int iftype[32];
217 };
218
219 struct mxser_board;
220
221 struct mxser_port {
222 struct tty_port port;
223 struct mxser_board *board;
224
225 unsigned long ioaddr;
226 unsigned long opmode_ioaddr;
227 int max_baud;
228
229 int rx_high_water;
230 int rx_trigger; /* Rx fifo trigger level */
231 int rx_low_water;
232 int baud_base; /* max. speed */
233 int type; /* UART type */
234
235 int x_char; /* xon/xoff character */
236 int IER; /* Interrupt Enable Register */
237 int MCR; /* Modem control register */
238
239 unsigned char stop_rx;
240 unsigned char ldisc_stop_rx;
241
242 int custom_divisor;
243 unsigned char err_shadow;
244
245 struct async_icount icount; /* kernel counters for 4 input interrupts */
246 int timeout;
247
248 int read_status_mask;
249 int ignore_status_mask;
250 int xmit_fifo_size;
251 int xmit_head;
252 int xmit_tail;
253 int xmit_cnt;
254
255 struct ktermios normal_termios;
256
257 struct mxser_mon mon_data;
258
259 spinlock_t slock;
260 wait_queue_head_t delta_msr_wait;
261 };
262
263 struct mxser_board {
264 unsigned int idx;
265 int irq;
266 const struct mxser_cardinfo *info;
267 unsigned long vector;
268 unsigned long vector_mask;
269
270 int chip_flag;
271 int uart_type;
272
273 struct mxser_port ports[MXSER_PORTS_PER_BOARD];
274 };
275
276 struct mxser_mstatus {
277 tcflag_t cflag;
278 int cts;
279 int dsr;
280 int ri;
281 int dcd;
282 };
283
284 static struct mxser_board mxser_boards[MXSER_BOARDS];
285 static struct tty_driver *mxvar_sdriver;
286 static struct mxser_log mxvar_log;
287 static int mxser_set_baud_method[MXSER_PORTS + 1];
288
289 static void mxser_enable_must_enchance_mode(unsigned long baseio)
290 {
291 u8 oldlcr;
292 u8 efr;
293
294 oldlcr = inb(baseio + UART_LCR);
295 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
296
297 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
298 efr |= MOXA_MUST_EFR_EFRB_ENABLE;
299
300 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
301 outb(oldlcr, baseio + UART_LCR);
302 }
303
304 static void mxser_disable_must_enchance_mode(unsigned long baseio)
305 {
306 u8 oldlcr;
307 u8 efr;
308
309 oldlcr = inb(baseio + UART_LCR);
310 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
311
312 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
313 efr &= ~MOXA_MUST_EFR_EFRB_ENABLE;
314
315 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
316 outb(oldlcr, baseio + UART_LCR);
317 }
318
319 static void mxser_set_must_xon1_value(unsigned long baseio, u8 value)
320 {
321 u8 oldlcr;
322 u8 efr;
323
324 oldlcr = inb(baseio + UART_LCR);
325 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
326
327 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
328 efr &= ~MOXA_MUST_EFR_BANK_MASK;
329 efr |= MOXA_MUST_EFR_BANK0;
330
331 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
332 outb(value, baseio + MOXA_MUST_XON1_REGISTER);
333 outb(oldlcr, baseio + UART_LCR);
334 }
335
336 static void mxser_set_must_xoff1_value(unsigned long baseio, u8 value)
337 {
338 u8 oldlcr;
339 u8 efr;
340
341 oldlcr = inb(baseio + UART_LCR);
342 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
343
344 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
345 efr &= ~MOXA_MUST_EFR_BANK_MASK;
346 efr |= MOXA_MUST_EFR_BANK0;
347
348 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
349 outb(value, baseio + MOXA_MUST_XOFF1_REGISTER);
350 outb(oldlcr, baseio + UART_LCR);
351 }
352
353 static void mxser_set_must_fifo_value(struct mxser_port *info)
354 {
355 u8 oldlcr;
356 u8 efr;
357
358 oldlcr = inb(info->ioaddr + UART_LCR);
359 outb(MOXA_MUST_ENTER_ENCHANCE, info->ioaddr + UART_LCR);
360
361 efr = inb(info->ioaddr + MOXA_MUST_EFR_REGISTER);
362 efr &= ~MOXA_MUST_EFR_BANK_MASK;
363 efr |= MOXA_MUST_EFR_BANK1;
364
365 outb(efr, info->ioaddr + MOXA_MUST_EFR_REGISTER);
366 outb((u8)info->rx_high_water, info->ioaddr + MOXA_MUST_RBRTH_REGISTER);
367 outb((u8)info->rx_trigger, info->ioaddr + MOXA_MUST_RBRTI_REGISTER);
368 outb((u8)info->rx_low_water, info->ioaddr + MOXA_MUST_RBRTL_REGISTER);
369 outb(oldlcr, info->ioaddr + UART_LCR);
370 }
371
372 static void mxser_set_must_enum_value(unsigned long baseio, u8 value)
373 {
374 u8 oldlcr;
375 u8 efr;
376
377 oldlcr = inb(baseio + UART_LCR);
378 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
379
380 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
381 efr &= ~MOXA_MUST_EFR_BANK_MASK;
382 efr |= MOXA_MUST_EFR_BANK2;
383
384 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
385 outb(value, baseio + MOXA_MUST_ENUM_REGISTER);
386 outb(oldlcr, baseio + UART_LCR);
387 }
388
389 static void mxser_get_must_hardware_id(unsigned long baseio, u8 *pId)
390 {
391 u8 oldlcr;
392 u8 efr;
393
394 oldlcr = inb(baseio + UART_LCR);
395 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
396
397 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
398 efr &= ~MOXA_MUST_EFR_BANK_MASK;
399 efr |= MOXA_MUST_EFR_BANK2;
400
401 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
402 *pId = inb(baseio + MOXA_MUST_HWID_REGISTER);
403 outb(oldlcr, baseio + UART_LCR);
404 }
405
406 static void SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(unsigned long baseio)
407 {
408 u8 oldlcr;
409 u8 efr;
410
411 oldlcr = inb(baseio + UART_LCR);
412 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
413
414 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
415 efr &= ~MOXA_MUST_EFR_SF_MASK;
416
417 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
418 outb(oldlcr, baseio + UART_LCR);
419 }
420
421 static void mxser_enable_must_tx_software_flow_control(unsigned long baseio)
422 {
423 u8 oldlcr;
424 u8 efr;
425
426 oldlcr = inb(baseio + UART_LCR);
427 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
428
429 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
430 efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
431 efr |= MOXA_MUST_EFR_SF_TX1;
432
433 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
434 outb(oldlcr, baseio + UART_LCR);
435 }
436
437 static void mxser_disable_must_tx_software_flow_control(unsigned long baseio)
438 {
439 u8 oldlcr;
440 u8 efr;
441
442 oldlcr = inb(baseio + UART_LCR);
443 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
444
445 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
446 efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
447
448 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
449 outb(oldlcr, baseio + UART_LCR);
450 }
451
452 static void mxser_enable_must_rx_software_flow_control(unsigned long baseio)
453 {
454 u8 oldlcr;
455 u8 efr;
456
457 oldlcr = inb(baseio + UART_LCR);
458 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
459
460 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
461 efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
462 efr |= MOXA_MUST_EFR_SF_RX1;
463
464 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
465 outb(oldlcr, baseio + UART_LCR);
466 }
467
468 static void mxser_disable_must_rx_software_flow_control(unsigned long baseio)
469 {
470 u8 oldlcr;
471 u8 efr;
472
473 oldlcr = inb(baseio + UART_LCR);
474 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
475
476 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
477 efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
478
479 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
480 outb(oldlcr, baseio + UART_LCR);
481 }
482
483 #ifdef CONFIG_PCI
484 static int __devinit CheckIsMoxaMust(unsigned long io)
485 {
486 u8 oldmcr, hwid;
487 int i;
488
489 outb(0, io + UART_LCR);
490 mxser_disable_must_enchance_mode(io);
491 oldmcr = inb(io + UART_MCR);
492 outb(0, io + UART_MCR);
493 mxser_set_must_xon1_value(io, 0x11);
494 if ((hwid = inb(io + UART_MCR)) != 0) {
495 outb(oldmcr, io + UART_MCR);
496 return MOXA_OTHER_UART;
497 }
498
499 mxser_get_must_hardware_id(io, &hwid);
500 for (i = 1; i < UART_INFO_NUM; i++) { /* 0 = OTHER_UART */
501 if (hwid == Gpci_uart_info[i].type)
502 return (int)hwid;
503 }
504 return MOXA_OTHER_UART;
505 }
506 #endif
507
508 static void process_txrx_fifo(struct mxser_port *info)
509 {
510 int i;
511
512 if ((info->type == PORT_16450) || (info->type == PORT_8250)) {
513 info->rx_trigger = 1;
514 info->rx_high_water = 1;
515 info->rx_low_water = 1;
516 info->xmit_fifo_size = 1;
517 } else
518 for (i = 0; i < UART_INFO_NUM; i++)
519 if (info->board->chip_flag == Gpci_uart_info[i].type) {
520 info->rx_trigger = Gpci_uart_info[i].rx_trigger;
521 info->rx_low_water = Gpci_uart_info[i].rx_low_water;
522 info->rx_high_water = Gpci_uart_info[i].rx_high_water;
523 info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size;
524 break;
525 }
526 }
527
528 static unsigned char mxser_get_msr(int baseaddr, int mode, int port)
529 {
530 static unsigned char mxser_msr[MXSER_PORTS + 1];
531 unsigned char status = 0;
532
533 status = inb(baseaddr + UART_MSR);
534
535 mxser_msr[port] &= 0x0F;
536 mxser_msr[port] |= status;
537 status = mxser_msr[port];
538 if (mode)
539 mxser_msr[port] = 0;
540
541 return status;
542 }
543
544 static int mxser_carrier_raised(struct tty_port *port)
545 {
546 struct mxser_port *mp = container_of(port, struct mxser_port, port);
547 return (inb(mp->ioaddr + UART_MSR) & UART_MSR_DCD)?1:0;
548 }
549
550 static void mxser_raise_dtr_rts(struct tty_port *port)
551 {
552 struct mxser_port *mp = container_of(port, struct mxser_port, port);
553 unsigned long flags;
554
555 spin_lock_irqsave(&mp->slock, flags);
556 outb(inb(mp->ioaddr + UART_MCR) |
557 UART_MCR_DTR | UART_MCR_RTS, mp->ioaddr + UART_MCR);
558 spin_unlock_irqrestore(&mp->slock, flags);
559 }
560
561 static int mxser_set_baud(struct tty_struct *tty, long newspd)
562 {
563 struct mxser_port *info = tty->driver_data;
564 int quot = 0, baud;
565 unsigned char cval;
566
567 if (!info->ioaddr)
568 return -1;
569
570 if (newspd > info->max_baud)
571 return -1;
572
573 if (newspd == 134) {
574 quot = 2 * info->baud_base / 269;
575 tty_encode_baud_rate(tty, 134, 134);
576 } else if (newspd) {
577 quot = info->baud_base / newspd;
578 if (quot == 0)
579 quot = 1;
580 baud = info->baud_base/quot;
581 tty_encode_baud_rate(tty, baud, baud);
582 } else {
583 quot = 0;
584 }
585
586 info->timeout = ((info->xmit_fifo_size * HZ * 10 * quot) / info->baud_base);
587 info->timeout += HZ / 50; /* Add .02 seconds of slop */
588
589 if (quot) {
590 info->MCR |= UART_MCR_DTR;
591 outb(info->MCR, info->ioaddr + UART_MCR);
592 } else {
593 info->MCR &= ~UART_MCR_DTR;
594 outb(info->MCR, info->ioaddr + UART_MCR);
595 return 0;
596 }
597
598 cval = inb(info->ioaddr + UART_LCR);
599
600 outb(cval | UART_LCR_DLAB, info->ioaddr + UART_LCR); /* set DLAB */
601
602 outb(quot & 0xff, info->ioaddr + UART_DLL); /* LS of divisor */
603 outb(quot >> 8, info->ioaddr + UART_DLM); /* MS of divisor */
604 outb(cval, info->ioaddr + UART_LCR); /* reset DLAB */
605
606 #ifdef BOTHER
607 if (C_BAUD(tty) == BOTHER) {
608 quot = info->baud_base % newspd;
609 quot *= 8;
610 if (quot % newspd > newspd / 2) {
611 quot /= newspd;
612 quot++;
613 } else
614 quot /= newspd;
615
616 mxser_set_must_enum_value(info->ioaddr, quot);
617 } else
618 #endif
619 mxser_set_must_enum_value(info->ioaddr, 0);
620
621 return 0;
622 }
623
624 /*
625 * This routine is called to set the UART divisor registers to match
626 * the specified baud rate for a serial port.
627 */
628 static int mxser_change_speed(struct tty_struct *tty,
629 struct ktermios *old_termios)
630 {
631 struct mxser_port *info = tty->driver_data;
632 unsigned cflag, cval, fcr;
633 int ret = 0;
634 unsigned char status;
635
636 cflag = tty->termios->c_cflag;
637 if (!info->ioaddr)
638 return ret;
639
640 if (mxser_set_baud_method[tty->index] == 0)
641 mxser_set_baud(tty, tty_get_baud_rate(tty));
642
643 /* byte size and parity */
644 switch (cflag & CSIZE) {
645 case CS5:
646 cval = 0x00;
647 break;
648 case CS6:
649 cval = 0x01;
650 break;
651 case CS7:
652 cval = 0x02;
653 break;
654 case CS8:
655 cval = 0x03;
656 break;
657 default:
658 cval = 0x00;
659 break; /* too keep GCC shut... */
660 }
661 if (cflag & CSTOPB)
662 cval |= 0x04;
663 if (cflag & PARENB)
664 cval |= UART_LCR_PARITY;
665 if (!(cflag & PARODD))
666 cval |= UART_LCR_EPAR;
667 if (cflag & CMSPAR)
668 cval |= UART_LCR_SPAR;
669
670 if ((info->type == PORT_8250) || (info->type == PORT_16450)) {
671 if (info->board->chip_flag) {
672 fcr = UART_FCR_ENABLE_FIFO;
673 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
674 mxser_set_must_fifo_value(info);
675 } else
676 fcr = 0;
677 } else {
678 fcr = UART_FCR_ENABLE_FIFO;
679 if (info->board->chip_flag) {
680 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
681 mxser_set_must_fifo_value(info);
682 } else {
683 switch (info->rx_trigger) {
684 case 1:
685 fcr |= UART_FCR_TRIGGER_1;
686 break;
687 case 4:
688 fcr |= UART_FCR_TRIGGER_4;
689 break;
690 case 8:
691 fcr |= UART_FCR_TRIGGER_8;
692 break;
693 default:
694 fcr |= UART_FCR_TRIGGER_14;
695 break;
696 }
697 }
698 }
699
700 /* CTS flow control flag and modem status interrupts */
701 info->IER &= ~UART_IER_MSI;
702 info->MCR &= ~UART_MCR_AFE;
703 if (cflag & CRTSCTS) {
704 info->port.flags |= ASYNC_CTS_FLOW;
705 info->IER |= UART_IER_MSI;
706 if ((info->type == PORT_16550A) || (info->board->chip_flag)) {
707 info->MCR |= UART_MCR_AFE;
708 } else {
709 status = inb(info->ioaddr + UART_MSR);
710 if (tty->hw_stopped) {
711 if (status & UART_MSR_CTS) {
712 tty->hw_stopped = 0;
713 if (info->type != PORT_16550A &&
714 !info->board->chip_flag) {
715 outb(info->IER & ~UART_IER_THRI,
716 info->ioaddr +
717 UART_IER);
718 info->IER |= UART_IER_THRI;
719 outb(info->IER, info->ioaddr +
720 UART_IER);
721 }
722 tty_wakeup(tty);
723 }
724 } else {
725 if (!(status & UART_MSR_CTS)) {
726 tty->hw_stopped = 1;
727 if ((info->type != PORT_16550A) &&
728 (!info->board->chip_flag)) {
729 info->IER &= ~UART_IER_THRI;
730 outb(info->IER, info->ioaddr +
731 UART_IER);
732 }
733 }
734 }
735 }
736 } else {
737 info->port.flags &= ~ASYNC_CTS_FLOW;
738 }
739 outb(info->MCR, info->ioaddr + UART_MCR);
740 if (cflag & CLOCAL) {
741 info->port.flags &= ~ASYNC_CHECK_CD;
742 } else {
743 info->port.flags |= ASYNC_CHECK_CD;
744 info->IER |= UART_IER_MSI;
745 }
746 outb(info->IER, info->ioaddr + UART_IER);
747
748 /*
749 * Set up parity check flag
750 */
751 info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
752 if (I_INPCK(tty))
753 info->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
754 if (I_BRKINT(tty) || I_PARMRK(tty))
755 info->read_status_mask |= UART_LSR_BI;
756
757 info->ignore_status_mask = 0;
758
759 if (I_IGNBRK(tty)) {
760 info->ignore_status_mask |= UART_LSR_BI;
761 info->read_status_mask |= UART_LSR_BI;
762 /*
763 * If we're ignore parity and break indicators, ignore
764 * overruns too. (For real raw support).
765 */
766 if (I_IGNPAR(tty)) {
767 info->ignore_status_mask |=
768 UART_LSR_OE |
769 UART_LSR_PE |
770 UART_LSR_FE;
771 info->read_status_mask |=
772 UART_LSR_OE |
773 UART_LSR_PE |
774 UART_LSR_FE;
775 }
776 }
777 if (info->board->chip_flag) {
778 mxser_set_must_xon1_value(info->ioaddr, START_CHAR(tty));
779 mxser_set_must_xoff1_value(info->ioaddr, STOP_CHAR(tty));
780 if (I_IXON(tty)) {
781 mxser_enable_must_rx_software_flow_control(
782 info->ioaddr);
783 } else {
784 mxser_disable_must_rx_software_flow_control(
785 info->ioaddr);
786 }
787 if (I_IXOFF(tty)) {
788 mxser_enable_must_tx_software_flow_control(
789 info->ioaddr);
790 } else {
791 mxser_disable_must_tx_software_flow_control(
792 info->ioaddr);
793 }
794 }
795
796
797 outb(fcr, info->ioaddr + UART_FCR); /* set fcr */
798 outb(cval, info->ioaddr + UART_LCR);
799
800 return ret;
801 }
802
803 static void mxser_check_modem_status(struct tty_struct *tty,
804 struct mxser_port *port, int status)
805 {
806 /* update input line counters */
807 if (status & UART_MSR_TERI)
808 port->icount.rng++;
809 if (status & UART_MSR_DDSR)
810 port->icount.dsr++;
811 if (status & UART_MSR_DDCD)
812 port->icount.dcd++;
813 if (status & UART_MSR_DCTS)
814 port->icount.cts++;
815 port->mon_data.modem_status = status;
816 wake_up_interruptible(&port->delta_msr_wait);
817
818 if ((port->port.flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
819 if (status & UART_MSR_DCD)
820 wake_up_interruptible(&port->port.open_wait);
821 }
822
823 if (port->port.flags & ASYNC_CTS_FLOW) {
824 if (tty->hw_stopped) {
825 if (status & UART_MSR_CTS) {
826 tty->hw_stopped = 0;
827
828 if ((port->type != PORT_16550A) &&
829 (!port->board->chip_flag)) {
830 outb(port->IER & ~UART_IER_THRI,
831 port->ioaddr + UART_IER);
832 port->IER |= UART_IER_THRI;
833 outb(port->IER, port->ioaddr +
834 UART_IER);
835 }
836 tty_wakeup(tty);
837 }
838 } else {
839 if (!(status & UART_MSR_CTS)) {
840 tty->hw_stopped = 1;
841 if (port->type != PORT_16550A &&
842 !port->board->chip_flag) {
843 port->IER &= ~UART_IER_THRI;
844 outb(port->IER, port->ioaddr +
845 UART_IER);
846 }
847 }
848 }
849 }
850 }
851
852 static int mxser_startup(struct tty_struct *tty)
853 {
854 struct mxser_port *info = tty->driver_data;
855 unsigned long page;
856 unsigned long flags;
857
858 page = __get_free_page(GFP_KERNEL);
859 if (!page)
860 return -ENOMEM;
861
862 spin_lock_irqsave(&info->slock, flags);
863
864 if (info->port.flags & ASYNC_INITIALIZED) {
865 free_page(page);
866 spin_unlock_irqrestore(&info->slock, flags);
867 return 0;
868 }
869
870 if (!info->ioaddr || !info->type) {
871 set_bit(TTY_IO_ERROR, &tty->flags);
872 free_page(page);
873 spin_unlock_irqrestore(&info->slock, flags);
874 return 0;
875 }
876 if (info->port.xmit_buf)
877 free_page(page);
878 else
879 info->port.xmit_buf = (unsigned char *) page;
880
881 /*
882 * Clear the FIFO buffers and disable them
883 * (they will be reenabled in mxser_change_speed())
884 */
885 if (info->board->chip_flag)
886 outb((UART_FCR_CLEAR_RCVR |
887 UART_FCR_CLEAR_XMIT |
888 MOXA_MUST_FCR_GDA_MODE_ENABLE), info->ioaddr + UART_FCR);
889 else
890 outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
891 info->ioaddr + UART_FCR);
892
893 /*
894 * At this point there's no way the LSR could still be 0xFF;
895 * if it is, then bail out, because there's likely no UART
896 * here.
897 */
898 if (inb(info->ioaddr + UART_LSR) == 0xff) {
899 spin_unlock_irqrestore(&info->slock, flags);
900 if (capable(CAP_SYS_ADMIN)) {
901 if (tty)
902 set_bit(TTY_IO_ERROR, &tty->flags);
903 return 0;
904 } else
905 return -ENODEV;
906 }
907
908 /*
909 * Clear the interrupt registers.
910 */
911 (void) inb(info->ioaddr + UART_LSR);
912 (void) inb(info->ioaddr + UART_RX);
913 (void) inb(info->ioaddr + UART_IIR);
914 (void) inb(info->ioaddr + UART_MSR);
915
916 /*
917 * Now, initialize the UART
918 */
919 outb(UART_LCR_WLEN8, info->ioaddr + UART_LCR); /* reset DLAB */
920 info->MCR = UART_MCR_DTR | UART_MCR_RTS;
921 outb(info->MCR, info->ioaddr + UART_MCR);
922
923 /*
924 * Finally, enable interrupts
925 */
926 info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
927
928 if (info->board->chip_flag)
929 info->IER |= MOXA_MUST_IER_EGDAI;
930 outb(info->IER, info->ioaddr + UART_IER); /* enable interrupts */
931
932 /*
933 * And clear the interrupt registers again for luck.
934 */
935 (void) inb(info->ioaddr + UART_LSR);
936 (void) inb(info->ioaddr + UART_RX);
937 (void) inb(info->ioaddr + UART_IIR);
938 (void) inb(info->ioaddr + UART_MSR);
939
940 clear_bit(TTY_IO_ERROR, &tty->flags);
941 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
942
943 /*
944 * and set the speed of the serial port
945 */
946 mxser_change_speed(tty, NULL);
947 info->port.flags |= ASYNC_INITIALIZED;
948 spin_unlock_irqrestore(&info->slock, flags);
949
950 return 0;
951 }
952
953 /*
954 * This routine will shutdown a serial port; interrupts maybe disabled, and
955 * DTR is dropped if the hangup on close termio flag is on.
956 */
957 static void mxser_shutdown(struct tty_struct *tty)
958 {
959 struct mxser_port *info = tty->driver_data;
960 unsigned long flags;
961
962 if (!(info->port.flags & ASYNC_INITIALIZED))
963 return;
964
965 spin_lock_irqsave(&info->slock, flags);
966
967 /*
968 * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
969 * here so the queue might never be waken up
970 */
971 wake_up_interruptible(&info->delta_msr_wait);
972
973 /*
974 * Free the IRQ, if necessary
975 */
976 if (info->port.xmit_buf) {
977 free_page((unsigned long) info->port.xmit_buf);
978 info->port.xmit_buf = NULL;
979 }
980
981 info->IER = 0;
982 outb(0x00, info->ioaddr + UART_IER);
983
984 if (tty->termios->c_cflag & HUPCL)
985 info->MCR &= ~(UART_MCR_DTR | UART_MCR_RTS);
986 outb(info->MCR, info->ioaddr + UART_MCR);
987
988 /* clear Rx/Tx FIFO's */
989 if (info->board->chip_flag)
990 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT |
991 MOXA_MUST_FCR_GDA_MODE_ENABLE,
992 info->ioaddr + UART_FCR);
993 else
994 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT,
995 info->ioaddr + UART_FCR);
996
997 /* read data port to reset things */
998 (void) inb(info->ioaddr + UART_RX);
999
1000 set_bit(TTY_IO_ERROR, &tty->flags);
1001
1002 info->port.flags &= ~ASYNC_INITIALIZED;
1003
1004 if (info->board->chip_flag)
1005 SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->ioaddr);
1006
1007 spin_unlock_irqrestore(&info->slock, flags);
1008 }
1009
1010 /*
1011 * This routine is called whenever a serial port is opened. It
1012 * enables interrupts for a serial port, linking in its async structure into
1013 * the IRQ chain. It also performs the serial-specific
1014 * initialization for the tty structure.
1015 */
1016 static int mxser_open(struct tty_struct *tty, struct file *filp)
1017 {
1018 struct mxser_port *info;
1019 unsigned long flags;
1020 int retval, line;
1021
1022 line = tty->index;
1023 if (line == MXSER_PORTS)
1024 return 0;
1025 if (line < 0 || line > MXSER_PORTS)
1026 return -ENODEV;
1027 info = &mxser_boards[line / MXSER_PORTS_PER_BOARD].ports[line % MXSER_PORTS_PER_BOARD];
1028 if (!info->ioaddr)
1029 return -ENODEV;
1030
1031 tty->driver_data = info;
1032 tty_port_tty_set(&info->port, tty);
1033 /*
1034 * Start up serial port
1035 */
1036 spin_lock_irqsave(&info->port.lock, flags);
1037 info->port.count++;
1038 spin_unlock_irqrestore(&info->port.lock, flags);
1039 retval = mxser_startup(tty);
1040 if (retval)
1041 return retval;
1042
1043 retval = tty_port_block_til_ready(&info->port, tty, filp);
1044 if (retval)
1045 return retval;
1046
1047 /* unmark here for very high baud rate (ex. 921600 bps) used */
1048 tty->low_latency = 1;
1049 return 0;
1050 }
1051
1052 static void mxser_flush_buffer(struct tty_struct *tty)
1053 {
1054 struct mxser_port *info = tty->driver_data;
1055 char fcr;
1056 unsigned long flags;
1057
1058
1059 spin_lock_irqsave(&info->slock, flags);
1060 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
1061
1062 fcr = inb(info->ioaddr + UART_FCR);
1063 outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
1064 info->ioaddr + UART_FCR);
1065 outb(fcr, info->ioaddr + UART_FCR);
1066
1067 spin_unlock_irqrestore(&info->slock, flags);
1068
1069 tty_wakeup(tty);
1070 }
1071
1072
1073 /*
1074 * This routine is called when the serial port gets closed. First, we
1075 * wait for the last remaining data to be sent. Then, we unlink its
1076 * async structure from the interrupt chain if necessary, and we free
1077 * that IRQ if nothing is left in the chain.
1078 */
1079 static void mxser_close(struct tty_struct *tty, struct file *filp)
1080 {
1081 struct mxser_port *info = tty->driver_data;
1082 struct tty_port *port = &info->port;
1083
1084 unsigned long timeout;
1085
1086 if (tty->index == MXSER_PORTS)
1087 return;
1088 if (!info)
1089 return;
1090
1091 if (tty_port_close_start(port, tty, filp) == 0)
1092 return;
1093
1094 /*
1095 * Save the termios structure, since this port may have
1096 * separate termios for callout and dialin.
1097 *
1098 * FIXME: Can this go ?
1099 */
1100 if (info->port.flags & ASYNC_NORMAL_ACTIVE)
1101 info->normal_termios = *tty->termios;
1102 /*
1103 * At this point we stop accepting input. To do this, we
1104 * disable the receive line status interrupts, and tell the
1105 * interrupt driver to stop checking the data ready bit in the
1106 * line status register.
1107 */
1108 info->IER &= ~UART_IER_RLSI;
1109 if (info->board->chip_flag)
1110 info->IER &= ~MOXA_MUST_RECV_ISR;
1111
1112 if (info->port.flags & ASYNC_INITIALIZED) {
1113 outb(info->IER, info->ioaddr + UART_IER);
1114 /*
1115 * Before we drop DTR, make sure the UART transmitter
1116 * has completely drained; this is especially
1117 * important if there is a transmit FIFO!
1118 */
1119 timeout = jiffies + HZ;
1120 while (!(inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT)) {
1121 schedule_timeout_interruptible(5);
1122 if (time_after(jiffies, timeout))
1123 break;
1124 }
1125 }
1126 mxser_shutdown(tty);
1127 mxser_flush_buffer(tty);
1128
1129 /* Right now the tty_port set is done outside of the close_end helper
1130 as we don't yet have everyone using refcounts */
1131 tty_port_close_end(port, tty);
1132 tty_port_tty_set(port, NULL);
1133 }
1134
1135 static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count)
1136 {
1137 int c, total = 0;
1138 struct mxser_port *info = tty->driver_data;
1139 unsigned long flags;
1140
1141 if (!info->port.xmit_buf)
1142 return 0;
1143
1144 while (1) {
1145 c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
1146 SERIAL_XMIT_SIZE - info->xmit_head));
1147 if (c <= 0)
1148 break;
1149
1150 memcpy(info->port.xmit_buf + info->xmit_head, buf, c);
1151 spin_lock_irqsave(&info->slock, flags);
1152 info->xmit_head = (info->xmit_head + c) &
1153 (SERIAL_XMIT_SIZE - 1);
1154 info->xmit_cnt += c;
1155 spin_unlock_irqrestore(&info->slock, flags);
1156
1157 buf += c;
1158 count -= c;
1159 total += c;
1160 }
1161
1162 if (info->xmit_cnt && !tty->stopped) {
1163 if (!tty->hw_stopped ||
1164 (info->type == PORT_16550A) ||
1165 (info->board->chip_flag)) {
1166 spin_lock_irqsave(&info->slock, flags);
1167 outb(info->IER & ~UART_IER_THRI, info->ioaddr +
1168 UART_IER);
1169 info->IER |= UART_IER_THRI;
1170 outb(info->IER, info->ioaddr + UART_IER);
1171 spin_unlock_irqrestore(&info->slock, flags);
1172 }
1173 }
1174 return total;
1175 }
1176
1177 static int mxser_put_char(struct tty_struct *tty, unsigned char ch)
1178 {
1179 struct mxser_port *info = tty->driver_data;
1180 unsigned long flags;
1181
1182 if (!info->port.xmit_buf)
1183 return 0;
1184
1185 if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1)
1186 return 0;
1187
1188 spin_lock_irqsave(&info->slock, flags);
1189 info->port.xmit_buf[info->xmit_head++] = ch;
1190 info->xmit_head &= SERIAL_XMIT_SIZE - 1;
1191 info->xmit_cnt++;
1192 spin_unlock_irqrestore(&info->slock, flags);
1193 if (!tty->stopped) {
1194 if (!tty->hw_stopped ||
1195 (info->type == PORT_16550A) ||
1196 info->board->chip_flag) {
1197 spin_lock_irqsave(&info->slock, flags);
1198 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1199 info->IER |= UART_IER_THRI;
1200 outb(info->IER, info->ioaddr + UART_IER);
1201 spin_unlock_irqrestore(&info->slock, flags);
1202 }
1203 }
1204 return 1;
1205 }
1206
1207
1208 static void mxser_flush_chars(struct tty_struct *tty)
1209 {
1210 struct mxser_port *info = tty->driver_data;
1211 unsigned long flags;
1212
1213 if (info->xmit_cnt <= 0 || tty->stopped || !info->port.xmit_buf ||
1214 (tty->hw_stopped && info->type != PORT_16550A &&
1215 !info->board->chip_flag))
1216 return;
1217
1218 spin_lock_irqsave(&info->slock, flags);
1219
1220 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1221 info->IER |= UART_IER_THRI;
1222 outb(info->IER, info->ioaddr + UART_IER);
1223
1224 spin_unlock_irqrestore(&info->slock, flags);
1225 }
1226
1227 static int mxser_write_room(struct tty_struct *tty)
1228 {
1229 struct mxser_port *info = tty->driver_data;
1230 int ret;
1231
1232 ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1;
1233 return ret < 0 ? 0 : ret;
1234 }
1235
1236 static int mxser_chars_in_buffer(struct tty_struct *tty)
1237 {
1238 struct mxser_port *info = tty->driver_data;
1239 return info->xmit_cnt;
1240 }
1241
1242 /*
1243 * ------------------------------------------------------------
1244 * friends of mxser_ioctl()
1245 * ------------------------------------------------------------
1246 */
1247 static int mxser_get_serial_info(struct tty_struct *tty,
1248 struct serial_struct __user *retinfo)
1249 {
1250 struct mxser_port *info = tty->driver_data;
1251 struct serial_struct tmp = {
1252 .type = info->type,
1253 .line = tty->index,
1254 .port = info->ioaddr,
1255 .irq = info->board->irq,
1256 .flags = info->port.flags,
1257 .baud_base = info->baud_base,
1258 .close_delay = info->port.close_delay,
1259 .closing_wait = info->port.closing_wait,
1260 .custom_divisor = info->custom_divisor,
1261 .hub6 = 0
1262 };
1263 if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
1264 return -EFAULT;
1265 return 0;
1266 }
1267
1268 static int mxser_set_serial_info(struct tty_struct *tty,
1269 struct serial_struct __user *new_info)
1270 {
1271 struct mxser_port *info = tty->driver_data;
1272 struct serial_struct new_serial;
1273 speed_t baud;
1274 unsigned long sl_flags;
1275 unsigned int flags;
1276 int retval = 0;
1277
1278 if (!new_info || !info->ioaddr)
1279 return -ENODEV;
1280 if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
1281 return -EFAULT;
1282
1283 if (new_serial.irq != info->board->irq ||
1284 new_serial.port != info->ioaddr)
1285 return -EINVAL;
1286
1287 flags = info->port.flags & ASYNC_SPD_MASK;
1288
1289 if (!capable(CAP_SYS_ADMIN)) {
1290 if ((new_serial.baud_base != info->baud_base) ||
1291 (new_serial.close_delay != info->port.close_delay) ||
1292 ((new_serial.flags & ~ASYNC_USR_MASK) != (info->port.flags & ~ASYNC_USR_MASK)))
1293 return -EPERM;
1294 info->port.flags = ((info->port.flags & ~ASYNC_USR_MASK) |
1295 (new_serial.flags & ASYNC_USR_MASK));
1296 } else {
1297 /*
1298 * OK, past this point, all the error checking has been done.
1299 * At this point, we start making changes.....
1300 */
1301 info->port.flags = ((info->port.flags & ~ASYNC_FLAGS) |
1302 (new_serial.flags & ASYNC_FLAGS));
1303 info->port.close_delay = new_serial.close_delay * HZ / 100;
1304 info->port.closing_wait = new_serial.closing_wait * HZ / 100;
1305 tty->low_latency = (info->port.flags & ASYNC_LOW_LATENCY)
1306 ? 1 : 0;
1307 if ((info->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST &&
1308 (new_serial.baud_base != info->baud_base ||
1309 new_serial.custom_divisor !=
1310 info->custom_divisor)) {
1311 baud = new_serial.baud_base / new_serial.custom_divisor;
1312 tty_encode_baud_rate(tty, baud, baud);
1313 }
1314 }
1315
1316 info->type = new_serial.type;
1317
1318 process_txrx_fifo(info);
1319
1320 if (info->port.flags & ASYNC_INITIALIZED) {
1321 if (flags != (info->port.flags & ASYNC_SPD_MASK)) {
1322 spin_lock_irqsave(&info->slock, sl_flags);
1323 mxser_change_speed(tty, NULL);
1324 spin_unlock_irqrestore(&info->slock, sl_flags);
1325 }
1326 } else
1327 retval = mxser_startup(tty);
1328
1329 return retval;
1330 }
1331
1332 /*
1333 * mxser_get_lsr_info - get line status register info
1334 *
1335 * Purpose: Let user call ioctl() to get info when the UART physically
1336 * is emptied. On bus types like RS485, the transmitter must
1337 * release the bus after transmitting. This must be done when
1338 * the transmit shift register is empty, not be done when the
1339 * transmit holding register is empty. This functionality
1340 * allows an RS485 driver to be written in user space.
1341 */
1342 static int mxser_get_lsr_info(struct mxser_port *info,
1343 unsigned int __user *value)
1344 {
1345 unsigned char status;
1346 unsigned int result;
1347 unsigned long flags;
1348
1349 spin_lock_irqsave(&info->slock, flags);
1350 status = inb(info->ioaddr + UART_LSR);
1351 spin_unlock_irqrestore(&info->slock, flags);
1352 result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
1353 return put_user(result, value);
1354 }
1355
1356 static int mxser_tiocmget(struct tty_struct *tty, struct file *file)
1357 {
1358 struct mxser_port *info = tty->driver_data;
1359 unsigned char control, status;
1360 unsigned long flags;
1361
1362
1363 if (tty->index == MXSER_PORTS)
1364 return -ENOIOCTLCMD;
1365 if (test_bit(TTY_IO_ERROR, &tty->flags))
1366 return -EIO;
1367
1368 control = info->MCR;
1369
1370 spin_lock_irqsave(&info->slock, flags);
1371 status = inb(info->ioaddr + UART_MSR);
1372 if (status & UART_MSR_ANY_DELTA)
1373 mxser_check_modem_status(tty, info, status);
1374 spin_unlock_irqrestore(&info->slock, flags);
1375 return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) |
1376 ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) |
1377 ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) |
1378 ((status & UART_MSR_RI) ? TIOCM_RNG : 0) |
1379 ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) |
1380 ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
1381 }
1382
1383 static int mxser_tiocmset(struct tty_struct *tty, struct file *file,
1384 unsigned int set, unsigned int clear)
1385 {
1386 struct mxser_port *info = tty->driver_data;
1387 unsigned long flags;
1388
1389
1390 if (tty->index == MXSER_PORTS)
1391 return -ENOIOCTLCMD;
1392 if (test_bit(TTY_IO_ERROR, &tty->flags))
1393 return -EIO;
1394
1395 spin_lock_irqsave(&info->slock, flags);
1396
1397 if (set & TIOCM_RTS)
1398 info->MCR |= UART_MCR_RTS;
1399 if (set & TIOCM_DTR)
1400 info->MCR |= UART_MCR_DTR;
1401
1402 if (clear & TIOCM_RTS)
1403 info->MCR &= ~UART_MCR_RTS;
1404 if (clear & TIOCM_DTR)
1405 info->MCR &= ~UART_MCR_DTR;
1406
1407 outb(info->MCR, info->ioaddr + UART_MCR);
1408 spin_unlock_irqrestore(&info->slock, flags);
1409 return 0;
1410 }
1411
1412 static int __init mxser_program_mode(int port)
1413 {
1414 int id, i, j, n;
1415
1416 outb(0, port);
1417 outb(0, port);
1418 outb(0, port);
1419 (void)inb(port);
1420 (void)inb(port);
1421 outb(0, port);
1422 (void)inb(port);
1423
1424 id = inb(port + 1) & 0x1F;
1425 if ((id != C168_ASIC_ID) &&
1426 (id != C104_ASIC_ID) &&
1427 (id != C102_ASIC_ID) &&
1428 (id != CI132_ASIC_ID) &&
1429 (id != CI134_ASIC_ID) &&
1430 (id != CI104J_ASIC_ID))
1431 return -1;
1432 for (i = 0, j = 0; i < 4; i++) {
1433 n = inb(port + 2);
1434 if (n == 'M') {
1435 j = 1;
1436 } else if ((j == 1) && (n == 1)) {
1437 j = 2;
1438 break;
1439 } else
1440 j = 0;
1441 }
1442 if (j != 2)
1443 id = -2;
1444 return id;
1445 }
1446
1447 static void __init mxser_normal_mode(int port)
1448 {
1449 int i, n;
1450
1451 outb(0xA5, port + 1);
1452 outb(0x80, port + 3);
1453 outb(12, port + 0); /* 9600 bps */
1454 outb(0, port + 1);
1455 outb(0x03, port + 3); /* 8 data bits */
1456 outb(0x13, port + 4); /* loop back mode */
1457 for (i = 0; i < 16; i++) {
1458 n = inb(port + 5);
1459 if ((n & 0x61) == 0x60)
1460 break;
1461 if ((n & 1) == 1)
1462 (void)inb(port);
1463 }
1464 outb(0x00, port + 4);
1465 }
1466
1467 #define CHIP_SK 0x01 /* Serial Data Clock in Eprom */
1468 #define CHIP_DO 0x02 /* Serial Data Output in Eprom */
1469 #define CHIP_CS 0x04 /* Serial Chip Select in Eprom */
1470 #define CHIP_DI 0x08 /* Serial Data Input in Eprom */
1471 #define EN_CCMD 0x000 /* Chip's command register */
1472 #define EN0_RSARLO 0x008 /* Remote start address reg 0 */
1473 #define EN0_RSARHI 0x009 /* Remote start address reg 1 */
1474 #define EN0_RCNTLO 0x00A /* Remote byte count reg WR */
1475 #define EN0_RCNTHI 0x00B /* Remote byte count reg WR */
1476 #define EN0_DCFG 0x00E /* Data configuration reg WR */
1477 #define EN0_PORT 0x010 /* Rcv missed frame error counter RD */
1478 #define ENC_PAGE0 0x000 /* Select page 0 of chip registers */
1479 #define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */
1480 static int __init mxser_read_register(int port, unsigned short *regs)
1481 {
1482 int i, k, value, id;
1483 unsigned int j;
1484
1485 id = mxser_program_mode(port);
1486 if (id < 0)
1487 return id;
1488 for (i = 0; i < 14; i++) {
1489 k = (i & 0x3F) | 0x180;
1490 for (j = 0x100; j > 0; j >>= 1) {
1491 outb(CHIP_CS, port);
1492 if (k & j) {
1493 outb(CHIP_CS | CHIP_DO, port);
1494 outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */
1495 } else {
1496 outb(CHIP_CS, port);
1497 outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */
1498 }
1499 }
1500 (void)inb(port);
1501 value = 0;
1502 for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) {
1503 outb(CHIP_CS, port);
1504 outb(CHIP_CS | CHIP_SK, port);
1505 if (inb(port) & CHIP_DI)
1506 value |= j;
1507 }
1508 regs[i] = value;
1509 outb(0, port);
1510 }
1511 mxser_normal_mode(port);
1512 return id;
1513 }
1514
1515 static int mxser_ioctl_special(unsigned int cmd, void __user *argp)
1516 {
1517 struct mxser_port *port;
1518 struct tty_struct *tty;
1519 int result, status;
1520 unsigned int i, j;
1521 int ret = 0;
1522
1523 switch (cmd) {
1524 case MOXA_GET_MAJOR:
1525 if (printk_ratelimit())
1526 printk(KERN_WARNING "mxser: '%s' uses deprecated ioctl "
1527 "%x (GET_MAJOR), fix your userspace\n",
1528 current->comm, cmd);
1529 return put_user(ttymajor, (int __user *)argp);
1530
1531 case MOXA_CHKPORTENABLE:
1532 result = 0;
1533 lock_kernel();
1534 for (i = 0; i < MXSER_BOARDS; i++)
1535 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++)
1536 if (mxser_boards[i].ports[j].ioaddr)
1537 result |= (1 << i);
1538 unlock_kernel();
1539 return put_user(result, (unsigned long __user *)argp);
1540 case MOXA_GETDATACOUNT:
1541 lock_kernel();
1542 if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log)))
1543 ret = -EFAULT;
1544 unlock_kernel();
1545 return ret;
1546 case MOXA_GETMSTATUS: {
1547 struct mxser_mstatus ms, __user *msu = argp;
1548 lock_kernel();
1549 for (i = 0; i < MXSER_BOARDS; i++)
1550 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) {
1551 port = &mxser_boards[i].ports[j];
1552 memset(&ms, 0, sizeof(ms));
1553
1554 if (!port->ioaddr)
1555 goto copy;
1556
1557 tty = tty_port_tty_get(&port->port);
1558
1559 if (!tty || !tty->termios)
1560 ms.cflag = port->normal_termios.c_cflag;
1561 else
1562 ms.cflag = tty->termios->c_cflag;
1563 tty_kref_put(tty);
1564 status = inb(port->ioaddr + UART_MSR);
1565 if (status & UART_MSR_DCD)
1566 ms.dcd = 1;
1567 if (status & UART_MSR_DSR)
1568 ms.dsr = 1;
1569 if (status & UART_MSR_CTS)
1570 ms.cts = 1;
1571 copy:
1572 if (copy_to_user(msu, &ms, sizeof(ms))) {
1573 unlock_kernel();
1574 return -EFAULT;
1575 }
1576 msu++;
1577 }
1578 unlock_kernel();
1579 return 0;
1580 }
1581 case MOXA_ASPP_MON_EXT: {
1582 struct mxser_mon_ext *me; /* it's 2k, stack unfriendly */
1583 unsigned int cflag, iflag, p;
1584 u8 opmode;
1585
1586 me = kzalloc(sizeof(*me), GFP_KERNEL);
1587 if (!me)
1588 return -ENOMEM;
1589
1590 lock_kernel();
1591 for (i = 0, p = 0; i < MXSER_BOARDS; i++) {
1592 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++, p++) {
1593 if (p >= ARRAY_SIZE(me->rx_cnt)) {
1594 i = MXSER_BOARDS;
1595 break;
1596 }
1597 port = &mxser_boards[i].ports[j];
1598 if (!port->ioaddr)
1599 continue;
1600
1601 status = mxser_get_msr(port->ioaddr, 0, p);
1602
1603 if (status & UART_MSR_TERI)
1604 port->icount.rng++;
1605 if (status & UART_MSR_DDSR)
1606 port->icount.dsr++;
1607 if (status & UART_MSR_DDCD)
1608 port->icount.dcd++;
1609 if (status & UART_MSR_DCTS)
1610 port->icount.cts++;
1611
1612 port->mon_data.modem_status = status;
1613 me->rx_cnt[p] = port->mon_data.rxcnt;
1614 me->tx_cnt[p] = port->mon_data.txcnt;
1615 me->up_rxcnt[p] = port->mon_data.up_rxcnt;
1616 me->up_txcnt[p] = port->mon_data.up_txcnt;
1617 me->modem_status[p] =
1618 port->mon_data.modem_status;
1619 tty = tty_port_tty_get(&port->port);
1620
1621 if (!tty || !tty->termios) {
1622 cflag = port->normal_termios.c_cflag;
1623 iflag = port->normal_termios.c_iflag;
1624 me->baudrate[p] = tty_termios_baud_rate(&port->normal_termios);
1625 } else {
1626 cflag = tty->termios->c_cflag;
1627 iflag = tty->termios->c_iflag;
1628 me->baudrate[p] = tty_get_baud_rate(tty);
1629 }
1630 tty_kref_put(tty);
1631
1632 me->databits[p] = cflag & CSIZE;
1633 me->stopbits[p] = cflag & CSTOPB;
1634 me->parity[p] = cflag & (PARENB | PARODD |
1635 CMSPAR);
1636
1637 if (cflag & CRTSCTS)
1638 me->flowctrl[p] |= 0x03;
1639
1640 if (iflag & (IXON | IXOFF))
1641 me->flowctrl[p] |= 0x0C;
1642
1643 if (port->type == PORT_16550A)
1644 me->fifo[p] = 1;
1645
1646 opmode = inb(port->opmode_ioaddr) >>
1647 ((p % 4) * 2);
1648 opmode &= OP_MODE_MASK;
1649 me->iftype[p] = opmode;
1650 }
1651 }
1652 unlock_kernel();
1653 if (copy_to_user(argp, me, sizeof(*me)))
1654 ret = -EFAULT;
1655 kfree(me);
1656 return ret;
1657 }
1658 default:
1659 return -ENOIOCTLCMD;
1660 }
1661 return 0;
1662 }
1663
1664 static int mxser_cflags_changed(struct mxser_port *info, unsigned long arg,
1665 struct async_icount *cprev)
1666 {
1667 struct async_icount cnow;
1668 unsigned long flags;
1669 int ret;
1670
1671 spin_lock_irqsave(&info->slock, flags);
1672 cnow = info->icount; /* atomic copy */
1673 spin_unlock_irqrestore(&info->slock, flags);
1674
1675 ret = ((arg & TIOCM_RNG) && (cnow.rng != cprev->rng)) ||
1676 ((arg & TIOCM_DSR) && (cnow.dsr != cprev->dsr)) ||
1677 ((arg & TIOCM_CD) && (cnow.dcd != cprev->dcd)) ||
1678 ((arg & TIOCM_CTS) && (cnow.cts != cprev->cts));
1679
1680 *cprev = cnow;
1681
1682 return ret;
1683 }
1684
1685 static int mxser_ioctl(struct tty_struct *tty, struct file *file,
1686 unsigned int cmd, unsigned long arg)
1687 {
1688 struct mxser_port *info = tty->driver_data;
1689 struct async_icount cnow;
1690 unsigned long flags;
1691 void __user *argp = (void __user *)arg;
1692 int retval;
1693
1694 if (tty->index == MXSER_PORTS)
1695 return mxser_ioctl_special(cmd, argp);
1696
1697 if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) {
1698 int p;
1699 unsigned long opmode;
1700 static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f };
1701 int shiftbit;
1702 unsigned char val, mask;
1703
1704 p = tty->index % 4;
1705 if (cmd == MOXA_SET_OP_MODE) {
1706 if (get_user(opmode, (int __user *) argp))
1707 return -EFAULT;
1708 if (opmode != RS232_MODE &&
1709 opmode != RS485_2WIRE_MODE &&
1710 opmode != RS422_MODE &&
1711 opmode != RS485_4WIRE_MODE)
1712 return -EFAULT;
1713 lock_kernel();
1714 mask = ModeMask[p];
1715 shiftbit = p * 2;
1716 val = inb(info->opmode_ioaddr);
1717 val &= mask;
1718 val |= (opmode << shiftbit);
1719 outb(val, info->opmode_ioaddr);
1720 unlock_kernel();
1721 } else {
1722 lock_kernel();
1723 shiftbit = p * 2;
1724 opmode = inb(info->opmode_ioaddr) >> shiftbit;
1725 opmode &= OP_MODE_MASK;
1726 unlock_kernel();
1727 if (put_user(opmode, (int __user *)argp))
1728 return -EFAULT;
1729 }
1730 return 0;
1731 }
1732
1733 if (cmd != TIOCGSERIAL && cmd != TIOCMIWAIT && cmd != TIOCGICOUNT &&
1734 test_bit(TTY_IO_ERROR, &tty->flags))
1735 return -EIO;
1736
1737 switch (cmd) {
1738 case TIOCGSERIAL:
1739 lock_kernel();
1740 retval = mxser_get_serial_info(tty, argp);
1741 unlock_kernel();
1742 return retval;
1743 case TIOCSSERIAL:
1744 lock_kernel();
1745 retval = mxser_set_serial_info(tty, argp);
1746 unlock_kernel();
1747 return retval;
1748 case TIOCSERGETLSR: /* Get line status register */
1749 return mxser_get_lsr_info(info, argp);
1750 /*
1751 * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
1752 * - mask passed in arg for lines of interest
1753 * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
1754 * Caller should use TIOCGICOUNT to see which one it was
1755 */
1756 case TIOCMIWAIT:
1757 spin_lock_irqsave(&info->slock, flags);
1758 cnow = info->icount; /* note the counters on entry */
1759 spin_unlock_irqrestore(&info->slock, flags);
1760
1761 return wait_event_interruptible(info->delta_msr_wait,
1762 mxser_cflags_changed(info, arg, &cnow));
1763 /*
1764 * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
1765 * Return: write counters to the user passed counter struct
1766 * NB: both 1->0 and 0->1 transitions are counted except for
1767 * RI where only 0->1 is counted.
1768 */
1769 case TIOCGICOUNT: {
1770 struct serial_icounter_struct icnt = { 0 };
1771 spin_lock_irqsave(&info->slock, flags);
1772 cnow = info->icount;
1773 spin_unlock_irqrestore(&info->slock, flags);
1774
1775 icnt.frame = cnow.frame;
1776 icnt.brk = cnow.brk;
1777 icnt.overrun = cnow.overrun;
1778 icnt.buf_overrun = cnow.buf_overrun;
1779 icnt.parity = cnow.parity;
1780 icnt.rx = cnow.rx;
1781 icnt.tx = cnow.tx;
1782 icnt.cts = cnow.cts;
1783 icnt.dsr = cnow.dsr;
1784 icnt.rng = cnow.rng;
1785 icnt.dcd = cnow.dcd;
1786
1787 return copy_to_user(argp, &icnt, sizeof(icnt)) ? -EFAULT : 0;
1788 }
1789 case MOXA_HighSpeedOn:
1790 return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp);
1791 case MOXA_SDS_RSTICOUNTER:
1792 lock_kernel();
1793 info->mon_data.rxcnt = 0;
1794 info->mon_data.txcnt = 0;
1795 unlock_kernel();
1796 return 0;
1797
1798 case MOXA_ASPP_OQUEUE:{
1799 int len, lsr;
1800
1801 lock_kernel();
1802 len = mxser_chars_in_buffer(tty);
1803 lsr = inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT;
1804 len += (lsr ? 0 : 1);
1805 unlock_kernel();
1806
1807 return put_user(len, (int __user *)argp);
1808 }
1809 case MOXA_ASPP_MON: {
1810 int mcr, status;
1811
1812 lock_kernel();
1813 status = mxser_get_msr(info->ioaddr, 1, tty->index);
1814 mxser_check_modem_status(tty, info, status);
1815
1816 mcr = inb(info->ioaddr + UART_MCR);
1817 if (mcr & MOXA_MUST_MCR_XON_FLAG)
1818 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD;
1819 else
1820 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD;
1821
1822 if (mcr & MOXA_MUST_MCR_TX_XON)
1823 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT;
1824 else
1825 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT;
1826
1827 if (tty->hw_stopped)
1828 info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD;
1829 else
1830 info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD;
1831 unlock_kernel();
1832 if (copy_to_user(argp, &info->mon_data,
1833 sizeof(struct mxser_mon)))
1834 return -EFAULT;
1835
1836 return 0;
1837 }
1838 case MOXA_ASPP_LSTATUS: {
1839 if (put_user(info->err_shadow, (unsigned char __user *)argp))
1840 return -EFAULT;
1841
1842 info->err_shadow = 0;
1843 return 0;
1844 }
1845 case MOXA_SET_BAUD_METHOD: {
1846 int method;
1847
1848 if (get_user(method, (int __user *)argp))
1849 return -EFAULT;
1850 mxser_set_baud_method[tty->index] = method;
1851 return put_user(method, (int __user *)argp);
1852 }
1853 default:
1854 return -ENOIOCTLCMD;
1855 }
1856 return 0;
1857 }
1858
1859 static void mxser_stoprx(struct tty_struct *tty)
1860 {
1861 struct mxser_port *info = tty->driver_data;
1862
1863 info->ldisc_stop_rx = 1;
1864 if (I_IXOFF(tty)) {
1865 if (info->board->chip_flag) {
1866 info->IER &= ~MOXA_MUST_RECV_ISR;
1867 outb(info->IER, info->ioaddr + UART_IER);
1868 } else {
1869 info->x_char = STOP_CHAR(tty);
1870 outb(0, info->ioaddr + UART_IER);
1871 info->IER |= UART_IER_THRI;
1872 outb(info->IER, info->ioaddr + UART_IER);
1873 }
1874 }
1875
1876 if (tty->termios->c_cflag & CRTSCTS) {
1877 info->MCR &= ~UART_MCR_RTS;
1878 outb(info->MCR, info->ioaddr + UART_MCR);
1879 }
1880 }
1881
1882 /*
1883 * This routine is called by the upper-layer tty layer to signal that
1884 * incoming characters should be throttled.
1885 */
1886 static void mxser_throttle(struct tty_struct *tty)
1887 {
1888 mxser_stoprx(tty);
1889 }
1890
1891 static void mxser_unthrottle(struct tty_struct *tty)
1892 {
1893 struct mxser_port *info = tty->driver_data;
1894
1895 /* startrx */
1896 info->ldisc_stop_rx = 0;
1897 if (I_IXOFF(tty)) {
1898 if (info->x_char)
1899 info->x_char = 0;
1900 else {
1901 if (info->board->chip_flag) {
1902 info->IER |= MOXA_MUST_RECV_ISR;
1903 outb(info->IER, info->ioaddr + UART_IER);
1904 } else {
1905 info->x_char = START_CHAR(tty);
1906 outb(0, info->ioaddr + UART_IER);
1907 info->IER |= UART_IER_THRI;
1908 outb(info->IER, info->ioaddr + UART_IER);
1909 }
1910 }
1911 }
1912
1913 if (tty->termios->c_cflag & CRTSCTS) {
1914 info->MCR |= UART_MCR_RTS;
1915 outb(info->MCR, info->ioaddr + UART_MCR);
1916 }
1917 }
1918
1919 /*
1920 * mxser_stop() and mxser_start()
1921 *
1922 * This routines are called before setting or resetting tty->stopped.
1923 * They enable or disable transmitter interrupts, as necessary.
1924 */
1925 static void mxser_stop(struct tty_struct *tty)
1926 {
1927 struct mxser_port *info = tty->driver_data;
1928 unsigned long flags;
1929
1930 spin_lock_irqsave(&info->slock, flags);
1931 if (info->IER & UART_IER_THRI) {
1932 info->IER &= ~UART_IER_THRI;
1933 outb(info->IER, info->ioaddr + UART_IER);
1934 }
1935 spin_unlock_irqrestore(&info->slock, flags);
1936 }
1937
1938 static void mxser_start(struct tty_struct *tty)
1939 {
1940 struct mxser_port *info = tty->driver_data;
1941 unsigned long flags;
1942
1943 spin_lock_irqsave(&info->slock, flags);
1944 if (info->xmit_cnt && info->port.xmit_buf) {
1945 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1946 info->IER |= UART_IER_THRI;
1947 outb(info->IER, info->ioaddr + UART_IER);
1948 }
1949 spin_unlock_irqrestore(&info->slock, flags);
1950 }
1951
1952 static void mxser_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
1953 {
1954 struct mxser_port *info = tty->driver_data;
1955 unsigned long flags;
1956
1957 spin_lock_irqsave(&info->slock, flags);
1958 mxser_change_speed(tty, old_termios);
1959 spin_unlock_irqrestore(&info->slock, flags);
1960
1961 if ((old_termios->c_cflag & CRTSCTS) &&
1962 !(tty->termios->c_cflag & CRTSCTS)) {
1963 tty->hw_stopped = 0;
1964 mxser_start(tty);
1965 }
1966
1967 /* Handle sw stopped */
1968 if ((old_termios->c_iflag & IXON) &&
1969 !(tty->termios->c_iflag & IXON)) {
1970 tty->stopped = 0;
1971
1972 if (info->board->chip_flag) {
1973 spin_lock_irqsave(&info->slock, flags);
1974 mxser_disable_must_rx_software_flow_control(
1975 info->ioaddr);
1976 spin_unlock_irqrestore(&info->slock, flags);
1977 }
1978
1979 mxser_start(tty);
1980 }
1981 }
1982
1983 /*
1984 * mxser_wait_until_sent() --- wait until the transmitter is empty
1985 */
1986 static void mxser_wait_until_sent(struct tty_struct *tty, int timeout)
1987 {
1988 struct mxser_port *info = tty->driver_data;
1989 unsigned long orig_jiffies, char_time;
1990 int lsr;
1991
1992 if (info->type == PORT_UNKNOWN)
1993 return;
1994
1995 if (info->xmit_fifo_size == 0)
1996 return; /* Just in case.... */
1997
1998 orig_jiffies = jiffies;
1999 /*
2000 * Set the check interval to be 1/5 of the estimated time to
2001 * send a single character, and make it at least 1. The check
2002 * interval should also be less than the timeout.
2003 *
2004 * Note: we have to use pretty tight timings here to satisfy
2005 * the NIST-PCTS.
2006 */
2007 char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size;
2008 char_time = char_time / 5;
2009 if (char_time == 0)
2010 char_time = 1;
2011 if (timeout && timeout < char_time)
2012 char_time = timeout;
2013 /*
2014 * If the transmitter hasn't cleared in twice the approximate
2015 * amount of time to send the entire FIFO, it probably won't
2016 * ever clear. This assumes the UART isn't doing flow
2017 * control, which is currently the case. Hence, if it ever
2018 * takes longer than info->timeout, this is probably due to a
2019 * UART bug of some kind. So, we clamp the timeout parameter at
2020 * 2*info->timeout.
2021 */
2022 if (!timeout || timeout > 2 * info->timeout)
2023 timeout = 2 * info->timeout;
2024 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
2025 printk(KERN_DEBUG "In rs_wait_until_sent(%d) check=%lu...",
2026 timeout, char_time);
2027 printk("jiff=%lu...", jiffies);
2028 #endif
2029 lock_kernel();
2030 while (!((lsr = inb(info->ioaddr + UART_LSR)) & UART_LSR_TEMT)) {
2031 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
2032 printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
2033 #endif
2034 schedule_timeout_interruptible(char_time);
2035 if (signal_pending(current))
2036 break;
2037 if (timeout && time_after(jiffies, orig_jiffies + timeout))
2038 break;
2039 }
2040 set_current_state(TASK_RUNNING);
2041 unlock_kernel();
2042
2043 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
2044 printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
2045 #endif
2046 }
2047
2048 /*
2049 * This routine is called by tty_hangup() when a hangup is signaled.
2050 */
2051 static void mxser_hangup(struct tty_struct *tty)
2052 {
2053 struct mxser_port *info = tty->driver_data;
2054
2055 mxser_flush_buffer(tty);
2056 mxser_shutdown(tty);
2057 tty_port_hangup(&info->port);
2058 }
2059
2060 /*
2061 * mxser_rs_break() --- routine which turns the break handling on or off
2062 */
2063 static int mxser_rs_break(struct tty_struct *tty, int break_state)
2064 {
2065 struct mxser_port *info = tty->driver_data;
2066 unsigned long flags;
2067
2068 spin_lock_irqsave(&info->slock, flags);
2069 if (break_state == -1)
2070 outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC,
2071 info->ioaddr + UART_LCR);
2072 else
2073 outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC,
2074 info->ioaddr + UART_LCR);
2075 spin_unlock_irqrestore(&info->slock, flags);
2076 return 0;
2077 }
2078
2079 static void mxser_receive_chars(struct tty_struct *tty,
2080 struct mxser_port *port, int *status)
2081 {
2082 unsigned char ch, gdl;
2083 int ignored = 0;
2084 int cnt = 0;
2085 int recv_room;
2086 int max = 256;
2087
2088 recv_room = tty->receive_room;
2089 if (recv_room == 0 && !port->ldisc_stop_rx)
2090 mxser_stoprx(tty);
2091 if (port->board->chip_flag != MOXA_OTHER_UART) {
2092
2093 if (*status & UART_LSR_SPECIAL)
2094 goto intr_old;
2095 if (port->board->chip_flag == MOXA_MUST_MU860_HWID &&
2096 (*status & MOXA_MUST_LSR_RERR))
2097 goto intr_old;
2098 if (*status & MOXA_MUST_LSR_RERR)
2099 goto intr_old;
2100
2101 gdl = inb(port->ioaddr + MOXA_MUST_GDL_REGISTER);
2102
2103 if (port->board->chip_flag == MOXA_MUST_MU150_HWID)
2104 gdl &= MOXA_MUST_GDL_MASK;
2105 if (gdl >= recv_room) {
2106 if (!port->ldisc_stop_rx)
2107 mxser_stoprx(tty);
2108 }
2109 while (gdl--) {
2110 ch = inb(port->ioaddr + UART_RX);
2111 tty_insert_flip_char(tty, ch, 0);
2112 cnt++;
2113 }
2114 goto end_intr;
2115 }
2116 intr_old:
2117
2118 do {
2119 if (max-- < 0)
2120 break;
2121
2122 ch = inb(port->ioaddr + UART_RX);
2123 if (port->board->chip_flag && (*status & UART_LSR_OE))
2124 outb(0x23, port->ioaddr + UART_FCR);
2125 *status &= port->read_status_mask;
2126 if (*status & port->ignore_status_mask) {
2127 if (++ignored > 100)
2128 break;
2129 } else {
2130 char flag = 0;
2131 if (*status & UART_LSR_SPECIAL) {
2132 if (*status & UART_LSR_BI) {
2133 flag = TTY_BREAK;
2134 port->icount.brk++;
2135
2136 if (port->port.flags & ASYNC_SAK)
2137 do_SAK(tty);
2138 } else if (*status & UART_LSR_PE) {
2139 flag = TTY_PARITY;
2140 port->icount.parity++;
2141 } else if (*status & UART_LSR_FE) {
2142 flag = TTY_FRAME;
2143 port->icount.frame++;
2144 } else if (*status & UART_LSR_OE) {
2145 flag = TTY_OVERRUN;
2146 port->icount.overrun++;
2147 } else
2148 flag = TTY_BREAK;
2149 }
2150 tty_insert_flip_char(tty, ch, flag);
2151 cnt++;
2152 if (cnt >= recv_room) {
2153 if (!port->ldisc_stop_rx)
2154 mxser_stoprx(tty);
2155 break;
2156 }
2157
2158 }
2159
2160 if (port->board->chip_flag)
2161 break;
2162
2163 *status = inb(port->ioaddr + UART_LSR);
2164 } while (*status & UART_LSR_DR);
2165
2166 end_intr:
2167 mxvar_log.rxcnt[tty->index] += cnt;
2168 port->mon_data.rxcnt += cnt;
2169 port->mon_data.up_rxcnt += cnt;
2170
2171 /*
2172 * We are called from an interrupt context with &port->slock
2173 * being held. Drop it temporarily in order to prevent
2174 * recursive locking.
2175 */
2176 spin_unlock(&port->slock);
2177 tty_flip_buffer_push(tty);
2178 spin_lock(&port->slock);
2179 }
2180
2181 static void mxser_transmit_chars(struct tty_struct *tty, struct mxser_port *port)
2182 {
2183 int count, cnt;
2184
2185 if (port->x_char) {
2186 outb(port->x_char, port->ioaddr + UART_TX);
2187 port->x_char = 0;
2188 mxvar_log.txcnt[tty->index]++;
2189 port->mon_data.txcnt++;
2190 port->mon_data.up_txcnt++;
2191 port->icount.tx++;
2192 return;
2193 }
2194
2195 if (port->port.xmit_buf == NULL)
2196 return;
2197
2198 if (port->xmit_cnt <= 0 || tty->stopped ||
2199 (tty->hw_stopped &&
2200 (port->type != PORT_16550A) &&
2201 (!port->board->chip_flag))) {
2202 port->IER &= ~UART_IER_THRI;
2203 outb(port->IER, port->ioaddr + UART_IER);
2204 return;
2205 }
2206
2207 cnt = port->xmit_cnt;
2208 count = port->xmit_fifo_size;
2209 do {
2210 outb(port->port.xmit_buf[port->xmit_tail++],
2211 port->ioaddr + UART_TX);
2212 port->xmit_tail = port->xmit_tail & (SERIAL_XMIT_SIZE - 1);
2213 if (--port->xmit_cnt <= 0)
2214 break;
2215 } while (--count > 0);
2216 mxvar_log.txcnt[tty->index] += (cnt - port->xmit_cnt);
2217
2218 port->mon_data.txcnt += (cnt - port->xmit_cnt);
2219 port->mon_data.up_txcnt += (cnt - port->xmit_cnt);
2220 port->icount.tx += (cnt - port->xmit_cnt);
2221
2222 if (port->xmit_cnt < WAKEUP_CHARS && tty)
2223 tty_wakeup(tty);
2224
2225 if (port->xmit_cnt <= 0) {
2226 port->IER &= ~UART_IER_THRI;
2227 outb(port->IER, port->ioaddr + UART_IER);
2228 }
2229 }
2230
2231 /*
2232 * This is the serial driver's generic interrupt routine
2233 */
2234 static irqreturn_t mxser_interrupt(int irq, void *dev_id)
2235 {
2236 int status, iir, i;
2237 struct mxser_board *brd = NULL;
2238 struct mxser_port *port;
2239 int max, irqbits, bits, msr;
2240 unsigned int int_cnt, pass_counter = 0;
2241 int handled = IRQ_NONE;
2242 struct tty_struct *tty;
2243
2244 for (i = 0; i < MXSER_BOARDS; i++)
2245 if (dev_id == &mxser_boards[i]) {
2246 brd = dev_id;
2247 break;
2248 }
2249
2250 if (i == MXSER_BOARDS)
2251 goto irq_stop;
2252 if (brd == NULL)
2253 goto irq_stop;
2254 max = brd->info->nports;
2255 while (pass_counter++ < MXSER_ISR_PASS_LIMIT) {
2256 irqbits = inb(brd->vector) & brd->vector_mask;
2257 if (irqbits == brd->vector_mask)
2258 break;
2259
2260 handled = IRQ_HANDLED;
2261 for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) {
2262 if (irqbits == brd->vector_mask)
2263 break;
2264 if (bits & irqbits)
2265 continue;
2266 port = &brd->ports[i];
2267
2268 int_cnt = 0;
2269 spin_lock(&port->slock);
2270 do {
2271 iir = inb(port->ioaddr + UART_IIR);
2272 if (iir & UART_IIR_NO_INT)
2273 break;
2274 iir &= MOXA_MUST_IIR_MASK;
2275 tty = tty_port_tty_get(&port->port);
2276 if (!tty ||
2277 (port->port.flags & ASYNC_CLOSING) ||
2278 !(port->port.flags &
2279 ASYNC_INITIALIZED)) {
2280 status = inb(port->ioaddr + UART_LSR);
2281 outb(0x27, port->ioaddr + UART_FCR);
2282 inb(port->ioaddr + UART_MSR);
2283 tty_kref_put(tty);
2284 break;
2285 }
2286
2287 status = inb(port->ioaddr + UART_LSR);
2288
2289 if (status & UART_LSR_PE)
2290 port->err_shadow |= NPPI_NOTIFY_PARITY;
2291 if (status & UART_LSR_FE)
2292 port->err_shadow |= NPPI_NOTIFY_FRAMING;
2293 if (status & UART_LSR_OE)
2294 port->err_shadow |=
2295 NPPI_NOTIFY_HW_OVERRUN;
2296 if (status & UART_LSR_BI)
2297 port->err_shadow |= NPPI_NOTIFY_BREAK;
2298
2299 if (port->board->chip_flag) {
2300 if (iir == MOXA_MUST_IIR_GDA ||
2301 iir == MOXA_MUST_IIR_RDA ||
2302 iir == MOXA_MUST_IIR_RTO ||
2303 iir == MOXA_MUST_IIR_LSR)
2304 mxser_receive_chars(tty, port,
2305 &status);
2306
2307 } else {
2308 status &= port->read_status_mask;
2309 if (status & UART_LSR_DR)
2310 mxser_receive_chars(tty, port,
2311 &status);
2312 }
2313 msr = inb(port->ioaddr + UART_MSR);
2314 if (msr & UART_MSR_ANY_DELTA)
2315 mxser_check_modem_status(tty, port, msr);
2316
2317 if (port->board->chip_flag) {
2318 if (iir == 0x02 && (status &
2319 UART_LSR_THRE))
2320 mxser_transmit_chars(tty, port);
2321 } else {
2322 if (status & UART_LSR_THRE)
2323 mxser_transmit_chars(tty, port);
2324 }
2325 tty_kref_put(tty);
2326 } while (int_cnt++ < MXSER_ISR_PASS_LIMIT);
2327 spin_unlock(&port->slock);
2328 }
2329 }
2330
2331 irq_stop:
2332 return handled;
2333 }
2334
2335 static const struct tty_operations mxser_ops = {
2336 .open = mxser_open,
2337 .close = mxser_close,
2338 .write = mxser_write,
2339 .put_char = mxser_put_char,
2340 .flush_chars = mxser_flush_chars,
2341 .write_room = mxser_write_room,
2342 .chars_in_buffer = mxser_chars_in_buffer,
2343 .flush_buffer = mxser_flush_buffer,
2344 .ioctl = mxser_ioctl,
2345 .throttle = mxser_throttle,
2346 .unthrottle = mxser_unthrottle,
2347 .set_termios = mxser_set_termios,
2348 .stop = mxser_stop,
2349 .start = mxser_start,
2350 .hangup = mxser_hangup,
2351 .break_ctl = mxser_rs_break,
2352 .wait_until_sent = mxser_wait_until_sent,
2353 .tiocmget = mxser_tiocmget,
2354 .tiocmset = mxser_tiocmset,
2355 };
2356
2357 struct tty_port_operations mxser_port_ops = {
2358 .carrier_raised = mxser_carrier_raised,
2359 .raise_dtr_rts = mxser_raise_dtr_rts,
2360 };
2361
2362 /*
2363 * The MOXA Smartio/Industio serial driver boot-time initialization code!
2364 */
2365
2366 static void mxser_release_res(struct mxser_board *brd, struct pci_dev *pdev,
2367 unsigned int irq)
2368 {
2369 if (irq)
2370 free_irq(brd->irq, brd);
2371 if (pdev != NULL) { /* PCI */
2372 #ifdef CONFIG_PCI
2373 pci_release_region(pdev, 2);
2374 pci_release_region(pdev, 3);
2375 #endif
2376 } else {
2377 release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
2378 release_region(brd->vector, 1);
2379 }
2380 }
2381
2382 static int __devinit mxser_initbrd(struct mxser_board *brd,
2383 struct pci_dev *pdev)
2384 {
2385 struct mxser_port *info;
2386 unsigned int i;
2387 int retval;
2388
2389 printk(KERN_INFO "mxser: max. baud rate = %d bps\n",
2390 brd->ports[0].max_baud);
2391
2392 for (i = 0; i < brd->info->nports; i++) {
2393 info = &brd->ports[i];
2394 tty_port_init(&info->port);
2395 info->port.ops = &mxser_port_ops;
2396 info->board = brd;
2397 info->stop_rx = 0;
2398 info->ldisc_stop_rx = 0;
2399
2400 /* Enhance mode enabled here */
2401 if (brd->chip_flag != MOXA_OTHER_UART)
2402 mxser_enable_must_enchance_mode(info->ioaddr);
2403
2404 info->port.flags = ASYNC_SHARE_IRQ;
2405 info->type = brd->uart_type;
2406
2407 process_txrx_fifo(info);
2408
2409 info->custom_divisor = info->baud_base * 16;
2410 info->port.close_delay = 5 * HZ / 10;
2411 info->port.closing_wait = 30 * HZ;
2412 info->normal_termios = mxvar_sdriver->init_termios;
2413 init_waitqueue_head(&info->delta_msr_wait);
2414 memset(&info->mon_data, 0, sizeof(struct mxser_mon));
2415 info->err_shadow = 0;
2416 spin_lock_init(&info->slock);
2417
2418 /* before set INT ISR, disable all int */
2419 outb(inb(info->ioaddr + UART_IER) & 0xf0,
2420 info->ioaddr + UART_IER);
2421 }
2422
2423 retval = request_irq(brd->irq, mxser_interrupt, IRQF_SHARED, "mxser",
2424 brd);
2425 if (retval) {
2426 printk(KERN_ERR "Board %s: Request irq failed, IRQ (%d) may "
2427 "conflict with another device.\n",
2428 brd->info->name, brd->irq);
2429 /* We hold resources, we need to release them. */
2430 mxser_release_res(brd, pdev, 0);
2431 }
2432 return retval;
2433 }
2434
2435 static int __init mxser_get_ISA_conf(int cap, struct mxser_board *brd)
2436 {
2437 int id, i, bits;
2438 unsigned short regs[16], irq;
2439 unsigned char scratch, scratch2;
2440
2441 brd->chip_flag = MOXA_OTHER_UART;
2442
2443 id = mxser_read_register(cap, regs);
2444 switch (id) {
2445 case C168_ASIC_ID:
2446 brd->info = &mxser_cards[0];
2447 break;
2448 case C104_ASIC_ID:
2449 brd->info = &mxser_cards[1];
2450 break;
2451 case CI104J_ASIC_ID:
2452 brd->info = &mxser_cards[2];
2453 break;
2454 case C102_ASIC_ID:
2455 brd->info = &mxser_cards[5];
2456 break;
2457 case CI132_ASIC_ID:
2458 brd->info = &mxser_cards[6];
2459 break;
2460 case CI134_ASIC_ID:
2461 brd->info = &mxser_cards[7];
2462 break;
2463 default:
2464 return 0;
2465 }
2466
2467 irq = 0;
2468 /* some ISA cards have 2 ports, but we want to see them as 4-port (why?)
2469 Flag-hack checks if configuration should be read as 2-port here. */
2470 if (brd->info->nports == 2 || (brd->info->flags & MXSER_HAS2)) {
2471 irq = regs[9] & 0xF000;
2472 irq = irq | (irq >> 4);
2473 if (irq != (regs[9] & 0xFF00))
2474 goto err_irqconflict;
2475 } else if (brd->info->nports == 4) {
2476 irq = regs[9] & 0xF000;
2477 irq = irq | (irq >> 4);
2478 irq = irq | (irq >> 8);
2479 if (irq != regs[9])
2480 goto err_irqconflict;
2481 } else if (brd->info->nports == 8) {
2482 irq = regs[9] & 0xF000;
2483 irq = irq | (irq >> 4);
2484 irq = irq | (irq >> 8);
2485 if ((irq != regs[9]) || (irq != regs[10]))
2486 goto err_irqconflict;
2487 }
2488
2489 if (!irq) {
2490 printk(KERN_ERR "mxser: interrupt number unset\n");
2491 return -EIO;
2492 }
2493 brd->irq = ((int)(irq & 0xF000) >> 12);
2494 for (i = 0; i < 8; i++)
2495 brd->ports[i].ioaddr = (int) regs[i + 1] & 0xFFF8;
2496 if ((regs[12] & 0x80) == 0) {
2497 printk(KERN_ERR "mxser: invalid interrupt vector\n");
2498 return -EIO;
2499 }
2500 brd->vector = (int)regs[11]; /* interrupt vector */
2501 if (id == 1)
2502 brd->vector_mask = 0x00FF;
2503 else
2504 brd->vector_mask = 0x000F;
2505 for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) {
2506 if (regs[12] & bits) {
2507 brd->ports[i].baud_base = 921600;
2508 brd->ports[i].max_baud = 921600;
2509 } else {
2510 brd->ports[i].baud_base = 115200;
2511 brd->ports[i].max_baud = 115200;
2512 }
2513 }
2514 scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB);
2515 outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR);
2516 outb(0, cap + UART_EFR); /* EFR is the same as FCR */
2517 outb(scratch2, cap + UART_LCR);
2518 outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR);
2519 scratch = inb(cap + UART_IIR);
2520
2521 if (scratch & 0xC0)
2522 brd->uart_type = PORT_16550A;
2523 else
2524 brd->uart_type = PORT_16450;
2525 if (!request_region(brd->ports[0].ioaddr, 8 * brd->info->nports,
2526 "mxser(IO)")) {
2527 printk(KERN_ERR "mxser: can't request ports I/O region: "
2528 "0x%.8lx-0x%.8lx\n",
2529 brd->ports[0].ioaddr, brd->ports[0].ioaddr +
2530 8 * brd->info->nports - 1);
2531 return -EIO;
2532 }
2533 if (!request_region(brd->vector, 1, "mxser(vector)")) {
2534 release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
2535 printk(KERN_ERR "mxser: can't request interrupt vector region: "
2536 "0x%.8lx-0x%.8lx\n",
2537 brd->ports[0].ioaddr, brd->ports[0].ioaddr +
2538 8 * brd->info->nports - 1);
2539 return -EIO;
2540 }
2541 return brd->info->nports;
2542
2543 err_irqconflict:
2544 printk(KERN_ERR "mxser: invalid interrupt number\n");
2545 return -EIO;
2546 }
2547
2548 static int __devinit mxser_probe(struct pci_dev *pdev,
2549 const struct pci_device_id *ent)
2550 {
2551 #ifdef CONFIG_PCI
2552 struct mxser_board *brd;
2553 unsigned int i, j;
2554 unsigned long ioaddress;
2555 int retval = -EINVAL;
2556
2557 for (i = 0; i < MXSER_BOARDS; i++)
2558 if (mxser_boards[i].info == NULL)
2559 break;
2560
2561 if (i >= MXSER_BOARDS) {
2562 dev_err(&pdev->dev, "too many boards found (maximum %d), board "
2563 "not configured\n", MXSER_BOARDS);
2564 goto err;
2565 }
2566
2567 brd = &mxser_boards[i];
2568 brd->idx = i * MXSER_PORTS_PER_BOARD;
2569 dev_info(&pdev->dev, "found MOXA %s board (BusNo=%d, DevNo=%d)\n",
2570 mxser_cards[ent->driver_data].name,
2571 pdev->bus->number, PCI_SLOT(pdev->devfn));
2572
2573 retval = pci_enable_device(pdev);
2574 if (retval) {
2575 dev_err(&pdev->dev, "PCI enable failed\n");
2576 goto err;
2577 }
2578
2579 /* io address */
2580 ioaddress = pci_resource_start(pdev, 2);
2581 retval = pci_request_region(pdev, 2, "mxser(IO)");
2582 if (retval)
2583 goto err;
2584
2585 brd->info = &mxser_cards[ent->driver_data];
2586 for (i = 0; i < brd->info->nports; i++)
2587 brd->ports[i].ioaddr = ioaddress + 8 * i;
2588
2589 /* vector */
2590 ioaddress = pci_resource_start(pdev, 3);
2591 retval = pci_request_region(pdev, 3, "mxser(vector)");
2592 if (retval)
2593 goto err_relio;
2594 brd->vector = ioaddress;
2595
2596 /* irq */
2597 brd->irq = pdev->irq;
2598
2599 brd->chip_flag = CheckIsMoxaMust(brd->ports[0].ioaddr);
2600 brd->uart_type = PORT_16550A;
2601 brd->vector_mask = 0;
2602
2603 for (i = 0; i < brd->info->nports; i++) {
2604 for (j = 0; j < UART_INFO_NUM; j++) {
2605 if (Gpci_uart_info[j].type == brd->chip_flag) {
2606 brd->ports[i].max_baud =
2607 Gpci_uart_info[j].max_baud;
2608
2609 /* exception....CP-102 */
2610 if (brd->info->flags & MXSER_HIGHBAUD)
2611 brd->ports[i].max_baud = 921600;
2612 break;
2613 }
2614 }
2615 }
2616
2617 if (brd->chip_flag == MOXA_MUST_MU860_HWID) {
2618 for (i = 0; i < brd->info->nports; i++) {
2619 if (i < 4)
2620 brd->ports[i].opmode_ioaddr = ioaddress + 4;
2621 else
2622 brd->ports[i].opmode_ioaddr = ioaddress + 0x0c;
2623 }
2624 outb(0, ioaddress + 4); /* default set to RS232 mode */
2625 outb(0, ioaddress + 0x0c); /* default set to RS232 mode */
2626 }
2627
2628 for (i = 0; i < brd->info->nports; i++) {
2629 brd->vector_mask |= (1 << i);
2630 brd->ports[i].baud_base = 921600;
2631 }
2632
2633 /* mxser_initbrd will hook ISR. */
2634 retval = mxser_initbrd(brd, pdev);
2635 if (retval)
2636 goto err_null;
2637
2638 for (i = 0; i < brd->info->nports; i++)
2639 tty_register_device(mxvar_sdriver, brd->idx + i, &pdev->dev);
2640
2641 pci_set_drvdata(pdev, brd);
2642
2643 return 0;
2644 err_relio:
2645 pci_release_region(pdev, 2);
2646 err_null:
2647 brd->info = NULL;
2648 err:
2649 return retval;
2650 #else
2651 return -ENODEV;
2652 #endif
2653 }
2654
2655 static void __devexit mxser_remove(struct pci_dev *pdev)
2656 {
2657 struct mxser_board *brd = pci_get_drvdata(pdev);
2658 unsigned int i;
2659
2660 for (i = 0; i < brd->info->nports; i++)
2661 tty_unregister_device(mxvar_sdriver, brd->idx + i);
2662
2663 mxser_release_res(brd, pdev, 1);
2664 brd->info = NULL;
2665 }
2666
2667 static struct pci_driver mxser_driver = {
2668 .name = "mxser",
2669 .id_table = mxser_pcibrds,
2670 .probe = mxser_probe,
2671 .remove = __devexit_p(mxser_remove)
2672 };
2673
2674 static int __init mxser_module_init(void)
2675 {
2676 struct mxser_board *brd;
2677 unsigned int b, i, m;
2678 int retval;
2679
2680 mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1);
2681 if (!mxvar_sdriver)
2682 return -ENOMEM;
2683
2684 printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n",
2685 MXSER_VERSION);
2686
2687 /* Initialize the tty_driver structure */
2688 mxvar_sdriver->owner = THIS_MODULE;
2689 mxvar_sdriver->magic = TTY_DRIVER_MAGIC;
2690 mxvar_sdriver->name = "ttyMI";
2691 mxvar_sdriver->major = ttymajor;
2692 mxvar_sdriver->minor_start = 0;
2693 mxvar_sdriver->num = MXSER_PORTS + 1;
2694 mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL;
2695 mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL;
2696 mxvar_sdriver->init_termios = tty_std_termios;
2697 mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL;
2698 mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW|TTY_DRIVER_DYNAMIC_DEV;
2699 tty_set_operations(mxvar_sdriver, &mxser_ops);
2700
2701 retval = tty_register_driver(mxvar_sdriver);
2702 if (retval) {
2703 printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family "
2704 "tty driver !\n");
2705 goto err_put;
2706 }
2707
2708 /* Start finding ISA boards here */
2709 for (m = 0, b = 0; b < MXSER_BOARDS; b++) {
2710 if (!ioaddr[b])
2711 continue;
2712
2713 brd = &mxser_boards[m];
2714 retval = mxser_get_ISA_conf(ioaddr[b], brd);
2715 if (retval <= 0) {
2716 brd->info = NULL;
2717 continue;
2718 }
2719
2720 printk(KERN_INFO "mxser: found MOXA %s board (CAP=0x%lx)\n",
2721 brd->info->name, ioaddr[b]);
2722
2723 /* mxser_initbrd will hook ISR. */
2724 if (mxser_initbrd(brd, NULL) < 0) {
2725 brd->info = NULL;
2726 continue;
2727 }
2728
2729 brd->idx = m * MXSER_PORTS_PER_BOARD;
2730 for (i = 0; i < brd->info->nports; i++)
2731 tty_register_device(mxvar_sdriver, brd->idx + i, NULL);
2732
2733 m++;
2734 }
2735
2736 retval = pci_register_driver(&mxser_driver);
2737 if (retval) {
2738 printk(KERN_ERR "mxser: can't register pci driver\n");
2739 if (!m) {
2740 retval = -ENODEV;
2741 goto err_unr;
2742 } /* else: we have some ISA cards under control */
2743 }
2744
2745 return 0;
2746 err_unr:
2747 tty_unregister_driver(mxvar_sdriver);
2748 err_put:
2749 put_tty_driver(mxvar_sdriver);
2750 return retval;
2751 }
2752
2753 static void __exit mxser_module_exit(void)
2754 {
2755 unsigned int i, j;
2756
2757 pci_unregister_driver(&mxser_driver);
2758
2759 for (i = 0; i < MXSER_BOARDS; i++) /* ISA remains */
2760 if (mxser_boards[i].info != NULL)
2761 for (j = 0; j < mxser_boards[i].info->nports; j++)
2762 tty_unregister_device(mxvar_sdriver,
2763 mxser_boards[i].idx + j);
2764 tty_unregister_driver(mxvar_sdriver);
2765 put_tty_driver(mxvar_sdriver);
2766
2767 for (i = 0; i < MXSER_BOARDS; i++)
2768 if (mxser_boards[i].info != NULL)
2769 mxser_release_res(&mxser_boards[i], NULL, 1);
2770 }
2771
2772 module_init(mxser_module_init);
2773 module_exit(mxser_module_exit);
Support for the Chinese Samsung S3C2440 based development boards