1 #include <linux/errno.h>
2 #include <linux/signal.h>
3 #include <linux/sched.h>
4 #include <linux/ioport.h>
5 #include <linux/interrupt.h>
6 #include <linux/slab.h>
7 #include <linux/random.h>
8 #include <linux/init.h>
9 #include <linux/kernel_stat.h>
10 #include <linux/sysdev.h>
11 #include <linux/bitops.h>
13 #include <linux/delay.h>
15 #include <asm/atomic.h>
16 #include <asm/system.h>
17 #include <asm/timer.h>
18 #include <asm/pgtable.h>
21 #include <asm/setup.h>
22 #include <asm/i8259.h>
23 #include <asm/traps.h>
27 * Note that on a 486, we don't want to do a SIGFPE on an irq13
28 * as the irq is unreliable, and exception 16 works correctly
29 * (ie as explained in the intel literature). On a 386, you
30 * can't use exception 16 due to bad IBM design, so we have to
31 * rely on the less exact irq13.
33 * Careful.. Not only is IRQ13 unreliable, but it is also
34 * leads to races. IBM designers who came up with it should
38 static irqreturn_t
math_error_irq(int cpl
, void *dev_id
)
41 if (ignore_fpu_irq
|| !boot_cpu_data
.hard_math
)
43 math_error((void __user
*)get_irq_regs()->ip
);
48 * New motherboards sometimes make IRQ 13 be a PCI interrupt,
49 * so allow interrupt sharing.
51 static struct irqaction fpu_irq
= {
52 .handler
= math_error_irq
,
57 * IRQ2 is cascade interrupt to second interrupt controller
59 static struct irqaction irq2
= {
64 DEFINE_PER_CPU(vector_irq_t
, vector_irq
) = {
65 [0 ... IRQ0_VECTOR
- 1] = -1,
82 [IRQ15_VECTOR
+ 1 ... NR_VECTORS
- 1] = -1
85 int vector_used_by_percpu_irq(unsigned int vector
)
89 for_each_online_cpu(cpu
) {
90 if (per_cpu(vector_irq
, cpu
)[vector
] != -1)
97 static void __init
init_ISA_irqs(void)
101 #ifdef CONFIG_X86_LOCAL_APIC
107 * 16 old-style INTA-cycle interrupts:
109 for (i
= 0; i
< NR_IRQS_LEGACY
; i
++) {
110 struct irq_desc
*desc
= irq_to_desc(i
);
112 desc
->status
= IRQ_DISABLED
;
116 set_irq_chip_and_handler_name(i
, &i8259A_chip
,
117 handle_level_irq
, "XT");
121 /* Overridden in paravirt.c */
122 void init_IRQ(void) __attribute__((weak
, alias("native_init_IRQ")));
124 static void __init
smp_intr_init(void)
127 #if defined(CONFIG_X86_64) || defined(CONFIG_X86_LOCAL_APIC)
129 * The reschedule interrupt is a CPU-to-CPU reschedule-helper
130 * IPI, driven by wakeup.
132 alloc_intr_gate(RESCHEDULE_VECTOR
, reschedule_interrupt
);
134 /* IPIs for invalidation */
135 alloc_intr_gate(INVALIDATE_TLB_VECTOR_START
+0, invalidate_interrupt0
);
136 alloc_intr_gate(INVALIDATE_TLB_VECTOR_START
+1, invalidate_interrupt1
);
137 alloc_intr_gate(INVALIDATE_TLB_VECTOR_START
+2, invalidate_interrupt2
);
138 alloc_intr_gate(INVALIDATE_TLB_VECTOR_START
+3, invalidate_interrupt3
);
139 alloc_intr_gate(INVALIDATE_TLB_VECTOR_START
+4, invalidate_interrupt4
);
140 alloc_intr_gate(INVALIDATE_TLB_VECTOR_START
+5, invalidate_interrupt5
);
141 alloc_intr_gate(INVALIDATE_TLB_VECTOR_START
+6, invalidate_interrupt6
);
142 alloc_intr_gate(INVALIDATE_TLB_VECTOR_START
+7, invalidate_interrupt7
);
144 /* IPI for generic function call */
145 alloc_intr_gate(CALL_FUNCTION_VECTOR
, call_function_interrupt
);
147 /* IPI for generic single function call */
148 alloc_intr_gate(CALL_FUNCTION_SINGLE_VECTOR
,
149 call_function_single_interrupt
);
151 /* Low priority IPI to cleanup after moving an irq */
152 set_intr_gate(IRQ_MOVE_CLEANUP_VECTOR
, irq_move_cleanup_interrupt
);
153 set_bit(IRQ_MOVE_CLEANUP_VECTOR
, used_vectors
);
155 #endif /* CONFIG_SMP */
159 * x86_quirk_pre_intr_init - initialisation prior to setting up interrupt vectors
162 * Perform any necessary interrupt initialisation prior to setting up
163 * the "ordinary" interrupt call gates. For legacy reasons, the ISA
164 * interrupts should be initialised here if the machine emulates a PC
167 static void __init
x86_quirk_pre_intr_init(void)
169 if (x86_quirks
->arch_pre_intr_init
) {
170 if (x86_quirks
->arch_pre_intr_init())
176 static void __init
apic_intr_init(void)
180 #ifdef CONFIG_X86_LOCAL_APIC
181 /* self generated IPI for local APIC timer */
182 alloc_intr_gate(LOCAL_TIMER_VECTOR
, apic_timer_interrupt
);
184 /* generic IPI for platform specific use */
185 alloc_intr_gate(GENERIC_INTERRUPT_VECTOR
, generic_interrupt
);
187 /* IPI vectors for APIC spurious and error interrupts */
188 alloc_intr_gate(SPURIOUS_APIC_VECTOR
, spurious_interrupt
);
189 alloc_intr_gate(ERROR_APIC_VECTOR
, error_interrupt
);
192 #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_MCE_P4THERMAL)
193 /* thermal monitor LVT interrupt */
194 alloc_intr_gate(THERMAL_APIC_VECTOR
, thermal_interrupt
);
198 void __init
native_init_IRQ(void)
202 /* Execute any quirks before the call gates are initialised: */
203 x86_quirk_pre_intr_init();
206 * Cover the whole vector space, no vector can escape
207 * us. (some of these will be overridden and become
208 * 'special' SMP interrupts)
210 for (i
= FIRST_EXTERNAL_VECTOR
; i
< NR_VECTORS
; i
++) {
211 /* SYSCALL_VECTOR was reserved in trap_init. */
212 if (i
!= SYSCALL_VECTOR
)
213 set_intr_gate(i
, interrupt
[i
-FIRST_EXTERNAL_VECTOR
]);
222 * Call quirks after call gates are initialised (usually add in
223 * the architecture specific gates):
225 x86_quirk_intr_init();
228 * External FPU? Set up irq13 if so, for
229 * original braindamaged IBM FERR coupling.
231 if (boot_cpu_data
.hard_math
&& !cpu_has_fpu
)
232 setup_irq(FPU_IRQ
, &fpu_irq
);
234 irq_ctx_init(smp_processor_id());