include/asm-sparc/head.h

   1 /* $Id: head.h,v 1.39 2000/05/26 22:18:45 ecd Exp $ */
   2 #ifndef __SPARC_HEAD_H
   3 #define __SPARC_HEAD_H
   4
   5 #define KERNBASE        0xf0000000  /* First address the kernel will eventually be */
   6 #define LOAD_ADDR       0x4000      /* prom jumps to us here unless this is elf /boot */
   7 #define SUN4C_SEGSZ     (1 << 18)
   8 #define SRMMU_L1_KBASE_OFFSET ((KERNBASE>>24)<<2)  /* Used in boot remapping. */
   9 #define INTS_ENAB        0x01           /* entry.S uses this. */
  10
  11 #define SUN4_PROM_VECTOR 0xFFE81000     /* SUN4 PROM needs to be hardwired */
  12
  13 #define WRITE_PAUSE      nop; nop; nop; /* Have to do this after %wim/%psr chg */
  14 #define NOP_INSN         0x01000000     /* Used to patch sparc_save_state */
  15
  16 /* Here are some trap goodies */
  17
  18 /* Generic trap entry. */
  19 #define TRAP_ENTRY(type, label) \
  20         rd %psr, %l0; b label; rd %wim, %l3; nop;
  21
  22 /* Data/text faults. Defaults to sun4c version at boot time. */
  23 #define SPARC_TFAULT rd %psr, %l0; rd %wim, %l3; b sun4c_fault; mov 1, %l7;
  24 #define SPARC_DFAULT rd %psr, %l0; rd %wim, %l3; b sun4c_fault; mov 0, %l7;
  25 #define SRMMU_TFAULT rd %psr, %l0; rd %wim, %l3; b srmmu_fault; mov 1, %l7;
  26 #define SRMMU_DFAULT rd %psr, %l0; rd %wim, %l3; b srmmu_fault; mov 0, %l7;
  27
  28 /* This is for traps we should NEVER get. */
  29 #define BAD_TRAP(num) \
  30         rd %psr, %l0; mov num, %l7; b bad_trap_handler; rd %wim, %l3;
  31
  32 /* This is for traps when we want just skip the instruction which caused it */
  33 #define SKIP_TRAP(type, name) \
  34         jmpl %l2, %g0; rett %l2 + 4; nop; nop;
  35
  36 /* Notice that for the system calls we pull a trick.  We load up a
  37  * different pointer to the system call vector table in %l7, but call
  38  * the same generic system call low-level entry point.  The trap table
  39  * entry sequences are also HyperSparc pipeline friendly ;-)
  40  */
  41
  42 /* Software trap for Linux system calls. */
  43 #define LINUX_SYSCALL_TRAP \
  44         sethi %hi(sys_call_table), %l7; \
  45         or %l7, %lo(sys_call_table), %l7; \
  46         b linux_sparc_syscall; \
  47         rd %psr, %l0;
  48
  49 #define BREAKPOINT_TRAP \
  50         b breakpoint_trap; \
  51         rd %psr,%l0; \
  52         nop; \
  53         nop;
  54
  55 /* The Get Condition Codes software trap for userland. */
  56 #define GETCC_TRAP \
  57         b getcc_trap_handler; mov %psr, %l0; nop; nop;
  58
  59 /* The Set Condition Codes software trap for userland. */
  60 #define SETCC_TRAP \
  61         b setcc_trap_handler; mov %psr, %l0; nop; nop;
  62
  63 /* The Get PSR software trap for userland. */
  64 #define GETPSR_TRAP \
  65         mov %psr, %i0; jmp %l2; rett %l2 + 4; nop;
  66
  67 /* This is for hard interrupts from level 1-14, 15 is non-maskable (nmi) and
  68  * gets handled with another macro.
  69  */
  70 #define TRAP_ENTRY_INTERRUPT(int_level) \
  71         mov int_level, %l7; rd %psr, %l0; b real_irq_entry; rd %wim, %l3;
  72
  73 /* NMI's (Non Maskable Interrupts) are special, you can't keep them
  74  * from coming in, and basically if you get one, the shows over. ;(
  75  * On the sun4c they are usually asynchronous memory errors, on the
  76  * the sun4m they could be either due to mem errors or a software
  77  * initiated interrupt from the prom/kern on an SMP box saying "I
  78  * command you to do CPU tricks, read your mailbox for more info."
  79  */
  80 #define NMI_TRAP \
  81         rd %wim, %l3; b linux_trap_nmi_sun4c; mov %psr, %l0; nop;
  82
  83 /* Window overflows/underflows are special and we need to try to be as
  84  * efficient as possible here....
  85  */
  86 #define WINDOW_SPILL \
  87         rd %psr, %l0; rd %wim, %l3; b spill_window_entry; andcc %l0, PSR_PS, %g0;
  88
  89 #define WINDOW_FILL \
  90         rd %psr, %l0; rd %wim, %l3; b fill_window_entry; andcc %l0, PSR_PS, %g0;
  91
  92 #endif /* __SPARC_HEAD_H */