arch/m68knommu/platform/5272/config.c

   1 /***************************************************************************/
   2
   3 /*
   4  *      linux/arch/m68knommu/platform/5272/config.c
   5  *
   6  *      Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
   7  *      Copyright (C) 2001-2002, SnapGear Inc. (www.snapgear.com)
   8  */
   9
  10 /***************************************************************************/
  11
  12 #include <linux/kernel.h>
  13 #include <linux/param.h>
  14 #include <linux/init.h>
  15 #include <linux/io.h>
  16 #include <asm/machdep.h>
  17 #include <asm/coldfire.h>
  18 #include <asm/mcfsim.h>
  19 #include <asm/mcfuart.h>
  20
  21 /***************************************************************************/
  22
  23 extern unsigned int mcf_timervector;
  24 extern unsigned int mcf_profilevector;
  25 extern unsigned int mcf_timerlevel;
  26
  27 /***************************************************************************/
  28
  29 /*
  30  *      Some platforms need software versions of the GPIO data registers.
  31  */
  32 unsigned short ppdata;
  33 unsigned char ledbank = 0xff;
  34
  35 /***************************************************************************/
  36
  37 static struct mcf_platform_uart m5272_uart_platform[] = {
  38         {
  39                 .mapbase        = MCF_MBAR + MCFUART_BASE1,
  40                 .irq            = 73,
  41         },
  42         {
  43                 .mapbase        = MCF_MBAR + MCFUART_BASE2,
  44                 .irq            = 74,
  45         },
  46         { },
  47 };
  48
  49 static struct platform_device m5272_uart = {
  50         .name                   = "mcfuart",
  51         .id                     = 0,
  52         .dev.platform_data      = m5272_uart_platform,
  53 };
  54
  55 static struct resource m5272_fec_resources[] = {
  56         {
  57                 .start          = MCF_MBAR + 0x840,
  58                 .end            = MCF_MBAR + 0x840 + 0x1cf,
  59                 .flags          = IORESOURCE_MEM,
  60         },
  61         {
  62                 .start          = 86,
  63                 .end            = 86,
  64                 .flags          = IORESOURCE_IRQ,
  65         },
  66         {
  67                 .start          = 87,
  68                 .end            = 87,
  69                 .flags          = IORESOURCE_IRQ,
  70         },
  71         {
  72                 .start          = 88,
  73                 .end            = 88,
  74                 .flags          = IORESOURCE_IRQ,
  75         },
  76 };
  77
  78 static struct platform_device m5272_fec = {
  79         .name                   = "fec",
  80         .id                     = 0,
  81         .num_resources          = ARRAY_SIZE(m5272_fec_resources),
  82         .resource               = m5272_fec_resources,
  83 };
  84
  85 static struct platform_device *m5272_devices[] __initdata = {
  86         &m5272_uart,
  87         &m5272_fec,
  88 };
  89
  90 /***************************************************************************/
  91
  92 static void __init m5272_uart_init_line(int line, int irq)
  93 {
  94         u32 v;
  95
  96         if ((line >= 0) && (line < 2)) {
  97                 v = (line) ? 0x0e000000 : 0xe0000000;
  98                 writel(v, MCF_MBAR + MCFSIM_ICR2);
  99
 100                 /* Enable the output lines for the serial ports */
 101                 v = readl(MCF_MBAR + MCFSIM_PBCNT);
 102                 v = (v & ~0x000000ff) | 0x00000055;
 103                 writel(v, MCF_MBAR + MCFSIM_PBCNT);
 104
 105                 v = readl(MCF_MBAR + MCFSIM_PDCNT);
 106                 v = (v & ~0x000003fc) | 0x000002a8;
 107                 writel(v, MCF_MBAR + MCFSIM_PDCNT);
 108         }
 109 }
 110
 111 static void __init m5272_uarts_init(void)
 112 {
 113         const int nrlines = ARRAY_SIZE(m5272_uart_platform);
 114         int line;
 115
 116         for (line = 0; (line < nrlines); line++)
 117                 m5272_uart_init_line(line, m5272_uart_platform[line].irq);
 118 }
 119
 120 /***************************************************************************/
 121
 122 static void __init m5272_fec_init(void)
 123 {
 124         u32 imr;
 125
 126         /* Unmask FEC interrupts at ColdFire interrupt controller */
 127         imr = readl(MCF_MBAR + MCFSIM_ICR3);
 128         imr = (imr & ~0x00000fff) | 0x00000ddd;
 129         writel(imr, MCF_MBAR + MCFSIM_ICR3);
 130
 131         imr = readl(MCF_MBAR + MCFSIM_ICR1);
 132         imr = (imr & ~0x0f000000) | 0x0d000000;
 133         writel(imr, MCF_MBAR + MCFSIM_ICR1);
 134 }
 135
 136 /***************************************************************************/
 137
 138 void mcf_disableall(void)
 139 {
 140         volatile unsigned long  *icrp;
 141
 142         icrp = (volatile unsigned long *) (MCF_MBAR + MCFSIM_ICR1);
 143         icrp[0] = 0x88888888;
 144         icrp[1] = 0x88888888;
 145         icrp[2] = 0x88888888;
 146         icrp[3] = 0x88888888;
 147 }
 148
 149 /***************************************************************************/
 150
 151 void mcf_autovector(unsigned int vec)
 152 {
 153         /* Everything is auto-vectored on the 5272 */
 154 }
 155
 156 /***************************************************************************/
 157
 158 void mcf_settimericr(int timer, int level)
 159 {
 160         volatile unsigned long *icrp;
 161
 162         if ((timer >= 1 ) && (timer <= 4)) {
 163                 icrp = (volatile unsigned long *) (MCF_MBAR + MCFSIM_ICR1);
 164                 *icrp = (0x8 | level) << ((4 - timer) * 4);
 165         }
 166 }
 167
 168 /***************************************************************************/
 169
 170 static void m5272_cpu_reset(void)
 171 {
 172         local_irq_disable();
 173         /* Set watchdog to reset, and enabled */
 174         __raw_writew(0, MCF_MBAR + MCFSIM_WIRR);
 175         __raw_writew(1, MCF_MBAR + MCFSIM_WRRR);
 176         __raw_writew(0, MCF_MBAR + MCFSIM_WCR);
 177         for (;;)
 178                 /* wait for watchdog to timeout */;
 179 }
 180
 181 /***************************************************************************/
 182
 183 void __init config_BSP(char *commandp, int size)
 184 {
 185 #if defined (CONFIG_MOD5272)
 186         volatile unsigned char  *pivrp;
 187
 188         /* Set base of device vectors to be 64 */
 189         pivrp = (volatile unsigned char *) (MCF_MBAR + MCFSIM_PIVR);
 190         *pivrp = 0x40;
 191 #endif
 192
 193         mcf_disableall();
 194
 195 #if defined(CONFIG_NETtel) || defined(CONFIG_SCALES)
 196         /* Copy command line from FLASH to local buffer... */
 197         memcpy(commandp, (char *) 0xf0004000, size);
 198         commandp[size-1] = 0;
 199 #elif defined(CONFIG_CANCam)
 200         /* Copy command line from FLASH to local buffer... */
 201         memcpy(commandp, (char *) 0xf0010000, size);
 202         commandp[size-1] = 0;
 203 #endif
 204
 205         mcf_timervector = 69;
 206         mcf_profilevector = 70;
 207         mach_reset = m5272_cpu_reset;
 208 }
 209
 210 /***************************************************************************/
 211
 212 static int __init init_BSP(void)
 213 {
 214         m5272_uarts_init();
 215         m5272_fec_init();
 216         platform_add_devices(m5272_devices, ARRAY_SIZE(m5272_devices));
 217         return 0;
 218 }
 219
 220 arch_initcall(init_BSP);
 221
 222 /***************************************************************************/