1 /* irq.c: UltraSparc IRQ handling/init/registry.
3 * Copyright (C) 1997, 2007 David S. Miller (davem@davemloft.net)
4 * Copyright (C) 1998 Eddie C. Dost (ecd@skynet.be)
5 * Copyright (C) 1998 Jakub Jelinek (jj@ultra.linux.cz)
8 #include <linux/module.h>
9 #include <linux/sched.h>
10 #include <linux/ptrace.h>
11 #include <linux/errno.h>
12 #include <linux/kernel_stat.h>
13 #include <linux/signal.h>
15 #include <linux/interrupt.h>
16 #include <linux/slab.h>
17 #include <linux/random.h>
18 #include <linux/init.h>
19 #include <linux/delay.h>
20 #include <linux/proc_fs.h>
21 #include <linux/seq_file.h>
22 #include <linux/bootmem.h>
23 #include <linux/irq.h>
25 #include <asm/ptrace.h>
26 #include <asm/processor.h>
27 #include <asm/atomic.h>
28 #include <asm/system.h>
32 #include <asm/iommu.h>
34 #include <asm/oplib.h>
36 #include <asm/timer.h>
38 #include <asm/starfire.h>
39 #include <asm/uaccess.h>
40 #include <asm/cache.h>
41 #include <asm/cpudata.h>
42 #include <asm/auxio.h>
44 #include <asm/hypervisor.h>
46 /* UPA nodes send interrupt packet to UltraSparc with first data reg
47 * value low 5 (7 on Starfire) bits holding the IRQ identifier being
48 * delivered. We must translate this into a non-vector IRQ so we can
49 * set the softint on this cpu.
51 * To make processing these packets efficient and race free we use
52 * an array of irq buckets below. The interrupt vector handler in
53 * entry.S feeds incoming packets into per-cpu pil-indexed lists.
54 * The IVEC handler does not need to act atomically, the PIL dispatch
55 * code uses CAS to get an atomic snapshot of the list and clear it
58 * If you make changes to ino_bucket, please update hand coded assembler
59 * of the vectored interrupt trap handler(s) in entry.S and sun4v_ivec.S
62 /*0x00*/unsigned long irq_chain
;
64 /* Virtual interrupt number assigned to this INO. */
65 /*0x08*/unsigned int virt_irq
;
66 /*0x0c*/unsigned int __pad
;
69 #define NUM_IVECS (IMAP_INR + 1)
70 struct ino_bucket ivector_table
[NUM_IVECS
] __attribute__ ((aligned (SMP_CACHE_BYTES
)));
72 #define __irq_ino(irq) \
73 (((struct ino_bucket *)(irq)) - &ivector_table[0])
74 #define __bucket(irq) ((struct ino_bucket *)(irq))
75 #define __irq(bucket) ((unsigned long)(bucket))
77 /* This has to be in the main kernel image, it cannot be
78 * turned into per-cpu data. The reason is that the main
79 * kernel image is locked into the TLB and this structure
80 * is accessed from the vectored interrupt trap handler. If
81 * access to this structure takes a TLB miss it could cause
82 * the 5-level sparc v9 trap stack to overflow.
84 #define irq_work(__cpu) &(trap_block[(__cpu)].irq_worklist)
88 unsigned int dev_handle
;
90 } virt_to_real_irq_table
[NR_IRQS
];
91 static DEFINE_SPINLOCK(virt_irq_alloc_lock
);
93 unsigned char virt_irq_alloc(unsigned long real_irq
)
98 BUILD_BUG_ON(NR_IRQS
>= 256);
100 spin_lock_irqsave(&virt_irq_alloc_lock
, flags
);
102 for (ent
= 1; ent
< NR_IRQS
; ent
++) {
103 if (!virt_to_real_irq_table
[ent
].irq
)
106 if (ent
>= NR_IRQS
) {
107 printk(KERN_ERR
"IRQ: Out of virtual IRQs.\n");
110 virt_to_real_irq_table
[ent
].irq
= real_irq
;
113 spin_unlock_irqrestore(&virt_irq_alloc_lock
, flags
);
118 #ifdef CONFIG_PCI_MSI
119 void virt_irq_free(unsigned int virt_irq
)
123 if (virt_irq
>= NR_IRQS
)
126 spin_lock_irqsave(&virt_irq_alloc_lock
, flags
);
128 virt_to_real_irq_table
[virt_irq
].irq
= 0;
130 spin_unlock_irqrestore(&virt_irq_alloc_lock
, flags
);
134 static unsigned long virt_to_real_irq(unsigned char virt_irq
)
136 return virt_to_real_irq_table
[virt_irq
].irq
;
140 * /proc/interrupts printing:
143 int show_interrupts(struct seq_file
*p
, void *v
)
145 int i
= *(loff_t
*) v
, j
;
146 struct irqaction
* action
;
151 for_each_online_cpu(j
)
152 seq_printf(p
, "CPU%d ",j
);
157 spin_lock_irqsave(&irq_desc
[i
].lock
, flags
);
158 action
= irq_desc
[i
].action
;
161 seq_printf(p
, "%3d: ",i
);
163 seq_printf(p
, "%10u ", kstat_irqs(i
));
165 for_each_online_cpu(j
)
166 seq_printf(p
, "%10u ", kstat_cpu(j
).irqs
[i
]);
168 seq_printf(p
, " %9s", irq_desc
[i
].chip
->typename
);
169 seq_printf(p
, " %s", action
->name
);
171 for (action
=action
->next
; action
; action
= action
->next
)
172 seq_printf(p
, ", %s", action
->name
);
176 spin_unlock_irqrestore(&irq_desc
[i
].lock
, flags
);
181 static unsigned int sun4u_compute_tid(unsigned long imap
, unsigned long cpuid
)
185 if (this_is_starfire
) {
186 tid
= starfire_translate(imap
, cpuid
);
187 tid
<<= IMAP_TID_SHIFT
;
190 if (tlb_type
== cheetah
|| tlb_type
== cheetah_plus
) {
193 __asm__ ("rdpr %%ver, %0" : "=r" (ver
));
194 if ((ver
>> 32UL) == __JALAPENO_ID
||
195 (ver
>> 32UL) == __SERRANO_ID
) {
196 tid
= cpuid
<< IMAP_TID_SHIFT
;
197 tid
&= IMAP_TID_JBUS
;
199 unsigned int a
= cpuid
& 0x1f;
200 unsigned int n
= (cpuid
>> 5) & 0x1f;
202 tid
= ((a
<< IMAP_AID_SHIFT
) |
203 (n
<< IMAP_NID_SHIFT
));
204 tid
&= (IMAP_AID_SAFARI
|
208 tid
= cpuid
<< IMAP_TID_SHIFT
;
216 struct irq_handler_data
{
220 void (*pre_handler
)(unsigned int, void *, void *);
221 void *pre_handler_arg1
;
222 void *pre_handler_arg2
;
225 static inline struct ino_bucket
*virt_irq_to_bucket(unsigned int virt_irq
)
227 unsigned long real_irq
= virt_to_real_irq(virt_irq
);
228 struct ino_bucket
*bucket
= NULL
;
230 if (likely(real_irq
))
231 bucket
= __bucket(real_irq
);
237 static int irq_choose_cpu(unsigned int virt_irq
)
239 cpumask_t mask
= irq_desc
[virt_irq
].affinity
;
242 if (cpus_equal(mask
, CPU_MASK_ALL
)) {
243 static int irq_rover
;
244 static DEFINE_SPINLOCK(irq_rover_lock
);
247 /* Round-robin distribution... */
249 spin_lock_irqsave(&irq_rover_lock
, flags
);
251 while (!cpu_online(irq_rover
)) {
252 if (++irq_rover
>= NR_CPUS
)
257 if (++irq_rover
>= NR_CPUS
)
259 } while (!cpu_online(irq_rover
));
261 spin_unlock_irqrestore(&irq_rover_lock
, flags
);
265 cpus_and(tmp
, cpu_online_map
, mask
);
270 cpuid
= first_cpu(tmp
);
276 static int irq_choose_cpu(unsigned int virt_irq
)
278 return real_hard_smp_processor_id();
282 static void sun4u_irq_enable(unsigned int virt_irq
)
284 struct irq_handler_data
*data
= get_irq_chip_data(virt_irq
);
287 unsigned long cpuid
, imap
, val
;
290 cpuid
= irq_choose_cpu(virt_irq
);
293 tid
= sun4u_compute_tid(imap
, cpuid
);
295 val
= upa_readq(imap
);
296 val
&= ~(IMAP_TID_UPA
| IMAP_TID_JBUS
|
297 IMAP_AID_SAFARI
| IMAP_NID_SAFARI
);
298 val
|= tid
| IMAP_VALID
;
299 upa_writeq(val
, imap
);
303 static void sun4u_set_affinity(unsigned int virt_irq
, cpumask_t mask
)
305 sun4u_irq_enable(virt_irq
);
308 static void sun4u_irq_disable(unsigned int virt_irq
)
310 struct irq_handler_data
*data
= get_irq_chip_data(virt_irq
);
313 unsigned long imap
= data
->imap
;
314 unsigned long tmp
= upa_readq(imap
);
317 upa_writeq(tmp
, imap
);
321 static void sun4u_irq_end(unsigned int virt_irq
)
323 struct irq_handler_data
*data
= get_irq_chip_data(virt_irq
);
324 struct irq_desc
*desc
= irq_desc
+ virt_irq
;
326 if (unlikely(desc
->status
& (IRQ_DISABLED
|IRQ_INPROGRESS
)))
330 upa_writeq(ICLR_IDLE
, data
->iclr
);
333 static void sun4v_irq_enable(unsigned int virt_irq
)
335 struct ino_bucket
*bucket
= virt_irq_to_bucket(virt_irq
);
336 unsigned int ino
= bucket
- &ivector_table
[0];
338 if (likely(bucket
)) {
342 cpuid
= irq_choose_cpu(virt_irq
);
344 err
= sun4v_intr_settarget(ino
, cpuid
);
346 printk(KERN_ERR
"sun4v_intr_settarget(%x,%lu): "
347 "err(%d)\n", ino
, cpuid
, err
);
348 err
= sun4v_intr_setstate(ino
, HV_INTR_STATE_IDLE
);
350 printk(KERN_ERR
"sun4v_intr_setstate(%x): "
351 "err(%d)\n", ino
, err
);
352 err
= sun4v_intr_setenabled(ino
, HV_INTR_ENABLED
);
354 printk(KERN_ERR
"sun4v_intr_setenabled(%x): err(%d)\n",
359 static void sun4v_set_affinity(unsigned int virt_irq
, cpumask_t mask
)
361 struct ino_bucket
*bucket
= virt_irq_to_bucket(virt_irq
);
362 unsigned int ino
= bucket
- &ivector_table
[0];
364 if (likely(bucket
)) {
368 cpuid
= irq_choose_cpu(virt_irq
);
370 err
= sun4v_intr_settarget(ino
, cpuid
);
372 printk(KERN_ERR
"sun4v_intr_settarget(%x,%lu): "
373 "err(%d)\n", ino
, cpuid
, err
);
377 static void sun4v_irq_disable(unsigned int virt_irq
)
379 struct ino_bucket
*bucket
= virt_irq_to_bucket(virt_irq
);
380 unsigned int ino
= bucket
- &ivector_table
[0];
382 if (likely(bucket
)) {
385 err
= sun4v_intr_setenabled(ino
, HV_INTR_DISABLED
);
387 printk(KERN_ERR
"sun4v_intr_setenabled(%x): "
388 "err(%d)\n", ino
, err
);
392 static void sun4v_irq_end(unsigned int virt_irq
)
394 struct ino_bucket
*bucket
= virt_irq_to_bucket(virt_irq
);
395 unsigned int ino
= bucket
- &ivector_table
[0];
396 struct irq_desc
*desc
= irq_desc
+ virt_irq
;
398 if (unlikely(desc
->status
& (IRQ_DISABLED
|IRQ_INPROGRESS
)))
401 if (likely(bucket
)) {
404 err
= sun4v_intr_setstate(ino
, HV_INTR_STATE_IDLE
);
406 printk(KERN_ERR
"sun4v_intr_setstate(%x): "
407 "err(%d)\n", ino
, err
);
411 static void sun4v_virq_enable(unsigned int virt_irq
)
413 struct ino_bucket
*bucket
= virt_irq_to_bucket(virt_irq
);
415 if (likely(bucket
)) {
416 unsigned long cpuid
, dev_handle
, dev_ino
;
419 cpuid
= irq_choose_cpu(virt_irq
);
421 dev_handle
= virt_to_real_irq_table
[virt_irq
].dev_handle
;
422 dev_ino
= virt_to_real_irq_table
[virt_irq
].dev_ino
;
424 err
= sun4v_vintr_set_target(dev_handle
, dev_ino
, cpuid
);
426 printk(KERN_ERR
"sun4v_vintr_set_target(%lx,%lx,%lu): "
428 dev_handle
, dev_ino
, cpuid
, err
);
429 err
= sun4v_vintr_set_state(dev_handle
, dev_ino
,
432 printk(KERN_ERR
"sun4v_vintr_set_state(%lx,%lx,"
433 "HV_INTR_STATE_IDLE): err(%d)\n",
434 dev_handle
, dev_ino
, err
);
435 err
= sun4v_vintr_set_valid(dev_handle
, dev_ino
,
438 printk(KERN_ERR
"sun4v_vintr_set_state(%lx,%lx,"
439 "HV_INTR_ENABLED): err(%d)\n",
440 dev_handle
, dev_ino
, err
);
444 static void sun4v_virt_set_affinity(unsigned int virt_irq
, cpumask_t mask
)
446 struct ino_bucket
*bucket
= virt_irq_to_bucket(virt_irq
);
448 if (likely(bucket
)) {
449 unsigned long cpuid
, dev_handle
, dev_ino
;
452 cpuid
= irq_choose_cpu(virt_irq
);
454 dev_handle
= virt_to_real_irq_table
[virt_irq
].dev_handle
;
455 dev_ino
= virt_to_real_irq_table
[virt_irq
].dev_ino
;
457 err
= sun4v_vintr_set_target(dev_handle
, dev_ino
, cpuid
);
459 printk(KERN_ERR
"sun4v_vintr_set_target(%lx,%lx,%lu): "
461 dev_handle
, dev_ino
, cpuid
, err
);
465 static void sun4v_virq_disable(unsigned int virt_irq
)
467 struct ino_bucket
*bucket
= virt_irq_to_bucket(virt_irq
);
469 if (likely(bucket
)) {
470 unsigned long dev_handle
, dev_ino
;
473 dev_handle
= virt_to_real_irq_table
[virt_irq
].dev_handle
;
474 dev_ino
= virt_to_real_irq_table
[virt_irq
].dev_ino
;
476 err
= sun4v_vintr_set_valid(dev_handle
, dev_ino
,
479 printk(KERN_ERR
"sun4v_vintr_set_state(%lx,%lx,"
480 "HV_INTR_DISABLED): err(%d)\n",
481 dev_handle
, dev_ino
, err
);
485 static void sun4v_virq_end(unsigned int virt_irq
)
487 struct ino_bucket
*bucket
= virt_irq_to_bucket(virt_irq
);
488 struct irq_desc
*desc
= irq_desc
+ virt_irq
;
490 if (unlikely(desc
->status
& (IRQ_DISABLED
|IRQ_INPROGRESS
)))
493 if (likely(bucket
)) {
494 unsigned long dev_handle
, dev_ino
;
497 dev_handle
= virt_to_real_irq_table
[virt_irq
].dev_handle
;
498 dev_ino
= virt_to_real_irq_table
[virt_irq
].dev_ino
;
500 err
= sun4v_vintr_set_state(dev_handle
, dev_ino
,
503 printk(KERN_ERR
"sun4v_vintr_set_state(%lx,%lx,"
504 "HV_INTR_STATE_IDLE): err(%d)\n",
505 dev_handle
, dev_ino
, err
);
509 static void run_pre_handler(unsigned int virt_irq
)
511 struct ino_bucket
*bucket
= virt_irq_to_bucket(virt_irq
);
512 struct irq_handler_data
*data
= get_irq_chip_data(virt_irq
);
514 if (likely(data
->pre_handler
)) {
515 data
->pre_handler(__irq_ino(__irq(bucket
)),
516 data
->pre_handler_arg1
,
517 data
->pre_handler_arg2
);
521 static struct irq_chip sun4u_irq
= {
523 .enable
= sun4u_irq_enable
,
524 .disable
= sun4u_irq_disable
,
525 .end
= sun4u_irq_end
,
526 .set_affinity
= sun4u_set_affinity
,
529 static struct irq_chip sun4u_irq_ack
= {
530 .typename
= "sun4u+ack",
531 .enable
= sun4u_irq_enable
,
532 .disable
= sun4u_irq_disable
,
533 .ack
= run_pre_handler
,
534 .end
= sun4u_irq_end
,
535 .set_affinity
= sun4u_set_affinity
,
538 static struct irq_chip sun4v_irq
= {
540 .enable
= sun4v_irq_enable
,
541 .disable
= sun4v_irq_disable
,
542 .end
= sun4v_irq_end
,
543 .set_affinity
= sun4v_set_affinity
,
546 static struct irq_chip sun4v_virq
= {
547 .typename
= "vsun4v",
548 .enable
= sun4v_virq_enable
,
549 .disable
= sun4v_virq_disable
,
550 .end
= sun4v_virq_end
,
551 .set_affinity
= sun4v_virt_set_affinity
,
554 void irq_install_pre_handler(int virt_irq
,
555 void (*func
)(unsigned int, void *, void *),
556 void *arg1
, void *arg2
)
558 struct irq_handler_data
*data
= get_irq_chip_data(virt_irq
);
559 struct irq_chip
*chip
= get_irq_chip(virt_irq
);
561 if (WARN_ON(chip
== &sun4v_irq
|| chip
== &sun4v_virq
)) {
562 printk(KERN_ERR
"IRQ: Trying to install pre-handler on "
563 "sun4v irq %u\n", virt_irq
);
567 data
->pre_handler
= func
;
568 data
->pre_handler_arg1
= arg1
;
569 data
->pre_handler_arg2
= arg2
;
571 if (chip
== &sun4u_irq_ack
)
574 set_irq_chip(virt_irq
, &sun4u_irq_ack
);
577 unsigned int build_irq(int inofixup
, unsigned long iclr
, unsigned long imap
)
579 struct ino_bucket
*bucket
;
580 struct irq_handler_data
*data
;
583 BUG_ON(tlb_type
== hypervisor
);
585 ino
= (upa_readq(imap
) & (IMAP_IGN
| IMAP_INO
)) + inofixup
;
586 bucket
= &ivector_table
[ino
];
587 if (!bucket
->virt_irq
) {
588 bucket
->virt_irq
= virt_irq_alloc(__irq(bucket
));
589 set_irq_chip(bucket
->virt_irq
, &sun4u_irq
);
592 data
= get_irq_chip_data(bucket
->virt_irq
);
596 data
= kzalloc(sizeof(struct irq_handler_data
), GFP_ATOMIC
);
597 if (unlikely(!data
)) {
598 prom_printf("IRQ: kzalloc(irq_handler_data) failed.\n");
601 set_irq_chip_data(bucket
->virt_irq
, data
);
607 return bucket
->virt_irq
;
610 static unsigned int sun4v_build_common(unsigned long sysino
,
611 struct irq_chip
*chip
)
613 struct ino_bucket
*bucket
;
614 struct irq_handler_data
*data
;
616 BUG_ON(tlb_type
!= hypervisor
);
618 bucket
= &ivector_table
[sysino
];
619 if (!bucket
->virt_irq
) {
620 bucket
->virt_irq
= virt_irq_alloc(__irq(bucket
));
621 set_irq_chip(bucket
->virt_irq
, chip
);
624 data
= get_irq_chip_data(bucket
->virt_irq
);
628 data
= kzalloc(sizeof(struct irq_handler_data
), GFP_ATOMIC
);
629 if (unlikely(!data
)) {
630 prom_printf("IRQ: kzalloc(irq_handler_data) failed.\n");
633 set_irq_chip_data(bucket
->virt_irq
, data
);
635 /* Catch accidental accesses to these things. IMAP/ICLR handling
636 * is done by hypervisor calls on sun4v platforms, not by direct
643 return bucket
->virt_irq
;
646 unsigned int sun4v_build_irq(u32 devhandle
, unsigned int devino
)
648 unsigned long sysino
= sun4v_devino_to_sysino(devhandle
, devino
);
650 return sun4v_build_common(sysino
, &sun4v_irq
);
653 unsigned int sun4v_build_virq(u32 devhandle
, unsigned int devino
)
655 unsigned long sysino
, hv_err
;
658 BUG_ON(devhandle
& devino
);
660 sysino
= devhandle
| devino
;
661 BUG_ON(sysino
& ~(IMAP_IGN
| IMAP_INO
));
663 hv_err
= sun4v_vintr_set_cookie(devhandle
, devino
, sysino
);
665 prom_printf("IRQ: Fatal, cannot set cookie for [%x:%x] "
666 "err=%lu\n", devhandle
, devino
, hv_err
);
670 virq
= sun4v_build_common(sysino
, &sun4v_virq
);
672 virt_to_real_irq_table
[virq
].dev_handle
= devhandle
;
673 virt_to_real_irq_table
[virq
].dev_ino
= devino
;
678 void ack_bad_irq(unsigned int virt_irq
)
680 struct ino_bucket
*bucket
= virt_irq_to_bucket(virt_irq
);
681 unsigned int ino
= 0xdeadbeef;
684 ino
= bucket
- &ivector_table
[0];
686 printk(KERN_CRIT
"Unexpected IRQ from ino[%x] virt_irq[%u]\n",
690 void handler_irq(int irq
, struct pt_regs
*regs
)
692 struct ino_bucket
*bucket
;
693 struct pt_regs
*old_regs
;
694 unsigned long pstate
;
696 clear_softint(1 << irq
);
698 old_regs
= set_irq_regs(regs
);
701 /* Grab an atomic snapshot of the pending IVECs. */
702 __asm__
__volatile__("rdpr %%pstate, %0\n\t"
703 "wrpr %0, %3, %%pstate\n\t"
706 "wrpr %0, 0x0, %%pstate\n\t"
707 : "=&r" (pstate
), "=&r" (bucket
)
708 : "r" (irq_work(smp_processor_id())),
713 struct ino_bucket
*next
= __bucket(bucket
->irq_chain
);
715 bucket
->irq_chain
= 0UL;
716 __do_IRQ(bucket
->virt_irq
);
722 set_irq_regs(old_regs
);
725 #ifdef CONFIG_HOTPLUG_CPU
726 void fixup_irqs(void)
730 for (irq
= 0; irq
< NR_IRQS
; irq
++) {
733 spin_lock_irqsave(&irq_desc
[irq
].lock
, flags
);
734 if (irq_desc
[irq
].action
&&
735 !(irq_desc
[irq
].status
& IRQ_PER_CPU
)) {
736 if (irq_desc
[irq
].chip
->set_affinity
)
737 irq_desc
[irq
].chip
->set_affinity(irq
,
738 irq_desc
[irq
].affinity
);
740 spin_unlock_irqrestore(&irq_desc
[irq
].lock
, flags
);
752 static struct sun5_timer
*prom_timers
;
753 static u64 prom_limit0
, prom_limit1
;
755 static void map_prom_timers(void)
757 struct device_node
*dp
;
758 const unsigned int *addr
;
760 /* PROM timer node hangs out in the top level of device siblings... */
761 dp
= of_find_node_by_path("/");
764 if (!strcmp(dp
->name
, "counter-timer"))
769 /* Assume if node is not present, PROM uses different tick mechanism
770 * which we should not care about.
773 prom_timers
= (struct sun5_timer
*) 0;
777 /* If PROM is really using this, it must be mapped by him. */
778 addr
= of_get_property(dp
, "address", NULL
);
780 prom_printf("PROM does not have timer mapped, trying to continue.\n");
781 prom_timers
= (struct sun5_timer
*) 0;
784 prom_timers
= (struct sun5_timer
*) ((unsigned long)addr
[0]);
787 static void kill_prom_timer(void)
792 /* Save them away for later. */
793 prom_limit0
= prom_timers
->limit0
;
794 prom_limit1
= prom_timers
->limit1
;
796 /* Just as in sun4c/sun4m PROM uses timer which ticks at IRQ 14.
797 * We turn both off here just to be paranoid.
799 prom_timers
->limit0
= 0;
800 prom_timers
->limit1
= 0;
802 /* Wheee, eat the interrupt packet too... */
803 __asm__
__volatile__(
805 " ldxa [%%g0] %0, %%g1\n"
806 " ldxa [%%g2] %1, %%g1\n"
807 " stxa %%g0, [%%g0] %0\n"
810 : "i" (ASI_INTR_RECEIVE
), "i" (ASI_INTR_R
)
814 void init_irqwork_curcpu(void)
816 int cpu
= hard_smp_processor_id();
818 trap_block
[cpu
].irq_worklist
= 0UL;
821 /* Please be very careful with register_one_mondo() and
822 * sun4v_register_mondo_queues().
824 * On SMP this gets invoked from the CPU trampoline before
825 * the cpu has fully taken over the trap table from OBP,
826 * and it's kernel stack + %g6 thread register state is
827 * not fully cooked yet.
829 * Therefore you cannot make any OBP calls, not even prom_printf,
830 * from these two routines.
832 static void __cpuinit
register_one_mondo(unsigned long paddr
, unsigned long type
, unsigned long qmask
)
834 unsigned long num_entries
= (qmask
+ 1) / 64;
835 unsigned long status
;
837 status
= sun4v_cpu_qconf(type
, paddr
, num_entries
);
838 if (status
!= HV_EOK
) {
839 prom_printf("SUN4V: sun4v_cpu_qconf(%lu:%lx:%lu) failed, "
840 "err %lu\n", type
, paddr
, num_entries
, status
);
845 void __cpuinit
sun4v_register_mondo_queues(int this_cpu
)
847 struct trap_per_cpu
*tb
= &trap_block
[this_cpu
];
849 register_one_mondo(tb
->cpu_mondo_pa
, HV_CPU_QUEUE_CPU_MONDO
,
850 tb
->cpu_mondo_qmask
);
851 register_one_mondo(tb
->dev_mondo_pa
, HV_CPU_QUEUE_DEVICE_MONDO
,
852 tb
->dev_mondo_qmask
);
853 register_one_mondo(tb
->resum_mondo_pa
, HV_CPU_QUEUE_RES_ERROR
,
855 register_one_mondo(tb
->nonresum_mondo_pa
, HV_CPU_QUEUE_NONRES_ERROR
,
859 static void __init
alloc_one_mondo(unsigned long *pa_ptr
, unsigned long qmask
)
861 unsigned long size
= PAGE_ALIGN(qmask
+ 1);
862 void *p
= __alloc_bootmem_low(size
, size
, 0);
864 prom_printf("SUN4V: Error, cannot allocate mondo queue.\n");
871 static void __init
alloc_one_kbuf(unsigned long *pa_ptr
, unsigned long qmask
)
873 unsigned long size
= PAGE_ALIGN(qmask
+ 1);
874 void *p
= __alloc_bootmem_low(size
, size
, 0);
877 prom_printf("SUN4V: Error, cannot allocate kbuf page.\n");
884 static void __init
init_cpu_send_mondo_info(struct trap_per_cpu
*tb
)
889 BUILD_BUG_ON((NR_CPUS
* sizeof(u16
)) > (PAGE_SIZE
- 64));
891 page
= alloc_bootmem_low_pages(PAGE_SIZE
);
893 prom_printf("SUN4V: Error, cannot allocate cpu mondo page.\n");
897 tb
->cpu_mondo_block_pa
= __pa(page
);
898 tb
->cpu_list_pa
= __pa(page
+ 64);
902 /* Allocate mondo and error queues for all possible cpus. */
903 static void __init
sun4v_init_mondo_queues(void)
907 for_each_possible_cpu(cpu
) {
908 struct trap_per_cpu
*tb
= &trap_block
[cpu
];
910 alloc_one_mondo(&tb
->cpu_mondo_pa
, tb
->cpu_mondo_qmask
);
911 alloc_one_mondo(&tb
->dev_mondo_pa
, tb
->dev_mondo_qmask
);
912 alloc_one_mondo(&tb
->resum_mondo_pa
, tb
->resum_qmask
);
913 alloc_one_kbuf(&tb
->resum_kernel_buf_pa
, tb
->resum_qmask
);
914 alloc_one_mondo(&tb
->nonresum_mondo_pa
, tb
->nonresum_qmask
);
915 alloc_one_kbuf(&tb
->nonresum_kernel_buf_pa
,
918 init_cpu_send_mondo_info(tb
);
921 /* Load up the boot cpu's entries. */
922 sun4v_register_mondo_queues(hard_smp_processor_id());
925 static struct irqaction timer_irq_action
= {
929 /* Only invoked on boot processor. */
930 void __init
init_IRQ(void)
934 memset(&ivector_table
[0], 0, sizeof(ivector_table
));
936 if (tlb_type
== hypervisor
)
937 sun4v_init_mondo_queues();
939 /* We need to clear any IRQ's pending in the soft interrupt
940 * registers, a spurious one could be left around from the
941 * PROM timer which we just disabled.
943 clear_softint(get_softint());
945 /* Now that ivector table is initialized, it is safe
946 * to receive IRQ vector traps. We will normally take
947 * one or two right now, in case some device PROM used
948 * to boot us wants to speak to us. We just ignore them.
950 __asm__
__volatile__("rdpr %%pstate, %%g1\n\t"
951 "or %%g1, %0, %%g1\n\t"
952 "wrpr %%g1, 0x0, %%pstate"
957 irq_desc
[0].action
= &timer_irq_action
;