1 #ifndef _ASM_IA64_PTRACE_H
2 #define _ASM_IA64_PTRACE_H
5 * Copyright (C) 1998-2004 Hewlett-Packard Co
6 * David Mosberger-Tang <davidm@hpl.hp.com>
7 * Stephane Eranian <eranian@hpl.hp.com>
8 * Copyright (C) 2003 Intel Co
9 * Suresh Siddha <suresh.b.siddha@intel.com>
10 * Fenghua Yu <fenghua.yu@intel.com>
11 * Arun Sharma <arun.sharma@intel.com>
13 * 12/07/98 S. Eranian added pt_regs & switch_stack
14 * 12/21/98 D. Mosberger updated to match latest code
15 * 6/17/99 D. Mosberger added second unat member to "struct switch_stack"
19 * When a user process is blocked, its state looks as follows:
21 * +----------------------+ ------- IA64_STK_OFFSET
23 * | struct pt_regs | |
25 * +----------------------+ |
28 * | (growing downwards) | |
29 * //.....................// |
31 * //.....................// |
33 * +----------------------+ |
34 * | struct switch_stack | |
36 * +----------------------+ |
38 * //.....................// |
40 * //.....................// |
42 * | register stack | |
43 * | (growing upwards) | |
45 * +----------------------+ | --- IA64_RBS_OFFSET
46 * | struct thread_info | | ^
47 * +----------------------+ | |
49 * | struct task_struct | | |
51 * +----------------------+ -------
53 * Note that ar.ec is not saved explicitly in pt_reg or switch_stack.
54 * This is because ar.ec is saved as part of ar.pfs.
60 #include <asm/asm-offsets.h>
64 * Base-2 logarithm of number of pages to allocate per task structure
65 * (including register backing store and memory stack):
67 #if defined(CONFIG_IA64_PAGE_SIZE_4KB)
68 # define KERNEL_STACK_SIZE_ORDER 3
69 #elif defined(CONFIG_IA64_PAGE_SIZE_8KB)
70 # define KERNEL_STACK_SIZE_ORDER 2
71 #elif defined(CONFIG_IA64_PAGE_SIZE_16KB)
72 # define KERNEL_STACK_SIZE_ORDER 1
74 # define KERNEL_STACK_SIZE_ORDER 0
77 #define IA64_RBS_OFFSET ((IA64_TASK_SIZE + IA64_THREAD_INFO_SIZE + 15) & ~15)
78 #define IA64_STK_OFFSET ((1 << KERNEL_STACK_SIZE_ORDER)*PAGE_SIZE)
80 #define KERNEL_STACK_SIZE IA64_STK_OFFSET
84 #include <asm/current.h>
88 * This struct defines the way the registers are saved on system
91 * We don't save all floating point register because the kernel
92 * is compiled to use only a very small subset, so the other are
95 * THIS STRUCTURE MUST BE A MULTIPLE 16-BYTE IN SIZE
96 * (because the memory stack pointer MUST ALWAYS be aligned this way)
100 /* The following registers are saved by SAVE_MIN: */
101 unsigned long b6
; /* scratch */
102 unsigned long b7
; /* scratch */
104 unsigned long ar_csd
; /* used by cmp8xchg16 (scratch) */
105 unsigned long ar_ssd
; /* reserved for future use (scratch) */
107 unsigned long r8
; /* scratch (return value register 0) */
108 unsigned long r9
; /* scratch (return value register 1) */
109 unsigned long r10
; /* scratch (return value register 2) */
110 unsigned long r11
; /* scratch (return value register 3) */
112 unsigned long cr_ipsr
; /* interrupted task's psr */
113 unsigned long cr_iip
; /* interrupted task's instruction pointer */
115 * interrupted task's function state; if bit 63 is cleared, it
116 * contains syscall's ar.pfs.pfm:
118 unsigned long cr_ifs
;
120 unsigned long ar_unat
; /* interrupted task's NaT register (preserved) */
121 unsigned long ar_pfs
; /* prev function state */
122 unsigned long ar_rsc
; /* RSE configuration */
123 /* The following two are valid only if cr_ipsr.cpl > 0 || ti->flags & _TIF_MCA_INIT */
124 unsigned long ar_rnat
; /* RSE NaT */
125 unsigned long ar_bspstore
; /* RSE bspstore */
127 unsigned long pr
; /* 64 predicate registers (1 bit each) */
128 unsigned long b0
; /* return pointer (bp) */
129 unsigned long loadrs
; /* size of dirty partition << 16 */
131 unsigned long r1
; /* the gp pointer */
132 unsigned long r12
; /* interrupted task's memory stack pointer */
133 unsigned long r13
; /* thread pointer */
135 unsigned long ar_fpsr
; /* floating point status (preserved) */
136 unsigned long r15
; /* scratch */
138 /* The remaining registers are NOT saved for system calls. */
140 unsigned long r14
; /* scratch */
141 unsigned long r2
; /* scratch */
142 unsigned long r3
; /* scratch */
144 /* The following registers are saved by SAVE_REST: */
145 unsigned long r16
; /* scratch */
146 unsigned long r17
; /* scratch */
147 unsigned long r18
; /* scratch */
148 unsigned long r19
; /* scratch */
149 unsigned long r20
; /* scratch */
150 unsigned long r21
; /* scratch */
151 unsigned long r22
; /* scratch */
152 unsigned long r23
; /* scratch */
153 unsigned long r24
; /* scratch */
154 unsigned long r25
; /* scratch */
155 unsigned long r26
; /* scratch */
156 unsigned long r27
; /* scratch */
157 unsigned long r28
; /* scratch */
158 unsigned long r29
; /* scratch */
159 unsigned long r30
; /* scratch */
160 unsigned long r31
; /* scratch */
162 unsigned long ar_ccv
; /* compare/exchange value (scratch) */
165 * Floating point registers that the kernel considers scratch:
167 struct ia64_fpreg f6
; /* scratch */
168 struct ia64_fpreg f7
; /* scratch */
169 struct ia64_fpreg f8
; /* scratch */
170 struct ia64_fpreg f9
; /* scratch */
171 struct ia64_fpreg f10
; /* scratch */
172 struct ia64_fpreg f11
; /* scratch */
176 * This structure contains the addition registers that need to
177 * preserved across a context switch. This generally consists of
178 * "preserved" registers.
180 struct switch_stack
{
181 unsigned long caller_unat
; /* user NaT collection register (preserved) */
182 unsigned long ar_fpsr
; /* floating-point status register */
184 struct ia64_fpreg f2
; /* preserved */
185 struct ia64_fpreg f3
; /* preserved */
186 struct ia64_fpreg f4
; /* preserved */
187 struct ia64_fpreg f5
; /* preserved */
189 struct ia64_fpreg f12
; /* scratch, but untouched by kernel */
190 struct ia64_fpreg f13
; /* scratch, but untouched by kernel */
191 struct ia64_fpreg f14
; /* scratch, but untouched by kernel */
192 struct ia64_fpreg f15
; /* scratch, but untouched by kernel */
193 struct ia64_fpreg f16
; /* preserved */
194 struct ia64_fpreg f17
; /* preserved */
195 struct ia64_fpreg f18
; /* preserved */
196 struct ia64_fpreg f19
; /* preserved */
197 struct ia64_fpreg f20
; /* preserved */
198 struct ia64_fpreg f21
; /* preserved */
199 struct ia64_fpreg f22
; /* preserved */
200 struct ia64_fpreg f23
; /* preserved */
201 struct ia64_fpreg f24
; /* preserved */
202 struct ia64_fpreg f25
; /* preserved */
203 struct ia64_fpreg f26
; /* preserved */
204 struct ia64_fpreg f27
; /* preserved */
205 struct ia64_fpreg f28
; /* preserved */
206 struct ia64_fpreg f29
; /* preserved */
207 struct ia64_fpreg f30
; /* preserved */
208 struct ia64_fpreg f31
; /* preserved */
210 unsigned long r4
; /* preserved */
211 unsigned long r5
; /* preserved */
212 unsigned long r6
; /* preserved */
213 unsigned long r7
; /* preserved */
215 unsigned long b0
; /* so we can force a direct return in copy_thread */
222 unsigned long ar_pfs
; /* previous function state */
223 unsigned long ar_lc
; /* loop counter (preserved) */
224 unsigned long ar_unat
; /* NaT bits for r4-r7 */
225 unsigned long ar_rnat
; /* RSE NaT collection register */
226 unsigned long ar_bspstore
; /* RSE dirty base (preserved) */
227 unsigned long pr
; /* 64 predicate registers (1 bit each) */
232 #define __ARCH_SYS_PTRACE 1
235 * We use the ia64_psr(regs)->ri to determine which of the three
236 * instructions in bundle (16 bytes) took the sample. Generate
237 * the canonical representation by adding to instruction pointer.
239 # define instruction_pointer(regs) ((regs)->cr_iip + ia64_psr(regs)->ri)
240 /* Conserve space in histogram by encoding slot bits in address
241 * bits 2 and 3 rather than bits 0 and 1.
243 #define profile_pc(regs) \
245 unsigned long __ip = instruction_pointer(regs); \
246 (__ip & ~3UL) + ((__ip & 3UL) << 2); \
249 /* given a pointer to a task_struct, return the user's pt_regs */
250 # define task_pt_regs(t) (((struct pt_regs *) ((char *) (t) + IA64_STK_OFFSET)) - 1)
251 # define ia64_psr(regs) ((struct ia64_psr *) &(regs)->cr_ipsr)
252 # define user_mode(regs) (((struct ia64_psr *) &(regs)->cr_ipsr)->cpl != 0)
253 # define user_stack(task,regs) ((long) regs - (long) task == IA64_STK_OFFSET - sizeof(*regs))
254 # define fsys_mode(task,regs) \
256 struct task_struct *_task = (task); \
257 struct pt_regs *_regs = (regs); \
258 !user_mode(_regs) && user_stack(_task, _regs); \
262 * System call handlers that, upon successful completion, need to return a negative value
263 * should call force_successful_syscall_return() right before returning. On architectures
264 * where the syscall convention provides for a separate error flag (e.g., alpha, ia64,
265 * ppc{,64}, sparc{,64}, possibly others), this macro can be used to ensure that the error
266 * flag will not get set. On architectures which do not support a separate error flag,
267 * the macro is a no-op and the spurious error condition needs to be filtered out by some
268 * other means (e.g., in user-level, by passing an extra argument to the syscall handler,
269 * or something along those lines).
271 * On ia64, we can clear the user's pt_regs->r8 to force a successful syscall.
273 # define force_successful_syscall_return() (task_pt_regs(current)->r8 = 0)
275 struct task_struct
; /* forward decl */
276 struct unw_frame_info
; /* forward decl */
278 extern void show_regs (struct pt_regs
*);
279 extern void ia64_do_show_stack (struct unw_frame_info
*, void *);
280 extern unsigned long ia64_get_user_rbs_end (struct task_struct
*, struct pt_regs
*,
282 extern long ia64_peek (struct task_struct
*, struct switch_stack
*, unsigned long,
283 unsigned long, long *);
284 extern long ia64_poke (struct task_struct
*, struct switch_stack
*, unsigned long,
285 unsigned long, long);
286 extern void ia64_flush_fph (struct task_struct
*);
287 extern void ia64_sync_fph (struct task_struct
*);
288 extern long ia64_sync_user_rbs (struct task_struct
*, struct switch_stack
*,
289 unsigned long, unsigned long);
291 /* get nat bits for scratch registers such that bit N==1 iff scratch register rN is a NaT */
292 extern unsigned long ia64_get_scratch_nat_bits (struct pt_regs
*pt
, unsigned long scratch_unat
);
293 /* put nat bits for scratch registers such that scratch register rN is a NaT iff bit N==1 */
294 extern unsigned long ia64_put_scratch_nat_bits (struct pt_regs
*pt
, unsigned long nat
);
296 extern void ia64_increment_ip (struct pt_regs
*pt
);
297 extern void ia64_decrement_ip (struct pt_regs
*pt
);
299 #endif /* !__KERNEL__ */
301 /* pt_all_user_regs is used for PTRACE_GETREGS PTRACE_SETREGS */
302 struct pt_all_user_regs
{
304 unsigned long cr_iip
;
306 unsigned long cr_ipsr
;
309 unsigned long gr
[32];
311 unsigned long ar
[128];
312 struct ia64_fpreg fr
[128];
315 #endif /* !__ASSEMBLY__ */
317 /* indices to application-registers array in pt_all_user_regs */
318 #define PT_AUR_RSC 16
319 #define PT_AUR_BSP 17
320 #define PT_AUR_BSPSTORE 18
321 #define PT_AUR_RNAT 19
322 #define PT_AUR_CCV 32
323 #define PT_AUR_UNAT 36
324 #define PT_AUR_FPSR 40
325 #define PT_AUR_PFS 64
330 * The numbers chosen here are somewhat arbitrary but absolutely MUST
331 * not overlap with any of the number assigned in <linux/ptrace.h>.
333 #define PTRACE_SINGLEBLOCK 12 /* resume execution until next branch */
334 #define PTRACE_OLD_GETSIGINFO 13 /* (replaced by PTRACE_GETSIGINFO in <linux/ptrace.h>) */
335 #define PTRACE_OLD_SETSIGINFO 14 /* (replaced by PTRACE_SETSIGINFO in <linux/ptrace.h>) */
336 #define PTRACE_GETREGS 18 /* get all registers (pt_all_user_regs) in one shot */
337 #define PTRACE_SETREGS 19 /* set all registers (pt_all_user_regs) in one shot */
339 #define PTRACE_OLDSETOPTIONS 21
341 #endif /* _ASM_IA64_PTRACE_H */