ACPI: asus_acpi: misc cleanups
[linux-2.6/mini2440.git] / arch / arm / mach-omap1 / board-h3.c
blob7b206116cd0391882f6d093325150bf9577acd80
1 /*
2 * linux/arch/arm/mach-omap1/board-h3.c
4 * This file contains OMAP1710 H3 specific code.
6 * Copyright (C) 2004 Texas Instruments, Inc.
7 * Copyright (C) 2002 MontaVista Software, Inc.
8 * Copyright (C) 2001 RidgeRun, Inc.
9 * Author: RidgeRun, Inc.
10 * Greg Lonnon (glonnon@ridgerun.com) or info@ridgerun.com
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
17 #include <linux/types.h>
18 #include <linux/init.h>
19 #include <linux/major.h>
20 #include <linux/kernel.h>
21 #include <linux/platform_device.h>
22 #include <linux/errno.h>
23 #include <linux/workqueue.h>
24 #include <linux/mtd/mtd.h>
25 #include <linux/mtd/nand.h>
26 #include <linux/mtd/partitions.h>
27 #include <linux/input.h>
29 #include <asm/setup.h>
30 #include <asm/page.h>
31 #include <asm/hardware.h>
32 #include <asm/mach-types.h>
33 #include <asm/mach/arch.h>
34 #include <asm/mach/flash.h>
35 #include <asm/mach/map.h>
37 #include <asm/arch/gpio.h>
38 #include <asm/arch/gpioexpander.h>
39 #include <asm/arch/irqs.h>
40 #include <asm/arch/mux.h>
41 #include <asm/arch/tc.h>
42 #include <asm/arch/irda.h>
43 #include <asm/arch/usb.h>
44 #include <asm/arch/keypad.h>
45 #include <asm/arch/dma.h>
46 #include <asm/arch/common.h>
48 extern int omap_gpio_init(void);
50 static int h3_keymap[] = {
51 KEY(0, 0, KEY_LEFT),
52 KEY(0, 1, KEY_RIGHT),
53 KEY(0, 2, KEY_3),
54 KEY(0, 3, KEY_F10),
55 KEY(0, 4, KEY_F5),
56 KEY(0, 5, KEY_9),
57 KEY(1, 0, KEY_DOWN),
58 KEY(1, 1, KEY_UP),
59 KEY(1, 2, KEY_2),
60 KEY(1, 3, KEY_F9),
61 KEY(1, 4, KEY_F7),
62 KEY(1, 5, KEY_0),
63 KEY(2, 0, KEY_ENTER),
64 KEY(2, 1, KEY_6),
65 KEY(2, 2, KEY_1),
66 KEY(2, 3, KEY_F2),
67 KEY(2, 4, KEY_F6),
68 KEY(2, 5, KEY_HOME),
69 KEY(3, 0, KEY_8),
70 KEY(3, 1, KEY_5),
71 KEY(3, 2, KEY_F12),
72 KEY(3, 3, KEY_F3),
73 KEY(3, 4, KEY_F8),
74 KEY(3, 5, KEY_END),
75 KEY(4, 0, KEY_7),
76 KEY(4, 1, KEY_4),
77 KEY(4, 2, KEY_F11),
78 KEY(4, 3, KEY_F1),
79 KEY(4, 4, KEY_F4),
80 KEY(4, 5, KEY_ESC),
81 KEY(5, 0, KEY_F13),
82 KEY(5, 1, KEY_F14),
83 KEY(5, 2, KEY_F15),
84 KEY(5, 3, KEY_F16),
85 KEY(5, 4, KEY_SLEEP),
90 static struct mtd_partition nor_partitions[] = {
91 /* bootloader (U-Boot, etc) in first sector */
93 .name = "bootloader",
94 .offset = 0,
95 .size = SZ_128K,
96 .mask_flags = MTD_WRITEABLE, /* force read-only */
98 /* bootloader params in the next sector */
100 .name = "params",
101 .offset = MTDPART_OFS_APPEND,
102 .size = SZ_128K,
103 .mask_flags = 0,
105 /* kernel */
107 .name = "kernel",
108 .offset = MTDPART_OFS_APPEND,
109 .size = SZ_2M,
110 .mask_flags = 0
112 /* file system */
114 .name = "filesystem",
115 .offset = MTDPART_OFS_APPEND,
116 .size = MTDPART_SIZ_FULL,
117 .mask_flags = 0
121 static struct flash_platform_data nor_data = {
122 .map_name = "cfi_probe",
123 .width = 2,
124 .parts = nor_partitions,
125 .nr_parts = ARRAY_SIZE(nor_partitions),
128 static struct resource nor_resource = {
129 /* This is on CS3, wherever it's mapped */
130 .flags = IORESOURCE_MEM,
133 static struct platform_device nor_device = {
134 .name = "omapflash",
135 .id = 0,
136 .dev = {
137 .platform_data = &nor_data,
139 .num_resources = 1,
140 .resource = &nor_resource,
143 static struct mtd_partition nand_partitions[] = {
144 #if 0
145 /* REVISIT: enable these partitions if you make NAND BOOT work */
147 .name = "xloader",
148 .offset = 0,
149 .size = 64 * 1024,
150 .mask_flags = MTD_WRITEABLE, /* force read-only */
153 .name = "bootloader",
154 .offset = MTDPART_OFS_APPEND,
155 .size = 256 * 1024,
156 .mask_flags = MTD_WRITEABLE, /* force read-only */
159 .name = "params",
160 .offset = MTDPART_OFS_APPEND,
161 .size = 192 * 1024,
164 .name = "kernel",
165 .offset = MTDPART_OFS_APPEND,
166 .size = 2 * SZ_1M,
168 #endif
170 .name = "filesystem",
171 .size = MTDPART_SIZ_FULL,
172 .offset = MTDPART_OFS_APPEND,
176 /* dip switches control NAND chip access: 8 bit, 16 bit, or neither */
177 static struct nand_platform_data nand_data = {
178 .options = NAND_SAMSUNG_LP_OPTIONS,
179 .parts = nand_partitions,
180 .nr_parts = ARRAY_SIZE(nand_partitions),
183 static struct resource nand_resource = {
184 .flags = IORESOURCE_MEM,
187 static struct platform_device nand_device = {
188 .name = "omapnand",
189 .id = 0,
190 .dev = {
191 .platform_data = &nand_data,
193 .num_resources = 1,
194 .resource = &nand_resource,
197 static struct resource smc91x_resources[] = {
198 [0] = {
199 .start = OMAP1710_ETHR_START, /* Physical */
200 .end = OMAP1710_ETHR_START + 0xf,
201 .flags = IORESOURCE_MEM,
203 [1] = {
204 .start = OMAP_GPIO_IRQ(40),
205 .end = OMAP_GPIO_IRQ(40),
206 .flags = IORESOURCE_IRQ,
210 static struct platform_device smc91x_device = {
211 .name = "smc91x",
212 .id = 0,
213 .num_resources = ARRAY_SIZE(smc91x_resources),
214 .resource = smc91x_resources,
217 #define GPTIMER_BASE 0xFFFB1400
218 #define GPTIMER_REGS(x) (0xFFFB1400 + (x * 0x800))
219 #define GPTIMER_REGS_SIZE 0x46
221 static struct resource intlat_resources[] = {
222 [0] = {
223 .start = GPTIMER_REGS(0), /* Physical */
224 .end = GPTIMER_REGS(0) + GPTIMER_REGS_SIZE,
225 .flags = IORESOURCE_MEM,
227 [1] = {
228 .start = INT_1610_GPTIMER1,
229 .end = INT_1610_GPTIMER1,
230 .flags = IORESOURCE_IRQ,
234 static struct platform_device intlat_device = {
235 .name = "omap_intlat",
236 .id = 0,
237 .num_resources = ARRAY_SIZE(intlat_resources),
238 .resource = intlat_resources,
241 static struct resource h3_kp_resources[] = {
242 [0] = {
243 .start = INT_KEYBOARD,
244 .end = INT_KEYBOARD,
245 .flags = IORESOURCE_IRQ,
249 static struct omap_kp_platform_data h3_kp_data = {
250 .rows = 8,
251 .cols = 8,
252 .keymap = h3_keymap,
253 .rep = 1,
256 static struct platform_device h3_kp_device = {
257 .name = "omap-keypad",
258 .id = -1,
259 .dev = {
260 .platform_data = &h3_kp_data,
262 .num_resources = ARRAY_SIZE(h3_kp_resources),
263 .resource = h3_kp_resources,
267 /* Select between the IrDA and aGPS module
269 static int h3_select_irda(struct device *dev, int state)
271 unsigned char expa;
272 int err = 0;
274 if ((err = read_gpio_expa(&expa, 0x26))) {
275 printk(KERN_ERR "Error reading from I/O EXPANDER \n");
276 return err;
279 /* 'P6' enable/disable IRDA_TX and IRDA_RX */
280 if (state & IR_SEL) { /* IrDA */
281 if ((err = write_gpio_expa(expa | 0x40, 0x26))) {
282 printk(KERN_ERR "Error writing to I/O EXPANDER \n");
283 return err;
285 } else {
286 if ((err = write_gpio_expa(expa & ~0x40, 0x26))) {
287 printk(KERN_ERR "Error writing to I/O EXPANDER \n");
288 return err;
291 return err;
294 static void set_trans_mode(void *data)
296 int *mode = data;
297 unsigned char expa;
298 int err = 0;
300 if ((err = read_gpio_expa(&expa, 0x27)) != 0) {
301 printk(KERN_ERR "Error reading from I/O expander\n");
304 expa &= ~0x03;
306 if (*mode & IR_SIRMODE) {
307 expa |= 0x01;
308 } else { /* MIR/FIR */
309 expa |= 0x03;
312 if ((err = write_gpio_expa(expa, 0x27)) != 0) {
313 printk(KERN_ERR "Error writing to I/O expander\n");
317 static int h3_transceiver_mode(struct device *dev, int mode)
319 struct omap_irda_config *irda_config = dev->platform_data;
321 cancel_delayed_work(&irda_config->gpio_expa);
322 PREPARE_WORK(&irda_config->gpio_expa, set_trans_mode, &mode);
323 schedule_work(&irda_config->gpio_expa);
325 return 0;
328 static struct omap_irda_config h3_irda_data = {
329 .transceiver_cap = IR_SIRMODE | IR_MIRMODE | IR_FIRMODE,
330 .transceiver_mode = h3_transceiver_mode,
331 .select_irda = h3_select_irda,
332 .rx_channel = OMAP_DMA_UART3_RX,
333 .tx_channel = OMAP_DMA_UART3_TX,
334 .dest_start = UART3_THR,
335 .src_start = UART3_RHR,
336 .tx_trigger = 0,
337 .rx_trigger = 0,
340 static struct resource h3_irda_resources[] = {
341 [0] = {
342 .start = INT_UART3,
343 .end = INT_UART3,
344 .flags = IORESOURCE_IRQ,
348 static struct platform_device h3_irda_device = {
349 .name = "omapirda",
350 .id = 0,
351 .dev = {
352 .platform_data = &h3_irda_data,
354 .num_resources = ARRAY_SIZE(h3_irda_resources),
355 .resource = h3_irda_resources,
358 static struct platform_device h3_lcd_device = {
359 .name = "lcd_h3",
360 .id = -1,
363 static struct platform_device *devices[] __initdata = {
364 &nor_device,
365 &nand_device,
366 &smc91x_device,
367 &intlat_device,
368 &h3_irda_device,
369 &h3_kp_device,
370 &h3_lcd_device,
373 static struct omap_usb_config h3_usb_config __initdata = {
374 /* usb1 has a Mini-AB port and external isp1301 transceiver */
375 .otg = 2,
377 #ifdef CONFIG_USB_GADGET_OMAP
378 .hmc_mode = 19, /* 0:host(off) 1:dev|otg 2:disabled */
379 #elif defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
380 /* NONSTANDARD CABLE NEEDED (B-to-Mini-B) */
381 .hmc_mode = 20, /* 1:dev|otg(off) 1:host 2:disabled */
382 #endif
384 .pins[1] = 3,
387 static struct omap_mmc_config h3_mmc_config __initdata = {
388 .mmc[0] = {
389 .enabled = 1,
390 .power_pin = -1, /* tps65010 GPIO4 */
391 .switch_pin = OMAP_MPUIO(1),
395 static struct omap_uart_config h3_uart_config __initdata = {
396 .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
399 static struct omap_lcd_config h3_lcd_config __initdata = {
400 .ctrl_name = "internal",
403 static struct omap_board_config_kernel h3_config[] = {
404 { OMAP_TAG_USB, &h3_usb_config },
405 { OMAP_TAG_MMC, &h3_mmc_config },
406 { OMAP_TAG_UART, &h3_uart_config },
407 { OMAP_TAG_LCD, &h3_lcd_config },
410 #define H3_NAND_RB_GPIO_PIN 10
412 static int nand_dev_ready(struct nand_platform_data *data)
414 return omap_get_gpio_datain(H3_NAND_RB_GPIO_PIN);
417 static void __init h3_init(void)
419 /* Here we assume the NOR boot config: NOR on CS3 (possibly swapped
420 * to address 0 by a dip switch), NAND on CS2B. The NAND driver will
421 * notice whether a NAND chip is enabled at probe time.
423 * H3 support NAND-boot, with a dip switch to put NOR on CS2B and NAND
424 * (which on H2 may be 16bit) on CS3. Try detecting that in code here,
425 * to avoid probing every possible flash configuration...
427 nor_resource.end = nor_resource.start = omap_cs3_phys();
428 nor_resource.end += SZ_32M - 1;
430 nand_resource.end = nand_resource.start = OMAP_CS2B_PHYS;
431 nand_resource.end += SZ_4K - 1;
432 if (!(omap_request_gpio(H3_NAND_RB_GPIO_PIN)))
433 nand_data.dev_ready = nand_dev_ready;
435 /* GPIO10 Func_MUX_CTRL reg bit 29:27, Configure V2 to mode1 as GPIO */
436 /* GPIO10 pullup/down register, Enable pullup on GPIO10 */
437 omap_cfg_reg(V2_1710_GPIO10);
439 platform_add_devices(devices, ARRAY_SIZE(devices));
440 omap_board_config = h3_config;
441 omap_board_config_size = ARRAY_SIZE(h3_config);
442 omap_serial_init();
445 static void __init h3_init_smc91x(void)
447 omap_cfg_reg(W15_1710_GPIO40);
448 if (omap_request_gpio(40) < 0) {
449 printk("Error requesting gpio 40 for smc91x irq\n");
450 return;
454 void h3_init_irq(void)
456 omap1_init_common_hw();
457 omap_init_irq();
458 omap_gpio_init();
459 h3_init_smc91x();
462 static void __init h3_map_io(void)
464 omap1_map_common_io();
467 MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board")
468 /* Maintainer: Texas Instruments, Inc. */
469 .phys_io = 0xfff00000,
470 .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc,
471 .boot_params = 0x10000100,
472 .map_io = h3_map_io,
473 .init_irq = h3_init_irq,
474 .init_machine = h3_init,
475 .timer = &omap_timer,
476 MACHINE_END