2 * MSI hooks for standard x86 apic
8 #include <linux/dmar.h>
10 #include <asm/msidef.h>
12 static struct irq_chip ia64_msi_chip
;
15 static int ia64_set_msi_irq_affinity(unsigned int irq
,
16 const cpumask_t
*cpu_mask
)
20 int cpu
= first_cpu(*cpu_mask
);
25 if (irq_prepare_move(irq
, cpu
))
28 read_msi_msg(irq
, &msg
);
30 addr
= msg
.address_lo
;
31 addr
&= MSI_ADDR_DEST_ID_MASK
;
32 addr
|= MSI_ADDR_DEST_ID_CPU(cpu_physical_id(cpu
));
33 msg
.address_lo
= addr
;
36 data
&= MSI_DATA_VECTOR_MASK
;
37 data
|= MSI_DATA_VECTOR(irq_to_vector(irq
));
40 write_msi_msg(irq
, &msg
);
41 cpumask_copy(irq_desc
[irq
].affinity
, cpumask_of(cpu
));
45 #endif /* CONFIG_SMP */
47 int ia64_setup_msi_irq(struct pci_dev
*pdev
, struct msi_desc
*desc
)
50 unsigned long dest_phys_id
;
58 set_irq_msi(irq
, desc
);
59 cpus_and(mask
, irq_to_domain(irq
), cpu_online_map
);
60 dest_phys_id
= cpu_physical_id(first_cpu(mask
));
61 vector
= irq_to_vector(irq
);
66 MSI_ADDR_DEST_MODE_PHYS
|
67 MSI_ADDR_REDIRECTION_CPU
|
68 MSI_ADDR_DEST_ID_CPU(dest_phys_id
);
71 MSI_DATA_TRIGGER_EDGE
|
72 MSI_DATA_LEVEL_ASSERT
|
73 MSI_DATA_DELIVERY_FIXED
|
74 MSI_DATA_VECTOR(vector
);
76 write_msi_msg(irq
, &msg
);
77 set_irq_chip_and_handler(irq
, &ia64_msi_chip
, handle_edge_irq
);
82 void ia64_teardown_msi_irq(unsigned int irq
)
87 static void ia64_ack_msi_irq(unsigned int irq
)
89 irq_complete_move(irq
);
94 static int ia64_msi_retrigger_irq(unsigned int irq
)
96 unsigned int vector
= irq_to_vector(irq
);
97 ia64_resend_irq(vector
);
103 * Generic ops used on most IA64 platforms.
105 static struct irq_chip ia64_msi_chip
= {
107 .mask
= mask_msi_irq
,
108 .unmask
= unmask_msi_irq
,
109 .ack
= ia64_ack_msi_irq
,
111 .set_affinity
= ia64_set_msi_irq_affinity
,
113 .retrigger
= ia64_msi_retrigger_irq
,
117 int arch_setup_msi_irq(struct pci_dev
*pdev
, struct msi_desc
*desc
)
119 if (platform_setup_msi_irq
)
120 return platform_setup_msi_irq(pdev
, desc
);
122 return ia64_setup_msi_irq(pdev
, desc
);
125 void arch_teardown_msi_irq(unsigned int irq
)
127 if (platform_teardown_msi_irq
)
128 return platform_teardown_msi_irq(irq
);
130 return ia64_teardown_msi_irq(irq
);
135 static int dmar_msi_set_affinity(unsigned int irq
, const struct cpumask
*mask
)
137 struct irq_cfg
*cfg
= irq_cfg
+ irq
;
139 int cpu
= cpumask_first(mask
);
141 if (!cpu_online(cpu
))
144 if (irq_prepare_move(irq
, cpu
))
147 dmar_msi_read(irq
, &msg
);
149 msg
.data
&= ~MSI_DATA_VECTOR_MASK
;
150 msg
.data
|= MSI_DATA_VECTOR(cfg
->vector
);
151 msg
.address_lo
&= ~MSI_ADDR_DEST_ID_MASK
;
152 msg
.address_lo
|= MSI_ADDR_DEST_ID_CPU(cpu_physical_id(cpu
));
154 dmar_msi_write(irq
, &msg
);
155 cpumask_copy(irq_desc
[irq
].affinity
, mask
);
159 #endif /* CONFIG_SMP */
161 static struct irq_chip dmar_msi_type
= {
163 .unmask
= dmar_msi_unmask
,
164 .mask
= dmar_msi_mask
,
165 .ack
= ia64_ack_msi_irq
,
167 .set_affinity
= dmar_msi_set_affinity
,
169 .retrigger
= ia64_msi_retrigger_irq
,
173 msi_compose_msg(struct pci_dev
*pdev
, unsigned int irq
, struct msi_msg
*msg
)
175 struct irq_cfg
*cfg
= irq_cfg
+ irq
;
179 cpus_and(mask
, irq_to_domain(irq
), cpu_online_map
);
180 dest
= cpu_physical_id(first_cpu(mask
));
185 MSI_ADDR_DEST_MODE_PHYS
|
186 MSI_ADDR_REDIRECTION_CPU
|
187 MSI_ADDR_DEST_ID_CPU(dest
);
190 MSI_DATA_TRIGGER_EDGE
|
191 MSI_DATA_LEVEL_ASSERT
|
192 MSI_DATA_DELIVERY_FIXED
|
193 MSI_DATA_VECTOR(cfg
->vector
);
197 int arch_setup_dmar_msi(unsigned int irq
)
202 ret
= msi_compose_msg(NULL
, irq
, &msg
);
205 dmar_msi_write(irq
, &msg
);
206 set_irq_chip_and_handler_name(irq
, &dmar_msi_type
, handle_edge_irq
,
210 #endif /* CONFIG_DMAR */