2 * Driver for the PSC of the Freescale MPC52xx PSCs configured as UARTs.
4 * FIXME According to the usermanual the status bits in the status register
5 * are only updated when the peripherals access the FIFO and not when the
6 * CPU access them. So since we use this bits to know when we stop writing
7 * and reading, they may not be updated in-time and a race condition may
8 * exists. But I haven't be able to prove this and I don't care. But if
9 * any problem arises, it might worth checking. The TX/RX FIFO Stats
10 * registers should be used in addition.
11 * Update: Actually, they seem updated ... At least the bits we use.
14 * Maintainer : Sylvain Munaut <tnt@246tNt.com>
16 * Some of the code has been inspired/copied from the 2.4 code written
17 * by Dale Farnsworth <dfarnsworth@mvista.com>.
19 * Copyright (C) 2008 Freescale Semiconductor Inc.
20 * John Rigby <jrigby@gmail.com>
21 * Added support for MPC5121
22 * Copyright (C) 2006 Secret Lab Technologies Ltd.
23 * Grant Likely <grant.likely@secretlab.ca>
24 * Copyright (C) 2004-2006 Sylvain Munaut <tnt@246tNt.com>
25 * Copyright (C) 2003 MontaVista, Software, Inc.
27 * This file is licensed under the terms of the GNU General Public License
28 * version 2. This program is licensed "as is" without any warranty of any
29 * kind, whether express or implied.
32 /* Platform device Usage :
34 * Since PSCs can have multiple function, the correct driver for each one
35 * is selected by calling mpc52xx_match_psc_function(...). The function
36 * handled by this driver is "uart".
38 * The driver init all necessary registers to place the PSC in uart mode without
39 * DCD. However, the pin multiplexing aren't changed and should be set either
40 * by the bootloader or in the platform init code.
42 * The idx field must be equal to the PSC index (e.g. 0 for PSC1, 1 for PSC2,
43 * and so on). So the PSC1 is mapped to /dev/ttyPSC0, PSC2 to /dev/ttyPSC1 and
44 * so on. But be warned, it's an ABSOLUTE REQUIREMENT ! This is needed mainly
45 * fpr the console code : without this 1:1 mapping, at early boot time, when we
46 * are parsing the kernel args console=ttyPSC?, we wouldn't know which PSC it
50 /* OF Platform device Usage :
52 * This driver is only used for PSCs configured in uart mode. The device
53 * tree will have a node for each PSC with "mpc52xx-psc-uart" in the compatible
56 * By default, PSC devices are enumerated in the order they are found. However
57 * a particular PSC number can be forces by adding 'device_no = <port#>'
60 * The driver init all necessary registers to place the PSC in uart mode without
61 * DCD. However, the pin multiplexing aren't changed and should be set either
62 * by the bootloader or in the platform init code.
67 #include <linux/device.h>
68 #include <linux/module.h>
69 #include <linux/tty.h>
70 #include <linux/serial.h>
71 #include <linux/sysrq.h>
72 #include <linux/console.h>
73 #include <linux/delay.h>
76 #include <linux/of_platform.h>
78 #include <asm/mpc52xx.h>
79 #include <asm/mpc512x.h>
80 #include <asm/mpc52xx_psc.h>
82 #if defined(CONFIG_SERIAL_MPC52xx_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
86 #include <linux/serial_core.h>
89 /* We've been assigned a range on the "Low-density serial ports" major */
90 #define SERIAL_PSC_MAJOR 204
91 #define SERIAL_PSC_MINOR 148
94 #define ISR_PASS_LIMIT 256 /* Max number of iteration in the interrupt */
97 static struct uart_port mpc52xx_uart_ports
[MPC52xx_PSC_MAXNUM
];
98 /* Rem: - We use the read_status_mask as a shadow of
99 * psc->mpc52xx_psc_imr
100 * - It's important that is array is all zero on start as we
101 * use it to know if it's initialized or not ! If it's not sure
102 * it's cleared, then a memset(...,0,...) should be added to
106 /* lookup table for matching device nodes to index numbers */
107 static struct device_node
*mpc52xx_uart_nodes
[MPC52xx_PSC_MAXNUM
];
109 static void mpc52xx_uart_of_enumerate(void);
112 #define PSC(port) ((struct mpc52xx_psc __iomem *)((port)->membase))
115 /* Forward declaration of the interruption handling routine */
116 static irqreturn_t
mpc52xx_uart_int(int irq
, void *dev_id
);
119 /* Simple macro to test if a port is console or not. This one is taken
120 * for serial_core.c and maybe should be moved to serial_core.h ? */
121 #ifdef CONFIG_SERIAL_CORE_CONSOLE
122 #define uart_console(port) \
123 ((port)->cons && (port)->cons->index == (port)->line)
125 #define uart_console(port) (0)
128 /* ======================================================================== */
129 /* PSC fifo operations for isolating differences between 52xx and 512x */
130 /* ======================================================================== */
133 void (*fifo_init
)(struct uart_port
*port
);
134 int (*raw_rx_rdy
)(struct uart_port
*port
);
135 int (*raw_tx_rdy
)(struct uart_port
*port
);
136 int (*rx_rdy
)(struct uart_port
*port
);
137 int (*tx_rdy
)(struct uart_port
*port
);
138 int (*tx_empty
)(struct uart_port
*port
);
139 void (*stop_rx
)(struct uart_port
*port
);
140 void (*start_tx
)(struct uart_port
*port
);
141 void (*stop_tx
)(struct uart_port
*port
);
142 void (*rx_clr_irq
)(struct uart_port
*port
);
143 void (*tx_clr_irq
)(struct uart_port
*port
);
144 void (*write_char
)(struct uart_port
*port
, unsigned char c
);
145 unsigned char (*read_char
)(struct uart_port
*port
);
146 void (*cw_disable_ints
)(struct uart_port
*port
);
147 void (*cw_restore_ints
)(struct uart_port
*port
);
148 unsigned long (*getuartclk
)(void *p
);
151 #ifdef CONFIG_PPC_MPC52xx
152 #define FIFO_52xx(port) ((struct mpc52xx_psc_fifo __iomem *)(PSC(port)+1))
153 static void mpc52xx_psc_fifo_init(struct uart_port
*port
)
155 struct mpc52xx_psc __iomem
*psc
= PSC(port
);
156 struct mpc52xx_psc_fifo __iomem
*fifo
= FIFO_52xx(port
);
159 out_be16(&psc
->mpc52xx_psc_clock_select
, 0xdd00);
161 out_8(&fifo
->rfcntl
, 0x00);
162 out_be16(&fifo
->rfalarm
, 0x1ff);
163 out_8(&fifo
->tfcntl
, 0x07);
164 out_be16(&fifo
->tfalarm
, 0x80);
166 port
->read_status_mask
|= MPC52xx_PSC_IMR_RXRDY
| MPC52xx_PSC_IMR_TXRDY
;
167 out_be16(&psc
->mpc52xx_psc_imr
, port
->read_status_mask
);
170 static int mpc52xx_psc_raw_rx_rdy(struct uart_port
*port
)
172 return in_be16(&PSC(port
)->mpc52xx_psc_status
)
173 & MPC52xx_PSC_SR_RXRDY
;
176 static int mpc52xx_psc_raw_tx_rdy(struct uart_port
*port
)
178 return in_be16(&PSC(port
)->mpc52xx_psc_status
)
179 & MPC52xx_PSC_SR_TXRDY
;
183 static int mpc52xx_psc_rx_rdy(struct uart_port
*port
)
185 return in_be16(&PSC(port
)->mpc52xx_psc_isr
)
186 & port
->read_status_mask
187 & MPC52xx_PSC_IMR_RXRDY
;
190 static int mpc52xx_psc_tx_rdy(struct uart_port
*port
)
192 return in_be16(&PSC(port
)->mpc52xx_psc_isr
)
193 & port
->read_status_mask
194 & MPC52xx_PSC_IMR_TXRDY
;
197 static int mpc52xx_psc_tx_empty(struct uart_port
*port
)
199 return in_be16(&PSC(port
)->mpc52xx_psc_status
)
200 & MPC52xx_PSC_SR_TXEMP
;
203 static void mpc52xx_psc_start_tx(struct uart_port
*port
)
205 port
->read_status_mask
|= MPC52xx_PSC_IMR_TXRDY
;
206 out_be16(&PSC(port
)->mpc52xx_psc_imr
, port
->read_status_mask
);
209 static void mpc52xx_psc_stop_tx(struct uart_port
*port
)
211 port
->read_status_mask
&= ~MPC52xx_PSC_IMR_TXRDY
;
212 out_be16(&PSC(port
)->mpc52xx_psc_imr
, port
->read_status_mask
);
215 static void mpc52xx_psc_stop_rx(struct uart_port
*port
)
217 port
->read_status_mask
&= ~MPC52xx_PSC_IMR_RXRDY
;
218 out_be16(&PSC(port
)->mpc52xx_psc_imr
, port
->read_status_mask
);
221 static void mpc52xx_psc_rx_clr_irq(struct uart_port
*port
)
225 static void mpc52xx_psc_tx_clr_irq(struct uart_port
*port
)
229 static void mpc52xx_psc_write_char(struct uart_port
*port
, unsigned char c
)
231 out_8(&PSC(port
)->mpc52xx_psc_buffer_8
, c
);
234 static unsigned char mpc52xx_psc_read_char(struct uart_port
*port
)
236 return in_8(&PSC(port
)->mpc52xx_psc_buffer_8
);
239 static void mpc52xx_psc_cw_disable_ints(struct uart_port
*port
)
241 out_be16(&PSC(port
)->mpc52xx_psc_imr
, 0);
244 static void mpc52xx_psc_cw_restore_ints(struct uart_port
*port
)
246 out_be16(&PSC(port
)->mpc52xx_psc_imr
, port
->read_status_mask
);
249 /* Search for bus-frequency property in this node or a parent */
250 static unsigned long mpc52xx_getuartclk(void *p
)
253 * 5200 UARTs have a / 32 prescaler
254 * but the generic serial code assumes 16
255 * so return ipb freq / 2
257 return mpc52xx_find_ipb_freq(p
) / 2;
260 static struct psc_ops mpc52xx_psc_ops
= {
261 .fifo_init
= mpc52xx_psc_fifo_init
,
262 .raw_rx_rdy
= mpc52xx_psc_raw_rx_rdy
,
263 .raw_tx_rdy
= mpc52xx_psc_raw_tx_rdy
,
264 .rx_rdy
= mpc52xx_psc_rx_rdy
,
265 .tx_rdy
= mpc52xx_psc_tx_rdy
,
266 .tx_empty
= mpc52xx_psc_tx_empty
,
267 .stop_rx
= mpc52xx_psc_stop_rx
,
268 .start_tx
= mpc52xx_psc_start_tx
,
269 .stop_tx
= mpc52xx_psc_stop_tx
,
270 .rx_clr_irq
= mpc52xx_psc_rx_clr_irq
,
271 .tx_clr_irq
= mpc52xx_psc_tx_clr_irq
,
272 .write_char
= mpc52xx_psc_write_char
,
273 .read_char
= mpc52xx_psc_read_char
,
274 .cw_disable_ints
= mpc52xx_psc_cw_disable_ints
,
275 .cw_restore_ints
= mpc52xx_psc_cw_restore_ints
,
276 .getuartclk
= mpc52xx_getuartclk
,
279 #endif /* CONFIG_MPC52xx */
281 #ifdef CONFIG_PPC_MPC512x
282 #define FIFO_512x(port) ((struct mpc512x_psc_fifo __iomem *)(PSC(port)+1))
283 static void mpc512x_psc_fifo_init(struct uart_port
*port
)
285 out_be32(&FIFO_512x(port
)->txcmd
, MPC512x_PSC_FIFO_RESET_SLICE
);
286 out_be32(&FIFO_512x(port
)->txcmd
, MPC512x_PSC_FIFO_ENABLE_SLICE
);
287 out_be32(&FIFO_512x(port
)->txalarm
, 1);
288 out_be32(&FIFO_512x(port
)->tximr
, 0);
290 out_be32(&FIFO_512x(port
)->rxcmd
, MPC512x_PSC_FIFO_RESET_SLICE
);
291 out_be32(&FIFO_512x(port
)->rxcmd
, MPC512x_PSC_FIFO_ENABLE_SLICE
);
292 out_be32(&FIFO_512x(port
)->rxalarm
, 1);
293 out_be32(&FIFO_512x(port
)->rximr
, 0);
295 out_be32(&FIFO_512x(port
)->tximr
, MPC512x_PSC_FIFO_ALARM
);
296 out_be32(&FIFO_512x(port
)->rximr
, MPC512x_PSC_FIFO_ALARM
);
299 static int mpc512x_psc_raw_rx_rdy(struct uart_port
*port
)
301 return !(in_be32(&FIFO_512x(port
)->rxsr
) & MPC512x_PSC_FIFO_EMPTY
);
304 static int mpc512x_psc_raw_tx_rdy(struct uart_port
*port
)
306 return !(in_be32(&FIFO_512x(port
)->txsr
) & MPC512x_PSC_FIFO_FULL
);
309 static int mpc512x_psc_rx_rdy(struct uart_port
*port
)
311 return in_be32(&FIFO_512x(port
)->rxsr
)
312 & in_be32(&FIFO_512x(port
)->rximr
)
313 & MPC512x_PSC_FIFO_ALARM
;
316 static int mpc512x_psc_tx_rdy(struct uart_port
*port
)
318 return in_be32(&FIFO_512x(port
)->txsr
)
319 & in_be32(&FIFO_512x(port
)->tximr
)
320 & MPC512x_PSC_FIFO_ALARM
;
323 static int mpc512x_psc_tx_empty(struct uart_port
*port
)
325 return in_be32(&FIFO_512x(port
)->txsr
)
326 & MPC512x_PSC_FIFO_EMPTY
;
329 static void mpc512x_psc_stop_rx(struct uart_port
*port
)
331 unsigned long rx_fifo_imr
;
333 rx_fifo_imr
= in_be32(&FIFO_512x(port
)->rximr
);
334 rx_fifo_imr
&= ~MPC512x_PSC_FIFO_ALARM
;
335 out_be32(&FIFO_512x(port
)->rximr
, rx_fifo_imr
);
338 static void mpc512x_psc_start_tx(struct uart_port
*port
)
340 unsigned long tx_fifo_imr
;
342 tx_fifo_imr
= in_be32(&FIFO_512x(port
)->tximr
);
343 tx_fifo_imr
|= MPC512x_PSC_FIFO_ALARM
;
344 out_be32(&FIFO_512x(port
)->tximr
, tx_fifo_imr
);
347 static void mpc512x_psc_stop_tx(struct uart_port
*port
)
349 unsigned long tx_fifo_imr
;
351 tx_fifo_imr
= in_be32(&FIFO_512x(port
)->tximr
);
352 tx_fifo_imr
&= ~MPC512x_PSC_FIFO_ALARM
;
353 out_be32(&FIFO_512x(port
)->tximr
, tx_fifo_imr
);
356 static void mpc512x_psc_rx_clr_irq(struct uart_port
*port
)
358 out_be32(&FIFO_512x(port
)->rxisr
, in_be32(&FIFO_512x(port
)->rxisr
));
361 static void mpc512x_psc_tx_clr_irq(struct uart_port
*port
)
363 out_be32(&FIFO_512x(port
)->txisr
, in_be32(&FIFO_512x(port
)->txisr
));
366 static void mpc512x_psc_write_char(struct uart_port
*port
, unsigned char c
)
368 out_8(&FIFO_512x(port
)->txdata_8
, c
);
371 static unsigned char mpc512x_psc_read_char(struct uart_port
*port
)
373 return in_8(&FIFO_512x(port
)->rxdata_8
);
376 static void mpc512x_psc_cw_disable_ints(struct uart_port
*port
)
378 port
->read_status_mask
=
379 in_be32(&FIFO_512x(port
)->tximr
) << 16 |
380 in_be32(&FIFO_512x(port
)->rximr
);
381 out_be32(&FIFO_512x(port
)->tximr
, 0);
382 out_be32(&FIFO_512x(port
)->rximr
, 0);
385 static void mpc512x_psc_cw_restore_ints(struct uart_port
*port
)
387 out_be32(&FIFO_512x(port
)->tximr
,
388 (port
->read_status_mask
>> 16) & 0x7f);
389 out_be32(&FIFO_512x(port
)->rximr
, port
->read_status_mask
& 0x7f);
392 static unsigned long mpc512x_getuartclk(void *p
)
394 return mpc512x_find_ips_freq(p
);
397 static struct psc_ops mpc512x_psc_ops
= {
398 .fifo_init
= mpc512x_psc_fifo_init
,
399 .raw_rx_rdy
= mpc512x_psc_raw_rx_rdy
,
400 .raw_tx_rdy
= mpc512x_psc_raw_tx_rdy
,
401 .rx_rdy
= mpc512x_psc_rx_rdy
,
402 .tx_rdy
= mpc512x_psc_tx_rdy
,
403 .tx_empty
= mpc512x_psc_tx_empty
,
404 .stop_rx
= mpc512x_psc_stop_rx
,
405 .start_tx
= mpc512x_psc_start_tx
,
406 .stop_tx
= mpc512x_psc_stop_tx
,
407 .rx_clr_irq
= mpc512x_psc_rx_clr_irq
,
408 .tx_clr_irq
= mpc512x_psc_tx_clr_irq
,
409 .write_char
= mpc512x_psc_write_char
,
410 .read_char
= mpc512x_psc_read_char
,
411 .cw_disable_ints
= mpc512x_psc_cw_disable_ints
,
412 .cw_restore_ints
= mpc512x_psc_cw_restore_ints
,
413 .getuartclk
= mpc512x_getuartclk
,
417 static struct psc_ops
*psc_ops
;
419 /* ======================================================================== */
420 /* UART operations */
421 /* ======================================================================== */
424 mpc52xx_uart_tx_empty(struct uart_port
*port
)
426 return psc_ops
->tx_empty(port
) ? TIOCSER_TEMT
: 0;
430 mpc52xx_uart_set_mctrl(struct uart_port
*port
, unsigned int mctrl
)
432 if (mctrl
& TIOCM_RTS
)
433 out_8(&PSC(port
)->op1
, MPC52xx_PSC_OP_RTS
);
435 out_8(&PSC(port
)->op0
, MPC52xx_PSC_OP_RTS
);
439 mpc52xx_uart_get_mctrl(struct uart_port
*port
)
441 unsigned int ret
= TIOCM_DSR
;
442 u8 status
= in_8(&PSC(port
)->mpc52xx_psc_ipcr
);
444 if (!(status
& MPC52xx_PSC_CTS
))
446 if (!(status
& MPC52xx_PSC_DCD
))
453 mpc52xx_uart_stop_tx(struct uart_port
*port
)
455 /* port->lock taken by caller */
456 psc_ops
->stop_tx(port
);
460 mpc52xx_uart_start_tx(struct uart_port
*port
)
462 /* port->lock taken by caller */
463 psc_ops
->start_tx(port
);
467 mpc52xx_uart_send_xchar(struct uart_port
*port
, char ch
)
470 spin_lock_irqsave(&port
->lock
, flags
);
474 /* Make sure tx interrupts are on */
475 /* Truly necessary ??? They should be anyway */
476 psc_ops
->start_tx(port
);
479 spin_unlock_irqrestore(&port
->lock
, flags
);
483 mpc52xx_uart_stop_rx(struct uart_port
*port
)
485 /* port->lock taken by caller */
486 psc_ops
->stop_rx(port
);
490 mpc52xx_uart_enable_ms(struct uart_port
*port
)
492 struct mpc52xx_psc __iomem
*psc
= PSC(port
);
494 /* clear D_*-bits by reading them */
495 in_8(&psc
->mpc52xx_psc_ipcr
);
496 /* enable CTS and DCD as IPC interrupts */
497 out_8(&psc
->mpc52xx_psc_acr
, MPC52xx_PSC_IEC_CTS
| MPC52xx_PSC_IEC_DCD
);
499 port
->read_status_mask
|= MPC52xx_PSC_IMR_IPC
;
500 out_be16(&psc
->mpc52xx_psc_imr
, port
->read_status_mask
);
504 mpc52xx_uart_break_ctl(struct uart_port
*port
, int ctl
)
507 spin_lock_irqsave(&port
->lock
, flags
);
510 out_8(&PSC(port
)->command
, MPC52xx_PSC_START_BRK
);
512 out_8(&PSC(port
)->command
, MPC52xx_PSC_STOP_BRK
);
514 spin_unlock_irqrestore(&port
->lock
, flags
);
518 mpc52xx_uart_startup(struct uart_port
*port
)
520 struct mpc52xx_psc __iomem
*psc
= PSC(port
);
524 ret
= request_irq(port
->irq
, mpc52xx_uart_int
,
525 IRQF_DISABLED
| IRQF_SAMPLE_RANDOM
,
526 "mpc52xx_psc_uart", port
);
530 /* Reset/activate the port, clear and enable interrupts */
531 out_8(&psc
->command
, MPC52xx_PSC_RST_RX
);
532 out_8(&psc
->command
, MPC52xx_PSC_RST_TX
);
534 out_be32(&psc
->sicr
, 0); /* UART mode DCD ignored */
536 psc_ops
->fifo_init(port
);
538 out_8(&psc
->command
, MPC52xx_PSC_TX_ENABLE
);
539 out_8(&psc
->command
, MPC52xx_PSC_RX_ENABLE
);
545 mpc52xx_uart_shutdown(struct uart_port
*port
)
547 struct mpc52xx_psc __iomem
*psc
= PSC(port
);
549 /* Shut down the port. Leave TX active if on a console port */
550 out_8(&psc
->command
, MPC52xx_PSC_RST_RX
);
551 if (!uart_console(port
))
552 out_8(&psc
->command
, MPC52xx_PSC_RST_TX
);
554 port
->read_status_mask
= 0;
555 out_be16(&psc
->mpc52xx_psc_imr
, port
->read_status_mask
);
557 /* Release interrupt */
558 free_irq(port
->irq
, port
);
562 mpc52xx_uart_set_termios(struct uart_port
*port
, struct ktermios
*new,
563 struct ktermios
*old
)
565 struct mpc52xx_psc __iomem
*psc
= PSC(port
);
567 unsigned char mr1
, mr2
;
569 unsigned int j
, baud
, quot
;
571 /* Prepare what we're gonna write */
574 switch (new->c_cflag
& CSIZE
) {
575 case CS5
: mr1
|= MPC52xx_PSC_MODE_5_BITS
;
577 case CS6
: mr1
|= MPC52xx_PSC_MODE_6_BITS
;
579 case CS7
: mr1
|= MPC52xx_PSC_MODE_7_BITS
;
582 default: mr1
|= MPC52xx_PSC_MODE_8_BITS
;
585 if (new->c_cflag
& PARENB
) {
586 mr1
|= (new->c_cflag
& PARODD
) ?
587 MPC52xx_PSC_MODE_PARODD
: MPC52xx_PSC_MODE_PAREVEN
;
589 mr1
|= MPC52xx_PSC_MODE_PARNONE
;
594 if (new->c_cflag
& CSTOPB
)
595 mr2
|= MPC52xx_PSC_MODE_TWO_STOP
;
597 mr2
|= ((new->c_cflag
& CSIZE
) == CS5
) ?
598 MPC52xx_PSC_MODE_ONE_STOP_5_BITS
:
599 MPC52xx_PSC_MODE_ONE_STOP
;
601 if (new->c_cflag
& CRTSCTS
) {
602 mr1
|= MPC52xx_PSC_MODE_RXRTS
;
603 mr2
|= MPC52xx_PSC_MODE_TXCTS
;
606 baud
= uart_get_baud_rate(port
, new, old
, 0, port
->uartclk
/16);
607 quot
= uart_get_divisor(port
, baud
);
611 spin_lock_irqsave(&port
->lock
, flags
);
613 /* Update the per-port timeout */
614 uart_update_timeout(port
, new->c_cflag
, baud
);
616 /* Do our best to flush TX & RX, so we don't lose anything */
617 /* But we don't wait indefinitely ! */
618 j
= 5000000; /* Maximum wait */
619 /* FIXME Can't receive chars since set_termios might be called at early
620 * boot for the console, all stuff is not yet ready to receive at that
621 * time and that just makes the kernel oops */
622 /* while (j-- && mpc52xx_uart_int_rx_chars(port)); */
623 while (!mpc52xx_uart_tx_empty(port
) && --j
)
627 printk(KERN_ERR
"mpc52xx_uart.c: "
628 "Unable to flush RX & TX fifos in-time in set_termios."
629 "Some chars may have been lost.\n");
631 /* Reset the TX & RX */
632 out_8(&psc
->command
, MPC52xx_PSC_RST_RX
);
633 out_8(&psc
->command
, MPC52xx_PSC_RST_TX
);
635 /* Send new mode settings */
636 out_8(&psc
->command
, MPC52xx_PSC_SEL_MODE_REG_1
);
637 out_8(&psc
->mode
, mr1
);
638 out_8(&psc
->mode
, mr2
);
639 out_8(&psc
->ctur
, ctr
>> 8);
640 out_8(&psc
->ctlr
, ctr
& 0xff);
642 if (UART_ENABLE_MS(port
, new->c_cflag
))
643 mpc52xx_uart_enable_ms(port
);
645 /* Reenable TX & RX */
646 out_8(&psc
->command
, MPC52xx_PSC_TX_ENABLE
);
647 out_8(&psc
->command
, MPC52xx_PSC_RX_ENABLE
);
649 /* We're all set, release the lock */
650 spin_unlock_irqrestore(&port
->lock
, flags
);
654 mpc52xx_uart_type(struct uart_port
*port
)
656 return port
->type
== PORT_MPC52xx
? "MPC52xx PSC" : NULL
;
660 mpc52xx_uart_release_port(struct uart_port
*port
)
662 /* remapped by us ? */
663 if (port
->flags
& UPF_IOREMAP
) {
664 iounmap(port
->membase
);
665 port
->membase
= NULL
;
668 release_mem_region(port
->mapbase
, sizeof(struct mpc52xx_psc
));
672 mpc52xx_uart_request_port(struct uart_port
*port
)
676 if (port
->flags
& UPF_IOREMAP
) /* Need to remap ? */
677 port
->membase
= ioremap(port
->mapbase
,
678 sizeof(struct mpc52xx_psc
));
683 err
= request_mem_region(port
->mapbase
, sizeof(struct mpc52xx_psc
),
684 "mpc52xx_psc_uart") != NULL
? 0 : -EBUSY
;
686 if (err
&& (port
->flags
& UPF_IOREMAP
)) {
687 iounmap(port
->membase
);
688 port
->membase
= NULL
;
695 mpc52xx_uart_config_port(struct uart_port
*port
, int flags
)
697 if ((flags
& UART_CONFIG_TYPE
)
698 && (mpc52xx_uart_request_port(port
) == 0))
699 port
->type
= PORT_MPC52xx
;
703 mpc52xx_uart_verify_port(struct uart_port
*port
, struct serial_struct
*ser
)
705 if (ser
->type
!= PORT_UNKNOWN
&& ser
->type
!= PORT_MPC52xx
)
708 if ((ser
->irq
!= port
->irq
) ||
709 (ser
->io_type
!= SERIAL_IO_MEM
) ||
710 (ser
->baud_base
!= port
->uartclk
) ||
711 (ser
->iomem_base
!= (void *)port
->mapbase
) ||
719 static struct uart_ops mpc52xx_uart_ops
= {
720 .tx_empty
= mpc52xx_uart_tx_empty
,
721 .set_mctrl
= mpc52xx_uart_set_mctrl
,
722 .get_mctrl
= mpc52xx_uart_get_mctrl
,
723 .stop_tx
= mpc52xx_uart_stop_tx
,
724 .start_tx
= mpc52xx_uart_start_tx
,
725 .send_xchar
= mpc52xx_uart_send_xchar
,
726 .stop_rx
= mpc52xx_uart_stop_rx
,
727 .enable_ms
= mpc52xx_uart_enable_ms
,
728 .break_ctl
= mpc52xx_uart_break_ctl
,
729 .startup
= mpc52xx_uart_startup
,
730 .shutdown
= mpc52xx_uart_shutdown
,
731 .set_termios
= mpc52xx_uart_set_termios
,
732 /* .pm = mpc52xx_uart_pm, Not supported yet */
733 /* .set_wake = mpc52xx_uart_set_wake, Not supported yet */
734 .type
= mpc52xx_uart_type
,
735 .release_port
= mpc52xx_uart_release_port
,
736 .request_port
= mpc52xx_uart_request_port
,
737 .config_port
= mpc52xx_uart_config_port
,
738 .verify_port
= mpc52xx_uart_verify_port
742 /* ======================================================================== */
743 /* Interrupt handling */
744 /* ======================================================================== */
747 mpc52xx_uart_int_rx_chars(struct uart_port
*port
)
749 struct tty_struct
*tty
= port
->info
->port
.tty
;
750 unsigned char ch
, flag
;
751 unsigned short status
;
753 /* While we can read, do so ! */
754 while (psc_ops
->raw_rx_rdy(port
)) {
756 ch
= psc_ops
->read_char(port
);
758 /* Handle sysreq char */
760 if (uart_handle_sysrq_char(port
, ch
)) {
771 status
= in_be16(&PSC(port
)->mpc52xx_psc_status
);
773 if (status
& (MPC52xx_PSC_SR_PE
|
775 MPC52xx_PSC_SR_RB
)) {
777 if (status
& MPC52xx_PSC_SR_RB
) {
779 uart_handle_break(port
);
781 } else if (status
& MPC52xx_PSC_SR_PE
) {
783 port
->icount
.parity
++;
785 else if (status
& MPC52xx_PSC_SR_FE
) {
787 port
->icount
.frame
++;
790 /* Clear error condition */
791 out_8(&PSC(port
)->command
, MPC52xx_PSC_RST_ERR_STAT
);
794 tty_insert_flip_char(tty
, ch
, flag
);
795 if (status
& MPC52xx_PSC_SR_OE
) {
797 * Overrun is special, since it's
798 * reported immediately, and doesn't
799 * affect the current character
801 tty_insert_flip_char(tty
, 0, TTY_OVERRUN
);
802 port
->icount
.overrun
++;
806 spin_unlock(&port
->lock
);
807 tty_flip_buffer_push(tty
);
808 spin_lock(&port
->lock
);
810 return psc_ops
->raw_rx_rdy(port
);
814 mpc52xx_uart_int_tx_chars(struct uart_port
*port
)
816 struct circ_buf
*xmit
= &port
->info
->xmit
;
818 /* Process out of band chars */
820 psc_ops
->write_char(port
, port
->x_char
);
826 /* Nothing to do ? */
827 if (uart_circ_empty(xmit
) || uart_tx_stopped(port
)) {
828 mpc52xx_uart_stop_tx(port
);
833 while (psc_ops
->raw_tx_rdy(port
)) {
834 psc_ops
->write_char(port
, xmit
->buf
[xmit
->tail
]);
835 xmit
->tail
= (xmit
->tail
+ 1) & (UART_XMIT_SIZE
- 1);
837 if (uart_circ_empty(xmit
))
842 if (uart_circ_chars_pending(xmit
) < WAKEUP_CHARS
)
843 uart_write_wakeup(port
);
845 /* Maybe we're done after all */
846 if (uart_circ_empty(xmit
)) {
847 mpc52xx_uart_stop_tx(port
);
855 mpc52xx_uart_int(int irq
, void *dev_id
)
857 struct uart_port
*port
= dev_id
;
858 unsigned long pass
= ISR_PASS_LIMIT
;
859 unsigned int keepgoing
;
862 spin_lock(&port
->lock
);
864 /* While we have stuff to do, we continue */
866 /* If we don't find anything to do, we stop */
869 psc_ops
->rx_clr_irq(port
);
870 if (psc_ops
->rx_rdy(port
))
871 keepgoing
|= mpc52xx_uart_int_rx_chars(port
);
873 psc_ops
->tx_clr_irq(port
);
874 if (psc_ops
->tx_rdy(port
))
875 keepgoing
|= mpc52xx_uart_int_tx_chars(port
);
877 status
= in_8(&PSC(port
)->mpc52xx_psc_ipcr
);
878 if (status
& MPC52xx_PSC_D_DCD
)
879 uart_handle_dcd_change(port
, !(status
& MPC52xx_PSC_DCD
));
881 if (status
& MPC52xx_PSC_D_CTS
)
882 uart_handle_cts_change(port
, !(status
& MPC52xx_PSC_CTS
));
884 /* Limit number of iteration */
890 spin_unlock(&port
->lock
);
896 /* ======================================================================== */
897 /* Console ( if applicable ) */
898 /* ======================================================================== */
900 #ifdef CONFIG_SERIAL_MPC52xx_CONSOLE
903 mpc52xx_console_get_options(struct uart_port
*port
,
904 int *baud
, int *parity
, int *bits
, int *flow
)
906 struct mpc52xx_psc __iomem
*psc
= PSC(port
);
909 pr_debug("mpc52xx_console_get_options(port=%p)\n", port
);
911 /* Read the mode registers */
912 out_8(&psc
->command
, MPC52xx_PSC_SEL_MODE_REG_1
);
913 mr1
= in_8(&psc
->mode
);
915 /* CT{U,L}R are write-only ! */
916 *baud
= CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD
;
919 switch (mr1
& MPC52xx_PSC_MODE_BITS_MASK
) {
920 case MPC52xx_PSC_MODE_5_BITS
:
923 case MPC52xx_PSC_MODE_6_BITS
:
926 case MPC52xx_PSC_MODE_7_BITS
:
929 case MPC52xx_PSC_MODE_8_BITS
:
934 if (mr1
& MPC52xx_PSC_MODE_PARNONE
)
937 *parity
= mr1
& MPC52xx_PSC_MODE_PARODD
? 'o' : 'e';
941 mpc52xx_console_write(struct console
*co
, const char *s
, unsigned int count
)
943 struct uart_port
*port
= &mpc52xx_uart_ports
[co
->index
];
946 /* Disable interrupts */
947 psc_ops
->cw_disable_ints(port
);
949 /* Wait the TX buffer to be empty */
950 j
= 5000000; /* Maximum wait */
951 while (!mpc52xx_uart_tx_empty(port
) && --j
)
954 /* Write all the chars */
955 for (i
= 0; i
< count
; i
++, s
++) {
956 /* Line return handling */
958 psc_ops
->write_char(port
, '\r');
961 psc_ops
->write_char(port
, *s
);
963 /* Wait the TX buffer to be empty */
964 j
= 20000; /* Maximum wait */
965 while (!mpc52xx_uart_tx_empty(port
) && --j
)
969 /* Restore interrupt state */
970 psc_ops
->cw_restore_ints(port
);
975 mpc52xx_console_setup(struct console
*co
, char *options
)
977 struct uart_port
*port
= &mpc52xx_uart_ports
[co
->index
];
978 struct device_node
*np
= mpc52xx_uart_nodes
[co
->index
];
979 unsigned int uartclk
;
983 int baud
= CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD
;
988 pr_debug("mpc52xx_console_setup co=%p, co->index=%i, options=%s\n",
989 co
, co
->index
, options
);
991 if ((co
->index
< 0) || (co
->index
> MPC52xx_PSC_MAXNUM
)) {
992 pr_debug("PSC%x out of range\n", co
->index
);
997 pr_debug("PSC%x not found in device tree\n", co
->index
);
1001 pr_debug("Console on ttyPSC%x is %s\n",
1002 co
->index
, mpc52xx_uart_nodes
[co
->index
]->full_name
);
1004 /* Fetch register locations */
1005 ret
= of_address_to_resource(np
, 0, &res
);
1007 pr_debug("Could not get resources for PSC%x\n", co
->index
);
1011 uartclk
= psc_ops
->getuartclk(np
);
1013 pr_debug("Could not find uart clock frequency!\n");
1017 /* Basic port init. Needed since we use some uart_??? func before
1018 * real init for early access */
1019 spin_lock_init(&port
->lock
);
1020 port
->uartclk
= uartclk
;
1021 port
->ops
= &mpc52xx_uart_ops
;
1022 port
->mapbase
= res
.start
;
1023 port
->membase
= ioremap(res
.start
, sizeof(struct mpc52xx_psc
));
1024 port
->irq
= irq_of_parse_and_map(np
, 0);
1026 if (port
->membase
== NULL
)
1029 pr_debug("mpc52xx-psc uart at %p, mapped to %p, irq=%x, freq=%i\n",
1030 (void *)port
->mapbase
, port
->membase
,
1031 port
->irq
, port
->uartclk
);
1033 /* Setup the port parameters accoding to options */
1035 uart_parse_options(options
, &baud
, &parity
, &bits
, &flow
);
1037 mpc52xx_console_get_options(port
, &baud
, &parity
, &bits
, &flow
);
1039 pr_debug("Setting console parameters: %i %i%c1 flow=%c\n",
1040 baud
, bits
, parity
, flow
);
1042 return uart_set_options(port
, co
, baud
, parity
, bits
, flow
);
1046 static struct uart_driver mpc52xx_uart_driver
;
1048 static struct console mpc52xx_console
= {
1050 .write
= mpc52xx_console_write
,
1051 .device
= uart_console_device
,
1052 .setup
= mpc52xx_console_setup
,
1053 .flags
= CON_PRINTBUFFER
,
1054 .index
= -1, /* Specified on the cmdline (e.g. console=ttyPSC0) */
1055 .data
= &mpc52xx_uart_driver
,
1060 mpc52xx_console_init(void)
1062 mpc52xx_uart_of_enumerate();
1063 register_console(&mpc52xx_console
);
1067 console_initcall(mpc52xx_console_init
);
1069 #define MPC52xx_PSC_CONSOLE &mpc52xx_console
1071 #define MPC52xx_PSC_CONSOLE NULL
1075 /* ======================================================================== */
1077 /* ======================================================================== */
1079 static struct uart_driver mpc52xx_uart_driver
= {
1080 .driver_name
= "mpc52xx_psc_uart",
1081 .dev_name
= "ttyPSC",
1082 .major
= SERIAL_PSC_MAJOR
,
1083 .minor
= SERIAL_PSC_MINOR
,
1084 .nr
= MPC52xx_PSC_MAXNUM
,
1085 .cons
= MPC52xx_PSC_CONSOLE
,
1088 /* ======================================================================== */
1089 /* OF Platform Driver */
1090 /* ======================================================================== */
1092 static struct of_device_id mpc52xx_uart_of_match
[] = {
1093 #ifdef CONFIG_PPC_MPC52xx
1094 { .compatible
= "fsl,mpc5200-psc-uart", .data
= &mpc52xx_psc_ops
, },
1095 /* binding used by old lite5200 device trees: */
1096 { .compatible
= "mpc5200-psc-uart", .data
= &mpc52xx_psc_ops
, },
1097 /* binding used by efika: */
1098 { .compatible
= "mpc5200-serial", .data
= &mpc52xx_psc_ops
, },
1100 #ifdef CONFIG_PPC_MPC512x
1101 { .compatible
= "fsl,mpc5121-psc-uart", .data
= &mpc512x_psc_ops
, },
1106 static int __devinit
1107 mpc52xx_uart_of_probe(struct of_device
*op
, const struct of_device_id
*match
)
1110 unsigned int uartclk
;
1111 struct uart_port
*port
= NULL
;
1112 struct resource res
;
1115 dev_dbg(&op
->dev
, "mpc52xx_uart_probe(op=%p, match=%p)\n", op
, match
);
1117 /* Check validity & presence */
1118 for (idx
= 0; idx
< MPC52xx_PSC_MAXNUM
; idx
++)
1119 if (mpc52xx_uart_nodes
[idx
] == op
->node
)
1121 if (idx
>= MPC52xx_PSC_MAXNUM
)
1123 pr_debug("Found %s assigned to ttyPSC%x\n",
1124 mpc52xx_uart_nodes
[idx
]->full_name
, idx
);
1126 uartclk
= psc_ops
->getuartclk(op
->node
);
1128 dev_dbg(&op
->dev
, "Could not find uart clock frequency!\n");
1132 /* Init the port structure */
1133 port
= &mpc52xx_uart_ports
[idx
];
1135 spin_lock_init(&port
->lock
);
1136 port
->uartclk
= uartclk
;
1137 port
->fifosize
= 512;
1138 port
->iotype
= UPIO_MEM
;
1139 port
->flags
= UPF_BOOT_AUTOCONF
|
1140 (uart_console(port
) ? 0 : UPF_IOREMAP
);
1142 port
->ops
= &mpc52xx_uart_ops
;
1143 port
->dev
= &op
->dev
;
1145 /* Search for IRQ and mapbase */
1146 ret
= of_address_to_resource(op
->node
, 0, &res
);
1150 port
->mapbase
= res
.start
;
1151 if (!port
->mapbase
) {
1152 dev_dbg(&op
->dev
, "Could not allocate resources for PSC\n");
1156 port
->irq
= irq_of_parse_and_map(op
->node
, 0);
1157 if (port
->irq
== NO_IRQ
) {
1158 dev_dbg(&op
->dev
, "Could not get irq\n");
1162 dev_dbg(&op
->dev
, "mpc52xx-psc uart at %p, irq=%x, freq=%i\n",
1163 (void *)port
->mapbase
, port
->irq
, port
->uartclk
);
1165 /* Add the port to the uart sub-system */
1166 ret
= uart_add_one_port(&mpc52xx_uart_driver
, port
);
1168 irq_dispose_mapping(port
->irq
);
1172 dev_set_drvdata(&op
->dev
, (void *)port
);
1177 mpc52xx_uart_of_remove(struct of_device
*op
)
1179 struct uart_port
*port
= dev_get_drvdata(&op
->dev
);
1180 dev_set_drvdata(&op
->dev
, NULL
);
1183 uart_remove_one_port(&mpc52xx_uart_driver
, port
);
1184 irq_dispose_mapping(port
->irq
);
1192 mpc52xx_uart_of_suspend(struct of_device
*op
, pm_message_t state
)
1194 struct uart_port
*port
= (struct uart_port
*) dev_get_drvdata(&op
->dev
);
1197 uart_suspend_port(&mpc52xx_uart_driver
, port
);
1203 mpc52xx_uart_of_resume(struct of_device
*op
)
1205 struct uart_port
*port
= (struct uart_port
*) dev_get_drvdata(&op
->dev
);
1208 uart_resume_port(&mpc52xx_uart_driver
, port
);
1215 mpc52xx_uart_of_assign(struct device_node
*np
)
1219 /* Find the first free PSC number */
1220 for (i
= 0; i
< MPC52xx_PSC_MAXNUM
; i
++) {
1221 if (mpc52xx_uart_nodes
[i
] == NULL
) {
1223 mpc52xx_uart_nodes
[i
] = np
;
1230 mpc52xx_uart_of_enumerate(void)
1232 static int enum_done
;
1233 struct device_node
*np
;
1234 const struct of_device_id
*match
;
1240 /* Assign index to each PSC in device tree */
1241 for_each_matching_node(np
, mpc52xx_uart_of_match
) {
1242 match
= of_match_node(mpc52xx_uart_of_match
, np
);
1243 psc_ops
= match
->data
;
1244 mpc52xx_uart_of_assign(np
);
1249 for (i
= 0; i
< MPC52xx_PSC_MAXNUM
; i
++) {
1250 if (mpc52xx_uart_nodes
[i
])
1251 pr_debug("%s assigned to ttyPSC%x\n",
1252 mpc52xx_uart_nodes
[i
]->full_name
, i
);
1256 MODULE_DEVICE_TABLE(of
, mpc52xx_uart_of_match
);
1258 static struct of_platform_driver mpc52xx_uart_of_driver
= {
1259 .match_table
= mpc52xx_uart_of_match
,
1260 .probe
= mpc52xx_uart_of_probe
,
1261 .remove
= mpc52xx_uart_of_remove
,
1263 .suspend
= mpc52xx_uart_of_suspend
,
1264 .resume
= mpc52xx_uart_of_resume
,
1267 .name
= "mpc52xx-psc-uart",
1272 /* ======================================================================== */
1274 /* ======================================================================== */
1277 mpc52xx_uart_init(void)
1281 printk(KERN_INFO
"Serial: MPC52xx PSC UART driver\n");
1283 ret
= uart_register_driver(&mpc52xx_uart_driver
);
1285 printk(KERN_ERR
"%s: uart_register_driver failed (%i)\n",
1290 mpc52xx_uart_of_enumerate();
1292 ret
= of_register_platform_driver(&mpc52xx_uart_of_driver
);
1294 printk(KERN_ERR
"%s: of_register_platform_driver failed (%i)\n",
1296 uart_unregister_driver(&mpc52xx_uart_driver
);
1304 mpc52xx_uart_exit(void)
1306 of_unregister_platform_driver(&mpc52xx_uart_of_driver
);
1307 uart_unregister_driver(&mpc52xx_uart_driver
);
1311 module_init(mpc52xx_uart_init
);
1312 module_exit(mpc52xx_uart_exit
);
1314 MODULE_AUTHOR("Sylvain Munaut <tnt@246tNt.com>");
1315 MODULE_DESCRIPTION("Freescale MPC52xx PSC UART");
1316 MODULE_LICENSE("GPL");