[IA64-SGI] sn2-move-pci-headers.patch
[linux-2.6/mini2440.git] / arch / sh64 / mm / tlb.c
blobd517e7d703408fcb0e66833cab68bdceccfc575b
1 /*
2 * arch/sh64/mm/tlb.c
4 * Copyright (C) 2003 Paul Mundt <lethal@linux-sh.org>
5 * Copyright (C) 2003 Richard Curnow <richard.curnow@superh.com>
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
12 #include <linux/mm.h>
13 #include <linux/init.h>
14 #include <asm/page.h>
15 #include <asm/tlb.h>
16 #include <asm/mmu_context.h>
18 /**
19 * sh64_tlb_init
21 * Perform initial setup for the DTLB and ITLB.
23 int __init sh64_tlb_init(void)
25 /* Assign some sane DTLB defaults */
26 cpu_data->dtlb.entries = 64;
27 cpu_data->dtlb.step = 0x10;
29 cpu_data->dtlb.first = DTLB_FIXED | cpu_data->dtlb.step;
30 cpu_data->dtlb.next = cpu_data->dtlb.first;
32 cpu_data->dtlb.last = DTLB_FIXED |
33 ((cpu_data->dtlb.entries - 1) *
34 cpu_data->dtlb.step);
36 /* And again for the ITLB */
37 cpu_data->itlb.entries = 64;
38 cpu_data->itlb.step = 0x10;
40 cpu_data->itlb.first = ITLB_FIXED | cpu_data->itlb.step;
41 cpu_data->itlb.next = cpu_data->itlb.first;
42 cpu_data->itlb.last = ITLB_FIXED |
43 ((cpu_data->itlb.entries - 1) *
44 cpu_data->itlb.step);
46 return 0;
49 /**
50 * sh64_next_free_dtlb_entry
52 * Find the next available DTLB entry
54 unsigned long long sh64_next_free_dtlb_entry(void)
56 return cpu_data->dtlb.next;
59 /**
60 * sh64_get_wired_dtlb_entry
62 * Allocate a wired (locked-in) entry in the DTLB
64 unsigned long long sh64_get_wired_dtlb_entry(void)
66 unsigned long long entry = sh64_next_free_dtlb_entry();
68 cpu_data->dtlb.first += cpu_data->dtlb.step;
69 cpu_data->dtlb.next += cpu_data->dtlb.step;
71 return entry;
74 /**
75 * sh64_put_wired_dtlb_entry
77 * @entry: Address of TLB slot.
79 * Free a wired (locked-in) entry in the DTLB.
81 * Works like a stack, last one to allocate must be first one to free.
83 int sh64_put_wired_dtlb_entry(unsigned long long entry)
85 __flush_tlb_slot(entry);
88 * We don't do any particularly useful tracking of wired entries,
89 * so this approach works like a stack .. last one to be allocated
90 * has to be the first one to be freed.
92 * We could potentially load wired entries into a list and work on
93 * rebalancing the list periodically (which also entails moving the
94 * contents of a TLB entry) .. though I have a feeling that this is
95 * more trouble than it's worth.
99 * Entry must be valid .. we don't want any ITLB addresses!
101 if (entry <= DTLB_FIXED)
102 return -EINVAL;
105 * Next, check if we're within range to be freed. (ie, must be the
106 * entry beneath the first 'free' entry!
108 if (entry < (cpu_data->dtlb.first - cpu_data->dtlb.step))
109 return -EINVAL;
111 /* If we are, then bring this entry back into the list */
112 cpu_data->dtlb.first -= cpu_data->dtlb.step;
113 cpu_data->dtlb.next = entry;
115 return 0;
119 * sh64_setup_tlb_slot
121 * @config_addr: Address of TLB slot.
122 * @eaddr: Virtual address.
123 * @asid: Address Space Identifier.
124 * @paddr: Physical address.
126 * Load up a virtual<->physical translation for @eaddr<->@paddr in the
127 * pre-allocated TLB slot @config_addr (see sh64_get_wired_dtlb_entry).
129 inline void sh64_setup_tlb_slot(unsigned long long config_addr,
130 unsigned long eaddr,
131 unsigned long asid,
132 unsigned long paddr)
134 unsigned long long pteh, ptel;
136 /* Sign extension */
137 #if (NEFF == 32)
138 pteh = (unsigned long long)(signed long long)(signed long) eaddr;
139 #else
140 #error "Can't sign extend more than 32 bits yet"
141 #endif
142 pteh &= PAGE_MASK;
143 pteh |= (asid << PTEH_ASID_SHIFT) | PTEH_VALID;
144 #if (NEFF == 32)
145 ptel = (unsigned long long)(signed long long)(signed long) paddr;
146 #else
147 #error "Can't sign extend more than 32 bits yet"
148 #endif
149 ptel &= PAGE_MASK;
150 ptel |= (_PAGE_CACHABLE | _PAGE_READ | _PAGE_WRITE);
152 asm volatile("putcfg %0, 1, %1\n\t"
153 "putcfg %0, 0, %2\n"
154 : : "r" (config_addr), "r" (ptel), "r" (pteh));
158 * sh64_teardown_tlb_slot
160 * @config_addr: Address of TLB slot.
162 * Teardown any existing mapping in the TLB slot @config_addr.
164 inline void sh64_teardown_tlb_slot(unsigned long long config_addr)
165 __attribute__ ((alias("__flush_tlb_slot")));