2 * spi_bitbang.c - polling/bitbanging SPI master controller driver utilities
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 #include <linux/init.h>
20 #include <linux/spinlock.h>
21 #include <linux/workqueue.h>
22 #include <linux/interrupt.h>
23 #include <linux/delay.h>
24 #include <linux/errno.h>
25 #include <linux/platform_device.h>
27 #include <linux/spi/spi.h>
28 #include <linux/spi/spi_bitbang.h>
31 /*----------------------------------------------------------------------*/
34 * FIRST PART (OPTIONAL): word-at-a-time spi_transfer support.
35 * Use this for GPIO or shift-register level hardware APIs.
37 * spi_bitbang_cs is in spi_device->controller_state, which is unavailable
38 * to glue code. These bitbang setup() and cleanup() routines are always
39 * used, though maybe they're called from controller-aware code.
41 * chipselect() and friends may use use spi_device->controller_data and
42 * controller registers as appropriate.
45 * NOTE: SPI controller pins can often be used as GPIO pins instead,
46 * which means you could use a bitbang driver either to get hardware
47 * working quickly, or testing for differences that aren't speed related.
50 struct spi_bitbang_cs
{
51 unsigned nsecs
; /* (clock cycle time)/2 */
52 u32 (*txrx_word
)(struct spi_device
*spi
, unsigned nsecs
,
54 unsigned (*txrx_bufs
)(struct spi_device
*,
56 struct spi_device
*spi
,
59 unsigned, struct spi_transfer
*);
62 static unsigned bitbang_txrx_8(
63 struct spi_device
*spi
,
64 u32 (*txrx_word
)(struct spi_device
*spi
,
68 struct spi_transfer
*t
70 unsigned bits
= spi
->bits_per_word
;
71 unsigned count
= t
->len
;
72 const u8
*tx
= t
->tx_buf
;
75 while (likely(count
> 0)) {
80 word
= txrx_word(spi
, ns
, word
, bits
);
85 return t
->len
- count
;
88 static unsigned bitbang_txrx_16(
89 struct spi_device
*spi
,
90 u32 (*txrx_word
)(struct spi_device
*spi
,
94 struct spi_transfer
*t
96 unsigned bits
= spi
->bits_per_word
;
97 unsigned count
= t
->len
;
98 const u16
*tx
= t
->tx_buf
;
101 while (likely(count
> 1)) {
106 word
= txrx_word(spi
, ns
, word
, bits
);
111 return t
->len
- count
;
114 static unsigned bitbang_txrx_32(
115 struct spi_device
*spi
,
116 u32 (*txrx_word
)(struct spi_device
*spi
,
120 struct spi_transfer
*t
122 unsigned bits
= spi
->bits_per_word
;
123 unsigned count
= t
->len
;
124 const u32
*tx
= t
->tx_buf
;
127 while (likely(count
> 3)) {
132 word
= txrx_word(spi
, ns
, word
, bits
);
137 return t
->len
- count
;
140 int spi_bitbang_setup_transfer(struct spi_device
*spi
, struct spi_transfer
*t
)
142 struct spi_bitbang_cs
*cs
= spi
->controller_state
;
147 bits_per_word
= t
->bits_per_word
;
154 /* spi_transfer level calls that work per-word */
156 bits_per_word
= spi
->bits_per_word
;
157 if (bits_per_word
<= 8)
158 cs
->txrx_bufs
= bitbang_txrx_8
;
159 else if (bits_per_word
<= 16)
160 cs
->txrx_bufs
= bitbang_txrx_16
;
161 else if (bits_per_word
<= 32)
162 cs
->txrx_bufs
= bitbang_txrx_32
;
166 /* nsecs = (clock period)/2 */
168 hz
= spi
->max_speed_hz
;
170 cs
->nsecs
= (1000000000/2) / hz
;
171 if (cs
->nsecs
> (MAX_UDELAY_MS
* 1000 * 1000))
177 EXPORT_SYMBOL_GPL(spi_bitbang_setup_transfer
);
180 * spi_bitbang_setup - default setup for per-word I/O loops
182 int spi_bitbang_setup(struct spi_device
*spi
)
184 struct spi_bitbang_cs
*cs
= spi
->controller_state
;
185 struct spi_bitbang
*bitbang
;
188 bitbang
= spi_master_get_devdata(spi
->master
);
190 /* REVISIT: some systems will want to support devices using lsb-first
191 * bit encodings on the wire. In pure software that would be trivial,
192 * just bitbang_txrx_le_cphaX() routines shifting the other way, and
193 * some hardware controllers also have this support.
195 if ((spi
->mode
& SPI_LSB_FIRST
) != 0)
199 cs
= kzalloc(sizeof *cs
, GFP_KERNEL
);
202 spi
->controller_state
= cs
;
205 if (!spi
->bits_per_word
)
206 spi
->bits_per_word
= 8;
208 /* per-word shift register access, in hardware or bitbanging */
209 cs
->txrx_word
= bitbang
->txrx_word
[spi
->mode
& (SPI_CPOL
|SPI_CPHA
)];
213 retval
= bitbang
->setup_transfer(spi
, NULL
);
217 dev_dbg(&spi
->dev
, "%s, mode %d, %u bits/w, %u nsec/bit\n",
218 __FUNCTION__
, spi
->mode
& (SPI_CPOL
| SPI_CPHA
),
219 spi
->bits_per_word
, 2 * cs
->nsecs
);
221 /* NOTE we _need_ to call chipselect() early, ideally with adapter
222 * setup, unless the hardware defaults cooperate to avoid confusion
223 * between normal (active low) and inverted chipselects.
226 /* deselect chip (low or high) */
227 spin_lock(&bitbang
->lock
);
228 if (!bitbang
->busy
) {
229 bitbang
->chipselect(spi
, BITBANG_CS_INACTIVE
);
232 spin_unlock(&bitbang
->lock
);
236 EXPORT_SYMBOL_GPL(spi_bitbang_setup
);
239 * spi_bitbang_cleanup - default cleanup for per-word I/O loops
241 void spi_bitbang_cleanup(struct spi_device
*spi
)
243 kfree(spi
->controller_state
);
245 EXPORT_SYMBOL_GPL(spi_bitbang_cleanup
);
247 static int spi_bitbang_bufs(struct spi_device
*spi
, struct spi_transfer
*t
)
249 struct spi_bitbang_cs
*cs
= spi
->controller_state
;
250 unsigned nsecs
= cs
->nsecs
;
252 return cs
->txrx_bufs(spi
, cs
->txrx_word
, nsecs
, t
);
255 /*----------------------------------------------------------------------*/
258 * SECOND PART ... simple transfer queue runner.
260 * This costs a task context per controller, running the queue by
261 * performing each transfer in sequence. Smarter hardware can queue
262 * several DMA transfers at once, and process several controller queues
263 * in parallel; this driver doesn't match such hardware very well.
265 * Drivers can provide word-at-a-time i/o primitives, or provide
266 * transfer-at-a-time ones to leverage dma or fifo hardware.
268 static void bitbang_work(struct work_struct
*work
)
270 struct spi_bitbang
*bitbang
=
271 container_of(work
, struct spi_bitbang
, work
);
274 spin_lock_irqsave(&bitbang
->lock
, flags
);
276 while (!list_empty(&bitbang
->queue
)) {
277 struct spi_message
*m
;
278 struct spi_device
*spi
;
280 struct spi_transfer
*t
= NULL
;
284 int (*setup_transfer
)(struct spi_device
*,
285 struct spi_transfer
*);
287 m
= container_of(bitbang
->queue
.next
, struct spi_message
,
289 list_del_init(&m
->queue
);
290 spin_unlock_irqrestore(&bitbang
->lock
, flags
);
292 /* FIXME this is made-up ... the correct value is known to
293 * word-at-a-time bitbang code, and presumably chipselect()
294 * should enforce these requirements too?
302 setup_transfer
= NULL
;
304 list_for_each_entry (t
, &m
->transfers
, transfer_list
) {
306 /* override or restore speed and wordsize */
307 if (t
->speed_hz
|| t
->bits_per_word
) {
308 setup_transfer
= bitbang
->setup_transfer
;
309 if (!setup_transfer
) {
310 status
= -ENOPROTOOPT
;
314 if (setup_transfer
) {
315 status
= setup_transfer(spi
, t
);
320 /* set up default clock polarity, and activate chip;
321 * this implicitly updates clock and spi modes as
322 * previously recorded for this device via setup().
323 * (and also deselects any other chip that might be
327 bitbang
->chipselect(spi
, BITBANG_CS_ACTIVE
);
330 cs_change
= t
->cs_change
;
331 if (!t
->tx_buf
&& !t
->rx_buf
&& t
->len
) {
336 /* transfer data. the lower level code handles any
337 * new dma mappings it needs. our caller always gave
338 * us dma-safe buffers.
341 /* REVISIT dma API still needs a designated
342 * DMA_ADDR_INVALID; ~0 might be better.
344 if (!m
->is_dma_mapped
)
345 t
->rx_dma
= t
->tx_dma
= 0;
346 status
= bitbang
->txrx_bufs(spi
, t
);
348 if (status
!= t
->len
) {
353 m
->actual_length
+= status
;
356 /* protocol tweaks before next transfer */
358 udelay(t
->delay_usecs
);
362 if (t
->transfer_list
.next
== &m
->transfers
)
365 /* sometimes a short mid-message deselect of the chip
366 * may be needed to terminate a mode or command
369 bitbang
->chipselect(spi
, BITBANG_CS_INACTIVE
);
374 m
->complete(m
->context
);
376 /* restore speed and wordsize */
378 setup_transfer(spi
, NULL
);
380 /* normally deactivate chipselect ... unless no error and
381 * cs_change has hinted that the next message will probably
382 * be for this chip too.
384 if (!(status
== 0 && cs_change
)) {
386 bitbang
->chipselect(spi
, BITBANG_CS_INACTIVE
);
390 spin_lock_irqsave(&bitbang
->lock
, flags
);
393 spin_unlock_irqrestore(&bitbang
->lock
, flags
);
397 * spi_bitbang_transfer - default submit to transfer queue
399 int spi_bitbang_transfer(struct spi_device
*spi
, struct spi_message
*m
)
401 struct spi_bitbang
*bitbang
;
405 m
->actual_length
= 0;
406 m
->status
= -EINPROGRESS
;
408 bitbang
= spi_master_get_devdata(spi
->master
);
410 spin_lock_irqsave(&bitbang
->lock
, flags
);
411 if (!spi
->max_speed_hz
)
414 list_add_tail(&m
->queue
, &bitbang
->queue
);
415 queue_work(bitbang
->workqueue
, &bitbang
->work
);
417 spin_unlock_irqrestore(&bitbang
->lock
, flags
);
421 EXPORT_SYMBOL_GPL(spi_bitbang_transfer
);
423 /*----------------------------------------------------------------------*/
426 * spi_bitbang_start - start up a polled/bitbanging SPI master driver
427 * @bitbang: driver handle
429 * Caller should have zero-initialized all parts of the structure, and then
430 * provided callbacks for chip selection and I/O loops. If the master has
431 * a transfer method, its final step should call spi_bitbang_transfer; or,
432 * that's the default if the transfer routine is not initialized. It should
433 * also set up the bus number and number of chipselects.
435 * For i/o loops, provide callbacks either per-word (for bitbanging, or for
436 * hardware that basically exposes a shift register) or per-spi_transfer
437 * (which takes better advantage of hardware like fifos or DMA engines).
439 * Drivers using per-word I/O loops should use (or call) spi_bitbang_setup,
440 * spi_bitbang_cleanup and spi_bitbang_setup_transfer to handle those spi
441 * master methods. Those methods are the defaults if the bitbang->txrx_bufs
442 * routine isn't initialized.
444 * This routine registers the spi_master, which will process requests in a
445 * dedicated task, keeping IRQs unblocked most of the time. To stop
446 * processing those requests, call spi_bitbang_stop().
448 int spi_bitbang_start(struct spi_bitbang
*bitbang
)
452 if (!bitbang
->master
|| !bitbang
->chipselect
)
455 INIT_WORK(&bitbang
->work
, bitbang_work
);
456 spin_lock_init(&bitbang
->lock
);
457 INIT_LIST_HEAD(&bitbang
->queue
);
459 if (!bitbang
->master
->transfer
)
460 bitbang
->master
->transfer
= spi_bitbang_transfer
;
461 if (!bitbang
->txrx_bufs
) {
462 bitbang
->use_dma
= 0;
463 bitbang
->txrx_bufs
= spi_bitbang_bufs
;
464 if (!bitbang
->master
->setup
) {
465 if (!bitbang
->setup_transfer
)
466 bitbang
->setup_transfer
=
467 spi_bitbang_setup_transfer
;
468 bitbang
->master
->setup
= spi_bitbang_setup
;
469 bitbang
->master
->cleanup
= spi_bitbang_cleanup
;
471 } else if (!bitbang
->master
->setup
)
474 /* this task is the only thing to touch the SPI bits */
476 bitbang
->workqueue
= create_singlethread_workqueue(
477 bitbang
->master
->cdev
.dev
->bus_id
);
478 if (bitbang
->workqueue
== NULL
) {
483 /* driver may get busy before register() returns, especially
484 * if someone registered boardinfo for devices
486 status
= spi_register_master(bitbang
->master
);
493 destroy_workqueue(bitbang
->workqueue
);
497 EXPORT_SYMBOL_GPL(spi_bitbang_start
);
500 * spi_bitbang_stop - stops the task providing spi communication
502 int spi_bitbang_stop(struct spi_bitbang
*bitbang
)
504 spi_unregister_master(bitbang
->master
);
506 WARN_ON(!list_empty(&bitbang
->queue
));
508 destroy_workqueue(bitbang
->workqueue
);
512 EXPORT_SYMBOL_GPL(spi_bitbang_stop
);
514 MODULE_LICENSE("GPL");