2 * Real Time Clock interface for StrongARM SA1x00 and XScale PXA2xx
4 * Copyright (c) 2000 Nils Faerber
6 * Based on rtc.c by Paul Gortmaker
8 * Original Driver by Nils Faerber <nils@kernelconcepts.de>
11 * CIH <cih@coventive.com>
12 * Nicolas Pitre <nico@cam.org>
13 * Andrew Christian <andrew.christian@hp.com>
15 * Converted to the RTC subsystem and Driver Model
16 * by Richard Purdie <rpurdie@rpsys.net>
18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License
20 * as published by the Free Software Foundation; either version
21 * 2 of the License, or (at your option) any later version.
24 #include <linux/platform_device.h>
25 #include <linux/module.h>
26 #include <linux/rtc.h>
27 #include <linux/init.h>
29 #include <linux/interrupt.h>
30 #include <linux/string.h>
33 #include <asm/bitops.h>
34 #include <asm/hardware.h>
38 #ifdef CONFIG_ARCH_PXA
39 #include <asm/arch/pxa-regs.h>
42 #define TIMER_FREQ CLOCK_TICK_RATE
43 #define RTC_DEF_DIVIDER 32768 - 1
44 #define RTC_DEF_TRIM 0
46 static unsigned long rtc_freq
= 1024;
47 static struct rtc_time rtc_alarm
;
48 static DEFINE_SPINLOCK(sa1100_rtc_lock
);
50 static int rtc_update_alarm(struct rtc_time
*alrm
)
52 struct rtc_time alarm_tm
, now_tm
;
53 unsigned long now
, time
;
58 rtc_time_to_tm(now
, &now_tm
);
59 rtc_next_alarm_time(&alarm_tm
, &now_tm
, alrm
);
60 ret
= rtc_tm_to_time(&alarm_tm
, &time
);
64 RTSR
= RTSR
& (RTSR_HZE
|RTSR_ALE
|RTSR_AL
);
66 } while (now
!= RCNR
);
71 static irqreturn_t
sa1100_rtc_interrupt(int irq
, void *dev_id
)
73 struct platform_device
*pdev
= to_platform_device(dev_id
);
74 struct rtc_device
*rtc
= platform_get_drvdata(pdev
);
76 unsigned long events
= 0;
78 spin_lock(&sa1100_rtc_lock
);
81 /* clear interrupt sources */
83 RTSR
= (RTSR_AL
| RTSR_HZ
) & (rtsr
>> 2);
85 /* clear alarm interrupt if it has occurred */
88 RTSR
= rtsr
& (RTSR_ALE
| RTSR_HZE
);
90 /* update irq data & counter */
92 events
|= RTC_AF
| RTC_IRQF
;
94 events
|= RTC_UF
| RTC_IRQF
;
96 rtc_update_irq(&rtc
->class_dev
, 1, events
);
98 if (rtsr
& RTSR_AL
&& rtc_periodic_alarm(&rtc_alarm
))
99 rtc_update_alarm(&rtc_alarm
);
101 spin_unlock(&sa1100_rtc_lock
);
106 static int rtc_timer1_count
;
108 static irqreturn_t
timer1_interrupt(int irq
, void *dev_id
)
110 struct platform_device
*pdev
= to_platform_device(dev_id
);
111 struct rtc_device
*rtc
= platform_get_drvdata(pdev
);
114 * If we match for the first time, rtc_timer1_count will be 1.
115 * Otherwise, we wrapped around (very unlikely but
116 * still possible) so compute the amount of missed periods.
117 * The match reg is updated only when the data is actually retrieved
118 * to avoid unnecessary interrupts.
120 OSSR
= OSSR_M1
; /* clear match on timer1 */
122 rtc_update_irq(&rtc
->class_dev
, rtc_timer1_count
, RTC_PF
| RTC_IRQF
);
124 if (rtc_timer1_count
== 1)
125 rtc_timer1_count
= (rtc_freq
* ((1<<30)/(TIMER_FREQ
>>2)));
130 static int sa1100_rtc_read_callback(struct device
*dev
, int data
)
133 /* interpolate missed periods and set match for the next */
134 unsigned long period
= TIMER_FREQ
/rtc_freq
;
135 unsigned long oscr
= OSCR
;
136 unsigned long osmr1
= OSMR1
;
137 unsigned long missed
= (oscr
- osmr1
)/period
;
139 OSSR
= OSSR_M1
; /* clear match on timer 1 */
140 OSMR1
= osmr1
+ (missed
+ 1)*period
;
141 /* Ensure we didn't miss another match in the mean time.
142 * Here we compare (match - OSCR) 8 instead of 0 --
143 * see comment in pxa_timer_interrupt() for explanation.
145 while( (signed long)((osmr1
= OSMR1
) - OSCR
) <= 8 ) {
147 OSSR
= OSSR_M1
; /* clear match on timer 1 */
148 OSMR1
= osmr1
+ period
;
154 static int sa1100_rtc_open(struct device
*dev
)
158 ret
= request_irq(IRQ_RTC1Hz
, sa1100_rtc_interrupt
, IRQF_DISABLED
,
161 dev_err(dev
, "IRQ %d already in use.\n", IRQ_RTC1Hz
);
164 ret
= request_irq(IRQ_RTCAlrm
, sa1100_rtc_interrupt
, IRQF_DISABLED
,
167 dev_err(dev
, "IRQ %d already in use.\n", IRQ_RTCAlrm
);
170 ret
= request_irq(IRQ_OST1
, timer1_interrupt
, IRQF_DISABLED
,
173 dev_err(dev
, "IRQ %d already in use.\n", IRQ_OST1
);
179 free_irq(IRQ_RTCAlrm
, dev
);
181 free_irq(IRQ_RTC1Hz
, dev
);
186 static void sa1100_rtc_release(struct device
*dev
)
188 spin_lock_irq(&sa1100_rtc_lock
);
192 spin_unlock_irq(&sa1100_rtc_lock
);
194 free_irq(IRQ_OST1
, dev
);
195 free_irq(IRQ_RTCAlrm
, dev
);
196 free_irq(IRQ_RTC1Hz
, dev
);
200 static int sa1100_rtc_ioctl(struct device
*dev
, unsigned int cmd
,
205 spin_lock_irq(&sa1100_rtc_lock
);
207 spin_unlock_irq(&sa1100_rtc_lock
);
210 spin_lock_irq(&sa1100_rtc_lock
);
212 spin_unlock_irq(&sa1100_rtc_lock
);
215 spin_lock_irq(&sa1100_rtc_lock
);
217 spin_unlock_irq(&sa1100_rtc_lock
);
220 spin_lock_irq(&sa1100_rtc_lock
);
222 spin_unlock_irq(&sa1100_rtc_lock
);
225 spin_lock_irq(&sa1100_rtc_lock
);
227 spin_unlock_irq(&sa1100_rtc_lock
);
230 spin_lock_irq(&sa1100_rtc_lock
);
231 OSMR1
= TIMER_FREQ
/rtc_freq
+ OSCR
;
233 rtc_timer1_count
= 1;
234 spin_unlock_irq(&sa1100_rtc_lock
);
237 return put_user(rtc_freq
, (unsigned long *)arg
);
239 if (arg
< 1 || arg
> TIMER_FREQ
)
247 static int sa1100_rtc_read_time(struct device
*dev
, struct rtc_time
*tm
)
249 rtc_time_to_tm(RCNR
, tm
);
253 static int sa1100_rtc_set_time(struct device
*dev
, struct rtc_time
*tm
)
258 ret
= rtc_tm_to_time(tm
, &time
);
264 static int sa1100_rtc_read_alarm(struct device
*dev
, struct rtc_wkalrm
*alrm
)
266 memcpy(&alrm
->time
, &rtc_alarm
, sizeof(struct rtc_time
));
267 alrm
->pending
= RTSR
& RTSR_AL
? 1 : 0;
271 static int sa1100_rtc_set_alarm(struct device
*dev
, struct rtc_wkalrm
*alrm
)
275 spin_lock_irq(&sa1100_rtc_lock
);
276 ret
= rtc_update_alarm(&alrm
->time
);
278 memcpy(&rtc_alarm
, &alrm
->time
, sizeof(struct rtc_time
));
281 enable_irq_wake(IRQ_RTCAlrm
);
283 disable_irq_wake(IRQ_RTCAlrm
);
285 spin_unlock_irq(&sa1100_rtc_lock
);
290 static int sa1100_rtc_proc(struct device
*dev
, struct seq_file
*seq
)
292 seq_printf(seq
, "trim/divider\t: 0x%08lx\n", RTTR
);
293 seq_printf(seq
, "alarm_IRQ\t: %s\n",
294 (RTSR
& RTSR_ALE
) ? "yes" : "no" );
295 seq_printf(seq
, "update_IRQ\t: %s\n",
296 (RTSR
& RTSR_HZE
) ? "yes" : "no");
297 seq_printf(seq
, "periodic_IRQ\t: %s\n",
298 (OIER
& OIER_E1
) ? "yes" : "no");
299 seq_printf(seq
, "periodic_freq\t: %ld\n", rtc_freq
);
304 static const struct rtc_class_ops sa1100_rtc_ops
= {
305 .open
= sa1100_rtc_open
,
306 .read_callback
= sa1100_rtc_read_callback
,
307 .release
= sa1100_rtc_release
,
308 .ioctl
= sa1100_rtc_ioctl
,
309 .read_time
= sa1100_rtc_read_time
,
310 .set_time
= sa1100_rtc_set_time
,
311 .read_alarm
= sa1100_rtc_read_alarm
,
312 .set_alarm
= sa1100_rtc_set_alarm
,
313 .proc
= sa1100_rtc_proc
,
316 static int sa1100_rtc_probe(struct platform_device
*pdev
)
318 struct rtc_device
*rtc
;
321 * According to the manual we should be able to let RTTR be zero
322 * and then a default diviser for a 32.768KHz clock is used.
323 * Apparently this doesn't work, at least for my SA1110 rev 5.
324 * If the clock divider is uninitialized then reset it to the
325 * default value to get the 1Hz clock.
328 RTTR
= RTC_DEF_DIVIDER
+ (RTC_DEF_TRIM
<< 16);
329 dev_warn(&pdev
->dev
, "warning: initializing default clock divider/trim value\n");
330 /* The current RTC value probably doesn't make sense either */
334 rtc
= rtc_device_register(pdev
->name
, &pdev
->dev
, &sa1100_rtc_ops
,
340 platform_set_drvdata(pdev
, rtc
);
345 static int sa1100_rtc_remove(struct platform_device
*pdev
)
347 struct rtc_device
*rtc
= platform_get_drvdata(pdev
);
350 rtc_device_unregister(rtc
);
355 static struct platform_driver sa1100_rtc_driver
= {
356 .probe
= sa1100_rtc_probe
,
357 .remove
= sa1100_rtc_remove
,
359 .name
= "sa1100-rtc",
363 static int __init
sa1100_rtc_init(void)
365 return platform_driver_register(&sa1100_rtc_driver
);
368 static void __exit
sa1100_rtc_exit(void)
370 platform_driver_unregister(&sa1100_rtc_driver
);
373 module_init(sa1100_rtc_init
);
374 module_exit(sa1100_rtc_exit
);
376 MODULE_AUTHOR("Richard Purdie <rpurdie@rpsys.net>");
377 MODULE_DESCRIPTION("SA11x0/PXA2xx Realtime Clock Driver (RTC)");
378 MODULE_LICENSE("GPL");