2 * processor_idle - idle state submodule to the ACPI processor driver
4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6 * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
7 * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
8 * - Added processor hotplug support
9 * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
10 * - Added support for C3 on SMP
12 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or (at
17 * your option) any later version.
19 * This program is distributed in the hope that it will be useful, but
20 * WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22 * General Public License for more details.
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
28 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
31 #include <linux/kernel.h>
32 #include <linux/module.h>
33 #include <linux/init.h>
34 #include <linux/cpufreq.h>
35 #include <linux/proc_fs.h>
36 #include <linux/seq_file.h>
37 #include <linux/acpi.h>
38 #include <linux/dmi.h>
39 #include <linux/moduleparam.h>
40 #include <linux/sched.h> /* need_resched() */
41 #include <linux/latency.h>
42 #include <linux/clockchips.h>
45 * Include the apic definitions for x86 to have the APIC timer related defines
46 * available also for UP (on SMP it gets magically included via linux/smp.h).
47 * asm/acpi.h is not an option, as it would require more include magic. Also
48 * creating an empty asm-ia64/apic.h would just trade pest vs. cholera.
55 #include <asm/uaccess.h>
57 #include <acpi/acpi_bus.h>
58 #include <acpi/processor.h>
60 #define ACPI_PROCESSOR_COMPONENT 0x01000000
61 #define ACPI_PROCESSOR_CLASS "processor"
62 #define _COMPONENT ACPI_PROCESSOR_COMPONENT
63 ACPI_MODULE_NAME("processor_idle");
64 #define ACPI_PROCESSOR_FILE_POWER "power"
65 #define US_TO_PM_TIMER_TICKS(t) ((t * (PM_TIMER_FREQUENCY/1000)) / 1000)
66 #define PM_TIMER_TICK_NS (1000000000ULL/PM_TIMER_FREQUENCY)
67 #define C2_OVERHEAD 4 /* 1us (3.579 ticks per us) */
68 #define C3_OVERHEAD 4 /* 1us (3.579 ticks per us) */
69 static void (*pm_idle_save
) (void) __read_mostly
;
70 module_param(max_cstate
, uint
, 0644);
72 static unsigned int nocst __read_mostly
;
73 module_param(nocst
, uint
, 0000);
76 * bm_history -- bit-mask with a bit per jiffy of bus-master activity
77 * 1000 HZ: 0xFFFFFFFF: 32 jiffies = 32ms
78 * 800 HZ: 0xFFFFFFFF: 32 jiffies = 40ms
79 * 100 HZ: 0x0000000F: 4 jiffies = 40ms
80 * reduce history for more aggressive entry into C3
82 static unsigned int bm_history __read_mostly
=
83 (HZ
>= 800 ? 0xFFFFFFFF : ((1U << (HZ
/ 25)) - 1));
84 module_param(bm_history
, uint
, 0644);
85 /* --------------------------------------------------------------------------
87 -------------------------------------------------------------------------- */
90 * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
91 * For now disable this. Probably a bug somewhere else.
93 * To skip this limit, boot/load with a large max_cstate limit.
95 static int set_max_cstate(const struct dmi_system_id
*id
)
97 if (max_cstate
> ACPI_PROCESSOR_MAX_POWER
)
100 printk(KERN_NOTICE PREFIX
"%s detected - limiting to C%ld max_cstate."
101 " Override with \"processor.max_cstate=%d\"\n", id
->ident
,
102 (long)id
->driver_data
, ACPI_PROCESSOR_MAX_POWER
+ 1);
104 max_cstate
= (long)id
->driver_data
;
109 /* Actually this shouldn't be __cpuinitdata, would be better to fix the
110 callers to only run once -AK */
111 static struct dmi_system_id __cpuinitdata processor_power_dmi_table
[] = {
112 { set_max_cstate
, "IBM ThinkPad R40e", {
113 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
114 DMI_MATCH(DMI_BIOS_VERSION
,"1SET70WW")}, (void *)1},
115 { set_max_cstate
, "IBM ThinkPad R40e", {
116 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
117 DMI_MATCH(DMI_BIOS_VERSION
,"1SET60WW")}, (void *)1},
118 { set_max_cstate
, "IBM ThinkPad R40e", {
119 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
120 DMI_MATCH(DMI_BIOS_VERSION
,"1SET43WW") }, (void*)1},
121 { set_max_cstate
, "IBM ThinkPad R40e", {
122 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
123 DMI_MATCH(DMI_BIOS_VERSION
,"1SET45WW") }, (void*)1},
124 { set_max_cstate
, "IBM ThinkPad R40e", {
125 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
126 DMI_MATCH(DMI_BIOS_VERSION
,"1SET47WW") }, (void*)1},
127 { set_max_cstate
, "IBM ThinkPad R40e", {
128 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
129 DMI_MATCH(DMI_BIOS_VERSION
,"1SET50WW") }, (void*)1},
130 { set_max_cstate
, "IBM ThinkPad R40e", {
131 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
132 DMI_MATCH(DMI_BIOS_VERSION
,"1SET52WW") }, (void*)1},
133 { set_max_cstate
, "IBM ThinkPad R40e", {
134 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
135 DMI_MATCH(DMI_BIOS_VERSION
,"1SET55WW") }, (void*)1},
136 { set_max_cstate
, "IBM ThinkPad R40e", {
137 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
138 DMI_MATCH(DMI_BIOS_VERSION
,"1SET56WW") }, (void*)1},
139 { set_max_cstate
, "IBM ThinkPad R40e", {
140 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
141 DMI_MATCH(DMI_BIOS_VERSION
,"1SET59WW") }, (void*)1},
142 { set_max_cstate
, "IBM ThinkPad R40e", {
143 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
144 DMI_MATCH(DMI_BIOS_VERSION
,"1SET60WW") }, (void*)1},
145 { set_max_cstate
, "IBM ThinkPad R40e", {
146 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
147 DMI_MATCH(DMI_BIOS_VERSION
,"1SET61WW") }, (void*)1},
148 { set_max_cstate
, "IBM ThinkPad R40e", {
149 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
150 DMI_MATCH(DMI_BIOS_VERSION
,"1SET62WW") }, (void*)1},
151 { set_max_cstate
, "IBM ThinkPad R40e", {
152 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
153 DMI_MATCH(DMI_BIOS_VERSION
,"1SET64WW") }, (void*)1},
154 { set_max_cstate
, "IBM ThinkPad R40e", {
155 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
156 DMI_MATCH(DMI_BIOS_VERSION
,"1SET65WW") }, (void*)1},
157 { set_max_cstate
, "IBM ThinkPad R40e", {
158 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
159 DMI_MATCH(DMI_BIOS_VERSION
,"1SET68WW") }, (void*)1},
160 { set_max_cstate
, "Medion 41700", {
161 DMI_MATCH(DMI_BIOS_VENDOR
,"Phoenix Technologies LTD"),
162 DMI_MATCH(DMI_BIOS_VERSION
,"R01-A1J")}, (void *)1},
163 { set_max_cstate
, "Clevo 5600D", {
164 DMI_MATCH(DMI_BIOS_VENDOR
,"Phoenix Technologies LTD"),
165 DMI_MATCH(DMI_BIOS_VERSION
,"SHE845M0.86C.0013.D.0302131307")},
170 static inline u32
ticks_elapsed(u32 t1
, u32 t2
)
174 else if (!(acpi_gbl_FADT
.flags
& ACPI_FADT_32BIT_TIMER
))
175 return (((0x00FFFFFF - t1
) + t2
) & 0x00FFFFFF);
177 return ((0xFFFFFFFF - t1
) + t2
);
181 acpi_processor_power_activate(struct acpi_processor
*pr
,
182 struct acpi_processor_cx
*new)
184 struct acpi_processor_cx
*old
;
189 old
= pr
->power
.state
;
192 old
->promotion
.count
= 0;
193 new->demotion
.count
= 0;
195 /* Cleanup from old state. */
199 /* Disable bus master reload */
200 if (new->type
!= ACPI_STATE_C3
&& pr
->flags
.bm_check
)
201 acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD
, 0);
206 /* Prepare to use new state. */
209 /* Enable bus master reload */
210 if (old
->type
!= ACPI_STATE_C3
&& pr
->flags
.bm_check
)
211 acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD
, 1);
215 pr
->power
.state
= new;
220 static void acpi_safe_halt(void)
222 current_thread_info()->status
&= ~TS_POLLING
;
224 * TS_POLLING-cleared state must be visible before we
230 current_thread_info()->status
|= TS_POLLING
;
233 static atomic_t c3_cpu_count
;
235 /* Common C-state entry for C2, C3, .. */
236 static void acpi_cstate_enter(struct acpi_processor_cx
*cstate
)
238 if (cstate
->space_id
== ACPI_CSTATE_FFH
) {
239 /* Call into architectural FFH based C-state */
240 acpi_processor_ffh_cstate_enter(cstate
);
243 /* IO port based C-state */
244 inb(cstate
->address
);
245 /* Dummy wait op - must do something useless after P_LVL2 read
246 because chipsets cannot guarantee that STPCLK# signal
247 gets asserted in time to freeze execution properly. */
248 unused
= inl(acpi_gbl_FADT
.xpm_timer_block
.address
);
252 #ifdef ARCH_APICTIMER_STOPS_ON_C3
255 * Some BIOS implementations switch to C3 in the published C2 state.
256 * This seems to be a common problem on AMD boxen, but other vendors
257 * are affected too. We pick the most conservative approach: we assume
258 * that the local APIC stops in both C2 and C3.
260 static void acpi_timer_check_state(int state
, struct acpi_processor
*pr
,
261 struct acpi_processor_cx
*cx
)
263 struct acpi_processor_power
*pwr
= &pr
->power
;
264 u8 type
= local_apic_timer_c2_ok
? ACPI_STATE_C3
: ACPI_STATE_C2
;
267 * Check, if one of the previous states already marked the lapic
270 if (pwr
->timer_broadcast_on_state
< state
)
273 if (cx
->type
>= type
)
274 pr
->power
.timer_broadcast_on_state
= state
;
277 static void acpi_propagate_timer_broadcast(struct acpi_processor
*pr
)
279 unsigned long reason
;
281 reason
= pr
->power
.timer_broadcast_on_state
< INT_MAX
?
282 CLOCK_EVT_NOTIFY_BROADCAST_ON
: CLOCK_EVT_NOTIFY_BROADCAST_OFF
;
284 clockevents_notify(reason
, &pr
->id
);
287 /* Power(C) State timer broadcast control */
288 static void acpi_state_timer_broadcast(struct acpi_processor
*pr
,
289 struct acpi_processor_cx
*cx
,
292 int state
= cx
- pr
->power
.states
;
294 if (state
>= pr
->power
.timer_broadcast_on_state
) {
295 unsigned long reason
;
297 reason
= broadcast
? CLOCK_EVT_NOTIFY_BROADCAST_ENTER
:
298 CLOCK_EVT_NOTIFY_BROADCAST_EXIT
;
299 clockevents_notify(reason
, &pr
->id
);
305 static void acpi_timer_check_state(int state
, struct acpi_processor
*pr
,
306 struct acpi_processor_cx
*cstate
) { }
307 static void acpi_propagate_timer_broadcast(struct acpi_processor
*pr
) { }
308 static void acpi_state_timer_broadcast(struct acpi_processor
*pr
,
309 struct acpi_processor_cx
*cx
,
317 * Suspend / resume control
319 static int acpi_idle_suspend
;
321 int acpi_processor_suspend(struct acpi_device
* device
, pm_message_t state
)
323 acpi_idle_suspend
= 1;
327 int acpi_processor_resume(struct acpi_device
* device
)
329 acpi_idle_suspend
= 0;
333 static void acpi_processor_idle(void)
335 struct acpi_processor
*pr
= NULL
;
336 struct acpi_processor_cx
*cx
= NULL
;
337 struct acpi_processor_cx
*next_state
= NULL
;
342 * Interrupts must be disabled during bus mastering calculations and
343 * for C2/C3 transitions.
347 pr
= processors
[smp_processor_id()];
354 * Check whether we truly need to go idle, or should
357 if (unlikely(need_resched())) {
362 cx
= pr
->power
.state
;
363 if (!cx
|| acpi_idle_suspend
) {
374 * Check for bus mastering activity (if required), record, and check
377 if (pr
->flags
.bm_check
) {
379 unsigned long diff
= jiffies
- pr
->power
.bm_check_timestamp
;
384 pr
->power
.bm_activity
<<= diff
;
386 acpi_get_register(ACPI_BITREG_BUS_MASTER_STATUS
, &bm_status
);
388 pr
->power
.bm_activity
|= 0x1;
389 acpi_set_register(ACPI_BITREG_BUS_MASTER_STATUS
, 1);
392 * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
393 * the true state of bus mastering activity; forcing us to
394 * manually check the BMIDEA bit of each IDE channel.
396 else if (errata
.piix4
.bmisx
) {
397 if ((inb_p(errata
.piix4
.bmisx
+ 0x02) & 0x01)
398 || (inb_p(errata
.piix4
.bmisx
+ 0x0A) & 0x01))
399 pr
->power
.bm_activity
|= 0x1;
402 pr
->power
.bm_check_timestamp
= jiffies
;
405 * If bus mastering is or was active this jiffy, demote
406 * to avoid a faulty transition. Note that the processor
407 * won't enter a low-power state during this call (to this
408 * function) but should upon the next.
410 * TBD: A better policy might be to fallback to the demotion
411 * state (use it for this quantum only) istead of
412 * demoting -- and rely on duration as our sole demotion
413 * qualification. This may, however, introduce DMA
414 * issues (e.g. floppy DMA transfer overrun/underrun).
416 if ((pr
->power
.bm_activity
& 0x1) &&
417 cx
->demotion
.threshold
.bm
) {
419 next_state
= cx
->demotion
.state
;
424 #ifdef CONFIG_HOTPLUG_CPU
426 * Check for P_LVL2_UP flag before entering C2 and above on
427 * an SMP system. We do it here instead of doing it at _CST/P_LVL
428 * detection phase, to work cleanly with logical CPU hotplug.
430 if ((cx
->type
!= ACPI_STATE_C1
) && (num_online_cpus() > 1) &&
431 !pr
->flags
.has_cst
&& !(acpi_gbl_FADT
.flags
& ACPI_FADT_C2_MP_SUPPORTED
))
432 cx
= &pr
->power
.states
[ACPI_STATE_C1
];
438 * Invoke the current Cx state to put the processor to sleep.
440 if (cx
->type
== ACPI_STATE_C2
|| cx
->type
== ACPI_STATE_C3
) {
441 current_thread_info()->status
&= ~TS_POLLING
;
443 * TS_POLLING-cleared state must be visible before we
447 if (need_resched()) {
448 current_thread_info()->status
|= TS_POLLING
;
459 * Use the appropriate idle routine, the one that would
460 * be used without acpi C-states.
468 * TBD: Can't get time duration while in C1, as resumes
469 * go to an ISR rather than here. Need to instrument
470 * base interrupt handler.
472 * Note: the TSC better not stop in C1, sched_clock() will
475 sleep_ticks
= 0xFFFFFFFF;
479 /* Get start time (ticks) */
480 t1
= inl(acpi_gbl_FADT
.xpm_timer_block
.address
);
481 /* Tell the scheduler that we are going deep-idle: */
482 sched_clock_idle_sleep_event();
484 acpi_state_timer_broadcast(pr
, cx
, 1);
485 acpi_cstate_enter(cx
);
486 /* Get end time (ticks) */
487 t2
= inl(acpi_gbl_FADT
.xpm_timer_block
.address
);
489 #if defined (CONFIG_GENERIC_TIME) && defined (CONFIG_X86_TSC)
490 /* TSC halts in C2, so notify users */
491 mark_tsc_unstable("possible TSC halt in C2");
493 /* Compute time (ticks) that we were actually asleep */
494 sleep_ticks
= ticks_elapsed(t1
, t2
);
496 /* Tell the scheduler how much we idled: */
497 sched_clock_idle_wakeup_event(sleep_ticks
*PM_TIMER_TICK_NS
);
499 /* Re-enable interrupts */
501 /* Do not account our idle-switching overhead: */
502 sleep_ticks
-= cx
->latency_ticks
+ C2_OVERHEAD
;
504 current_thread_info()->status
|= TS_POLLING
;
505 acpi_state_timer_broadcast(pr
, cx
, 0);
511 * bm_check implies we need ARB_DIS
512 * !bm_check implies we need cache flush
513 * bm_control implies whether we can do ARB_DIS
515 * That leaves a case where bm_check is set and bm_control is
516 * not set. In that case we cannot do much, we enter C3
517 * without doing anything.
519 if (pr
->flags
.bm_check
&& pr
->flags
.bm_control
) {
520 if (atomic_inc_return(&c3_cpu_count
) ==
523 * All CPUs are trying to go to C3
524 * Disable bus master arbitration
526 acpi_set_register(ACPI_BITREG_ARB_DISABLE
, 1);
528 } else if (!pr
->flags
.bm_check
) {
529 /* SMP with no shared cache... Invalidate cache */
530 ACPI_FLUSH_CPU_CACHE();
533 /* Get start time (ticks) */
534 t1
= inl(acpi_gbl_FADT
.xpm_timer_block
.address
);
536 acpi_state_timer_broadcast(pr
, cx
, 1);
537 /* Tell the scheduler that we are going deep-idle: */
538 sched_clock_idle_sleep_event();
539 acpi_cstate_enter(cx
);
540 /* Get end time (ticks) */
541 t2
= inl(acpi_gbl_FADT
.xpm_timer_block
.address
);
542 if (pr
->flags
.bm_check
&& pr
->flags
.bm_control
) {
543 /* Enable bus master arbitration */
544 atomic_dec(&c3_cpu_count
);
545 acpi_set_register(ACPI_BITREG_ARB_DISABLE
, 0);
548 #if defined (CONFIG_GENERIC_TIME) && defined (CONFIG_X86_TSC)
549 /* TSC halts in C3, so notify users */
550 mark_tsc_unstable("TSC halts in C3");
552 /* Compute time (ticks) that we were actually asleep */
553 sleep_ticks
= ticks_elapsed(t1
, t2
);
554 /* Tell the scheduler how much we idled: */
555 sched_clock_idle_wakeup_event(sleep_ticks
*PM_TIMER_TICK_NS
);
557 /* Re-enable interrupts */
559 /* Do not account our idle-switching overhead: */
560 sleep_ticks
-= cx
->latency_ticks
+ C3_OVERHEAD
;
562 current_thread_info()->status
|= TS_POLLING
;
563 acpi_state_timer_broadcast(pr
, cx
, 0);
571 if ((cx
->type
!= ACPI_STATE_C1
) && (sleep_ticks
> 0))
572 cx
->time
+= sleep_ticks
;
574 next_state
= pr
->power
.state
;
576 #ifdef CONFIG_HOTPLUG_CPU
577 /* Don't do promotion/demotion */
578 if ((cx
->type
== ACPI_STATE_C1
) && (num_online_cpus() > 1) &&
579 !pr
->flags
.has_cst
&& !(acpi_gbl_FADT
.flags
& ACPI_FADT_C2_MP_SUPPORTED
)) {
588 * Track the number of longs (time asleep is greater than threshold)
589 * and promote when the count threshold is reached. Note that bus
590 * mastering activity may prevent promotions.
591 * Do not promote above max_cstate.
593 if (cx
->promotion
.state
&&
594 ((cx
->promotion
.state
- pr
->power
.states
) <= max_cstate
)) {
595 if (sleep_ticks
> cx
->promotion
.threshold
.ticks
&&
596 cx
->promotion
.state
->latency
<= system_latency_constraint()) {
597 cx
->promotion
.count
++;
598 cx
->demotion
.count
= 0;
599 if (cx
->promotion
.count
>=
600 cx
->promotion
.threshold
.count
) {
601 if (pr
->flags
.bm_check
) {
603 (pr
->power
.bm_activity
& cx
->
604 promotion
.threshold
.bm
)) {
610 next_state
= cx
->promotion
.state
;
620 * Track the number of shorts (time asleep is less than time threshold)
621 * and demote when the usage threshold is reached.
623 if (cx
->demotion
.state
) {
624 if (sleep_ticks
< cx
->demotion
.threshold
.ticks
) {
625 cx
->demotion
.count
++;
626 cx
->promotion
.count
= 0;
627 if (cx
->demotion
.count
>= cx
->demotion
.threshold
.count
) {
628 next_state
= cx
->demotion
.state
;
636 * Demote if current state exceeds max_cstate
637 * or if the latency of the current state is unacceptable
639 if ((pr
->power
.state
- pr
->power
.states
) > max_cstate
||
640 pr
->power
.state
->latency
> system_latency_constraint()) {
641 if (cx
->demotion
.state
)
642 next_state
= cx
->demotion
.state
;
648 * If we're going to start using a new Cx state we must clean up
649 * from the previous and prepare to use the new.
651 if (next_state
!= pr
->power
.state
)
652 acpi_processor_power_activate(pr
, next_state
);
655 static int acpi_processor_set_power_policy(struct acpi_processor
*pr
)
658 unsigned int state_is_set
= 0;
659 struct acpi_processor_cx
*lower
= NULL
;
660 struct acpi_processor_cx
*higher
= NULL
;
661 struct acpi_processor_cx
*cx
;
668 * This function sets the default Cx state policy (OS idle handler).
669 * Our scheme is to promote quickly to C2 but more conservatively
670 * to C3. We're favoring C2 for its characteristics of low latency
671 * (quick response), good power savings, and ability to allow bus
672 * mastering activity. Note that the Cx state policy is completely
673 * customizable and can be altered dynamically.
677 for (i
= 1; i
< ACPI_PROCESSOR_MAX_POWER
; i
++) {
678 cx
= &pr
->power
.states
[i
];
683 pr
->power
.state
= cx
;
692 for (i
= 1; i
< ACPI_PROCESSOR_MAX_POWER
; i
++) {
693 cx
= &pr
->power
.states
[i
];
698 cx
->demotion
.state
= lower
;
699 cx
->demotion
.threshold
.ticks
= cx
->latency_ticks
;
700 cx
->demotion
.threshold
.count
= 1;
701 if (cx
->type
== ACPI_STATE_C3
)
702 cx
->demotion
.threshold
.bm
= bm_history
;
709 for (i
= (ACPI_PROCESSOR_MAX_POWER
- 1); i
> 0; i
--) {
710 cx
= &pr
->power
.states
[i
];
715 cx
->promotion
.state
= higher
;
716 cx
->promotion
.threshold
.ticks
= cx
->latency_ticks
;
717 if (cx
->type
>= ACPI_STATE_C2
)
718 cx
->promotion
.threshold
.count
= 4;
720 cx
->promotion
.threshold
.count
= 10;
721 if (higher
->type
== ACPI_STATE_C3
)
722 cx
->promotion
.threshold
.bm
= bm_history
;
731 static int acpi_processor_get_power_info_fadt(struct acpi_processor
*pr
)
740 /* if info is obtained from pblk/fadt, type equals state */
741 pr
->power
.states
[ACPI_STATE_C2
].type
= ACPI_STATE_C2
;
742 pr
->power
.states
[ACPI_STATE_C3
].type
= ACPI_STATE_C3
;
744 #ifndef CONFIG_HOTPLUG_CPU
746 * Check for P_LVL2_UP flag before entering C2 and above on
749 if ((num_online_cpus() > 1) &&
750 !(acpi_gbl_FADT
.flags
& ACPI_FADT_C2_MP_SUPPORTED
))
754 /* determine C2 and C3 address from pblk */
755 pr
->power
.states
[ACPI_STATE_C2
].address
= pr
->pblk
+ 4;
756 pr
->power
.states
[ACPI_STATE_C3
].address
= pr
->pblk
+ 5;
758 /* determine latencies from FADT */
759 pr
->power
.states
[ACPI_STATE_C2
].latency
= acpi_gbl_FADT
.C2latency
;
760 pr
->power
.states
[ACPI_STATE_C3
].latency
= acpi_gbl_FADT
.C3latency
;
762 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
763 "lvl2[0x%08x] lvl3[0x%08x]\n",
764 pr
->power
.states
[ACPI_STATE_C2
].address
,
765 pr
->power
.states
[ACPI_STATE_C3
].address
));
770 static int acpi_processor_get_power_info_default(struct acpi_processor
*pr
)
772 if (!pr
->power
.states
[ACPI_STATE_C1
].valid
) {
773 /* set the first C-State to C1 */
774 /* all processors need to support C1 */
775 pr
->power
.states
[ACPI_STATE_C1
].type
= ACPI_STATE_C1
;
776 pr
->power
.states
[ACPI_STATE_C1
].valid
= 1;
778 /* the C0 state only exists as a filler in our array */
779 pr
->power
.states
[ACPI_STATE_C0
].valid
= 1;
783 static int acpi_processor_get_power_info_cst(struct acpi_processor
*pr
)
785 acpi_status status
= 0;
789 struct acpi_buffer buffer
= { ACPI_ALLOCATE_BUFFER
, NULL
};
790 union acpi_object
*cst
;
798 status
= acpi_evaluate_object(pr
->handle
, "_CST", NULL
, &buffer
);
799 if (ACPI_FAILURE(status
)) {
800 ACPI_DEBUG_PRINT((ACPI_DB_INFO
, "No _CST, giving up\n"));
804 cst
= buffer
.pointer
;
806 /* There must be at least 2 elements */
807 if (!cst
|| (cst
->type
!= ACPI_TYPE_PACKAGE
) || cst
->package
.count
< 2) {
808 printk(KERN_ERR PREFIX
"not enough elements in _CST\n");
813 count
= cst
->package
.elements
[0].integer
.value
;
815 /* Validate number of power states. */
816 if (count
< 1 || count
!= cst
->package
.count
- 1) {
817 printk(KERN_ERR PREFIX
"count given by _CST is not valid\n");
822 /* Tell driver that at least _CST is supported. */
823 pr
->flags
.has_cst
= 1;
825 for (i
= 1; i
<= count
; i
++) {
826 union acpi_object
*element
;
827 union acpi_object
*obj
;
828 struct acpi_power_register
*reg
;
829 struct acpi_processor_cx cx
;
831 memset(&cx
, 0, sizeof(cx
));
833 element
= &(cst
->package
.elements
[i
]);
834 if (element
->type
!= ACPI_TYPE_PACKAGE
)
837 if (element
->package
.count
!= 4)
840 obj
= &(element
->package
.elements
[0]);
842 if (obj
->type
!= ACPI_TYPE_BUFFER
)
845 reg
= (struct acpi_power_register
*)obj
->buffer
.pointer
;
847 if (reg
->space_id
!= ACPI_ADR_SPACE_SYSTEM_IO
&&
848 (reg
->space_id
!= ACPI_ADR_SPACE_FIXED_HARDWARE
))
851 /* There should be an easy way to extract an integer... */
852 obj
= &(element
->package
.elements
[1]);
853 if (obj
->type
!= ACPI_TYPE_INTEGER
)
856 cx
.type
= obj
->integer
.value
;
858 * Some buggy BIOSes won't list C1 in _CST -
859 * Let acpi_processor_get_power_info_default() handle them later
861 if (i
== 1 && cx
.type
!= ACPI_STATE_C1
)
864 cx
.address
= reg
->address
;
865 cx
.index
= current_count
+ 1;
867 cx
.space_id
= ACPI_CSTATE_SYSTEMIO
;
868 if (reg
->space_id
== ACPI_ADR_SPACE_FIXED_HARDWARE
) {
869 if (acpi_processor_ffh_cstate_probe
870 (pr
->id
, &cx
, reg
) == 0) {
871 cx
.space_id
= ACPI_CSTATE_FFH
;
872 } else if (cx
.type
!= ACPI_STATE_C1
) {
874 * C1 is a special case where FIXED_HARDWARE
875 * can be handled in non-MWAIT way as well.
876 * In that case, save this _CST entry info.
877 * That is, we retain space_id of SYSTEM_IO for
879 * Otherwise, ignore this info and continue.
885 obj
= &(element
->package
.elements
[2]);
886 if (obj
->type
!= ACPI_TYPE_INTEGER
)
889 cx
.latency
= obj
->integer
.value
;
891 obj
= &(element
->package
.elements
[3]);
892 if (obj
->type
!= ACPI_TYPE_INTEGER
)
895 cx
.power
= obj
->integer
.value
;
898 memcpy(&(pr
->power
.states
[current_count
]), &cx
, sizeof(cx
));
901 * We support total ACPI_PROCESSOR_MAX_POWER - 1
902 * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1)
904 if (current_count
>= (ACPI_PROCESSOR_MAX_POWER
- 1)) {
906 "Limiting number of power states to max (%d)\n",
907 ACPI_PROCESSOR_MAX_POWER
);
909 "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
914 ACPI_DEBUG_PRINT((ACPI_DB_INFO
, "Found %d power states\n",
917 /* Validate number of power states discovered */
918 if (current_count
< 2)
922 kfree(buffer
.pointer
);
927 static void acpi_processor_power_verify_c2(struct acpi_processor_cx
*cx
)
934 * C2 latency must be less than or equal to 100
937 else if (cx
->latency
> ACPI_PROCESSOR_MAX_C2_LATENCY
) {
938 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
939 "latency too large [%d]\n", cx
->latency
));
944 * Otherwise we've met all of our C2 requirements.
945 * Normalize the C2 latency to expidite policy
948 cx
->latency_ticks
= US_TO_PM_TIMER_TICKS(cx
->latency
);
953 static void acpi_processor_power_verify_c3(struct acpi_processor
*pr
,
954 struct acpi_processor_cx
*cx
)
956 static int bm_check_flag
;
963 * C3 latency must be less than or equal to 1000
966 else if (cx
->latency
> ACPI_PROCESSOR_MAX_C3_LATENCY
) {
967 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
968 "latency too large [%d]\n", cx
->latency
));
973 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
974 * DMA transfers are used by any ISA device to avoid livelock.
975 * Note that we could disable Type-F DMA (as recommended by
976 * the erratum), but this is known to disrupt certain ISA
977 * devices thus we take the conservative approach.
979 else if (errata
.piix4
.fdma
) {
980 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
981 "C3 not supported on PIIX4 with Type-F DMA\n"));
985 /* All the logic here assumes flags.bm_check is same across all CPUs */
986 if (!bm_check_flag
) {
987 /* Determine whether bm_check is needed based on CPU */
988 acpi_processor_power_init_bm_check(&(pr
->flags
), pr
->id
);
989 bm_check_flag
= pr
->flags
.bm_check
;
991 pr
->flags
.bm_check
= bm_check_flag
;
994 if (pr
->flags
.bm_check
) {
995 if (!pr
->flags
.bm_control
) {
996 if (pr
->flags
.has_cst
!= 1) {
997 /* bus mastering control is necessary */
998 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
999 "C3 support requires BM control\n"));
1002 /* Here we enter C3 without bus mastering */
1003 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
1004 "C3 support without BM control\n"));
1009 * WBINVD should be set in fadt, for C3 state to be
1010 * supported on when bm_check is not required.
1012 if (!(acpi_gbl_FADT
.flags
& ACPI_FADT_WBINVD
)) {
1013 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
1014 "Cache invalidation should work properly"
1015 " for C3 to be enabled on SMP systems\n"));
1018 acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD
, 0);
1022 * Otherwise we've met all of our C3 requirements.
1023 * Normalize the C3 latency to expidite policy. Enable
1024 * checking of bus mastering status (bm_check) so we can
1025 * use this in our C3 policy
1028 cx
->latency_ticks
= US_TO_PM_TIMER_TICKS(cx
->latency
);
1033 static int acpi_processor_power_verify(struct acpi_processor
*pr
)
1036 unsigned int working
= 0;
1038 pr
->power
.timer_broadcast_on_state
= INT_MAX
;
1040 for (i
= 1; i
< ACPI_PROCESSOR_MAX_POWER
; i
++) {
1041 struct acpi_processor_cx
*cx
= &pr
->power
.states
[i
];
1049 acpi_processor_power_verify_c2(cx
);
1051 acpi_timer_check_state(i
, pr
, cx
);
1055 acpi_processor_power_verify_c3(pr
, cx
);
1057 acpi_timer_check_state(i
, pr
, cx
);
1065 acpi_propagate_timer_broadcast(pr
);
1070 static int acpi_processor_get_power_info(struct acpi_processor
*pr
)
1076 /* NOTE: the idle thread may not be running while calling
1079 /* Zero initialize all the C-states info. */
1080 memset(pr
->power
.states
, 0, sizeof(pr
->power
.states
));
1082 result
= acpi_processor_get_power_info_cst(pr
);
1083 if (result
== -ENODEV
)
1084 result
= acpi_processor_get_power_info_fadt(pr
);
1089 acpi_processor_get_power_info_default(pr
);
1091 pr
->power
.count
= acpi_processor_power_verify(pr
);
1094 * Set Default Policy
1095 * ------------------
1096 * Now that we know which states are supported, set the default
1097 * policy. Note that this policy can be changed dynamically
1098 * (e.g. encourage deeper sleeps to conserve battery life when
1101 result
= acpi_processor_set_power_policy(pr
);
1106 * if one state of type C2 or C3 is available, mark this
1107 * CPU as being "idle manageable"
1109 for (i
= 1; i
< ACPI_PROCESSOR_MAX_POWER
; i
++) {
1110 if (pr
->power
.states
[i
].valid
) {
1111 pr
->power
.count
= i
;
1112 if (pr
->power
.states
[i
].type
>= ACPI_STATE_C2
)
1113 pr
->flags
.power
= 1;
1120 int acpi_processor_cst_has_changed(struct acpi_processor
*pr
)
1132 if (!pr
->flags
.power_setup_done
)
1135 /* Fall back to the default idle loop */
1136 pm_idle
= pm_idle_save
;
1137 synchronize_sched(); /* Relies on interrupts forcing exit from idle. */
1139 pr
->flags
.power
= 0;
1140 result
= acpi_processor_get_power_info(pr
);
1141 if ((pr
->flags
.power
== 1) && (pr
->flags
.power_setup_done
))
1142 pm_idle
= acpi_processor_idle
;
1147 /* proc interface */
1149 static int acpi_processor_power_seq_show(struct seq_file
*seq
, void *offset
)
1151 struct acpi_processor
*pr
= seq
->private;
1158 seq_printf(seq
, "active state: C%zd\n"
1160 "bus master activity: %08x\n"
1161 "maximum allowed latency: %d usec\n",
1162 pr
->power
.state
? pr
->power
.state
- pr
->power
.states
: 0,
1163 max_cstate
, (unsigned)pr
->power
.bm_activity
,
1164 system_latency_constraint());
1166 seq_puts(seq
, "states:\n");
1168 for (i
= 1; i
<= pr
->power
.count
; i
++) {
1169 seq_printf(seq
, " %cC%d: ",
1170 (&pr
->power
.states
[i
] ==
1171 pr
->power
.state
? '*' : ' '), i
);
1173 if (!pr
->power
.states
[i
].valid
) {
1174 seq_puts(seq
, "<not supported>\n");
1178 switch (pr
->power
.states
[i
].type
) {
1180 seq_printf(seq
, "type[C1] ");
1183 seq_printf(seq
, "type[C2] ");
1186 seq_printf(seq
, "type[C3] ");
1189 seq_printf(seq
, "type[--] ");
1193 if (pr
->power
.states
[i
].promotion
.state
)
1194 seq_printf(seq
, "promotion[C%zd] ",
1195 (pr
->power
.states
[i
].promotion
.state
-
1198 seq_puts(seq
, "promotion[--] ");
1200 if (pr
->power
.states
[i
].demotion
.state
)
1201 seq_printf(seq
, "demotion[C%zd] ",
1202 (pr
->power
.states
[i
].demotion
.state
-
1205 seq_puts(seq
, "demotion[--] ");
1207 seq_printf(seq
, "latency[%03d] usage[%08d] duration[%020llu]\n",
1208 pr
->power
.states
[i
].latency
,
1209 pr
->power
.states
[i
].usage
,
1210 (unsigned long long)pr
->power
.states
[i
].time
);
1217 static int acpi_processor_power_open_fs(struct inode
*inode
, struct file
*file
)
1219 return single_open(file
, acpi_processor_power_seq_show
,
1223 static const struct file_operations acpi_processor_power_fops
= {
1224 .open
= acpi_processor_power_open_fs
,
1226 .llseek
= seq_lseek
,
1227 .release
= single_release
,
1231 static void smp_callback(void *v
)
1233 /* we already woke the CPU up, nothing more to do */
1237 * This function gets called when a part of the kernel has a new latency
1238 * requirement. This means we need to get all processors out of their C-state,
1239 * and then recalculate a new suitable C-state. Just do a cross-cpu IPI; that
1240 * wakes them all right up.
1242 static int acpi_processor_latency_notify(struct notifier_block
*b
,
1243 unsigned long l
, void *v
)
1245 smp_call_function(smp_callback
, NULL
, 0, 1);
1249 static struct notifier_block acpi_processor_latency_notifier
= {
1250 .notifier_call
= acpi_processor_latency_notify
,
1254 int __cpuinit
acpi_processor_power_init(struct acpi_processor
*pr
,
1255 struct acpi_device
*device
)
1257 acpi_status status
= 0;
1258 static int first_run
;
1259 struct proc_dir_entry
*entry
= NULL
;
1264 dmi_check_system(processor_power_dmi_table
);
1265 if (max_cstate
< ACPI_C_STATES_MAX
)
1267 "ACPI: processor limited to max C-state %d\n",
1271 register_latency_notifier(&acpi_processor_latency_notifier
);
1278 if (acpi_gbl_FADT
.cst_control
&& !nocst
) {
1280 acpi_os_write_port(acpi_gbl_FADT
.smi_command
, acpi_gbl_FADT
.cst_control
, 8);
1281 if (ACPI_FAILURE(status
)) {
1282 ACPI_EXCEPTION((AE_INFO
, status
,
1283 "Notifying BIOS of _CST ability failed"));
1287 acpi_processor_get_power_info(pr
);
1290 * Install the idle handler if processor power management is supported.
1291 * Note that we use previously set idle handler will be used on
1292 * platforms that only support C1.
1294 if ((pr
->flags
.power
) && (!boot_option_idle_override
)) {
1295 printk(KERN_INFO PREFIX
"CPU%d (power states:", pr
->id
);
1296 for (i
= 1; i
<= pr
->power
.count
; i
++)
1297 if (pr
->power
.states
[i
].valid
)
1298 printk(" C%d[C%d]", i
,
1299 pr
->power
.states
[i
].type
);
1303 pm_idle_save
= pm_idle
;
1304 pm_idle
= acpi_processor_idle
;
1309 entry
= create_proc_entry(ACPI_PROCESSOR_FILE_POWER
,
1310 S_IRUGO
, acpi_device_dir(device
));
1314 entry
->proc_fops
= &acpi_processor_power_fops
;
1315 entry
->data
= acpi_driver_data(device
);
1316 entry
->owner
= THIS_MODULE
;
1319 pr
->flags
.power_setup_done
= 1;
1324 int acpi_processor_power_exit(struct acpi_processor
*pr
,
1325 struct acpi_device
*device
)
1328 pr
->flags
.power_setup_done
= 0;
1330 if (acpi_device_dir(device
))
1331 remove_proc_entry(ACPI_PROCESSOR_FILE_POWER
,
1332 acpi_device_dir(device
));
1334 /* Unregister the idle handler when processor #0 is removed. */
1336 pm_idle
= pm_idle_save
;
1339 * We are about to unload the current idle thread pm callback
1340 * (pm_idle), Wait for all processors to update cached/local
1341 * copies of pm_idle before proceeding.
1345 unregister_latency_notifier(&acpi_processor_latency_notifier
);