include/asm-x86/pgtable_64.h

   1 #ifndef _X86_64_PGTABLE_H
   2 #define _X86_64_PGTABLE_H
   3
   4 #include <linux/const.h>
   5 #ifndef __ASSEMBLY__
   6
   7 /*
   8  * This file contains the functions and defines necessary to modify and use
   9  * the x86-64 page table tree.
  10  */
  11 #include <asm/processor.h>
  12 #include <linux/bitops.h>
  13 #include <linux/threads.h>
  14 #include <asm/pda.h>
  15
  16 extern pud_t level3_kernel_pgt[512];
  17 extern pud_t level3_ident_pgt[512];
  18 extern pmd_t level2_kernel_pgt[512];
  19 extern pgd_t init_level4_pgt[];
  20
  21 #define swapper_pg_dir init_level4_pgt
  22
  23 extern void paging_init(void);
  24
  25 #endif /* !__ASSEMBLY__ */
  26
  27 #define SHARED_KERNEL_PMD       1
  28
  29 /*
  30  * PGDIR_SHIFT determines what a top-level page table entry can map
  31  */
  32 #define PGDIR_SHIFT     39
  33 #define PTRS_PER_PGD    512
  34
  35 /*
  36  * 3rd level page
  37  */
  38 #define PUD_SHIFT       30
  39 #define PTRS_PER_PUD    512
  40
  41 /*
  42  * PMD_SHIFT determines the size of the area a middle-level
  43  * page table can map
  44  */
  45 #define PMD_SHIFT       21
  46 #define PTRS_PER_PMD    512
  47
  48 /*
  49  * entries per page directory level
  50  */
  51 #define PTRS_PER_PTE    512
  52
  53 #ifndef __ASSEMBLY__
  54
  55 #define pte_ERROR(e) \
  56         printk("%s:%d: bad pte %p(%016lx).\n", __FILE__, __LINE__, &(e), pte_val(e))
  57 #define pmd_ERROR(e) \
  58         printk("%s:%d: bad pmd %p(%016lx).\n", __FILE__, __LINE__, &(e), pmd_val(e))
  59 #define pud_ERROR(e) \
  60         printk("%s:%d: bad pud %p(%016lx).\n", __FILE__, __LINE__, &(e), pud_val(e))
  61 #define pgd_ERROR(e) \
  62         printk("%s:%d: bad pgd %p(%016lx).\n", __FILE__, __LINE__, &(e), pgd_val(e))
  63
  64 #define pgd_none(x)     (!pgd_val(x))
  65 #define pud_none(x)     (!pud_val(x))
  66
  67 struct mm_struct;
  68
  69 static inline void native_pte_clear(struct mm_struct *mm, unsigned long addr,
  70                                     pte_t *ptep)
  71 {
  72         *ptep = native_make_pte(0);
  73 }
  74
  75 static inline void native_set_pte(pte_t *ptep, pte_t pte)
  76 {
  77         *ptep = pte;
  78 }
  79
  80 static inline void native_set_pte_atomic(pte_t *ptep, pte_t pte)
  81 {
  82         native_set_pte(ptep, pte);
  83 }
  84
  85 static inline pte_t native_ptep_get_and_clear(pte_t *xp)
  86 {
  87 #ifdef CONFIG_SMP
  88         return native_make_pte(xchg(&xp->pte, 0));
  89 #else
  90         /* native_local_ptep_get_and_clear, but duplicated because of cyclic dependency */
  91         pte_t ret = *xp;
  92         native_pte_clear(NULL, 0, xp);
  93         return ret;
  94 #endif
  95 }
  96
  97 static inline void native_set_pmd(pmd_t *pmdp, pmd_t pmd)
  98 {
  99         *pmdp = pmd;
 100 }
 101
 102 static inline void native_pmd_clear(pmd_t *pmd)
 103 {
 104         native_set_pmd(pmd, native_make_pmd(0));
 105 }
 106
 107 static inline void native_set_pud(pud_t *pudp, pud_t pud)
 108 {
 109         *pudp = pud;
 110 }
 111
 112 static inline void native_pud_clear(pud_t *pud)
 113 {
 114         native_set_pud(pud, native_make_pud(0));
 115 }
 116
 117 static inline void native_set_pgd(pgd_t *pgdp, pgd_t pgd)
 118 {
 119         *pgdp = pgd;
 120 }
 121
 122 static inline void native_pgd_clear(pgd_t * pgd)
 123 {
 124         native_set_pgd(pgd, native_make_pgd(0));
 125 }
 126
 127 #define pte_same(a, b)          ((a).pte == (b).pte)
 128
 129 #endif /* !__ASSEMBLY__ */
 130
 131 #define PMD_SIZE        (_AC(1,UL) << PMD_SHIFT)
 132 #define PMD_MASK        (~(PMD_SIZE-1))
 133 #define PUD_SIZE        (_AC(1,UL) << PUD_SHIFT)
 134 #define PUD_MASK        (~(PUD_SIZE-1))
 135 #define PGDIR_SIZE      (_AC(1,UL) << PGDIR_SHIFT)
 136 #define PGDIR_MASK      (~(PGDIR_SIZE-1))
 137
 138
 139 #define MAXMEM           _AC(0x3fffffffffff, UL)
 140 #define VMALLOC_START    _AC(0xffffc20000000000, UL)
 141 #define VMALLOC_END      _AC(0xffffe1ffffffffff, UL)
 142 #define VMEMMAP_START    _AC(0xffffe20000000000, UL)
 143 #define MODULES_VADDR    _AC(0xffffffff88000000, UL)
 144 #define MODULES_END      _AC(0xfffffffffff00000, UL)
 145 #define MODULES_LEN   (MODULES_END - MODULES_VADDR)
 146
 147 #ifndef __ASSEMBLY__
 148
 149 static inline unsigned long pgd_bad(pgd_t pgd)
 150 {
 151         return pgd_val(pgd) & ~(PTE_MASK | _KERNPG_TABLE | _PAGE_USER);
 152 }
 153
 154 static inline unsigned long pud_bad(pud_t pud)
 155 {
 156         return pud_val(pud) & ~(PTE_MASK | _KERNPG_TABLE | _PAGE_USER);
 157 }
 158
 159 static inline unsigned long pmd_bad(pmd_t pmd)
 160 {
 161         return pmd_val(pmd) & ~(PTE_MASK | _KERNPG_TABLE | _PAGE_USER);
 162 }
 163
 164 #define pte_none(x)     (!pte_val(x))
 165 #define pte_present(x)  (pte_val(x) & (_PAGE_PRESENT | _PAGE_PROTNONE))
 166
 167 #define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT)) /* FIXME: is this right? */
 168 #define pte_page(x)     pfn_to_page(pte_pfn(x))
 169 #define pte_pfn(x)  ((pte_val(x) & __PHYSICAL_MASK) >> PAGE_SHIFT)
 170
 171 /*
 172  * Macro to mark a page protection value as "uncacheable".
 173  */
 174 #define pgprot_noncached(prot)  (__pgprot(pgprot_val(prot) | _PAGE_PCD | _PAGE_PWT))
 175
 176
 177 /*
 178  * Conversion functions: convert a page and protection to a page entry,
 179  * and a page entry and page directory to the page they refer to.
 180  */
 181
 182 /*
 183  * Level 4 access.
 184  */
 185 #define pgd_page_vaddr(pgd) ((unsigned long) __va((unsigned long)pgd_val(pgd) & PTE_MASK))
 186 #define pgd_page(pgd)           (pfn_to_page(pgd_val(pgd) >> PAGE_SHIFT))
 187 #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
 188 #define pgd_offset(mm, addr) ((mm)->pgd + pgd_index(addr))
 189 #define pgd_offset_k(address) (init_level4_pgt + pgd_index(address))
 190 #define pgd_present(pgd) (pgd_val(pgd) & _PAGE_PRESENT)
 191 #define mk_kernel_pgd(address) ((pgd_t){ (address) | _KERNPG_TABLE })
 192
 193 /* PUD - Level3 access */
 194 /* to find an entry in a page-table-directory. */
 195 #define pud_page_vaddr(pud) ((unsigned long) __va(pud_val(pud) & PHYSICAL_PAGE_MASK))
 196 #define pud_page(pud)           (pfn_to_page(pud_val(pud) >> PAGE_SHIFT))
 197 #define pud_index(address) (((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1))
 198 #define pud_offset(pgd, address) ((pud_t *) pgd_page_vaddr(*(pgd)) + pud_index(address))
 199 #define pud_present(pud) (pud_val(pud) & _PAGE_PRESENT)
 200
 201 static inline int pud_large(pud_t pte)
 202 {
 203         return (pud_val(pte) & (_PAGE_PSE|_PAGE_PRESENT)) ==
 204                 (_PAGE_PSE|_PAGE_PRESENT);
 205 }
 206
 207 /* PMD  - Level 2 access */
 208 #define pmd_page_vaddr(pmd) ((unsigned long) __va(pmd_val(pmd) & PTE_MASK))
 209 #define pmd_page(pmd)           (pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT))
 210
 211 #define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
 212 #define pmd_offset(dir, address) ((pmd_t *) pud_page_vaddr(*(dir)) + \
 213                         pmd_index(address))
 214 #define pmd_none(x)     (!pmd_val(x))
 215 #define pmd_present(x)  (pmd_val(x) & _PAGE_PRESENT)
 216 #define pfn_pmd(nr,prot) (__pmd(((nr) << PAGE_SHIFT) | pgprot_val(prot)))
 217 #define pmd_pfn(x)  ((pmd_val(x) & __PHYSICAL_MASK) >> PAGE_SHIFT)
 218
 219 #define pte_to_pgoff(pte) ((pte_val(pte) & PHYSICAL_PAGE_MASK) >> PAGE_SHIFT)
 220 #define pgoff_to_pte(off) ((pte_t) { .pte = ((off) << PAGE_SHIFT) | _PAGE_FILE })
 221 #define PTE_FILE_MAX_BITS __PHYSICAL_MASK_SHIFT
 222
 223 /* PTE - Level 1 access. */
 224
 225 /* page, protection -> pte */
 226 #define mk_pte(page, pgprot)    pfn_pte(page_to_pfn(page), (pgprot))
 227
 228 #define pte_index(address) \
 229                 (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
 230 #define pte_offset_kernel(dir, address) ((pte_t *) pmd_page_vaddr(*(dir)) + \
 231                         pte_index(address))
 232
 233 /* x86-64 always has all page tables mapped. */
 234 #define pte_offset_map(dir,address) pte_offset_kernel(dir,address)
 235 #define pte_offset_map_nested(dir,address) pte_offset_kernel(dir,address)
 236 #define pte_unmap(pte) /* NOP */
 237 #define pte_unmap_nested(pte) /* NOP */
 238
 239 #define update_mmu_cache(vma,address,pte) do { } while (0)
 240
 241 /* Encode and de-code a swap entry */
 242 #define __swp_type(x)                   (((x).val >> 1) & 0x3f)
 243 #define __swp_offset(x)                 ((x).val >> 8)
 244 #define __swp_entry(type, offset)       ((swp_entry_t) { ((type) << 1) | ((offset) << 8) })
 245 #define __pte_to_swp_entry(pte)         ((swp_entry_t) { pte_val(pte) })
 246 #define __swp_entry_to_pte(x)           ((pte_t) { .pte = (x).val })
 247
 248 extern int kern_addr_valid(unsigned long addr);
 249
 250 #define io_remap_pfn_range(vma, vaddr, pfn, size, prot)         \
 251                 remap_pfn_range(vma, vaddr, pfn, size, prot)
 252
 253 #define HAVE_ARCH_UNMAPPED_AREA
 254 #define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
 255
 256 #define pgtable_cache_init()   do { } while (0)
 257 #define check_pgt_cache()      do { } while (0)
 258
 259 #define PAGE_AGP    PAGE_KERNEL_NOCACHE
 260 #define HAVE_PAGE_AGP 1
 261
 262 /* fs/proc/kcore.c */
 263 #define kc_vaddr_to_offset(v) ((v) & __VIRTUAL_MASK)
 264 #define kc_offset_to_vaddr(o) \
 265    (((o) & (1UL << (__VIRTUAL_MASK_SHIFT-1))) ? ((o) | (~__VIRTUAL_MASK)) : (o))
 266
 267 #define __HAVE_ARCH_PTE_SAME
 268 #endif /* !__ASSEMBLY__ */
 269
 270 #endif /* _X86_64_PGTABLE_H */