3 * This is a driver for SMSC's 91C9x/91C1xx single-chip Ethernet devices.
5 * Copyright (C) 1996 by Erik Stahlman
6 * Copyright (C) 2001 Standard Microsystems Corporation
7 * Developed by Simple Network Magic Corporation
8 * Copyright (C) 2003 Monta Vista Software, Inc.
9 * Unified SMC91x driver by Nicolas Pitre
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
26 * io = for the base address
28 * nowait = 0 for normal wait states, 1 eliminates additional wait states
31 * Erik Stahlman <erik@vt.edu>
33 * hardware multicast code:
34 * Peter Cammaert <pc@denkart.be>
37 * Daris A Nevil <dnevil@snmc.com>
38 * Nicolas Pitre <nico@cam.org>
39 * Russell King <rmk@arm.linux.org.uk>
42 * 08/20/00 Arnaldo Melo fix kfree(skb) in smc_hardware_send_packet
43 * 12/15/00 Christian Jullien fix "Warning: kfree_skb on hard IRQ"
44 * 03/16/01 Daris A Nevil modified smc9194.c for use with LAN91C111
45 * 08/22/01 Scott Anderson merge changes from smc9194 to smc91111
46 * 08/21/01 Pramod B Bhardwaj added support for RevB of LAN91C111
47 * 12/20/01 Jeff Sutherland initial port to Xscale PXA with DMA support
48 * 04/07/03 Nicolas Pitre unified SMC91x driver, killed irq races,
49 * more bus abstraction, big cleanup, etc.
50 * 29/09/03 Russell King - add driver model support
52 * - convert to use generic MII interface
53 * - add link up/down notification
54 * - don't try to handle full negotiation in
56 * - clean up (and fix stack overrun) in PHY
57 * MII read/write functions
58 * 22/09/04 Nicolas Pitre big update (see commit log for details)
60 static const char version
[] =
61 "smc91x.c: v1.1, sep 22 2004 by Nicolas Pitre <nico@cam.org>\n";
69 #include <linux/init.h>
70 #include <linux/module.h>
71 #include <linux/kernel.h>
72 #include <linux/sched.h>
73 #include <linux/slab.h>
74 #include <linux/delay.h>
75 #include <linux/interrupt.h>
76 #include <linux/errno.h>
77 #include <linux/ioport.h>
78 #include <linux/crc32.h>
79 #include <linux/platform_device.h>
80 #include <linux/spinlock.h>
81 #include <linux/ethtool.h>
82 #include <linux/mii.h>
83 #include <linux/workqueue.h>
85 #include <linux/netdevice.h>
86 #include <linux/etherdevice.h>
87 #include <linux/skbuff.h>
95 * the LAN91C111 can be at any of the following port addresses. To change,
96 * for a slightly different card, you can add it to the array. Keep in
97 * mind that the array must end in zero.
99 static unsigned int smc_portlist
[] __initdata
= {
100 0x200, 0x220, 0x240, 0x260, 0x280, 0x2A0, 0x2C0, 0x2E0,
101 0x300, 0x320, 0x340, 0x360, 0x380, 0x3A0, 0x3C0, 0x3E0, 0
105 # define SMC_IOADDR -1
107 static unsigned long io
= SMC_IOADDR
;
108 module_param(io
, ulong
, 0400);
109 MODULE_PARM_DESC(io
, "I/O base address");
114 static int irq
= SMC_IRQ
;
115 module_param(irq
, int, 0400);
116 MODULE_PARM_DESC(irq
, "IRQ number");
118 #endif /* CONFIG_ISA */
121 # define SMC_NOWAIT 0
123 static int nowait
= SMC_NOWAIT
;
124 module_param(nowait
, int, 0400);
125 MODULE_PARM_DESC(nowait
, "set to 1 for no wait state");
128 * Transmit timeout, default 5 seconds.
130 static int watchdog
= 1000;
131 module_param(watchdog
, int, 0400);
132 MODULE_PARM_DESC(watchdog
, "transmit timeout in milliseconds");
134 MODULE_LICENSE("GPL");
137 * The internal workings of the driver. If you are changing anything
138 * here with the SMC stuff, you should have the datasheet and know
139 * what you are doing.
141 #define CARDNAME "smc91x"
144 * Use power-down feature of the chip
149 * Wait time for memory to be free. This probably shouldn't be
150 * tuned that much, as waiting for this means nothing else happens
153 #define MEMORY_WAIT_TIME 16
156 * The maximum number of processing loops allowed for each call to the
159 #define MAX_IRQ_LOOPS 8
162 * This selects whether TX packets are sent one by one to the SMC91x internal
163 * memory and throttled until transmission completes. This may prevent
164 * RX overruns a litle by keeping much of the memory free for RX packets
165 * but to the expense of reduced TX throughput and increased IRQ overhead.
166 * Note this is not a cure for a too slow data bus or too high IRQ latency.
168 #define THROTTLE_TX_PKTS 0
171 * The MII clock high/low times. 2x this number gives the MII clock period
172 * in microseconds. (was 50, but this gives 6.4ms for each MII transaction!)
177 #define DBG(n, args...) \
179 if (SMC_DEBUG >= (n)) \
183 #define PRINTK(args...) printk(args)
185 #define DBG(n, args...) do { } while(0)
186 #define PRINTK(args...) printk(KERN_DEBUG args)
190 static void PRINT_PKT(u_char
*buf
, int length
)
197 remainder
= length
% 16;
199 for (i
= 0; i
< lines
; i
++) {
201 for (cur
= 0; cur
< 8; cur
++) {
205 printk("%02x%02x ", a
, b
);
209 for (i
= 0; i
< remainder
/2 ; i
++) {
213 printk("%02x%02x ", a
, b
);
218 #define PRINT_PKT(x...) do { } while(0)
222 /* this enables an interrupt in the interrupt mask register */
223 #define SMC_ENABLE_INT(lp, x) do { \
224 unsigned char mask; \
225 spin_lock_irq(&lp->lock); \
226 mask = SMC_GET_INT_MASK(lp); \
228 SMC_SET_INT_MASK(lp, mask); \
229 spin_unlock_irq(&lp->lock); \
232 /* this disables an interrupt from the interrupt mask register */
233 #define SMC_DISABLE_INT(lp, x) do { \
234 unsigned char mask; \
235 spin_lock_irq(&lp->lock); \
236 mask = SMC_GET_INT_MASK(lp); \
238 SMC_SET_INT_MASK(lp, mask); \
239 spin_unlock_irq(&lp->lock); \
243 * Wait while MMU is busy. This is usually in the order of a few nanosecs
244 * if at all, but let's avoid deadlocking the system if the hardware
245 * decides to go south.
247 #define SMC_WAIT_MMU_BUSY(lp) do { \
248 if (unlikely(SMC_GET_MMU_CMD(lp) & MC_BUSY)) { \
249 unsigned long timeout = jiffies + 2; \
250 while (SMC_GET_MMU_CMD(lp) & MC_BUSY) { \
251 if (time_after(jiffies, timeout)) { \
252 printk("%s: timeout %s line %d\n", \
253 dev->name, __FILE__, __LINE__); \
263 * this does a soft reset on the device
265 static void smc_reset(struct net_device
*dev
)
267 struct smc_local
*lp
= netdev_priv(dev
);
268 void __iomem
*ioaddr
= lp
->base
;
269 unsigned int ctl
, cfg
;
270 struct sk_buff
*pending_skb
;
272 DBG(2, "%s: %s\n", dev
->name
, __FUNCTION__
);
274 /* Disable all interrupts, block TX tasklet */
275 spin_lock_irq(&lp
->lock
);
276 SMC_SELECT_BANK(lp
, 2);
277 SMC_SET_INT_MASK(lp
, 0);
278 pending_skb
= lp
->pending_tx_skb
;
279 lp
->pending_tx_skb
= NULL
;
280 spin_unlock_irq(&lp
->lock
);
282 /* free any pending tx skb */
284 dev_kfree_skb(pending_skb
);
285 dev
->stats
.tx_errors
++;
286 dev
->stats
.tx_aborted_errors
++;
290 * This resets the registers mostly to defaults, but doesn't
291 * affect EEPROM. That seems unnecessary
293 SMC_SELECT_BANK(lp
, 0);
294 SMC_SET_RCR(lp
, RCR_SOFTRST
);
297 * Setup the Configuration Register
298 * This is necessary because the CONFIG_REG is not affected
301 SMC_SELECT_BANK(lp
, 1);
303 cfg
= CONFIG_DEFAULT
;
306 * Setup for fast accesses if requested. If the card/system
307 * can't handle it then there will be no recovery except for
308 * a hard reset or power cycle
311 cfg
|= CONFIG_NO_WAIT
;
314 * Release from possible power-down state
315 * Configuration register is not affected by Soft Reset
317 cfg
|= CONFIG_EPH_POWER_EN
;
319 SMC_SET_CONFIG(lp
, cfg
);
321 /* this should pause enough for the chip to be happy */
323 * elaborate? What does the chip _need_? --jgarzik
325 * This seems to be undocumented, but something the original
326 * driver(s) have always done. Suspect undocumented timing
327 * info/determined empirically. --rmk
331 /* Disable transmit and receive functionality */
332 SMC_SELECT_BANK(lp
, 0);
333 SMC_SET_RCR(lp
, RCR_CLEAR
);
334 SMC_SET_TCR(lp
, TCR_CLEAR
);
336 SMC_SELECT_BANK(lp
, 1);
337 ctl
= SMC_GET_CTL(lp
) | CTL_LE_ENABLE
;
340 * Set the control register to automatically release successfully
341 * transmitted packets, to make the best use out of our limited
344 if(!THROTTLE_TX_PKTS
)
345 ctl
|= CTL_AUTO_RELEASE
;
347 ctl
&= ~CTL_AUTO_RELEASE
;
348 SMC_SET_CTL(lp
, ctl
);
351 SMC_SELECT_BANK(lp
, 2);
352 SMC_SET_MMU_CMD(lp
, MC_RESET
);
353 SMC_WAIT_MMU_BUSY(lp
);
357 * Enable Interrupts, Receive, and Transmit
359 static void smc_enable(struct net_device
*dev
)
361 struct smc_local
*lp
= netdev_priv(dev
);
362 void __iomem
*ioaddr
= lp
->base
;
365 DBG(2, "%s: %s\n", dev
->name
, __FUNCTION__
);
367 /* see the header file for options in TCR/RCR DEFAULT */
368 SMC_SELECT_BANK(lp
, 0);
369 SMC_SET_TCR(lp
, lp
->tcr_cur_mode
);
370 SMC_SET_RCR(lp
, lp
->rcr_cur_mode
);
372 SMC_SELECT_BANK(lp
, 1);
373 SMC_SET_MAC_ADDR(lp
, dev
->dev_addr
);
375 /* now, enable interrupts */
376 mask
= IM_EPH_INT
|IM_RX_OVRN_INT
|IM_RCV_INT
;
377 if (lp
->version
>= (CHIP_91100
<< 4))
379 SMC_SELECT_BANK(lp
, 2);
380 SMC_SET_INT_MASK(lp
, mask
);
383 * From this point the register bank must _NOT_ be switched away
384 * to something else than bank 2 without proper locking against
385 * races with any tasklet or interrupt handlers until smc_shutdown()
386 * or smc_reset() is called.
391 * this puts the device in an inactive state
393 static void smc_shutdown(struct net_device
*dev
)
395 struct smc_local
*lp
= netdev_priv(dev
);
396 void __iomem
*ioaddr
= lp
->base
;
397 struct sk_buff
*pending_skb
;
399 DBG(2, "%s: %s\n", CARDNAME
, __FUNCTION__
);
401 /* no more interrupts for me */
402 spin_lock_irq(&lp
->lock
);
403 SMC_SELECT_BANK(lp
, 2);
404 SMC_SET_INT_MASK(lp
, 0);
405 pending_skb
= lp
->pending_tx_skb
;
406 lp
->pending_tx_skb
= NULL
;
407 spin_unlock_irq(&lp
->lock
);
409 dev_kfree_skb(pending_skb
);
411 /* and tell the card to stay away from that nasty outside world */
412 SMC_SELECT_BANK(lp
, 0);
413 SMC_SET_RCR(lp
, RCR_CLEAR
);
414 SMC_SET_TCR(lp
, TCR_CLEAR
);
417 /* finally, shut the chip down */
418 SMC_SELECT_BANK(lp
, 1);
419 SMC_SET_CONFIG(lp
, SMC_GET_CONFIG(lp
) & ~CONFIG_EPH_POWER_EN
);
424 * This is the procedure to handle the receipt of a packet.
426 static inline void smc_rcv(struct net_device
*dev
)
428 struct smc_local
*lp
= netdev_priv(dev
);
429 void __iomem
*ioaddr
= lp
->base
;
430 unsigned int packet_number
, status
, packet_len
;
432 DBG(3, "%s: %s\n", dev
->name
, __FUNCTION__
);
434 packet_number
= SMC_GET_RXFIFO(lp
);
435 if (unlikely(packet_number
& RXFIFO_REMPTY
)) {
436 PRINTK("%s: smc_rcv with nothing on FIFO.\n", dev
->name
);
440 /* read from start of packet */
441 SMC_SET_PTR(lp
, PTR_READ
| PTR_RCV
| PTR_AUTOINC
);
443 /* First two words are status and packet length */
444 SMC_GET_PKT_HDR(lp
, status
, packet_len
);
445 packet_len
&= 0x07ff; /* mask off top bits */
446 DBG(2, "%s: RX PNR 0x%x STATUS 0x%04x LENGTH 0x%04x (%d)\n",
447 dev
->name
, packet_number
, status
,
448 packet_len
, packet_len
);
451 if (unlikely(packet_len
< 6 || status
& RS_ERRORS
)) {
452 if (status
& RS_TOOLONG
&& packet_len
<= (1514 + 4 + 6)) {
453 /* accept VLAN packets */
454 status
&= ~RS_TOOLONG
;
457 if (packet_len
< 6) {
458 /* bloody hardware */
459 printk(KERN_ERR
"%s: fubar (rxlen %u status %x\n",
460 dev
->name
, packet_len
, status
);
461 status
|= RS_TOOSHORT
;
463 SMC_WAIT_MMU_BUSY(lp
);
464 SMC_SET_MMU_CMD(lp
, MC_RELEASE
);
465 dev
->stats
.rx_errors
++;
466 if (status
& RS_ALGNERR
)
467 dev
->stats
.rx_frame_errors
++;
468 if (status
& (RS_TOOSHORT
| RS_TOOLONG
))
469 dev
->stats
.rx_length_errors
++;
470 if (status
& RS_BADCRC
)
471 dev
->stats
.rx_crc_errors
++;
475 unsigned int data_len
;
477 /* set multicast stats */
478 if (status
& RS_MULTICAST
)
479 dev
->stats
.multicast
++;
482 * Actual payload is packet_len - 6 (or 5 if odd byte).
483 * We want skb_reserve(2) and the final ctrl word
484 * (2 bytes, possibly containing the payload odd byte).
485 * Furthermore, we add 2 bytes to allow rounding up to
486 * multiple of 4 bytes on 32 bit buses.
487 * Hence packet_len - 6 + 2 + 2 + 2.
489 skb
= dev_alloc_skb(packet_len
);
490 if (unlikely(skb
== NULL
)) {
491 printk(KERN_NOTICE
"%s: Low memory, packet dropped.\n",
493 SMC_WAIT_MMU_BUSY(lp
);
494 SMC_SET_MMU_CMD(lp
, MC_RELEASE
);
495 dev
->stats
.rx_dropped
++;
499 /* Align IP header to 32 bits */
502 /* BUG: the LAN91C111 rev A never sets this bit. Force it. */
503 if (lp
->version
== 0x90)
504 status
|= RS_ODDFRAME
;
507 * If odd length: packet_len - 5,
508 * otherwise packet_len - 6.
509 * With the trailing ctrl byte it's packet_len - 4.
511 data_len
= packet_len
- ((status
& RS_ODDFRAME
) ? 5 : 6);
512 data
= skb_put(skb
, data_len
);
513 SMC_PULL_DATA(lp
, data
, packet_len
- 4);
515 SMC_WAIT_MMU_BUSY(lp
);
516 SMC_SET_MMU_CMD(lp
, MC_RELEASE
);
518 PRINT_PKT(data
, packet_len
- 4);
520 dev
->last_rx
= jiffies
;
521 skb
->protocol
= eth_type_trans(skb
, dev
);
523 dev
->stats
.rx_packets
++;
524 dev
->stats
.rx_bytes
+= data_len
;
530 * On SMP we have the following problem:
532 * A = smc_hardware_send_pkt()
533 * B = smc_hard_start_xmit()
534 * C = smc_interrupt()
536 * A and B can never be executed simultaneously. However, at least on UP,
537 * it is possible (and even desirable) for C to interrupt execution of
538 * A or B in order to have better RX reliability and avoid overruns.
539 * C, just like A and B, must have exclusive access to the chip and
540 * each of them must lock against any other concurrent access.
541 * Unfortunately this is not possible to have C suspend execution of A or
542 * B taking place on another CPU. On UP this is no an issue since A and B
543 * are run from softirq context and C from hard IRQ context, and there is
544 * no other CPU where concurrent access can happen.
545 * If ever there is a way to force at least B and C to always be executed
546 * on the same CPU then we could use read/write locks to protect against
547 * any other concurrent access and C would always interrupt B. But life
548 * isn't that easy in a SMP world...
550 #define smc_special_trylock(lock) \
553 local_irq_disable(); \
554 __ret = spin_trylock(lock); \
556 local_irq_enable(); \
559 #define smc_special_lock(lock) spin_lock_irq(lock)
560 #define smc_special_unlock(lock) spin_unlock_irq(lock)
562 #define smc_special_trylock(lock) (1)
563 #define smc_special_lock(lock) do { } while (0)
564 #define smc_special_unlock(lock) do { } while (0)
568 * This is called to actually send a packet to the chip.
570 static void smc_hardware_send_pkt(unsigned long data
)
572 struct net_device
*dev
= (struct net_device
*)data
;
573 struct smc_local
*lp
= netdev_priv(dev
);
574 void __iomem
*ioaddr
= lp
->base
;
576 unsigned int packet_no
, len
;
579 DBG(3, "%s: %s\n", dev
->name
, __FUNCTION__
);
581 if (!smc_special_trylock(&lp
->lock
)) {
582 netif_stop_queue(dev
);
583 tasklet_schedule(&lp
->tx_task
);
587 skb
= lp
->pending_tx_skb
;
588 if (unlikely(!skb
)) {
589 smc_special_unlock(&lp
->lock
);
592 lp
->pending_tx_skb
= NULL
;
594 packet_no
= SMC_GET_AR(lp
);
595 if (unlikely(packet_no
& AR_FAILED
)) {
596 printk("%s: Memory allocation failed.\n", dev
->name
);
597 dev
->stats
.tx_errors
++;
598 dev
->stats
.tx_fifo_errors
++;
599 smc_special_unlock(&lp
->lock
);
603 /* point to the beginning of the packet */
604 SMC_SET_PN(lp
, packet_no
);
605 SMC_SET_PTR(lp
, PTR_AUTOINC
);
609 DBG(2, "%s: TX PNR 0x%x LENGTH 0x%04x (%d) BUF 0x%p\n",
610 dev
->name
, packet_no
, len
, len
, buf
);
614 * Send the packet length (+6 for status words, length, and ctl.
615 * The card will pad to 64 bytes with zeroes if packet is too small.
617 SMC_PUT_PKT_HDR(lp
, 0, len
+ 6);
619 /* send the actual data */
620 SMC_PUSH_DATA(lp
, buf
, len
& ~1);
622 /* Send final ctl word with the last byte if there is one */
623 SMC_outw(((len
& 1) ? (0x2000 | buf
[len
-1]) : 0), ioaddr
, DATA_REG(lp
));
626 * If THROTTLE_TX_PKTS is set, we stop the queue here. This will
627 * have the effect of having at most one packet queued for TX
628 * in the chip's memory at all time.
630 * If THROTTLE_TX_PKTS is not set then the queue is stopped only
631 * when memory allocation (MC_ALLOC) does not succeed right away.
633 if (THROTTLE_TX_PKTS
)
634 netif_stop_queue(dev
);
636 /* queue the packet for TX */
637 SMC_SET_MMU_CMD(lp
, MC_ENQUEUE
);
638 smc_special_unlock(&lp
->lock
);
640 dev
->trans_start
= jiffies
;
641 dev
->stats
.tx_packets
++;
642 dev
->stats
.tx_bytes
+= len
;
644 SMC_ENABLE_INT(lp
, IM_TX_INT
| IM_TX_EMPTY_INT
);
646 done
: if (!THROTTLE_TX_PKTS
)
647 netif_wake_queue(dev
);
653 * Since I am not sure if I will have enough room in the chip's ram
654 * to store the packet, I call this routine which either sends it
655 * now, or set the card to generates an interrupt when ready
658 static int smc_hard_start_xmit(struct sk_buff
*skb
, struct net_device
*dev
)
660 struct smc_local
*lp
= netdev_priv(dev
);
661 void __iomem
*ioaddr
= lp
->base
;
662 unsigned int numPages
, poll_count
, status
;
664 DBG(3, "%s: %s\n", dev
->name
, __FUNCTION__
);
666 BUG_ON(lp
->pending_tx_skb
!= NULL
);
669 * The MMU wants the number of pages to be the number of 256 bytes
670 * 'pages', minus 1 (since a packet can't ever have 0 pages :))
672 * The 91C111 ignores the size bits, but earlier models don't.
674 * Pkt size for allocating is data length +6 (for additional status
675 * words, length and ctl)
677 * If odd size then last byte is included in ctl word.
679 numPages
= ((skb
->len
& ~1) + (6 - 1)) >> 8;
680 if (unlikely(numPages
> 7)) {
681 printk("%s: Far too big packet error.\n", dev
->name
);
682 dev
->stats
.tx_errors
++;
683 dev
->stats
.tx_dropped
++;
688 smc_special_lock(&lp
->lock
);
690 /* now, try to allocate the memory */
691 SMC_SET_MMU_CMD(lp
, MC_ALLOC
| numPages
);
694 * Poll the chip for a short amount of time in case the
695 * allocation succeeds quickly.
697 poll_count
= MEMORY_WAIT_TIME
;
699 status
= SMC_GET_INT(lp
);
700 if (status
& IM_ALLOC_INT
) {
701 SMC_ACK_INT(lp
, IM_ALLOC_INT
);
704 } while (--poll_count
);
706 smc_special_unlock(&lp
->lock
);
708 lp
->pending_tx_skb
= skb
;
710 /* oh well, wait until the chip finds memory later */
711 netif_stop_queue(dev
);
712 DBG(2, "%s: TX memory allocation deferred.\n", dev
->name
);
713 SMC_ENABLE_INT(lp
, IM_ALLOC_INT
);
716 * Allocation succeeded: push packet to the chip's own memory
719 smc_hardware_send_pkt((unsigned long)dev
);
726 * This handles a TX interrupt, which is only called when:
727 * - a TX error occurred, or
728 * - CTL_AUTO_RELEASE is not set and TX of a packet completed.
730 static void smc_tx(struct net_device
*dev
)
732 struct smc_local
*lp
= netdev_priv(dev
);
733 void __iomem
*ioaddr
= lp
->base
;
734 unsigned int saved_packet
, packet_no
, tx_status
, pkt_len
;
736 DBG(3, "%s: %s\n", dev
->name
, __FUNCTION__
);
738 /* If the TX FIFO is empty then nothing to do */
739 packet_no
= SMC_GET_TXFIFO(lp
);
740 if (unlikely(packet_no
& TXFIFO_TEMPTY
)) {
741 PRINTK("%s: smc_tx with nothing on FIFO.\n", dev
->name
);
745 /* select packet to read from */
746 saved_packet
= SMC_GET_PN(lp
);
747 SMC_SET_PN(lp
, packet_no
);
749 /* read the first word (status word) from this packet */
750 SMC_SET_PTR(lp
, PTR_AUTOINC
| PTR_READ
);
751 SMC_GET_PKT_HDR(lp
, tx_status
, pkt_len
);
752 DBG(2, "%s: TX STATUS 0x%04x PNR 0x%02x\n",
753 dev
->name
, tx_status
, packet_no
);
755 if (!(tx_status
& ES_TX_SUC
))
756 dev
->stats
.tx_errors
++;
758 if (tx_status
& ES_LOSTCARR
)
759 dev
->stats
.tx_carrier_errors
++;
761 if (tx_status
& (ES_LATCOL
| ES_16COL
)) {
762 PRINTK("%s: %s occurred on last xmit\n", dev
->name
,
763 (tx_status
& ES_LATCOL
) ?
764 "late collision" : "too many collisions");
765 dev
->stats
.tx_window_errors
++;
766 if (!(dev
->stats
.tx_window_errors
& 63) && net_ratelimit()) {
767 printk(KERN_INFO
"%s: unexpectedly large number of "
768 "bad collisions. Please check duplex "
769 "setting.\n", dev
->name
);
773 /* kill the packet */
774 SMC_WAIT_MMU_BUSY(lp
);
775 SMC_SET_MMU_CMD(lp
, MC_FREEPKT
);
777 /* Don't restore Packet Number Reg until busy bit is cleared */
778 SMC_WAIT_MMU_BUSY(lp
);
779 SMC_SET_PN(lp
, saved_packet
);
781 /* re-enable transmit */
782 SMC_SELECT_BANK(lp
, 0);
783 SMC_SET_TCR(lp
, lp
->tcr_cur_mode
);
784 SMC_SELECT_BANK(lp
, 2);
788 /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
790 static void smc_mii_out(struct net_device
*dev
, unsigned int val
, int bits
)
792 struct smc_local
*lp
= netdev_priv(dev
);
793 void __iomem
*ioaddr
= lp
->base
;
794 unsigned int mii_reg
, mask
;
796 mii_reg
= SMC_GET_MII(lp
) & ~(MII_MCLK
| MII_MDOE
| MII_MDO
);
799 for (mask
= 1 << (bits
- 1); mask
; mask
>>= 1) {
805 SMC_SET_MII(lp
, mii_reg
);
807 SMC_SET_MII(lp
, mii_reg
| MII_MCLK
);
812 static unsigned int smc_mii_in(struct net_device
*dev
, int bits
)
814 struct smc_local
*lp
= netdev_priv(dev
);
815 void __iomem
*ioaddr
= lp
->base
;
816 unsigned int mii_reg
, mask
, val
;
818 mii_reg
= SMC_GET_MII(lp
) & ~(MII_MCLK
| MII_MDOE
| MII_MDO
);
819 SMC_SET_MII(lp
, mii_reg
);
821 for (mask
= 1 << (bits
- 1), val
= 0; mask
; mask
>>= 1) {
822 if (SMC_GET_MII(lp
) & MII_MDI
)
825 SMC_SET_MII(lp
, mii_reg
);
827 SMC_SET_MII(lp
, mii_reg
| MII_MCLK
);
835 * Reads a register from the MII Management serial interface
837 static int smc_phy_read(struct net_device
*dev
, int phyaddr
, int phyreg
)
839 struct smc_local
*lp
= netdev_priv(dev
);
840 void __iomem
*ioaddr
= lp
->base
;
841 unsigned int phydata
;
843 SMC_SELECT_BANK(lp
, 3);
846 smc_mii_out(dev
, 0xffffffff, 32);
848 /* Start code (01) + read (10) + phyaddr + phyreg */
849 smc_mii_out(dev
, 6 << 10 | phyaddr
<< 5 | phyreg
, 14);
851 /* Turnaround (2bits) + phydata */
852 phydata
= smc_mii_in(dev
, 18);
854 /* Return to idle state */
855 SMC_SET_MII(lp
, SMC_GET_MII(lp
) & ~(MII_MCLK
|MII_MDOE
|MII_MDO
));
857 DBG(3, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
858 __FUNCTION__
, phyaddr
, phyreg
, phydata
);
860 SMC_SELECT_BANK(lp
, 2);
865 * Writes a register to the MII Management serial interface
867 static void smc_phy_write(struct net_device
*dev
, int phyaddr
, int phyreg
,
870 struct smc_local
*lp
= netdev_priv(dev
);
871 void __iomem
*ioaddr
= lp
->base
;
873 SMC_SELECT_BANK(lp
, 3);
876 smc_mii_out(dev
, 0xffffffff, 32);
878 /* Start code (01) + write (01) + phyaddr + phyreg + turnaround + phydata */
879 smc_mii_out(dev
, 5 << 28 | phyaddr
<< 23 | phyreg
<< 18 | 2 << 16 | phydata
, 32);
881 /* Return to idle state */
882 SMC_SET_MII(lp
, SMC_GET_MII(lp
) & ~(MII_MCLK
|MII_MDOE
|MII_MDO
));
884 DBG(3, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
885 __FUNCTION__
, phyaddr
, phyreg
, phydata
);
887 SMC_SELECT_BANK(lp
, 2);
891 * Finds and reports the PHY address
893 static void smc_phy_detect(struct net_device
*dev
)
895 struct smc_local
*lp
= netdev_priv(dev
);
898 DBG(2, "%s: %s\n", dev
->name
, __FUNCTION__
);
903 * Scan all 32 PHY addresses if necessary, starting at
904 * PHY#1 to PHY#31, and then PHY#0 last.
906 for (phyaddr
= 1; phyaddr
< 33; ++phyaddr
) {
907 unsigned int id1
, id2
;
909 /* Read the PHY identifiers */
910 id1
= smc_phy_read(dev
, phyaddr
& 31, MII_PHYSID1
);
911 id2
= smc_phy_read(dev
, phyaddr
& 31, MII_PHYSID2
);
913 DBG(3, "%s: phy_id1=0x%x, phy_id2=0x%x\n",
914 dev
->name
, id1
, id2
);
916 /* Make sure it is a valid identifier */
917 if (id1
!= 0x0000 && id1
!= 0xffff && id1
!= 0x8000 &&
918 id2
!= 0x0000 && id2
!= 0xffff && id2
!= 0x8000) {
919 /* Save the PHY's address */
920 lp
->mii
.phy_id
= phyaddr
& 31;
921 lp
->phy_type
= id1
<< 16 | id2
;
928 * Sets the PHY to a configuration as determined by the user
930 static int smc_phy_fixed(struct net_device
*dev
)
932 struct smc_local
*lp
= netdev_priv(dev
);
933 void __iomem
*ioaddr
= lp
->base
;
934 int phyaddr
= lp
->mii
.phy_id
;
937 DBG(3, "%s: %s\n", dev
->name
, __FUNCTION__
);
939 /* Enter Link Disable state */
940 cfg1
= smc_phy_read(dev
, phyaddr
, PHY_CFG1_REG
);
941 cfg1
|= PHY_CFG1_LNKDIS
;
942 smc_phy_write(dev
, phyaddr
, PHY_CFG1_REG
, cfg1
);
945 * Set our fixed capabilities
946 * Disable auto-negotiation
951 bmcr
|= BMCR_FULLDPLX
;
953 if (lp
->ctl_rspeed
== 100)
954 bmcr
|= BMCR_SPEED100
;
956 /* Write our capabilities to the phy control register */
957 smc_phy_write(dev
, phyaddr
, MII_BMCR
, bmcr
);
959 /* Re-Configure the Receive/Phy Control register */
960 SMC_SELECT_BANK(lp
, 0);
961 SMC_SET_RPC(lp
, lp
->rpc_cur_mode
);
962 SMC_SELECT_BANK(lp
, 2);
968 * smc_phy_reset - reset the phy
972 * Issue a software reset for the specified PHY and
973 * wait up to 100ms for the reset to complete. We should
974 * not access the PHY for 50ms after issuing the reset.
976 * The time to wait appears to be dependent on the PHY.
978 * Must be called with lp->lock locked.
980 static int smc_phy_reset(struct net_device
*dev
, int phy
)
982 struct smc_local
*lp
= netdev_priv(dev
);
986 smc_phy_write(dev
, phy
, MII_BMCR
, BMCR_RESET
);
988 for (timeout
= 2; timeout
; timeout
--) {
989 spin_unlock_irq(&lp
->lock
);
991 spin_lock_irq(&lp
->lock
);
993 bmcr
= smc_phy_read(dev
, phy
, MII_BMCR
);
994 if (!(bmcr
& BMCR_RESET
))
998 return bmcr
& BMCR_RESET
;
1002 * smc_phy_powerdown - powerdown phy
1005 * Power down the specified PHY
1007 static void smc_phy_powerdown(struct net_device
*dev
)
1009 struct smc_local
*lp
= netdev_priv(dev
);
1011 int phy
= lp
->mii
.phy_id
;
1013 if (lp
->phy_type
== 0)
1016 /* We need to ensure that no calls to smc_phy_configure are
1019 flush_scheduled_work() cannot be called because we are
1020 running with the netlink semaphore held (from
1021 devinet_ioctl()) and the pending work queue contains
1022 linkwatch_event() (scheduled by netif_carrier_off()
1023 above). linkwatch_event() also wants the netlink semaphore.
1025 while(lp
->work_pending
)
1028 bmcr
= smc_phy_read(dev
, phy
, MII_BMCR
);
1029 smc_phy_write(dev
, phy
, MII_BMCR
, bmcr
| BMCR_PDOWN
);
1033 * smc_phy_check_media - check the media status and adjust TCR
1035 * @init: set true for initialisation
1037 * Select duplex mode depending on negotiation state. This
1038 * also updates our carrier state.
1040 static void smc_phy_check_media(struct net_device
*dev
, int init
)
1042 struct smc_local
*lp
= netdev_priv(dev
);
1043 void __iomem
*ioaddr
= lp
->base
;
1045 if (mii_check_media(&lp
->mii
, netif_msg_link(lp
), init
)) {
1046 /* duplex state has changed */
1047 if (lp
->mii
.full_duplex
) {
1048 lp
->tcr_cur_mode
|= TCR_SWFDUP
;
1050 lp
->tcr_cur_mode
&= ~TCR_SWFDUP
;
1053 SMC_SELECT_BANK(lp
, 0);
1054 SMC_SET_TCR(lp
, lp
->tcr_cur_mode
);
1059 * Configures the specified PHY through the MII management interface
1060 * using Autonegotiation.
1061 * Calls smc_phy_fixed() if the user has requested a certain config.
1062 * If RPC ANEG bit is set, the media selection is dependent purely on
1063 * the selection by the MII (either in the MII BMCR reg or the result
1064 * of autonegotiation.) If the RPC ANEG bit is cleared, the selection
1065 * is controlled by the RPC SPEED and RPC DPLX bits.
1067 static void smc_phy_configure(struct work_struct
*work
)
1069 struct smc_local
*lp
=
1070 container_of(work
, struct smc_local
, phy_configure
);
1071 struct net_device
*dev
= lp
->dev
;
1072 void __iomem
*ioaddr
= lp
->base
;
1073 int phyaddr
= lp
->mii
.phy_id
;
1074 int my_phy_caps
; /* My PHY capabilities */
1075 int my_ad_caps
; /* My Advertised capabilities */
1078 DBG(3, "%s:smc_program_phy()\n", dev
->name
);
1080 spin_lock_irq(&lp
->lock
);
1083 * We should not be called if phy_type is zero.
1085 if (lp
->phy_type
== 0)
1086 goto smc_phy_configure_exit
;
1088 if (smc_phy_reset(dev
, phyaddr
)) {
1089 printk("%s: PHY reset timed out\n", dev
->name
);
1090 goto smc_phy_configure_exit
;
1094 * Enable PHY Interrupts (for register 18)
1095 * Interrupts listed here are disabled
1097 smc_phy_write(dev
, phyaddr
, PHY_MASK_REG
,
1098 PHY_INT_LOSSSYNC
| PHY_INT_CWRD
| PHY_INT_SSD
|
1099 PHY_INT_ESD
| PHY_INT_RPOL
| PHY_INT_JAB
|
1100 PHY_INT_SPDDET
| PHY_INT_DPLXDET
);
1102 /* Configure the Receive/Phy Control register */
1103 SMC_SELECT_BANK(lp
, 0);
1104 SMC_SET_RPC(lp
, lp
->rpc_cur_mode
);
1106 /* If the user requested no auto neg, then go set his request */
1107 if (lp
->mii
.force_media
) {
1109 goto smc_phy_configure_exit
;
1112 /* Copy our capabilities from MII_BMSR to MII_ADVERTISE */
1113 my_phy_caps
= smc_phy_read(dev
, phyaddr
, MII_BMSR
);
1115 if (!(my_phy_caps
& BMSR_ANEGCAPABLE
)) {
1116 printk(KERN_INFO
"Auto negotiation NOT supported\n");
1118 goto smc_phy_configure_exit
;
1121 my_ad_caps
= ADVERTISE_CSMA
; /* I am CSMA capable */
1123 if (my_phy_caps
& BMSR_100BASE4
)
1124 my_ad_caps
|= ADVERTISE_100BASE4
;
1125 if (my_phy_caps
& BMSR_100FULL
)
1126 my_ad_caps
|= ADVERTISE_100FULL
;
1127 if (my_phy_caps
& BMSR_100HALF
)
1128 my_ad_caps
|= ADVERTISE_100HALF
;
1129 if (my_phy_caps
& BMSR_10FULL
)
1130 my_ad_caps
|= ADVERTISE_10FULL
;
1131 if (my_phy_caps
& BMSR_10HALF
)
1132 my_ad_caps
|= ADVERTISE_10HALF
;
1134 /* Disable capabilities not selected by our user */
1135 if (lp
->ctl_rspeed
!= 100)
1136 my_ad_caps
&= ~(ADVERTISE_100BASE4
|ADVERTISE_100FULL
|ADVERTISE_100HALF
);
1138 if (!lp
->ctl_rfduplx
)
1139 my_ad_caps
&= ~(ADVERTISE_100FULL
|ADVERTISE_10FULL
);
1141 /* Update our Auto-Neg Advertisement Register */
1142 smc_phy_write(dev
, phyaddr
, MII_ADVERTISE
, my_ad_caps
);
1143 lp
->mii
.advertising
= my_ad_caps
;
1146 * Read the register back. Without this, it appears that when
1147 * auto-negotiation is restarted, sometimes it isn't ready and
1148 * the link does not come up.
1150 status
= smc_phy_read(dev
, phyaddr
, MII_ADVERTISE
);
1152 DBG(2, "%s: phy caps=%x\n", dev
->name
, my_phy_caps
);
1153 DBG(2, "%s: phy advertised caps=%x\n", dev
->name
, my_ad_caps
);
1155 /* Restart auto-negotiation process in order to advertise my caps */
1156 smc_phy_write(dev
, phyaddr
, MII_BMCR
, BMCR_ANENABLE
| BMCR_ANRESTART
);
1158 smc_phy_check_media(dev
, 1);
1160 smc_phy_configure_exit
:
1161 SMC_SELECT_BANK(lp
, 2);
1162 spin_unlock_irq(&lp
->lock
);
1163 lp
->work_pending
= 0;
1169 * Purpose: Handle interrupts relating to PHY register 18. This is
1170 * called from the "hard" interrupt handler under our private spinlock.
1172 static void smc_phy_interrupt(struct net_device
*dev
)
1174 struct smc_local
*lp
= netdev_priv(dev
);
1175 int phyaddr
= lp
->mii
.phy_id
;
1178 DBG(2, "%s: %s\n", dev
->name
, __FUNCTION__
);
1180 if (lp
->phy_type
== 0)
1184 smc_phy_check_media(dev
, 0);
1186 /* Read PHY Register 18, Status Output */
1187 phy18
= smc_phy_read(dev
, phyaddr
, PHY_INT_REG
);
1188 if ((phy18
& PHY_INT_INT
) == 0)
1193 /*--- END PHY CONTROL AND CONFIGURATION-------------------------------------*/
1195 static void smc_10bt_check_media(struct net_device
*dev
, int init
)
1197 struct smc_local
*lp
= netdev_priv(dev
);
1198 void __iomem
*ioaddr
= lp
->base
;
1199 unsigned int old_carrier
, new_carrier
;
1201 old_carrier
= netif_carrier_ok(dev
) ? 1 : 0;
1203 SMC_SELECT_BANK(lp
, 0);
1204 new_carrier
= (SMC_GET_EPH_STATUS(lp
) & ES_LINK_OK
) ? 1 : 0;
1205 SMC_SELECT_BANK(lp
, 2);
1207 if (init
|| (old_carrier
!= new_carrier
)) {
1209 netif_carrier_off(dev
);
1211 netif_carrier_on(dev
);
1213 if (netif_msg_link(lp
))
1214 printk(KERN_INFO
"%s: link %s\n", dev
->name
,
1215 new_carrier
? "up" : "down");
1219 static void smc_eph_interrupt(struct net_device
*dev
)
1221 struct smc_local
*lp
= netdev_priv(dev
);
1222 void __iomem
*ioaddr
= lp
->base
;
1225 smc_10bt_check_media(dev
, 0);
1227 SMC_SELECT_BANK(lp
, 1);
1228 ctl
= SMC_GET_CTL(lp
);
1229 SMC_SET_CTL(lp
, ctl
& ~CTL_LE_ENABLE
);
1230 SMC_SET_CTL(lp
, ctl
);
1231 SMC_SELECT_BANK(lp
, 2);
1235 * This is the main routine of the driver, to handle the device when
1236 * it needs some attention.
1238 static irqreturn_t
smc_interrupt(int irq
, void *dev_id
)
1240 struct net_device
*dev
= dev_id
;
1241 struct smc_local
*lp
= netdev_priv(dev
);
1242 void __iomem
*ioaddr
= lp
->base
;
1243 int status
, mask
, timeout
, card_stats
;
1246 DBG(3, "%s: %s\n", dev
->name
, __FUNCTION__
);
1248 spin_lock(&lp
->lock
);
1250 /* A preamble may be used when there is a potential race
1251 * between the interruptible transmit functions and this
1253 SMC_INTERRUPT_PREAMBLE
;
1255 saved_pointer
= SMC_GET_PTR(lp
);
1256 mask
= SMC_GET_INT_MASK(lp
);
1257 SMC_SET_INT_MASK(lp
, 0);
1259 /* set a timeout value, so I don't stay here forever */
1260 timeout
= MAX_IRQ_LOOPS
;
1263 status
= SMC_GET_INT(lp
);
1265 DBG(2, "%s: INT 0x%02x MASK 0x%02x MEM 0x%04x FIFO 0x%04x\n",
1266 dev
->name
, status
, mask
,
1267 ({ int meminfo
; SMC_SELECT_BANK(lp
, 0);
1268 meminfo
= SMC_GET_MIR(lp
);
1269 SMC_SELECT_BANK(lp
, 2); meminfo
; }),
1276 if (status
& IM_TX_INT
) {
1277 /* do this before RX as it will free memory quickly */
1278 DBG(3, "%s: TX int\n", dev
->name
);
1280 SMC_ACK_INT(lp
, IM_TX_INT
);
1281 if (THROTTLE_TX_PKTS
)
1282 netif_wake_queue(dev
);
1283 } else if (status
& IM_RCV_INT
) {
1284 DBG(3, "%s: RX irq\n", dev
->name
);
1286 } else if (status
& IM_ALLOC_INT
) {
1287 DBG(3, "%s: Allocation irq\n", dev
->name
);
1288 tasklet_hi_schedule(&lp
->tx_task
);
1289 mask
&= ~IM_ALLOC_INT
;
1290 } else if (status
& IM_TX_EMPTY_INT
) {
1291 DBG(3, "%s: TX empty\n", dev
->name
);
1292 mask
&= ~IM_TX_EMPTY_INT
;
1295 SMC_SELECT_BANK(lp
, 0);
1296 card_stats
= SMC_GET_COUNTER(lp
);
1297 SMC_SELECT_BANK(lp
, 2);
1299 /* single collisions */
1300 dev
->stats
.collisions
+= card_stats
& 0xF;
1303 /* multiple collisions */
1304 dev
->stats
.collisions
+= card_stats
& 0xF;
1305 } else if (status
& IM_RX_OVRN_INT
) {
1306 DBG(1, "%s: RX overrun (EPH_ST 0x%04x)\n", dev
->name
,
1307 ({ int eph_st
; SMC_SELECT_BANK(lp
, 0);
1308 eph_st
= SMC_GET_EPH_STATUS(lp
);
1309 SMC_SELECT_BANK(lp
, 2); eph_st
; }));
1310 SMC_ACK_INT(lp
, IM_RX_OVRN_INT
);
1311 dev
->stats
.rx_errors
++;
1312 dev
->stats
.rx_fifo_errors
++;
1313 } else if (status
& IM_EPH_INT
) {
1314 smc_eph_interrupt(dev
);
1315 } else if (status
& IM_MDINT
) {
1316 SMC_ACK_INT(lp
, IM_MDINT
);
1317 smc_phy_interrupt(dev
);
1318 } else if (status
& IM_ERCV_INT
) {
1319 SMC_ACK_INT(lp
, IM_ERCV_INT
);
1320 PRINTK("%s: UNSUPPORTED: ERCV INTERRUPT \n", dev
->name
);
1322 } while (--timeout
);
1324 /* restore register states */
1325 SMC_SET_PTR(lp
, saved_pointer
);
1326 SMC_SET_INT_MASK(lp
, mask
);
1327 spin_unlock(&lp
->lock
);
1329 #ifndef CONFIG_NET_POLL_CONTROLLER
1330 if (timeout
== MAX_IRQ_LOOPS
)
1331 PRINTK("%s: spurious interrupt (mask = 0x%02x)\n",
1334 DBG(3, "%s: Interrupt done (%d loops)\n",
1335 dev
->name
, MAX_IRQ_LOOPS
- timeout
);
1338 * We return IRQ_HANDLED unconditionally here even if there was
1339 * nothing to do. There is a possibility that a packet might
1340 * get enqueued into the chip right after TX_EMPTY_INT is raised
1341 * but just before the CPU acknowledges the IRQ.
1342 * Better take an unneeded IRQ in some occasions than complexifying
1343 * the code for all cases.
1348 #ifdef CONFIG_NET_POLL_CONTROLLER
1350 * Polling receive - used by netconsole and other diagnostic tools
1351 * to allow network i/o with interrupts disabled.
1353 static void smc_poll_controller(struct net_device
*dev
)
1355 disable_irq(dev
->irq
);
1356 smc_interrupt(dev
->irq
, dev
);
1357 enable_irq(dev
->irq
);
1361 /* Our watchdog timed out. Called by the networking layer */
1362 static void smc_timeout(struct net_device
*dev
)
1364 struct smc_local
*lp
= netdev_priv(dev
);
1365 void __iomem
*ioaddr
= lp
->base
;
1366 int status
, mask
, eph_st
, meminfo
, fifo
;
1368 DBG(2, "%s: %s\n", dev
->name
, __FUNCTION__
);
1370 spin_lock_irq(&lp
->lock
);
1371 status
= SMC_GET_INT(lp
);
1372 mask
= SMC_GET_INT_MASK(lp
);
1373 fifo
= SMC_GET_FIFO(lp
);
1374 SMC_SELECT_BANK(lp
, 0);
1375 eph_st
= SMC_GET_EPH_STATUS(lp
);
1376 meminfo
= SMC_GET_MIR(lp
);
1377 SMC_SELECT_BANK(lp
, 2);
1378 spin_unlock_irq(&lp
->lock
);
1379 PRINTK( "%s: TX timeout (INT 0x%02x INTMASK 0x%02x "
1380 "MEM 0x%04x FIFO 0x%04x EPH_ST 0x%04x)\n",
1381 dev
->name
, status
, mask
, meminfo
, fifo
, eph_st
);
1387 * Reconfiguring the PHY doesn't seem like a bad idea here, but
1388 * smc_phy_configure() calls msleep() which calls schedule_timeout()
1389 * which calls schedule(). Hence we use a work queue.
1391 if (lp
->phy_type
!= 0) {
1392 if (schedule_work(&lp
->phy_configure
)) {
1393 lp
->work_pending
= 1;
1397 /* We can accept TX packets again */
1398 dev
->trans_start
= jiffies
;
1399 netif_wake_queue(dev
);
1403 * This routine will, depending on the values passed to it,
1404 * either make it accept multicast packets, go into
1405 * promiscuous mode (for TCPDUMP and cousins) or accept
1406 * a select set of multicast packets
1408 static void smc_set_multicast_list(struct net_device
*dev
)
1410 struct smc_local
*lp
= netdev_priv(dev
);
1411 void __iomem
*ioaddr
= lp
->base
;
1412 unsigned char multicast_table
[8];
1413 int update_multicast
= 0;
1415 DBG(2, "%s: %s\n", dev
->name
, __FUNCTION__
);
1417 if (dev
->flags
& IFF_PROMISC
) {
1418 DBG(2, "%s: RCR_PRMS\n", dev
->name
);
1419 lp
->rcr_cur_mode
|= RCR_PRMS
;
1422 /* BUG? I never disable promiscuous mode if multicasting was turned on.
1423 Now, I turn off promiscuous mode, but I don't do anything to multicasting
1424 when promiscuous mode is turned on.
1428 * Here, I am setting this to accept all multicast packets.
1429 * I don't need to zero the multicast table, because the flag is
1430 * checked before the table is
1432 else if (dev
->flags
& IFF_ALLMULTI
|| dev
->mc_count
> 16) {
1433 DBG(2, "%s: RCR_ALMUL\n", dev
->name
);
1434 lp
->rcr_cur_mode
|= RCR_ALMUL
;
1438 * This sets the internal hardware table to filter out unwanted
1439 * multicast packets before they take up memory.
1441 * The SMC chip uses a hash table where the high 6 bits of the CRC of
1442 * address are the offset into the table. If that bit is 1, then the
1443 * multicast packet is accepted. Otherwise, it's dropped silently.
1445 * To use the 6 bits as an offset into the table, the high 3 bits are
1446 * the number of the 8 bit register, while the low 3 bits are the bit
1447 * within that register.
1449 else if (dev
->mc_count
) {
1451 struct dev_mc_list
*cur_addr
;
1453 /* table for flipping the order of 3 bits */
1454 static const unsigned char invert3
[] = {0, 4, 2, 6, 1, 5, 3, 7};
1456 /* start with a table of all zeros: reject all */
1457 memset(multicast_table
, 0, sizeof(multicast_table
));
1459 cur_addr
= dev
->mc_list
;
1460 for (i
= 0; i
< dev
->mc_count
; i
++, cur_addr
= cur_addr
->next
) {
1463 /* do we have a pointer here? */
1466 /* make sure this is a multicast address -
1467 shouldn't this be a given if we have it here ? */
1468 if (!(*cur_addr
->dmi_addr
& 1))
1471 /* only use the low order bits */
1472 position
= crc32_le(~0, cur_addr
->dmi_addr
, 6) & 0x3f;
1474 /* do some messy swapping to put the bit in the right spot */
1475 multicast_table
[invert3
[position
&7]] |=
1476 (1<<invert3
[(position
>>3)&7]);
1479 /* be sure I get rid of flags I might have set */
1480 lp
->rcr_cur_mode
&= ~(RCR_PRMS
| RCR_ALMUL
);
1482 /* now, the table can be loaded into the chipset */
1483 update_multicast
= 1;
1485 DBG(2, "%s: ~(RCR_PRMS|RCR_ALMUL)\n", dev
->name
);
1486 lp
->rcr_cur_mode
&= ~(RCR_PRMS
| RCR_ALMUL
);
1489 * since I'm disabling all multicast entirely, I need to
1490 * clear the multicast list
1492 memset(multicast_table
, 0, sizeof(multicast_table
));
1493 update_multicast
= 1;
1496 spin_lock_irq(&lp
->lock
);
1497 SMC_SELECT_BANK(lp
, 0);
1498 SMC_SET_RCR(lp
, lp
->rcr_cur_mode
);
1499 if (update_multicast
) {
1500 SMC_SELECT_BANK(lp
, 3);
1501 SMC_SET_MCAST(lp
, multicast_table
);
1503 SMC_SELECT_BANK(lp
, 2);
1504 spin_unlock_irq(&lp
->lock
);
1509 * Open and Initialize the board
1511 * Set up everything, reset the card, etc..
1514 smc_open(struct net_device
*dev
)
1516 struct smc_local
*lp
= netdev_priv(dev
);
1518 DBG(2, "%s: %s\n", dev
->name
, __FUNCTION__
);
1521 * Check that the address is valid. If its not, refuse
1522 * to bring the device up. The user must specify an
1523 * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx
1525 if (!is_valid_ether_addr(dev
->dev_addr
)) {
1526 PRINTK("%s: no valid ethernet hw addr\n", __FUNCTION__
);
1530 /* Setup the default Register Modes */
1531 lp
->tcr_cur_mode
= TCR_DEFAULT
;
1532 lp
->rcr_cur_mode
= RCR_DEFAULT
;
1533 lp
->rpc_cur_mode
= RPC_DEFAULT
;
1536 * If we are not using a MII interface, we need to
1537 * monitor our own carrier signal to detect faults.
1539 if (lp
->phy_type
== 0)
1540 lp
->tcr_cur_mode
|= TCR_MON_CSN
;
1542 /* reset the hardware */
1546 /* Configure the PHY, initialize the link state */
1547 if (lp
->phy_type
!= 0)
1548 smc_phy_configure(&lp
->phy_configure
);
1550 spin_lock_irq(&lp
->lock
);
1551 smc_10bt_check_media(dev
, 1);
1552 spin_unlock_irq(&lp
->lock
);
1555 netif_start_queue(dev
);
1562 * this makes the board clean up everything that it can
1563 * and not talk to the outside world. Caused by
1564 * an 'ifconfig ethX down'
1566 static int smc_close(struct net_device
*dev
)
1568 struct smc_local
*lp
= netdev_priv(dev
);
1570 DBG(2, "%s: %s\n", dev
->name
, __FUNCTION__
);
1572 netif_stop_queue(dev
);
1573 netif_carrier_off(dev
);
1575 /* clear everything */
1577 tasklet_kill(&lp
->tx_task
);
1578 smc_phy_powerdown(dev
);
1586 smc_ethtool_getsettings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
1588 struct smc_local
*lp
= netdev_priv(dev
);
1594 if (lp
->phy_type
!= 0) {
1595 spin_lock_irq(&lp
->lock
);
1596 ret
= mii_ethtool_gset(&lp
->mii
, cmd
);
1597 spin_unlock_irq(&lp
->lock
);
1599 cmd
->supported
= SUPPORTED_10baseT_Half
|
1600 SUPPORTED_10baseT_Full
|
1601 SUPPORTED_TP
| SUPPORTED_AUI
;
1603 if (lp
->ctl_rspeed
== 10)
1604 cmd
->speed
= SPEED_10
;
1605 else if (lp
->ctl_rspeed
== 100)
1606 cmd
->speed
= SPEED_100
;
1608 cmd
->autoneg
= AUTONEG_DISABLE
;
1609 cmd
->transceiver
= XCVR_INTERNAL
;
1611 cmd
->duplex
= lp
->tcr_cur_mode
& TCR_SWFDUP
? DUPLEX_FULL
: DUPLEX_HALF
;
1620 smc_ethtool_setsettings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
1622 struct smc_local
*lp
= netdev_priv(dev
);
1625 if (lp
->phy_type
!= 0) {
1626 spin_lock_irq(&lp
->lock
);
1627 ret
= mii_ethtool_sset(&lp
->mii
, cmd
);
1628 spin_unlock_irq(&lp
->lock
);
1630 if (cmd
->autoneg
!= AUTONEG_DISABLE
||
1631 cmd
->speed
!= SPEED_10
||
1632 (cmd
->duplex
!= DUPLEX_HALF
&& cmd
->duplex
!= DUPLEX_FULL
) ||
1633 (cmd
->port
!= PORT_TP
&& cmd
->port
!= PORT_AUI
))
1636 // lp->port = cmd->port;
1637 lp
->ctl_rfduplx
= cmd
->duplex
== DUPLEX_FULL
;
1639 // if (netif_running(dev))
1640 // smc_set_port(dev);
1649 smc_ethtool_getdrvinfo(struct net_device
*dev
, struct ethtool_drvinfo
*info
)
1651 strncpy(info
->driver
, CARDNAME
, sizeof(info
->driver
));
1652 strncpy(info
->version
, version
, sizeof(info
->version
));
1653 strncpy(info
->bus_info
, dev
->dev
.parent
->bus_id
, sizeof(info
->bus_info
));
1656 static int smc_ethtool_nwayreset(struct net_device
*dev
)
1658 struct smc_local
*lp
= netdev_priv(dev
);
1661 if (lp
->phy_type
!= 0) {
1662 spin_lock_irq(&lp
->lock
);
1663 ret
= mii_nway_restart(&lp
->mii
);
1664 spin_unlock_irq(&lp
->lock
);
1670 static u32
smc_ethtool_getmsglevel(struct net_device
*dev
)
1672 struct smc_local
*lp
= netdev_priv(dev
);
1673 return lp
->msg_enable
;
1676 static void smc_ethtool_setmsglevel(struct net_device
*dev
, u32 level
)
1678 struct smc_local
*lp
= netdev_priv(dev
);
1679 lp
->msg_enable
= level
;
1682 static const struct ethtool_ops smc_ethtool_ops
= {
1683 .get_settings
= smc_ethtool_getsettings
,
1684 .set_settings
= smc_ethtool_setsettings
,
1685 .get_drvinfo
= smc_ethtool_getdrvinfo
,
1687 .get_msglevel
= smc_ethtool_getmsglevel
,
1688 .set_msglevel
= smc_ethtool_setmsglevel
,
1689 .nway_reset
= smc_ethtool_nwayreset
,
1690 .get_link
= ethtool_op_get_link
,
1691 // .get_eeprom = smc_ethtool_geteeprom,
1692 // .set_eeprom = smc_ethtool_seteeprom,
1698 * This routine has a simple purpose -- make the SMC chip generate an
1699 * interrupt, so an auto-detect routine can detect it, and find the IRQ,
1702 * does this still work?
1704 * I just deleted auto_irq.c, since it was never built...
1707 static int __init
smc_findirq(struct smc_local
*lp
)
1709 void __iomem
*ioaddr
= lp
->base
;
1711 unsigned long cookie
;
1713 DBG(2, "%s: %s\n", CARDNAME
, __FUNCTION__
);
1715 cookie
= probe_irq_on();
1718 * What I try to do here is trigger an ALLOC_INT. This is done
1719 * by allocating a small chunk of memory, which will give an interrupt
1722 /* enable ALLOCation interrupts ONLY */
1723 SMC_SELECT_BANK(lp
, 2);
1724 SMC_SET_INT_MASK(lp
, IM_ALLOC_INT
);
1727 * Allocate 512 bytes of memory. Note that the chip was just
1728 * reset so all the memory is available
1730 SMC_SET_MMU_CMD(lp
, MC_ALLOC
| 1);
1733 * Wait until positive that the interrupt has been generated
1738 int_status
= SMC_GET_INT(lp
);
1739 if (int_status
& IM_ALLOC_INT
)
1740 break; /* got the interrupt */
1741 } while (--timeout
);
1744 * there is really nothing that I can do here if timeout fails,
1745 * as autoirq_report will return a 0 anyway, which is what I
1746 * want in this case. Plus, the clean up is needed in both
1750 /* and disable all interrupts again */
1751 SMC_SET_INT_MASK(lp
, 0);
1753 /* and return what I found */
1754 return probe_irq_off(cookie
);
1758 * Function: smc_probe(unsigned long ioaddr)
1761 * Tests to see if a given ioaddr points to an SMC91x chip.
1762 * Returns a 0 on success
1765 * (1) see if the high byte of BANK_SELECT is 0x33
1766 * (2) compare the ioaddr with the base register's address
1767 * (3) see if I recognize the chip ID in the appropriate register
1769 * Here I do typical initialization tasks.
1771 * o Initialize the structure if needed
1772 * o print out my vanity message if not done so already
1773 * o print out what type of hardware is detected
1774 * o print out the ethernet address
1776 * o set up my private data
1777 * o configure the dev structure with my subroutines
1778 * o actually GRAB the irq.
1781 static int __init
smc_probe(struct net_device
*dev
, void __iomem
*ioaddr
,
1782 unsigned long irq_flags
)
1784 struct smc_local
*lp
= netdev_priv(dev
);
1785 static int version_printed
= 0;
1787 unsigned int val
, revision_register
;
1788 const char *version_string
;
1789 DECLARE_MAC_BUF(mac
);
1791 DBG(2, "%s: %s\n", CARDNAME
, __FUNCTION__
);
1793 /* First, see if the high byte is 0x33 */
1794 val
= SMC_CURRENT_BANK(lp
);
1795 DBG(2, "%s: bank signature probe returned 0x%04x\n", CARDNAME
, val
);
1796 if ((val
& 0xFF00) != 0x3300) {
1797 if ((val
& 0xFF) == 0x33) {
1799 "%s: Detected possible byte-swapped interface"
1800 " at IOADDR %p\n", CARDNAME
, ioaddr
);
1807 * The above MIGHT indicate a device, but I need to write to
1808 * further test this.
1810 SMC_SELECT_BANK(lp
, 0);
1811 val
= SMC_CURRENT_BANK(lp
);
1812 if ((val
& 0xFF00) != 0x3300) {
1818 * well, we've already written once, so hopefully another
1819 * time won't hurt. This time, I need to switch the bank
1820 * register to bank 1, so I can access the base address
1823 SMC_SELECT_BANK(lp
, 1);
1824 val
= SMC_GET_BASE(lp
);
1825 val
= ((val
& 0x1F00) >> 3) << SMC_IO_SHIFT
;
1826 if (((unsigned int)ioaddr
& (0x3e0 << SMC_IO_SHIFT
)) != val
) {
1827 printk("%s: IOADDR %p doesn't match configuration (%x).\n",
1828 CARDNAME
, ioaddr
, val
);
1832 * check if the revision register is something that I
1833 * recognize. These might need to be added to later,
1834 * as future revisions could be added.
1836 SMC_SELECT_BANK(lp
, 3);
1837 revision_register
= SMC_GET_REV(lp
);
1838 DBG(2, "%s: revision = 0x%04x\n", CARDNAME
, revision_register
);
1839 version_string
= chip_ids
[ (revision_register
>> 4) & 0xF];
1840 if (!version_string
|| (revision_register
& 0xff00) != 0x3300) {
1841 /* I don't recognize this chip, so... */
1842 printk("%s: IO %p: Unrecognized revision register 0x%04x"
1843 ", Contact author.\n", CARDNAME
,
1844 ioaddr
, revision_register
);
1850 /* At this point I'll assume that the chip is an SMC91x. */
1851 if (version_printed
++ == 0)
1852 printk("%s", version
);
1854 /* fill in some of the fields */
1855 dev
->base_addr
= (unsigned long)ioaddr
;
1857 lp
->version
= revision_register
& 0xff;
1858 spin_lock_init(&lp
->lock
);
1860 /* Get the MAC address */
1861 SMC_SELECT_BANK(lp
, 1);
1862 SMC_GET_MAC_ADDR(lp
, dev
->dev_addr
);
1864 /* now, reset the chip, and put it into a known state */
1868 * If dev->irq is 0, then the device has to be banged on to see
1871 * This banging doesn't always detect the IRQ, for unknown reasons.
1872 * a workaround is to reset the chip and try again.
1874 * Interestingly, the DOS packet driver *SETS* the IRQ on the card to
1875 * be what is requested on the command line. I don't do that, mostly
1876 * because the card that I have uses a non-standard method of accessing
1877 * the IRQs, and because this _should_ work in most configurations.
1879 * Specifying an IRQ is done with the assumption that the user knows
1880 * what (s)he is doing. No checking is done!!!!
1887 dev
->irq
= smc_findirq(lp
);
1890 /* kick the card and try again */
1894 if (dev
->irq
== 0) {
1895 printk("%s: Couldn't autodetect your IRQ. Use irq=xx.\n",
1900 dev
->irq
= irq_canonicalize(dev
->irq
);
1902 /* Fill in the fields of the device structure with ethernet values. */
1905 dev
->open
= smc_open
;
1906 dev
->stop
= smc_close
;
1907 dev
->hard_start_xmit
= smc_hard_start_xmit
;
1908 dev
->tx_timeout
= smc_timeout
;
1909 dev
->watchdog_timeo
= msecs_to_jiffies(watchdog
);
1910 dev
->set_multicast_list
= smc_set_multicast_list
;
1911 dev
->ethtool_ops
= &smc_ethtool_ops
;
1912 #ifdef CONFIG_NET_POLL_CONTROLLER
1913 dev
->poll_controller
= smc_poll_controller
;
1916 tasklet_init(&lp
->tx_task
, smc_hardware_send_pkt
, (unsigned long)dev
);
1917 INIT_WORK(&lp
->phy_configure
, smc_phy_configure
);
1919 lp
->mii
.phy_id_mask
= 0x1f;
1920 lp
->mii
.reg_num_mask
= 0x1f;
1921 lp
->mii
.force_media
= 0;
1922 lp
->mii
.full_duplex
= 0;
1924 lp
->mii
.mdio_read
= smc_phy_read
;
1925 lp
->mii
.mdio_write
= smc_phy_write
;
1928 * Locate the phy, if any.
1930 if (lp
->version
>= (CHIP_91100
<< 4))
1931 smc_phy_detect(dev
);
1933 /* then shut everything down to save power */
1935 smc_phy_powerdown(dev
);
1937 /* Set default parameters */
1938 lp
->msg_enable
= NETIF_MSG_LINK
;
1939 lp
->ctl_rfduplx
= 0;
1940 lp
->ctl_rspeed
= 10;
1942 if (lp
->version
>= (CHIP_91100
<< 4)) {
1943 lp
->ctl_rfduplx
= 1;
1944 lp
->ctl_rspeed
= 100;
1948 retval
= request_irq(dev
->irq
, &smc_interrupt
, irq_flags
, dev
->name
, dev
);
1952 #ifdef SMC_USE_PXA_DMA
1954 int dma
= pxa_request_dma(dev
->name
, DMA_PRIO_LOW
,
1955 smc_pxa_dma_irq
, NULL
);
1961 retval
= register_netdev(dev
);
1963 /* now, print out the card info, in a short format.. */
1964 printk("%s: %s (rev %d) at %p IRQ %d",
1965 dev
->name
, version_string
, revision_register
& 0x0f,
1966 lp
->base
, dev
->irq
);
1968 if (dev
->dma
!= (unsigned char)-1)
1969 printk(" DMA %d", dev
->dma
);
1971 printk("%s%s\n", nowait
? " [nowait]" : "",
1972 THROTTLE_TX_PKTS
? " [throttle_tx]" : "");
1974 if (!is_valid_ether_addr(dev
->dev_addr
)) {
1975 printk("%s: Invalid ethernet MAC address. Please "
1976 "set using ifconfig\n", dev
->name
);
1978 /* Print the Ethernet address */
1979 printk("%s: Ethernet addr: %s\n",
1980 dev
->name
, print_mac(mac
, dev
->dev_addr
));
1983 if (lp
->phy_type
== 0) {
1984 PRINTK("%s: No PHY found\n", dev
->name
);
1985 } else if ((lp
->phy_type
& 0xfffffff0) == 0x0016f840) {
1986 PRINTK("%s: PHY LAN83C183 (LAN91C111 Internal)\n", dev
->name
);
1987 } else if ((lp
->phy_type
& 0xfffffff0) == 0x02821c50) {
1988 PRINTK("%s: PHY LAN83C180\n", dev
->name
);
1993 #ifdef SMC_USE_PXA_DMA
1994 if (retval
&& dev
->dma
!= (unsigned char)-1)
1995 pxa_free_dma(dev
->dma
);
2000 static int smc_enable_device(struct platform_device
*pdev
)
2002 struct net_device
*ndev
= platform_get_drvdata(pdev
);
2003 struct smc_local
*lp
= netdev_priv(ndev
);
2004 unsigned long flags
;
2005 unsigned char ecor
, ecsr
;
2007 struct resource
* res
;
2009 res
= platform_get_resource_byname(pdev
, IORESOURCE_MEM
, "smc91x-attrib");
2014 * Map the attribute space. This is overkill, but clean.
2016 addr
= ioremap(res
->start
, ATTRIB_SIZE
);
2021 * Reset the device. We must disable IRQs around this
2022 * since a reset causes the IRQ line become active.
2024 local_irq_save(flags
);
2025 ecor
= readb(addr
+ (ECOR
<< SMC_IO_SHIFT
)) & ~ECOR_RESET
;
2026 writeb(ecor
| ECOR_RESET
, addr
+ (ECOR
<< SMC_IO_SHIFT
));
2027 readb(addr
+ (ECOR
<< SMC_IO_SHIFT
));
2030 * Wait 100us for the chip to reset.
2035 * The device will ignore all writes to the enable bit while
2036 * reset is asserted, even if the reset bit is cleared in the
2037 * same write. Must clear reset first, then enable the device.
2039 writeb(ecor
, addr
+ (ECOR
<< SMC_IO_SHIFT
));
2040 writeb(ecor
| ECOR_ENABLE
, addr
+ (ECOR
<< SMC_IO_SHIFT
));
2043 * Set the appropriate byte/word mode.
2045 ecsr
= readb(addr
+ (ECSR
<< SMC_IO_SHIFT
)) & ~ECSR_IOIS8
;
2048 writeb(ecsr
, addr
+ (ECSR
<< SMC_IO_SHIFT
));
2049 local_irq_restore(flags
);
2054 * Wait for the chip to wake up. We could poll the control
2055 * register in the main register space, but that isn't mapped
2056 * yet. We know this is going to take 750us.
2063 static int smc_request_attrib(struct platform_device
*pdev
)
2065 struct resource
* res
= platform_get_resource_byname(pdev
, IORESOURCE_MEM
, "smc91x-attrib");
2070 if (!request_mem_region(res
->start
, ATTRIB_SIZE
, CARDNAME
))
2076 static void smc_release_attrib(struct platform_device
*pdev
)
2078 struct resource
* res
= platform_get_resource_byname(pdev
, IORESOURCE_MEM
, "smc91x-attrib");
2081 release_mem_region(res
->start
, ATTRIB_SIZE
);
2084 static inline void smc_request_datacs(struct platform_device
*pdev
, struct net_device
*ndev
)
2086 if (SMC_CAN_USE_DATACS
) {
2087 struct resource
* res
= platform_get_resource_byname(pdev
, IORESOURCE_MEM
, "smc91x-data32");
2088 struct smc_local
*lp
= netdev_priv(ndev
);
2093 if(!request_mem_region(res
->start
, SMC_DATA_EXTENT
, CARDNAME
)) {
2094 printk(KERN_INFO
"%s: failed to request datacs memory region.\n", CARDNAME
);
2098 lp
->datacs
= ioremap(res
->start
, SMC_DATA_EXTENT
);
2102 static void smc_release_datacs(struct platform_device
*pdev
, struct net_device
*ndev
)
2104 if (SMC_CAN_USE_DATACS
) {
2105 struct smc_local
*lp
= netdev_priv(ndev
);
2106 struct resource
* res
= platform_get_resource_byname(pdev
, IORESOURCE_MEM
, "smc91x-data32");
2109 iounmap(lp
->datacs
);
2114 release_mem_region(res
->start
, SMC_DATA_EXTENT
);
2121 * dev->base_addr == 0, try to find all possible locations
2122 * dev->base_addr > 0x1ff, this is the address to check
2123 * dev->base_addr == <anything else>, return failure code
2126 * 0 --> there is a device
2127 * anything else, error
2129 static int smc_drv_probe(struct platform_device
*pdev
)
2131 struct smc91x_platdata
*pd
= pdev
->dev
.platform_data
;
2132 struct smc_local
*lp
;
2133 struct net_device
*ndev
;
2134 struct resource
*res
, *ires
;
2135 unsigned int __iomem
*addr
;
2138 res
= platform_get_resource_byname(pdev
, IORESOURCE_MEM
, "smc91x-regs");
2140 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
2147 if (!request_mem_region(res
->start
, SMC_IO_EXTENT
, CARDNAME
)) {
2152 ndev
= alloc_etherdev(sizeof(struct smc_local
));
2154 printk("%s: could not allocate device.\n", CARDNAME
);
2156 goto out_release_io
;
2158 SET_NETDEV_DEV(ndev
, &pdev
->dev
);
2160 /* get configuration from platform data, only allow use of
2161 * bus width if both SMC_CAN_USE_xxx and SMC91X_USE_xxx are set.
2164 lp
= netdev_priv(ndev
);
2165 lp
->cfg
.irq_flags
= SMC_IRQ_FLAGS
;
2167 #ifdef SMC_DYNAMIC_BUS_CONFIG
2169 memcpy(&lp
->cfg
, pd
, sizeof(lp
->cfg
));
2171 lp
->cfg
.flags
= SMC91X_USE_8BIT
;
2172 lp
->cfg
.flags
|= SMC91X_USE_16BIT
;
2173 lp
->cfg
.flags
|= SMC91X_USE_32BIT
;
2176 lp
->cfg
.flags
&= ~(SMC_CAN_USE_8BIT
? 0 : SMC91X_USE_8BIT
);
2177 lp
->cfg
.flags
&= ~(SMC_CAN_USE_16BIT
? 0 : SMC91X_USE_16BIT
);
2178 lp
->cfg
.flags
&= ~(SMC_CAN_USE_32BIT
? 0 : SMC91X_USE_32BIT
);
2181 ndev
->dma
= (unsigned char)-1;
2183 ires
= platform_get_resource(pdev
, IORESOURCE_IRQ
, 0);
2186 goto out_free_netdev
;
2189 ndev
->irq
= ires
->start
;
2190 if (SMC_IRQ_FLAGS
== -1)
2191 lp
->cfg
.irq_flags
= ires
->flags
& IRQF_TRIGGER_MASK
;
2193 ret
= smc_request_attrib(pdev
);
2195 goto out_free_netdev
;
2196 #if defined(CONFIG_SA1100_ASSABET)
2197 NCR_0
|= NCR_ENET_OSC_EN
;
2199 platform_set_drvdata(pdev
, ndev
);
2200 ret
= smc_enable_device(pdev
);
2202 goto out_release_attrib
;
2204 addr
= ioremap(res
->start
, SMC_IO_EXTENT
);
2207 goto out_release_attrib
;
2210 #ifdef SMC_USE_PXA_DMA
2212 struct smc_local
*lp
= netdev_priv(ndev
);
2213 lp
->device
= &pdev
->dev
;
2214 lp
->physaddr
= res
->start
;
2218 ret
= smc_probe(ndev
, addr
, lp
->cfg
.irq_flags
);
2222 smc_request_datacs(pdev
, ndev
);
2227 platform_set_drvdata(pdev
, NULL
);
2230 smc_release_attrib(pdev
);
2234 release_mem_region(res
->start
, SMC_IO_EXTENT
);
2236 printk("%s: not found (%d).\n", CARDNAME
, ret
);
2241 static int smc_drv_remove(struct platform_device
*pdev
)
2243 struct net_device
*ndev
= platform_get_drvdata(pdev
);
2244 struct smc_local
*lp
= netdev_priv(ndev
);
2245 struct resource
*res
;
2247 platform_set_drvdata(pdev
, NULL
);
2249 unregister_netdev(ndev
);
2251 free_irq(ndev
->irq
, ndev
);
2253 #ifdef SMC_USE_PXA_DMA
2254 if (ndev
->dma
!= (unsigned char)-1)
2255 pxa_free_dma(ndev
->dma
);
2259 smc_release_datacs(pdev
,ndev
);
2260 smc_release_attrib(pdev
);
2262 res
= platform_get_resource_byname(pdev
, IORESOURCE_MEM
, "smc91x-regs");
2264 platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
2265 release_mem_region(res
->start
, SMC_IO_EXTENT
);
2272 static int smc_drv_suspend(struct platform_device
*dev
, pm_message_t state
)
2274 struct net_device
*ndev
= platform_get_drvdata(dev
);
2277 if (netif_running(ndev
)) {
2278 netif_device_detach(ndev
);
2280 smc_phy_powerdown(ndev
);
2286 static int smc_drv_resume(struct platform_device
*dev
)
2288 struct net_device
*ndev
= platform_get_drvdata(dev
);
2291 struct smc_local
*lp
= netdev_priv(ndev
);
2292 smc_enable_device(dev
);
2293 if (netif_running(ndev
)) {
2296 if (lp
->phy_type
!= 0)
2297 smc_phy_configure(&lp
->phy_configure
);
2298 netif_device_attach(ndev
);
2304 static struct platform_driver smc_driver
= {
2305 .probe
= smc_drv_probe
,
2306 .remove
= smc_drv_remove
,
2307 .suspend
= smc_drv_suspend
,
2308 .resume
= smc_drv_resume
,
2314 static int __init
smc_init(void)
2320 "%s: You shouldn't use auto-probing with insmod!\n",
2325 return platform_driver_register(&smc_driver
);
2328 static void __exit
smc_cleanup(void)
2330 platform_driver_unregister(&smc_driver
);
2333 module_init(smc_init
);
2334 module_exit(smc_cleanup
);