2 * drivers/serial/sh-sci.c
4 * SuperH on-chip serial module support. (SCI with no FIFO / with FIFO)
6 * Copyright (C) 2002 - 2006 Paul Mundt
8 * based off of the old drivers/char/sh-sci.c by:
10 * Copyright (C) 1999, 2000 Niibe Yutaka
11 * Copyright (C) 2000 Sugioka Toshinobu
12 * Modified to support multiple serial ports. Stuart Menefy (May 2000).
13 * Modified to support SecureEdge. David McCullough (2002)
14 * Modified to support SH7300 SCIF. Takashi Kusuda (Jun 2003).
16 * This file is subject to the terms and conditions of the GNU General Public
17 * License. See the file "COPYING" in the main directory of this archive
20 #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
26 #include <linux/module.h>
27 #include <linux/errno.h>
28 #include <linux/timer.h>
29 #include <linux/interrupt.h>
30 #include <linux/tty.h>
31 #include <linux/tty_flip.h>
32 #include <linux/serial.h>
33 #include <linux/major.h>
34 #include <linux/string.h>
35 #include <linux/sysrq.h>
36 #include <linux/ioport.h>
38 #include <linux/init.h>
39 #include <linux/delay.h>
40 #include <linux/console.h>
41 #include <linux/platform_device.h>
43 #ifdef CONFIG_CPU_FREQ
44 #include <linux/notifier.h>
45 #include <linux/cpufreq.h>
48 #if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
49 #include <linux/ctype.h>
50 #include <asm/clock.h>
51 #include <asm/sh_bios.h>
59 struct uart_port port
;
64 /* Port IRQs: ERI, RXI, TXI, BRI (optional) */
65 unsigned int irqs
[SCIx_NR_IRQS
];
67 /* Port pin configuration */
68 void (*init_pins
)(struct uart_port
*port
,
71 /* Port enable callback */
72 void (*enable
)(struct uart_port
*port
);
74 /* Port disable callback */
75 void (*disable
)(struct uart_port
*port
);
78 struct timer_list break_timer
;
83 static struct sci_port
*kgdb_sci_port
;
86 #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
87 static struct sci_port
*serial_console_port
;
90 /* Function prototypes */
91 static void sci_stop_tx(struct uart_port
*port
);
93 #define SCI_NPORTS CONFIG_SERIAL_SH_SCI_NR_UARTS
95 static struct sci_port sci_ports
[SCI_NPORTS
];
96 static struct uart_driver sci_uart_driver
;
98 #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) && \
99 defined(CONFIG_SH_STANDARD_BIOS) || defined(CONFIG_SH_KGDB)
100 static inline void handle_error(struct uart_port
*port
)
102 /* Clear error flags */
103 sci_out(port
, SCxSR
, SCxSR_ERROR_CLEAR(port
));
106 static int get_char(struct uart_port
*port
)
109 unsigned short status
;
112 spin_lock_irqsave(&port
->lock
, flags
);
114 status
= sci_in(port
, SCxSR
);
115 if (status
& SCxSR_ERRORS(port
)) {
119 } while (!(status
& SCxSR_RDxF(port
)));
120 c
= sci_in(port
, SCxRDR
);
121 sci_in(port
, SCxSR
); /* Dummy read */
122 sci_out(port
, SCxSR
, SCxSR_RDxF_CLEAR(port
));
123 spin_unlock_irqrestore(&port
->lock
, flags
);
127 #endif /* CONFIG_SH_STANDARD_BIOS || CONFIG_SH_KGDB */
129 #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) || defined(CONFIG_SH_KGDB)
130 static void put_char(struct uart_port
*port
, char c
)
133 unsigned short status
;
135 spin_lock_irqsave(&port
->lock
, flags
);
138 status
= sci_in(port
, SCxSR
);
139 } while (!(status
& SCxSR_TDxE(port
)));
141 sci_out(port
, SCxTDR
, c
);
142 sci_in(port
, SCxSR
); /* Dummy read */
143 sci_out(port
, SCxSR
, SCxSR_TDxE_CLEAR(port
));
145 spin_unlock_irqrestore(&port
->lock
, flags
);
149 #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
150 static void put_string(struct sci_port
*sci_port
, const char *buffer
, int count
)
152 struct uart_port
*port
= &sci_port
->port
;
153 const unsigned char *p
= buffer
;
156 #if defined(CONFIG_SH_STANDARD_BIOS) || defined(CONFIG_SH_KGDB)
160 #ifdef CONFIG_SH_STANDARD_BIOS
161 /* This call only does a trap the first time it is
162 * called, and so is safe to do here unconditionally
164 usegdb
|= sh_bios_in_gdb_mode();
166 #ifdef CONFIG_SH_KGDB
167 usegdb
|= (kgdb_in_gdb_mode
&& (sci_port
== kgdb_sci_port
));
171 /* $<packet info>#<checksum>. */
175 put_char(port
, 'O'); /* 'O'utput to console */
178 for (i
=0; i
<count
; i
++) { /* Don't use run length encoding */
189 put_char(port
, highhex(checksum
));
190 put_char(port
, lowhex(checksum
));
191 } while (get_char(port
) != '+');
193 #endif /* CONFIG_SH_STANDARD_BIOS || CONFIG_SH_KGDB */
194 for (i
=0; i
<count
; i
++) {
196 put_char(port
, '\r');
197 put_char(port
, *p
++);
200 #endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */
202 #ifdef CONFIG_SH_KGDB
203 static int kgdb_sci_getchar(void)
207 /* Keep trying to read a character, this could be neater */
208 while ((c
= get_char(&kgdb_sci_port
->port
)) < 0)
214 static inline void kgdb_sci_putchar(int c
)
216 put_char(&kgdb_sci_port
->port
, c
);
218 #endif /* CONFIG_SH_KGDB */
220 #if defined(__H8300S__)
221 enum { sci_disable
, sci_enable
};
223 static void h8300_sci_config(struct uart_port
* port
, unsigned int ctrl
)
225 volatile unsigned char *mstpcrl
=(volatile unsigned char *)MSTPCRL
;
226 int ch
= (port
->mapbase
- SMR0
) >> 3;
227 unsigned char mask
= 1 << (ch
+1);
229 if (ctrl
== sci_disable
) {
236 static inline void h8300_sci_enable(struct uart_port
*port
)
238 h8300_sci_config(port
, sci_enable
);
241 static inline void h8300_sci_disable(struct uart_port
*port
)
243 h8300_sci_config(port
, sci_disable
);
247 #if defined(SCI_ONLY) || defined(SCI_AND_SCIF) && \
248 defined(__H8300H__) || defined(__H8300S__)
249 static void sci_init_pins_sci(struct uart_port
* port
, unsigned int cflag
)
251 int ch
= (port
->mapbase
- SMR0
) >> 3;
254 H8300_GPIO_DDR(h8300_sci_pins
[ch
].port
,
255 h8300_sci_pins
[ch
].rx
,
257 H8300_GPIO_DDR(h8300_sci_pins
[ch
].port
,
258 h8300_sci_pins
[ch
].tx
,
262 H8300_SCI_DR(ch
) |= h8300_sci_pins
[ch
].tx
;
265 #define sci_init_pins_sci NULL
268 #if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709)
269 static void sci_init_pins_irda(struct uart_port
*port
, unsigned int cflag
)
271 unsigned int fcr_val
= 0;
274 fcr_val
|= SCFCR_MCE
;
276 sci_out(port
, SCFCR
, fcr_val
);
279 #define sci_init_pins_irda NULL
283 #define sci_init_pins_scif NULL
286 #if defined(SCIF_ONLY) || defined(SCI_AND_SCIF)
287 #if defined(CONFIG_CPU_SUBTYPE_SH7300)
288 /* SH7300 doesn't use RTS/CTS */
289 static void sci_init_pins_scif(struct uart_port
*port
, unsigned int cflag
)
291 sci_out(port
, SCFCR
, 0);
293 #elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)
294 static void sci_init_pins_scif(struct uart_port
* port
, unsigned int cflag
)
296 unsigned int fcr_val
= 0;
298 set_sh771x_scif_pfc(port
);
299 if (cflag
& CRTSCTS
) {
300 fcr_val
|= SCFCR_MCE
;
302 sci_out(port
, SCFCR
, fcr_val
);
304 #elif defined(CONFIG_CPU_SH3)
305 /* For SH7705, SH7706, SH7707, SH7709, SH7709A, SH7729 */
306 static void sci_init_pins_scif(struct uart_port
*port
, unsigned int cflag
)
308 unsigned int fcr_val
= 0;
311 /* We need to set SCPCR to enable RTS/CTS */
312 data
= ctrl_inw(SCPCR
);
313 /* Clear out SCP7MD1,0, SCP6MD1,0, SCP4MD1,0*/
314 ctrl_outw(data
& 0x0fcf, SCPCR
);
317 fcr_val
|= SCFCR_MCE
;
319 /* We need to set SCPCR to enable RTS/CTS */
320 data
= ctrl_inw(SCPCR
);
321 /* Clear out SCP7MD1,0, SCP4MD1,0,
322 Set SCP6MD1,0 = {01} (output) */
323 ctrl_outw((data
& 0x0fcf) | 0x1000, SCPCR
);
325 data
= ctrl_inb(SCPDR
);
326 /* Set /RTS2 (bit6) = 0 */
327 ctrl_outb(data
& 0xbf, SCPDR
);
330 sci_out(port
, SCFCR
, fcr_val
);
332 #elif defined(CONFIG_CPU_SUBTYPE_SH7722)
333 static void sci_init_pins_scif(struct uart_port
*port
, unsigned int cflag
)
335 unsigned int fcr_val
= 0;
337 if (cflag
& CRTSCTS
) {
338 fcr_val
|= SCFCR_MCE
;
340 ctrl_outw(0x0000, PORT_PSCR
);
344 data
= ctrl_inw(PORT_PSCR
);
347 ctrl_outw(data
, PORT_PSCR
);
349 ctrl_outw(ctrl_inw(SCSPTR0
) & 0x17, SCSPTR0
);
352 sci_out(port
, SCFCR
, fcr_val
);
356 static void sci_init_pins_scif(struct uart_port
*port
, unsigned int cflag
)
358 unsigned int fcr_val
= 0;
360 if (cflag
& CRTSCTS
) {
361 fcr_val
|= SCFCR_MCE
;
363 #ifdef CONFIG_CPU_SUBTYPE_SH7343
365 #elif defined(CONFIG_CPU_SUBTYPE_SH7780) || defined(CONFIG_CPU_SUBTYPE_SH7785)
366 ctrl_outw(0x0080, SCSPTR0
); /* Set RTS = 1 */
368 ctrl_outw(0x0080, SCSPTR2
); /* Set RTS = 1 */
371 sci_out(port
, SCFCR
, fcr_val
);
375 #if defined(CONFIG_CPU_SUBTYPE_SH7760) || \
376 defined(CONFIG_CPU_SUBTYPE_SH7780) || \
377 defined(CONFIG_CPU_SUBTYPE_SH7785)
378 static inline int scif_txroom(struct uart_port
*port
)
380 return SCIF_TXROOM_MAX
- (sci_in(port
, SCTFDR
) & 0x7f);
383 static inline int scif_rxroom(struct uart_port
*port
)
385 return sci_in(port
, SCRFDR
) & 0x7f;
388 static inline int scif_txroom(struct uart_port
*port
)
390 return SCIF_TXROOM_MAX
- (sci_in(port
, SCFDR
) >> 8);
393 static inline int scif_rxroom(struct uart_port
*port
)
395 return sci_in(port
, SCFDR
) & SCIF_RFDC_MASK
;
398 #endif /* SCIF_ONLY || SCI_AND_SCIF */
400 static inline int sci_txroom(struct uart_port
*port
)
402 return ((sci_in(port
, SCxSR
) & SCI_TDRE
) != 0);
405 static inline int sci_rxroom(struct uart_port
*port
)
407 return ((sci_in(port
, SCxSR
) & SCxSR_RDxF(port
)) != 0);
410 /* ********************************************************************** *
411 * the interrupt related routines *
412 * ********************************************************************** */
414 static void sci_transmit_chars(struct uart_port
*port
)
416 struct circ_buf
*xmit
= &port
->info
->xmit
;
417 unsigned int stopped
= uart_tx_stopped(port
);
418 unsigned short status
;
422 status
= sci_in(port
, SCxSR
);
423 if (!(status
& SCxSR_TDxE(port
))) {
424 ctrl
= sci_in(port
, SCSCR
);
425 if (uart_circ_empty(xmit
)) {
426 ctrl
&= ~SCI_CTRL_FLAGS_TIE
;
428 ctrl
|= SCI_CTRL_FLAGS_TIE
;
430 sci_out(port
, SCSCR
, ctrl
);
435 if (port
->type
== PORT_SCIF
)
436 count
= scif_txroom(port
);
439 count
= sci_txroom(port
);
447 } else if (!uart_circ_empty(xmit
) && !stopped
) {
448 c
= xmit
->buf
[xmit
->tail
];
449 xmit
->tail
= (xmit
->tail
+ 1) & (UART_XMIT_SIZE
- 1);
454 sci_out(port
, SCxTDR
, c
);
457 } while (--count
> 0);
459 sci_out(port
, SCxSR
, SCxSR_TDxE_CLEAR(port
));
461 if (uart_circ_chars_pending(xmit
) < WAKEUP_CHARS
)
462 uart_write_wakeup(port
);
463 if (uart_circ_empty(xmit
)) {
466 ctrl
= sci_in(port
, SCSCR
);
468 #if !defined(SCI_ONLY)
469 if (port
->type
== PORT_SCIF
) {
470 sci_in(port
, SCxSR
); /* Dummy read */
471 sci_out(port
, SCxSR
, SCxSR_TDxE_CLEAR(port
));
475 ctrl
|= SCI_CTRL_FLAGS_TIE
;
476 sci_out(port
, SCSCR
, ctrl
);
480 /* On SH3, SCIF may read end-of-break as a space->mark char */
481 #define STEPFN(c) ({int __c=(c); (((__c-1)|(__c)) == -1); })
483 static inline void sci_receive_chars(struct uart_port
*port
)
485 struct sci_port
*sci_port
= (struct sci_port
*)port
;
486 struct tty_struct
*tty
= port
->info
->tty
;
487 int i
, count
, copied
= 0;
488 unsigned short status
;
491 status
= sci_in(port
, SCxSR
);
492 if (!(status
& SCxSR_RDxF(port
)))
496 #if !defined(SCI_ONLY)
497 if (port
->type
== PORT_SCIF
)
498 count
= scif_rxroom(port
);
501 count
= sci_rxroom(port
);
503 /* Don't copy more bytes than there is room for in the buffer */
504 count
= tty_buffer_request_room(tty
, count
);
506 /* If for any reason we can't copy more data, we're done! */
510 if (port
->type
== PORT_SCI
) {
511 char c
= sci_in(port
, SCxRDR
);
512 if (uart_handle_sysrq_char(port
, c
) || sci_port
->break_flag
)
515 tty_insert_flip_char(tty
, c
, TTY_NORMAL
);
518 for (i
=0; i
<count
; i
++) {
519 char c
= sci_in(port
, SCxRDR
);
520 status
= sci_in(port
, SCxSR
);
521 #if defined(CONFIG_CPU_SH3)
522 /* Skip "chars" during break */
523 if (sci_port
->break_flag
) {
525 (status
& SCxSR_FER(port
))) {
530 /* Nonzero => end-of-break */
531 pr_debug("scif: debounce<%02x>\n", c
);
532 sci_port
->break_flag
= 0;
539 #endif /* CONFIG_CPU_SH3 */
540 if (uart_handle_sysrq_char(port
, c
)) {
545 /* Store data and status */
546 if (status
&SCxSR_FER(port
)) {
548 pr_debug("sci: frame error\n");
549 } else if (status
&SCxSR_PER(port
)) {
551 pr_debug("sci: parity error\n");
554 tty_insert_flip_char(tty
, c
, flag
);
558 sci_in(port
, SCxSR
); /* dummy read */
559 sci_out(port
, SCxSR
, SCxSR_RDxF_CLEAR(port
));
562 port
->icount
.rx
+= count
;
566 /* Tell the rest of the system the news. New characters! */
567 tty_flip_buffer_push(tty
);
569 sci_in(port
, SCxSR
); /* dummy read */
570 sci_out(port
, SCxSR
, SCxSR_RDxF_CLEAR(port
));
574 #define SCI_BREAK_JIFFIES (HZ/20)
575 /* The sci generates interrupts during the break,
576 * 1 per millisecond or so during the break period, for 9600 baud.
577 * So dont bother disabling interrupts.
578 * But dont want more than 1 break event.
579 * Use a kernel timer to periodically poll the rx line until
580 * the break is finished.
582 static void sci_schedule_break_timer(struct sci_port
*port
)
584 port
->break_timer
.expires
= jiffies
+ SCI_BREAK_JIFFIES
;
585 add_timer(&port
->break_timer
);
587 /* Ensure that two consecutive samples find the break over. */
588 static void sci_break_timer(unsigned long data
)
590 struct sci_port
*port
= (struct sci_port
*)data
;
592 if (sci_rxd_in(&port
->port
) == 0) {
593 port
->break_flag
= 1;
594 sci_schedule_break_timer(port
);
595 } else if (port
->break_flag
== 1) {
597 port
->break_flag
= 2;
598 sci_schedule_break_timer(port
);
600 port
->break_flag
= 0;
603 static inline int sci_handle_errors(struct uart_port
*port
)
606 unsigned short status
= sci_in(port
, SCxSR
);
607 struct tty_struct
*tty
= port
->info
->tty
;
609 if (status
& SCxSR_ORER(port
)) {
611 if (tty_insert_flip_char(tty
, 0, TTY_OVERRUN
))
613 pr_debug("sci: overrun error\n");
616 if (status
& SCxSR_FER(port
)) {
617 if (sci_rxd_in(port
) == 0) {
618 /* Notify of BREAK */
619 struct sci_port
*sci_port
= (struct sci_port
*)port
;
621 if (!sci_port
->break_flag
) {
622 sci_port
->break_flag
= 1;
623 sci_schedule_break_timer(sci_port
);
625 /* Do sysrq handling. */
626 if (uart_handle_break(port
))
628 pr_debug("sci: BREAK detected\n");
629 if (tty_insert_flip_char(tty
, 0, TTY_BREAK
))
634 if (tty_insert_flip_char(tty
, 0, TTY_FRAME
))
636 pr_debug("sci: frame error\n");
640 if (status
& SCxSR_PER(port
)) {
642 if (tty_insert_flip_char(tty
, 0, TTY_PARITY
))
644 pr_debug("sci: parity error\n");
648 tty_flip_buffer_push(tty
);
653 static inline int sci_handle_breaks(struct uart_port
*port
)
656 unsigned short status
= sci_in(port
, SCxSR
);
657 struct tty_struct
*tty
= port
->info
->tty
;
658 struct sci_port
*s
= &sci_ports
[port
->line
];
660 if (uart_handle_break(port
))
663 if (!s
->break_flag
&& status
& SCxSR_BRK(port
)) {
664 #if defined(CONFIG_CPU_SH3)
668 /* Notify of BREAK */
669 if (tty_insert_flip_char(tty
, 0, TTY_BREAK
))
671 pr_debug("sci: BREAK detected\n");
674 #if defined(SCIF_ORER)
675 /* XXX: Handle SCIF overrun error */
676 if (port
->type
== PORT_SCIF
&& (sci_in(port
, SCLSR
) & SCIF_ORER
) != 0) {
677 sci_out(port
, SCLSR
, 0);
678 if (tty_insert_flip_char(tty
, 0, TTY_OVERRUN
)) {
680 pr_debug("sci: overrun error\n");
686 tty_flip_buffer_push(tty
);
691 static irqreturn_t
sci_rx_interrupt(int irq
, void *port
)
693 /* I think sci_receive_chars has to be called irrespective
694 * of whether the I_IXOFF is set, otherwise, how is the interrupt
697 sci_receive_chars(port
);
702 static irqreturn_t
sci_tx_interrupt(int irq
, void *ptr
)
704 struct uart_port
*port
= ptr
;
706 spin_lock_irq(&port
->lock
);
707 sci_transmit_chars(port
);
708 spin_unlock_irq(&port
->lock
);
713 static irqreturn_t
sci_er_interrupt(int irq
, void *ptr
)
715 struct uart_port
*port
= ptr
;
718 if (port
->type
== PORT_SCI
) {
719 if (sci_handle_errors(port
)) {
720 /* discard character in rx buffer */
722 sci_out(port
, SCxSR
, SCxSR_RDxF_CLEAR(port
));
725 #if defined(SCIF_ORER)
726 if((sci_in(port
, SCLSR
) & SCIF_ORER
) != 0) {
727 struct tty_struct
*tty
= port
->info
->tty
;
729 sci_out(port
, SCLSR
, 0);
730 tty_insert_flip_char(tty
, 0, TTY_OVERRUN
);
731 tty_flip_buffer_push(tty
);
732 pr_debug("scif: overrun error\n");
735 sci_rx_interrupt(irq
, ptr
);
738 sci_out(port
, SCxSR
, SCxSR_ERROR_CLEAR(port
));
740 /* Kick the transmission */
741 sci_tx_interrupt(irq
, ptr
);
746 static irqreturn_t
sci_br_interrupt(int irq
, void *ptr
)
748 struct uart_port
*port
= ptr
;
751 sci_handle_breaks(port
);
752 sci_out(port
, SCxSR
, SCxSR_BREAK_CLEAR(port
));
757 static irqreturn_t
sci_mpxed_interrupt(int irq
, void *ptr
)
759 unsigned short ssr_status
, scr_status
;
760 struct uart_port
*port
= ptr
;
762 ssr_status
= sci_in(port
,SCxSR
);
763 scr_status
= sci_in(port
,SCSCR
);
766 if ((ssr_status
& 0x0020) && (scr_status
& 0x0080))
767 sci_tx_interrupt(irq
, ptr
);
769 if ((ssr_status
& 0x0002) && (scr_status
& 0x0040))
770 sci_rx_interrupt(irq
, ptr
);
771 /* Error Interrupt */
772 if ((ssr_status
& 0x0080) && (scr_status
& 0x0400))
773 sci_er_interrupt(irq
, ptr
);
774 /* Break Interrupt */
775 if ((ssr_status
& 0x0010) && (scr_status
& 0x0200))
776 sci_br_interrupt(irq
, ptr
);
781 #ifdef CONFIG_CPU_FREQ
783 * Here we define a transistion notifier so that we can update all of our
784 * ports' baud rate when the peripheral clock changes.
786 static int sci_notifier(struct notifier_block
*self
,
787 unsigned long phase
, void *p
)
789 struct cpufreq_freqs
*freqs
= p
;
792 if ((phase
== CPUFREQ_POSTCHANGE
) ||
793 (phase
== CPUFREQ_RESUMECHANGE
)){
794 for (i
= 0; i
< SCI_NPORTS
; i
++) {
795 struct uart_port
*port
= &sci_ports
[i
].port
;
799 * Update the uartclk per-port if frequency has
800 * changed, since it will no longer necessarily be
801 * consistent with the old frequency.
803 * Really we want to be able to do something like
804 * uart_change_speed() or something along those lines
805 * here to implicitly reset the per-port baud rate..
807 * Clean this up later..
809 clk
= clk_get(NULL
, "module_clk");
810 port
->uartclk
= clk_get_rate(clk
) * 16;
814 printk(KERN_INFO
"%s: got a postchange notification "
815 "for cpu %d (old %d, new %d)\n",
816 __FUNCTION__
, freqs
->cpu
, freqs
->old
, freqs
->new);
822 static struct notifier_block sci_nb
= { &sci_notifier
, NULL
, 0 };
823 #endif /* CONFIG_CPU_FREQ */
825 static int sci_request_irq(struct sci_port
*port
)
828 irqreturn_t (*handlers
[4])(int irq
, void *ptr
) = {
829 sci_er_interrupt
, sci_rx_interrupt
, sci_tx_interrupt
,
832 const char *desc
[] = { "SCI Receive Error", "SCI Receive Data Full",
833 "SCI Transmit Data Empty", "SCI Break" };
835 if (port
->irqs
[0] == port
->irqs
[1]) {
836 if (!port
->irqs
[0]) {
837 printk(KERN_ERR
"sci: Cannot allocate irq.(IRQ=0)\n");
841 if (request_irq(port
->irqs
[0], sci_mpxed_interrupt
,
842 IRQF_DISABLED
, "sci", port
)) {
843 printk(KERN_ERR
"sci: Cannot allocate irq.\n");
847 for (i
= 0; i
< ARRAY_SIZE(handlers
); i
++) {
850 if (request_irq(port
->irqs
[i
], handlers
[i
],
851 IRQF_DISABLED
, desc
[i
], port
)) {
852 printk(KERN_ERR
"sci: Cannot allocate irq.\n");
861 static void sci_free_irq(struct sci_port
*port
)
865 if (port
->irqs
[0] == port
->irqs
[1]) {
867 printk("sci: sci_free_irq error\n");
869 free_irq(port
->irqs
[0], port
);
871 for (i
= 0; i
< ARRAY_SIZE(port
->irqs
); i
++) {
875 free_irq(port
->irqs
[i
], port
);
880 static unsigned int sci_tx_empty(struct uart_port
*port
)
886 static void sci_set_mctrl(struct uart_port
*port
, unsigned int mctrl
)
888 /* This routine is used for seting signals of: DTR, DCD, CTS/RTS */
889 /* We use SCIF's hardware for CTS/RTS, so don't need any for that. */
890 /* If you have signals for DTR and DCD, please implement here. */
893 static unsigned int sci_get_mctrl(struct uart_port
*port
)
895 /* This routine is used for geting signals of: DTR, DCD, DSR, RI,
898 return TIOCM_DTR
| TIOCM_RTS
| TIOCM_DSR
;
901 static void sci_start_tx(struct uart_port
*port
)
905 /* Set TIE (Transmit Interrupt Enable) bit in SCSCR */
906 ctrl
= sci_in(port
, SCSCR
);
907 ctrl
|= SCI_CTRL_FLAGS_TIE
;
908 sci_out(port
, SCSCR
, ctrl
);
911 static void sci_stop_tx(struct uart_port
*port
)
915 /* Clear TIE (Transmit Interrupt Enable) bit in SCSCR */
916 ctrl
= sci_in(port
, SCSCR
);
917 ctrl
&= ~SCI_CTRL_FLAGS_TIE
;
918 sci_out(port
, SCSCR
, ctrl
);
921 static void sci_start_rx(struct uart_port
*port
, unsigned int tty_start
)
925 /* Set RIE (Receive Interrupt Enable) bit in SCSCR */
926 ctrl
= sci_in(port
, SCSCR
);
927 ctrl
|= SCI_CTRL_FLAGS_RIE
| SCI_CTRL_FLAGS_REIE
;
928 sci_out(port
, SCSCR
, ctrl
);
931 static void sci_stop_rx(struct uart_port
*port
)
935 /* Clear RIE (Receive Interrupt Enable) bit in SCSCR */
936 ctrl
= sci_in(port
, SCSCR
);
937 ctrl
&= ~(SCI_CTRL_FLAGS_RIE
| SCI_CTRL_FLAGS_REIE
);
938 sci_out(port
, SCSCR
, ctrl
);
941 static void sci_enable_ms(struct uart_port
*port
)
943 /* Nothing here yet .. */
946 static void sci_break_ctl(struct uart_port
*port
, int break_state
)
948 /* Nothing here yet .. */
951 static int sci_startup(struct uart_port
*port
)
953 struct sci_port
*s
= &sci_ports
[port
->line
];
960 sci_start_rx(port
, 1);
965 static void sci_shutdown(struct uart_port
*port
)
967 struct sci_port
*s
= &sci_ports
[port
->line
];
977 static void sci_set_termios(struct uart_port
*port
, struct ktermios
*termios
,
978 struct ktermios
*old
)
980 struct sci_port
*s
= &sci_ports
[port
->line
];
981 unsigned int status
, baud
, smr_val
;
984 baud
= uart_get_baud_rate(port
, termios
, old
, 0, port
->uartclk
/16);
992 #if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
993 struct clk
*clk
= clk_get(NULL
, "module_clk");
994 t
= SCBRR_VALUE(baud
, clk_get_rate(clk
));
997 t
= SCBRR_VALUE(baud
);
1004 status
= sci_in(port
, SCxSR
);
1005 } while (!(status
& SCxSR_TEND(port
)));
1007 sci_out(port
, SCSCR
, 0x00); /* TE=0, RE=0, CKE1=0 */
1009 #if !defined(SCI_ONLY)
1010 if (port
->type
== PORT_SCIF
)
1011 sci_out(port
, SCFCR
, SCFCR_RFRST
| SCFCR_TFRST
);
1014 smr_val
= sci_in(port
, SCSMR
) & 3;
1015 if ((termios
->c_cflag
& CSIZE
) == CS7
)
1017 if (termios
->c_cflag
& PARENB
)
1019 if (termios
->c_cflag
& PARODD
)
1021 if (termios
->c_cflag
& CSTOPB
)
1024 uart_update_timeout(port
, termios
->c_cflag
, baud
);
1026 sci_out(port
, SCSMR
, smr_val
);
1030 sci_out(port
, SCSMR
, (sci_in(port
, SCSMR
) & ~3) | 1);
1033 sci_out(port
, SCSMR
, sci_in(port
, SCSMR
) & ~3);
1035 sci_out(port
, SCBRR
, t
);
1036 udelay((1000000+(baud
-1)) / baud
); /* Wait one bit interval */
1039 if (likely(s
->init_pins
))
1040 s
->init_pins(port
, termios
->c_cflag
);
1042 sci_out(port
, SCSCR
, SCSCR_INIT(port
));
1044 if ((termios
->c_cflag
& CREAD
) != 0)
1045 sci_start_rx(port
,0);
1048 static const char *sci_type(struct uart_port
*port
)
1050 switch (port
->type
) {
1051 case PORT_SCI
: return "sci";
1052 case PORT_SCIF
: return "scif";
1053 case PORT_IRDA
: return "irda";
1059 static void sci_release_port(struct uart_port
*port
)
1061 /* Nothing here yet .. */
1064 static int sci_request_port(struct uart_port
*port
)
1066 /* Nothing here yet .. */
1070 static void sci_config_port(struct uart_port
*port
, int flags
)
1072 struct sci_port
*s
= &sci_ports
[port
->line
];
1074 port
->type
= s
->type
;
1076 switch (port
->type
) {
1078 s
->init_pins
= sci_init_pins_sci
;
1081 s
->init_pins
= sci_init_pins_scif
;
1084 s
->init_pins
= sci_init_pins_irda
;
1088 #if defined(CONFIG_CPU_SUBTYPE_SH5_101) || defined(CONFIG_CPU_SUBTYPE_SH5_103)
1089 if (port
->mapbase
== 0)
1090 port
->mapbase
= onchip_remap(SCIF_ADDR_SH5
, 1024, "SCIF");
1092 port
->membase
= (void __iomem
*)port
->mapbase
;
1096 static int sci_verify_port(struct uart_port
*port
, struct serial_struct
*ser
)
1098 struct sci_port
*s
= &sci_ports
[port
->line
];
1100 if (ser
->irq
!= s
->irqs
[SCIx_TXI_IRQ
] || ser
->irq
> NR_IRQS
)
1102 if (ser
->baud_base
< 2400)
1103 /* No paper tape reader for Mitch.. */
1109 static struct uart_ops sci_uart_ops
= {
1110 .tx_empty
= sci_tx_empty
,
1111 .set_mctrl
= sci_set_mctrl
,
1112 .get_mctrl
= sci_get_mctrl
,
1113 .start_tx
= sci_start_tx
,
1114 .stop_tx
= sci_stop_tx
,
1115 .stop_rx
= sci_stop_rx
,
1116 .enable_ms
= sci_enable_ms
,
1117 .break_ctl
= sci_break_ctl
,
1118 .startup
= sci_startup
,
1119 .shutdown
= sci_shutdown
,
1120 .set_termios
= sci_set_termios
,
1122 .release_port
= sci_release_port
,
1123 .request_port
= sci_request_port
,
1124 .config_port
= sci_config_port
,
1125 .verify_port
= sci_verify_port
,
1128 static void __init
sci_init_ports(void)
1130 static int first
= 1;
1138 for (i
= 0; i
< SCI_NPORTS
; i
++) {
1139 sci_ports
[i
].port
.ops
= &sci_uart_ops
;
1140 sci_ports
[i
].port
.iotype
= UPIO_MEM
;
1141 sci_ports
[i
].port
.line
= i
;
1142 sci_ports
[i
].port
.fifosize
= 1;
1144 #if defined(__H8300H__) || defined(__H8300S__)
1146 sci_ports
[i
].enable
= h8300_sci_enable
;
1147 sci_ports
[i
].disable
= h8300_sci_disable
;
1149 sci_ports
[i
].port
.uartclk
= CONFIG_CPU_CLOCK
;
1150 #elif defined(CONFIG_SUPERH64)
1151 sci_ports
[i
].port
.uartclk
= current_cpu_data
.module_clock
* 16;
1154 * XXX: We should use a proper SCI/SCIF clock
1157 struct clk
*clk
= clk_get(NULL
, "module_clk");
1158 sci_ports
[i
].port
.uartclk
= clk_get_rate(clk
) * 16;
1163 sci_ports
[i
].break_timer
.data
= (unsigned long)&sci_ports
[i
];
1164 sci_ports
[i
].break_timer
.function
= sci_break_timer
;
1166 init_timer(&sci_ports
[i
].break_timer
);
1170 int __init
early_sci_setup(struct uart_port
*port
)
1172 if (unlikely(port
->line
> SCI_NPORTS
))
1177 sci_ports
[port
->line
].port
.membase
= port
->membase
;
1178 sci_ports
[port
->line
].port
.mapbase
= port
->mapbase
;
1179 sci_ports
[port
->line
].port
.type
= port
->type
;
1184 #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
1186 * Print a string to the serial port trying not to disturb
1187 * any possible real use of the port...
1189 static void serial_console_write(struct console
*co
, const char *s
,
1192 put_string(serial_console_port
, s
, count
);
1195 static int __init
serial_console_setup(struct console
*co
, char *options
)
1197 struct uart_port
*port
;
1205 * Check whether an invalid uart number has been specified, and
1206 * if so, search for the first available port that does have
1209 if (co
->index
>= SCI_NPORTS
)
1212 serial_console_port
= &sci_ports
[co
->index
];
1213 port
= &serial_console_port
->port
;
1216 * Also need to check port->type, we don't actually have any
1217 * UPIO_PORT ports, but uart_report_port() handily misreports
1218 * it anyways if we don't have a port available by the time this is
1223 if (!port
->membase
|| !port
->mapbase
)
1226 port
->type
= serial_console_port
->type
;
1228 if (port
->flags
& UPF_IOREMAP
)
1229 sci_config_port(port
, 0);
1231 if (serial_console_port
->enable
)
1232 serial_console_port
->enable(port
);
1235 uart_parse_options(options
, &baud
, &parity
, &bits
, &flow
);
1237 ret
= uart_set_options(port
, co
, baud
, parity
, bits
, flow
);
1238 #if defined(__H8300H__) || defined(__H8300S__)
1239 /* disable rx interrupt */
1246 static struct console serial_console
= {
1248 .device
= uart_console_device
,
1249 .write
= serial_console_write
,
1250 .setup
= serial_console_setup
,
1251 .flags
= CON_PRINTBUFFER
,
1253 .data
= &sci_uart_driver
,
1256 static int __init
sci_console_init(void)
1259 register_console(&serial_console
);
1262 console_initcall(sci_console_init
);
1263 #endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */
1265 #ifdef CONFIG_SH_KGDB
1267 * FIXME: Most of this can go away.. at the moment, we rely on
1268 * arch/sh/kernel/setup.c to do the command line parsing for kgdb, though
1269 * most of that can easily be done here instead.
1271 * For the time being, just accept the values that were parsed earlier..
1273 static void __init
kgdb_console_get_options(struct uart_port
*port
, int *baud
,
1274 int *parity
, int *bits
)
1277 *parity
= tolower(kgdb_parity
);
1278 *bits
= kgdb_bits
- '0';
1282 * The naming here is somewhat misleading, since kgdb_console_setup() takes
1283 * care of the early-on initialization for kgdb, regardless of whether we
1284 * actually use kgdb as a console or not.
1286 * On the plus side, this lets us kill off the old kgdb_sci_setup() nonsense.
1288 int __init
kgdb_console_setup(struct console
*co
, char *options
)
1290 struct uart_port
*port
= &sci_ports
[kgdb_portnum
].port
;
1296 if (co
->index
!= kgdb_portnum
)
1297 co
->index
= kgdb_portnum
;
1299 kgdb_sci_port
= &sci_ports
[co
->index
];
1300 port
= &kgdb_sci_port
->port
;
1303 * Also need to check port->type, we don't actually have any
1304 * UPIO_PORT ports, but uart_report_port() handily misreports
1305 * it anyways if we don't have a port available by the time this is
1310 if (!port
->membase
|| !port
->mapbase
)
1314 uart_parse_options(options
, &baud
, &parity
, &bits
, &flow
);
1316 kgdb_console_get_options(port
, &baud
, &parity
, &bits
);
1318 kgdb_getchar
= kgdb_sci_getchar
;
1319 kgdb_putchar
= kgdb_sci_putchar
;
1321 return uart_set_options(port
, co
, baud
, parity
, bits
, flow
);
1323 #endif /* CONFIG_SH_KGDB */
1325 #ifdef CONFIG_SH_KGDB_CONSOLE
1326 static struct console kgdb_console
= {
1328 .device
= uart_console_device
,
1329 .write
= kgdb_console_write
,
1330 .setup
= kgdb_console_setup
,
1331 .flags
= CON_PRINTBUFFER
,
1333 .data
= &sci_uart_driver
,
1336 /* Register the KGDB console so we get messages (d'oh!) */
1337 static int __init
kgdb_console_init(void)
1340 register_console(&kgdb_console
);
1343 console_initcall(kgdb_console_init
);
1344 #endif /* CONFIG_SH_KGDB_CONSOLE */
1346 #if defined(CONFIG_SH_KGDB_CONSOLE)
1347 #define SCI_CONSOLE &kgdb_console
1348 #elif defined(CONFIG_SERIAL_SH_SCI_CONSOLE)
1349 #define SCI_CONSOLE &serial_console
1351 #define SCI_CONSOLE 0
1354 static char banner
[] __initdata
=
1355 KERN_INFO
"SuperH SCI(F) driver initialized\n";
1357 static struct uart_driver sci_uart_driver
= {
1358 .owner
= THIS_MODULE
,
1359 .driver_name
= "sci",
1360 .dev_name
= "ttySC",
1362 .minor
= SCI_MINOR_START
,
1364 .cons
= SCI_CONSOLE
,
1368 * Register a set of serial devices attached to a platform device. The
1369 * list is terminated with a zero flags entry, which means we expect
1370 * all entries to have at least UPF_BOOT_AUTOCONF set. Platforms that need
1371 * remapping (such as sh64) should also set UPF_IOREMAP.
1373 static int __devinit
sci_probe(struct platform_device
*dev
)
1375 struct plat_sci_port
*p
= dev
->dev
.platform_data
;
1378 for (i
= 0; p
&& p
->flags
!= 0; p
++, i
++) {
1379 struct sci_port
*sciport
= &sci_ports
[i
];
1382 if (unlikely(i
== SCI_NPORTS
)) {
1383 dev_notice(&dev
->dev
, "Attempting to register port "
1384 "%d when only %d are available.\n",
1386 dev_notice(&dev
->dev
, "Consider bumping "
1387 "CONFIG_SERIAL_SH_SCI_NR_UARTS!\n");
1391 sciport
->port
.mapbase
= p
->mapbase
;
1394 * For the simple (and majority of) cases where we don't need
1395 * to do any remapping, just cast the cookie directly.
1397 if (p
->mapbase
&& !p
->membase
&& !(p
->flags
& UPF_IOREMAP
))
1398 p
->membase
= (void __iomem
*)p
->mapbase
;
1400 sciport
->port
.membase
= p
->membase
;
1402 sciport
->port
.irq
= p
->irqs
[SCIx_TXI_IRQ
];
1403 sciport
->port
.flags
= p
->flags
;
1404 sciport
->port
.dev
= &dev
->dev
;
1406 sciport
->type
= sciport
->port
.type
= p
->type
;
1408 memcpy(&sciport
->irqs
, &p
->irqs
, sizeof(p
->irqs
));
1410 uart_add_one_port(&sci_uart_driver
, &sciport
->port
);
1413 #if defined(CONFIG_SH_KGDB) && !defined(CONFIG_SH_KGDB_CONSOLE)
1414 kgdb_sci_port
= &sci_ports
[kgdb_portnum
];
1415 kgdb_getchar
= kgdb_sci_getchar
;
1416 kgdb_putchar
= kgdb_sci_putchar
;
1419 #ifdef CONFIG_CPU_FREQ
1420 cpufreq_register_notifier(&sci_nb
, CPUFREQ_TRANSITION_NOTIFIER
);
1421 dev_info(&dev
->dev
, "sci: CPU frequency notifier registered\n");
1424 #ifdef CONFIG_SH_STANDARD_BIOS
1425 sh_bios_gdb_detach();
1431 static int __devexit
sci_remove(struct platform_device
*dev
)
1435 for (i
= 0; i
< SCI_NPORTS
; i
++)
1436 uart_remove_one_port(&sci_uart_driver
, &sci_ports
[i
].port
);
1441 static int sci_suspend(struct platform_device
*dev
, pm_message_t state
)
1445 for (i
= 0; i
< SCI_NPORTS
; i
++) {
1446 struct sci_port
*p
= &sci_ports
[i
];
1448 if (p
->type
!= PORT_UNKNOWN
&& p
->port
.dev
== &dev
->dev
)
1449 uart_suspend_port(&sci_uart_driver
, &p
->port
);
1455 static int sci_resume(struct platform_device
*dev
)
1459 for (i
= 0; i
< SCI_NPORTS
; i
++) {
1460 struct sci_port
*p
= &sci_ports
[i
];
1462 if (p
->type
!= PORT_UNKNOWN
&& p
->port
.dev
== &dev
->dev
)
1463 uart_resume_port(&sci_uart_driver
, &p
->port
);
1469 static struct platform_driver sci_driver
= {
1471 .remove
= __devexit_p(sci_remove
),
1472 .suspend
= sci_suspend
,
1473 .resume
= sci_resume
,
1476 .owner
= THIS_MODULE
,
1480 static int __init
sci_init(void)
1488 ret
= uart_register_driver(&sci_uart_driver
);
1489 if (likely(ret
== 0)) {
1490 ret
= platform_driver_register(&sci_driver
);
1492 uart_unregister_driver(&sci_uart_driver
);
1498 static void __exit
sci_exit(void)
1500 platform_driver_unregister(&sci_driver
);
1501 uart_unregister_driver(&sci_uart_driver
);
1504 module_init(sci_init
);
1505 module_exit(sci_exit
);
1507 MODULE_LICENSE("GPL");