sh: MS7712SE01 board support.
[linux-2.6/mini2440.git] / arch / sh / boards / se / 770x / setup.c
blobf1c7c8d9fdd27a388fcc6a084078f59b862e8d76
1 /*
2 * linux/arch/sh/boards/se/770x/setup.c
4 * Copyright (C) 2000 Kazumoto Kojima
6 * Hitachi SolutionEngine Support.
8 */
9 #include <linux/init.h>
10 #include <linux/platform_device.h>
11 #include <asm/machvec.h>
12 #include <asm/se.h>
13 #include <asm/io.h>
14 #include <asm/smc37c93x.h>
16 void init_se_IRQ(void);
19 * Configure the Super I/O chip
21 static void __init smsc_config(int index, int data)
23 outb_p(index, INDEX_PORT);
24 outb_p(data, DATA_PORT);
27 /* XXX: Another candidate for a more generic cchip machine vector */
28 static void __init smsc_setup(char **cmdline_p)
30 outb_p(CONFIG_ENTER, CONFIG_PORT);
31 outb_p(CONFIG_ENTER, CONFIG_PORT);
33 /* FDC */
34 smsc_config(CURRENT_LDN_INDEX, LDN_FDC);
35 smsc_config(ACTIVATE_INDEX, 0x01);
36 smsc_config(IRQ_SELECT_INDEX, 6); /* IRQ6 */
38 /* AUXIO (GPIO): to use IDE1 */
39 smsc_config(CURRENT_LDN_INDEX, LDN_AUXIO);
40 smsc_config(GPIO46_INDEX, 0x00); /* nIOROP */
41 smsc_config(GPIO47_INDEX, 0x00); /* nIOWOP */
43 /* COM1 */
44 smsc_config(CURRENT_LDN_INDEX, LDN_COM1);
45 smsc_config(ACTIVATE_INDEX, 0x01);
46 smsc_config(IO_BASE_HI_INDEX, 0x03);
47 smsc_config(IO_BASE_LO_INDEX, 0xf8);
48 smsc_config(IRQ_SELECT_INDEX, 4); /* IRQ4 */
50 /* COM2 */
51 smsc_config(CURRENT_LDN_INDEX, LDN_COM2);
52 smsc_config(ACTIVATE_INDEX, 0x01);
53 smsc_config(IO_BASE_HI_INDEX, 0x02);
54 smsc_config(IO_BASE_LO_INDEX, 0xf8);
55 smsc_config(IRQ_SELECT_INDEX, 3); /* IRQ3 */
57 /* RTC */
58 smsc_config(CURRENT_LDN_INDEX, LDN_RTC);
59 smsc_config(ACTIVATE_INDEX, 0x01);
60 smsc_config(IRQ_SELECT_INDEX, 8); /* IRQ8 */
62 /* XXX: PARPORT, KBD, and MOUSE will come here... */
63 outb_p(CONFIG_EXIT, CONFIG_PORT);
67 static struct resource cf_ide_resources[] = {
68 [0] = {
69 .start = PA_MRSHPC_IO + 0x1f0,
70 .end = PA_MRSHPC_IO + 0x1f0 + 8,
71 .flags = IORESOURCE_MEM,
73 [1] = {
74 .start = PA_MRSHPC_IO + 0x1f0 + 0x206,
75 .end = PA_MRSHPC_IO + 0x1f0 +8 + 0x206 + 8,
76 .flags = IORESOURCE_MEM,
78 [2] = {
79 .start = 7,
80 .flags = IORESOURCE_IRQ,
84 static struct platform_device cf_ide_device = {
85 .name = "pata_platform",
86 .id = -1,
87 .num_resources = ARRAY_SIZE(cf_ide_resources),
88 .resource = cf_ide_resources,
91 static unsigned char heartbeat_bit_pos[] = { 8, 9, 10, 11, 12, 13, 14, 15 };
93 static struct resource heartbeat_resources[] = {
94 [0] = {
95 .start = PA_LED,
96 .end = PA_LED + ARRAY_SIZE(heartbeat_bit_pos) - 1,
97 .flags = IORESOURCE_MEM,
101 static struct platform_device heartbeat_device = {
102 .name = "heartbeat",
103 .id = -1,
104 .dev = {
105 .platform_data = heartbeat_bit_pos,
107 .num_resources = ARRAY_SIZE(heartbeat_resources),
108 .resource = heartbeat_resources,
111 static struct platform_device *se_devices[] __initdata = {
112 &heartbeat_device,
113 &cf_ide_device,
116 static int __init se_devices_setup(void)
118 return platform_add_devices(se_devices, ARRAY_SIZE(se_devices));
120 device_initcall(se_devices_setup);
123 * The Machine Vector
125 struct sh_machine_vector mv_se __initmv = {
126 .mv_name = "SolutionEngine",
127 .mv_setup = smsc_setup,
128 #if defined(CONFIG_CPU_SH4)
129 .mv_nr_irqs = 48,
130 #elif defined(CONFIG_CPU_SUBTYPE_SH7708)
131 .mv_nr_irqs = 32,
132 #elif defined(CONFIG_CPU_SUBTYPE_SH7709)
133 .mv_nr_irqs = 61,
134 #elif defined(CONFIG_CPU_SUBTYPE_SH7705)
135 .mv_nr_irqs = 86,
136 #elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)
137 .mv_nr_irqs = 104,
138 #endif
140 .mv_inb = se_inb,
141 .mv_inw = se_inw,
142 .mv_inl = se_inl,
143 .mv_outb = se_outb,
144 .mv_outw = se_outw,
145 .mv_outl = se_outl,
147 .mv_inb_p = se_inb_p,
148 .mv_inw_p = se_inw,
149 .mv_inl_p = se_inl,
150 .mv_outb_p = se_outb_p,
151 .mv_outw_p = se_outw,
152 .mv_outl_p = se_outl,
154 .mv_insb = se_insb,
155 .mv_insw = se_insw,
156 .mv_insl = se_insl,
157 .mv_outsb = se_outsb,
158 .mv_outsw = se_outsw,
159 .mv_outsl = se_outsl,
161 .mv_init_irq = init_se_IRQ,
163 ALIAS_MV(se)