arch/x86_64/kernel/setup.c

   1 /*
   2  *  linux/arch/x86-64/kernel/setup.c
   3  *
   4  *  Copyright (C) 1995  Linus Torvalds
   5  *
   6  *  Nov 2001 Dave Jones <davej@suse.de>
   7  *  Forked from i386 setup code.
   8  *
   9  *  $Id$
  10  */
  11
  12 /*
  13  * This file handles the architecture-dependent parts of initialization
  14  */
  15
  16 #include <linux/errno.h>
  17 #include <linux/sched.h>
  18 #include <linux/kernel.h>
  19 #include <linux/mm.h>
  20 #include <linux/stddef.h>
  21 #include <linux/unistd.h>
  22 #include <linux/ptrace.h>
  23 #include <linux/slab.h>
  24 #include <linux/user.h>
  25 #include <linux/a.out.h>
  26 #include <linux/tty.h>
  27 #include <linux/ioport.h>
  28 #include <linux/delay.h>
  29 #include <linux/config.h>
  30 #include <linux/init.h>
  31 #include <linux/initrd.h>
  32 #include <linux/highmem.h>
  33 #include <linux/bootmem.h>
  34 #include <linux/module.h>
  35 #include <asm/processor.h>
  36 #include <linux/console.h>
  37 #include <linux/seq_file.h>
  38 #include <linux/root_dev.h>
  39 #include <linux/pci.h>
  40 #include <linux/acpi.h>
  41 #include <linux/kallsyms.h>
  42 #include <linux/edd.h>
  43 #include <linux/mmzone.h>
  44 #include <linux/kexec.h>
  45
  46 #include <asm/mtrr.h>
  47 #include <asm/uaccess.h>
  48 #include <asm/system.h>
  49 #include <asm/io.h>
  50 #include <asm/smp.h>
  51 #include <asm/msr.h>
  52 #include <asm/desc.h>
  53 #include <video/edid.h>
  54 #include <asm/e820.h>
  55 #include <asm/dma.h>
  56 #include <asm/mpspec.h>
  57 #include <asm/mmu_context.h>
  58 #include <asm/bootsetup.h>
  59 #include <asm/proto.h>
  60 #include <asm/setup.h>
  61 #include <asm/mach_apic.h>
  62 #include <asm/numa.h>
  63 #include <asm/sections.h>
  64
  65 /*
  66  * Machine setup..
  67  */
  68
  69 struct cpuinfo_x86 boot_cpu_data __read_mostly;
  70
  71 unsigned long mmu_cr4_features;
  72
  73 int acpi_disabled;
  74 EXPORT_SYMBOL(acpi_disabled);
  75 #ifdef  CONFIG_ACPI
  76 extern int __initdata acpi_ht;
  77 extern acpi_interrupt_flags     acpi_sci_flags;
  78 int __initdata acpi_force = 0;
  79 #endif
  80
  81 int acpi_numa __initdata;
  82
  83 /* Boot loader ID as an integer, for the benefit of proc_dointvec */
  84 int bootloader_type;
  85
  86 unsigned long saved_video_mode;
  87
  88 #ifdef CONFIG_SWIOTLB
  89 int swiotlb;
  90 EXPORT_SYMBOL(swiotlb);
  91 #endif
  92
  93 /*
  94  * Setup options
  95  */
  96 struct drive_info_struct { char dummy[32]; } drive_info;
  97 struct screen_info screen_info;
  98 struct sys_desc_table_struct {
  99         unsigned short length;
 100         unsigned char table[0];
 101 };
 102
 103 struct edid_info edid_info;
 104 struct e820map e820;
 105
 106 extern int root_mountflags;
 107
 108 char command_line[COMMAND_LINE_SIZE];
 109
 110 struct resource standard_io_resources[] = {
 111         { .name = "dma1", .start = 0x00, .end = 0x1f,
 112                 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
 113         { .name = "pic1", .start = 0x20, .end = 0x21,
 114                 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
 115         { .name = "timer0", .start = 0x40, .end = 0x43,
 116                 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
 117         { .name = "timer1", .start = 0x50, .end = 0x53,
 118                 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
 119         { .name = "keyboard", .start = 0x60, .end = 0x6f,
 120                 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
 121         { .name = "dma page reg", .start = 0x80, .end = 0x8f,
 122                 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
 123         { .name = "pic2", .start = 0xa0, .end = 0xa1,
 124                 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
 125         { .name = "dma2", .start = 0xc0, .end = 0xdf,
 126                 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
 127         { .name = "fpu", .start = 0xf0, .end = 0xff,
 128                 .flags = IORESOURCE_BUSY | IORESOURCE_IO }
 129 };
 130
 131 #define STANDARD_IO_RESOURCES \
 132         (sizeof standard_io_resources / sizeof standard_io_resources[0])
 133
 134 #define IORESOURCE_RAM (IORESOURCE_BUSY | IORESOURCE_MEM)
 135
 136 struct resource data_resource = {
 137         .name = "Kernel data",
 138         .start = 0,
 139         .end = 0,
 140         .flags = IORESOURCE_RAM,
 141 };
 142 struct resource code_resource = {
 143         .name = "Kernel code",
 144         .start = 0,
 145         .end = 0,
 146         .flags = IORESOURCE_RAM,
 147 };
 148
 149 #define IORESOURCE_ROM (IORESOURCE_BUSY | IORESOURCE_READONLY | IORESOURCE_MEM)
 150
 151 static struct resource system_rom_resource = {
 152         .name = "System ROM",
 153         .start = 0xf0000,
 154         .end = 0xfffff,
 155         .flags = IORESOURCE_ROM,
 156 };
 157
 158 static struct resource extension_rom_resource = {
 159         .name = "Extension ROM",
 160         .start = 0xe0000,
 161         .end = 0xeffff,
 162         .flags = IORESOURCE_ROM,
 163 };
 164
 165 static struct resource adapter_rom_resources[] = {
 166         { .name = "Adapter ROM", .start = 0xc8000, .end = 0,
 167                 .flags = IORESOURCE_ROM },
 168         { .name = "Adapter ROM", .start = 0, .end = 0,
 169                 .flags = IORESOURCE_ROM },
 170         { .name = "Adapter ROM", .start = 0, .end = 0,
 171                 .flags = IORESOURCE_ROM },
 172         { .name = "Adapter ROM", .start = 0, .end = 0,
 173                 .flags = IORESOURCE_ROM },
 174         { .name = "Adapter ROM", .start = 0, .end = 0,
 175                 .flags = IORESOURCE_ROM },
 176         { .name = "Adapter ROM", .start = 0, .end = 0,
 177                 .flags = IORESOURCE_ROM }
 178 };
 179
 180 #define ADAPTER_ROM_RESOURCES \
 181         (sizeof adapter_rom_resources / sizeof adapter_rom_resources[0])
 182
 183 static struct resource video_rom_resource = {
 184         .name = "Video ROM",
 185         .start = 0xc0000,
 186         .end = 0xc7fff,
 187         .flags = IORESOURCE_ROM,
 188 };
 189
 190 static struct resource video_ram_resource = {
 191         .name = "Video RAM area",
 192         .start = 0xa0000,
 193         .end = 0xbffff,
 194         .flags = IORESOURCE_RAM,
 195 };
 196
 197 #define romsignature(x) (*(unsigned short *)(x) == 0xaa55)
 198
 199 static int __init romchecksum(unsigned char *rom, unsigned long length)
 200 {
 201         unsigned char *p, sum = 0;
 202
 203         for (p = rom; p < rom + length; p++)
 204                 sum += *p;
 205         return sum == 0;
 206 }
 207
 208 static void __init probe_roms(void)
 209 {
 210         unsigned long start, length, upper;
 211         unsigned char *rom;
 212         int           i;
 213
 214         /* video rom */
 215         upper = adapter_rom_resources[0].start;
 216         for (start = video_rom_resource.start; start < upper; start += 2048) {
 217                 rom = isa_bus_to_virt(start);
 218                 if (!romsignature(rom))
 219                         continue;
 220
 221                 video_rom_resource.start = start;
 222
 223                 /* 0 < length <= 0x7f * 512, historically */
 224                 length = rom[2] * 512;
 225
 226                 /* if checksum okay, trust length byte */
 227                 if (length && romchecksum(rom, length))
 228                         video_rom_resource.end = start + length - 1;
 229
 230                 request_resource(&iomem_resource, &video_rom_resource);
 231                 break;
 232                         }
 233
 234         start = (video_rom_resource.end + 1 + 2047) & ~2047UL;
 235         if (start < upper)
 236                 start = upper;
 237
 238         /* system rom */
 239         request_resource(&iomem_resource, &system_rom_resource);
 240         upper = system_rom_resource.start;
 241
 242         /* check for extension rom (ignore length byte!) */
 243         rom = isa_bus_to_virt(extension_rom_resource.start);
 244         if (romsignature(rom)) {
 245                 length = extension_rom_resource.end - extension_rom_resource.start + 1;
 246                 if (romchecksum(rom, length)) {
 247                         request_resource(&iomem_resource, &extension_rom_resource);
 248                         upper = extension_rom_resource.start;
 249                 }
 250         }
 251
 252         /* check for adapter roms on 2k boundaries */
 253         for (i = 0; i < ADAPTER_ROM_RESOURCES && start < upper; start += 2048) {
 254                 rom = isa_bus_to_virt(start);
 255                 if (!romsignature(rom))
 256                         continue;
 257
 258                 /* 0 < length <= 0x7f * 512, historically */
 259                 length = rom[2] * 512;
 260
 261                 /* but accept any length that fits if checksum okay */
 262                 if (!length || start + length > upper || !romchecksum(rom, length))
 263                         continue;
 264
 265                 adapter_rom_resources[i].start = start;
 266                 adapter_rom_resources[i].end = start + length - 1;
 267                 request_resource(&iomem_resource, &adapter_rom_resources[i]);
 268
 269                 start = adapter_rom_resources[i++].end & ~2047UL;
 270         }
 271 }
 272
 273 static __init void parse_cmdline_early (char ** cmdline_p)
 274 {
 275         char c = ' ', *to = command_line, *from = COMMAND_LINE;
 276         int len = 0;
 277
 278         /* Save unparsed command line copy for /proc/cmdline */
 279         memcpy(saved_command_line, COMMAND_LINE, COMMAND_LINE_SIZE);
 280         saved_command_line[COMMAND_LINE_SIZE-1] = '\0';
 281
 282         for (;;) {
 283                 if (c != ' ')
 284                         goto next_char;
 285
 286 #ifdef  CONFIG_SMP
 287                 /*
 288                  * If the BIOS enumerates physical processors before logical,
 289                  * maxcpus=N at enumeration-time can be used to disable HT.
 290                  */
 291                 else if (!memcmp(from, "maxcpus=", 8)) {
 292                         extern unsigned int maxcpus;
 293
 294                         maxcpus = simple_strtoul(from + 8, NULL, 0);
 295                 }
 296 #endif
 297 #ifdef CONFIG_ACPI
 298                 /* "acpi=off" disables both ACPI table parsing and interpreter init */
 299                 if (!memcmp(from, "acpi=off", 8))
 300                         disable_acpi();
 301
 302                 if (!memcmp(from, "acpi=force", 10)) {
 303                         /* add later when we do DMI horrors: */
 304                         acpi_force = 1;
 305                         acpi_disabled = 0;
 306                 }
 307
 308                 /* acpi=ht just means: do ACPI MADT parsing
 309                    at bootup, but don't enable the full ACPI interpreter */
 310                 if (!memcmp(from, "acpi=ht", 7)) {
 311                         if (!acpi_force)
 312                                 disable_acpi();
 313                         acpi_ht = 1;
 314                 }
 315                 else if (!memcmp(from, "pci=noacpi", 10))
 316                         acpi_disable_pci();
 317                 else if (!memcmp(from, "acpi=noirq", 10))
 318                         acpi_noirq_set();
 319
 320                 else if (!memcmp(from, "acpi_sci=edge", 13))
 321                         acpi_sci_flags.trigger =  1;
 322                 else if (!memcmp(from, "acpi_sci=level", 14))
 323                         acpi_sci_flags.trigger = 3;
 324                 else if (!memcmp(from, "acpi_sci=high", 13))
 325                         acpi_sci_flags.polarity = 1;
 326                 else if (!memcmp(from, "acpi_sci=low", 12))
 327                         acpi_sci_flags.polarity = 3;
 328
 329                 /* acpi=strict disables out-of-spec workarounds */
 330                 else if (!memcmp(from, "acpi=strict", 11)) {
 331                         acpi_strict = 1;
 332                 }
 333 #ifdef CONFIG_X86_IO_APIC
 334                 else if (!memcmp(from, "acpi_skip_timer_override", 24))
 335                         acpi_skip_timer_override = 1;
 336 #endif
 337 #endif
 338
 339                 if (!memcmp(from, "disable_timer_pin_1", 19))
 340                         disable_timer_pin_1 = 1;
 341                 if (!memcmp(from, "enable_timer_pin_1", 18))
 342                         disable_timer_pin_1 = -1;
 343
 344                 if (!memcmp(from, "nolapic", 7) ||
 345                     !memcmp(from, "disableapic", 11))
 346                         disable_apic = 1;
 347
 348                 if (!memcmp(from, "noapic", 6))
 349                         skip_ioapic_setup = 1;
 350
 351                 if (!memcmp(from, "apic", 4)) {
 352                         skip_ioapic_setup = 0;
 353                         ioapic_force = 1;
 354                 }
 355
 356                 if (!memcmp(from, "mem=", 4))
 357                         parse_memopt(from+4, &from);
 358
 359 #ifdef CONFIG_NUMA
 360                 if (!memcmp(from, "numa=", 5))
 361                         numa_setup(from+5);
 362 #endif
 363
 364 #ifdef CONFIG_GART_IOMMU
 365                 if (!memcmp(from,"iommu=",6)) {
 366                         iommu_setup(from+6);
 367                 }
 368 #endif
 369
 370                 if (!memcmp(from,"oops=panic", 10))
 371                         panic_on_oops = 1;
 372
 373                 if (!memcmp(from, "noexec=", 7))
 374                         nonx_setup(from + 7);
 375
 376 #ifdef CONFIG_KEXEC
 377                 /* crashkernel=size@addr specifies the location to reserve for
 378                  * a crash kernel.  By reserving this memory we guarantee
 379                  * that linux never set's it up as a DMA target.
 380                  * Useful for holding code to do something appropriate
 381                  * after a kernel panic.
 382                  */
 383                 else if (!memcmp(from, "crashkernel=", 12)) {
 384                         unsigned long size, base;
 385                         size = memparse(from+12, &from);
 386                         if (*from == '@') {
 387                                 base = memparse(from+1, &from);
 388                                 /* FIXME: Do I want a sanity check
 389                                  * to validate the memory range?
 390                                  */
 391                                 crashk_res.start = base;
 392                                 crashk_res.end   = base + size - 1;
 393                         }
 394                 }
 395 #endif
 396
 397         next_char:
 398                 c = *(from++);
 399                 if (!c)
 400                         break;
 401                 if (COMMAND_LINE_SIZE <= ++len)
 402                         break;
 403                 *(to++) = c;
 404         }
 405         *to = '\0';
 406         *cmdline_p = command_line;
 407 }
 408
 409 #ifndef CONFIG_NUMA
 410 static void __init
 411 contig_initmem_init(unsigned long start_pfn, unsigned long end_pfn)
 412 {
 413         unsigned long bootmap_size, bootmap;
 414
 415         memory_present(0, start_pfn, end_pfn);
 416         bootmap_size = bootmem_bootmap_pages(end_pfn)<<PAGE_SHIFT;
 417         bootmap = find_e820_area(0, end_pfn<<PAGE_SHIFT, bootmap_size);
 418         if (bootmap == -1L)
 419                 panic("Cannot find bootmem map of size %ld\n",bootmap_size);
 420         bootmap_size = init_bootmem(bootmap >> PAGE_SHIFT, end_pfn);
 421         e820_bootmem_free(NODE_DATA(0), 0, end_pfn << PAGE_SHIFT);
 422         reserve_bootmem(bootmap, bootmap_size);
 423 }
 424 #endif
 425
 426 /* Use inline assembly to define this because the nops are defined
 427    as inline assembly strings in the include files and we cannot
 428    get them easily into strings. */
 429 asm("\t.data\nk8nops: "
 430     K8_NOP1 K8_NOP2 K8_NOP3 K8_NOP4 K8_NOP5 K8_NOP6
 431     K8_NOP7 K8_NOP8);
 432
 433 extern unsigned char k8nops[];
 434 static unsigned char *k8_nops[ASM_NOP_MAX+1] = {
 435      NULL,
 436      k8nops,
 437      k8nops + 1,
 438      k8nops + 1 + 2,
 439      k8nops + 1 + 2 + 3,
 440      k8nops + 1 + 2 + 3 + 4,
 441      k8nops + 1 + 2 + 3 + 4 + 5,
 442      k8nops + 1 + 2 + 3 + 4 + 5 + 6,
 443      k8nops + 1 + 2 + 3 + 4 + 5 + 6 + 7,
 444 };
 445
 446 /* Replace instructions with better alternatives for this CPU type.
 447
 448    This runs before SMP is initialized to avoid SMP problems with
 449    self modifying code. This implies that assymetric systems where
 450    APs have less capabilities than the boot processor are not handled.
 451    In this case boot with "noreplacement". */
 452 void apply_alternatives(void *start, void *end)
 453 {
 454         struct alt_instr *a;
 455         int diff, i, k;
 456         for (a = start; (void *)a < end; a++) {
 457                 if (!boot_cpu_has(a->cpuid))
 458                         continue;
 459
 460                 BUG_ON(a->replacementlen > a->instrlen);
 461                 __inline_memcpy(a->instr, a->replacement, a->replacementlen);
 462                 diff = a->instrlen - a->replacementlen;
 463
 464                 /* Pad the rest with nops */
 465                 for (i = a->replacementlen; diff > 0; diff -= k, i += k) {
 466                         k = diff;
 467                         if (k > ASM_NOP_MAX)
 468                                 k = ASM_NOP_MAX;
 469                         __inline_memcpy(a->instr + i, k8_nops[k], k);
 470                 }
 471         }
 472 }
 473
 474 static int no_replacement __initdata = 0;
 475
 476 void __init alternative_instructions(void)
 477 {
 478         extern struct alt_instr __alt_instructions[], __alt_instructions_end[];
 479         if (no_replacement)
 480                 return;
 481         apply_alternatives(__alt_instructions, __alt_instructions_end);
 482 }
 483
 484 static int __init noreplacement_setup(char *s)
 485 {
 486      no_replacement = 1;
 487      return 0;
 488 }
 489
 490 __setup("noreplacement", noreplacement_setup);
 491
 492 #if defined(CONFIG_EDD) || defined(CONFIG_EDD_MODULE)
 493 struct edd edd;
 494 #ifdef CONFIG_EDD_MODULE
 495 EXPORT_SYMBOL(edd);
 496 #endif
 497 /**
 498  * copy_edd() - Copy the BIOS EDD information
 499  *              from boot_params into a safe place.
 500  *
 501  */
 502 static inline void copy_edd(void)
 503 {
 504      memcpy(edd.mbr_signature, EDD_MBR_SIGNATURE, sizeof(edd.mbr_signature));
 505      memcpy(edd.edd_info, EDD_BUF, sizeof(edd.edd_info));
 506      edd.mbr_signature_nr = EDD_MBR_SIG_NR;
 507      edd.edd_info_nr = EDD_NR;
 508 }
 509 #else
 510 static inline void copy_edd(void)
 511 {
 512 }
 513 #endif
 514
 515 #define EBDA_ADDR_POINTER 0x40E
 516 static void __init reserve_ebda_region(void)
 517 {
 518         unsigned int addr;
 519         /**
 520          * there is a real-mode segmented pointer pointing to the
 521          * 4K EBDA area at 0x40E
 522          */
 523         addr = *(unsigned short *)phys_to_virt(EBDA_ADDR_POINTER);
 524         addr <<= 4;
 525         if (addr)
 526                 reserve_bootmem_generic(addr, PAGE_SIZE);
 527 }
 528
 529 void __init setup_arch(char **cmdline_p)
 530 {
 531         unsigned long kernel_end;
 532
 533         ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV);
 534         drive_info = DRIVE_INFO;
 535         screen_info = SCREEN_INFO;
 536         edid_info = EDID_INFO;
 537         saved_video_mode = SAVED_VIDEO_MODE;
 538         bootloader_type = LOADER_TYPE;
 539
 540 #ifdef CONFIG_BLK_DEV_RAM
 541         rd_image_start = RAMDISK_FLAGS & RAMDISK_IMAGE_START_MASK;
 542         rd_prompt = ((RAMDISK_FLAGS & RAMDISK_PROMPT_FLAG) != 0);
 543         rd_doload = ((RAMDISK_FLAGS & RAMDISK_LOAD_FLAG) != 0);
 544 #endif
 545         setup_memory_region();
 546         copy_edd();
 547
 548         if (!MOUNT_ROOT_RDONLY)
 549                 root_mountflags &= ~MS_RDONLY;
 550         init_mm.start_code = (unsigned long) &_text;
 551         init_mm.end_code = (unsigned long) &_etext;
 552         init_mm.end_data = (unsigned long) &_edata;
 553         init_mm.brk = (unsigned long) &_end;
 554
 555         code_resource.start = virt_to_phys(&_text);
 556         code_resource.end = virt_to_phys(&_etext)-1;
 557         data_resource.start = virt_to_phys(&_etext);
 558         data_resource.end = virt_to_phys(&_edata)-1;
 559
 560         parse_cmdline_early(cmdline_p);
 561
 562         early_identify_cpu(&boot_cpu_data);
 563
 564         /*
 565          * partially used pages are not usable - thus
 566          * we are rounding upwards:
 567          */
 568         end_pfn = e820_end_of_ram();
 569
 570         check_efer();
 571
 572         init_memory_mapping(0, (end_pfn_map << PAGE_SHIFT));
 573
 574         zap_low_mappings(0);
 575
 576 #ifdef CONFIG_ACPI
 577         /*
 578          * Initialize the ACPI boot-time table parser (gets the RSDP and SDT).
 579          * Call this early for SRAT node setup.
 580          */
 581         acpi_boot_table_init();
 582 #endif
 583
 584 #ifdef CONFIG_ACPI_NUMA
 585         /*
 586          * Parse SRAT to discover nodes.
 587          */
 588         acpi_numa_init();
 589 #endif
 590
 591 #ifdef CONFIG_NUMA
 592         numa_initmem_init(0, end_pfn);
 593 #else
 594         contig_initmem_init(0, end_pfn);
 595 #endif
 596
 597         /* Reserve direct mapping */
 598         reserve_bootmem_generic(table_start << PAGE_SHIFT,
 599                                 (table_end - table_start) << PAGE_SHIFT);
 600
 601         /* reserve kernel */
 602         kernel_end = round_up(__pa_symbol(&_end),PAGE_SIZE);
 603         reserve_bootmem_generic(HIGH_MEMORY, kernel_end - HIGH_MEMORY);
 604
 605         /*
 606          * reserve physical page 0 - it's a special BIOS page on many boxes,
 607          * enabling clean reboots, SMP operation, laptop functions.
 608          */
 609         reserve_bootmem_generic(0, PAGE_SIZE);
 610
 611         /* reserve ebda region */
 612         reserve_ebda_region();
 613
 614 #ifdef CONFIG_SMP
 615         /*
 616          * But first pinch a few for the stack/trampoline stuff
 617          * FIXME: Don't need the extra page at 4K, but need to fix
 618          * trampoline before removing it. (see the GDT stuff)
 619          */
 620         reserve_bootmem_generic(PAGE_SIZE, PAGE_SIZE);
 621
 622         /* Reserve SMP trampoline */
 623         reserve_bootmem_generic(SMP_TRAMPOLINE_BASE, PAGE_SIZE);
 624 #endif
 625
 626 #ifdef CONFIG_ACPI_SLEEP
 627        /*
 628         * Reserve low memory region for sleep support.
 629         */
 630        acpi_reserve_bootmem();
 631 #endif
 632 #ifdef CONFIG_X86_LOCAL_APIC
 633         /*
 634          * Find and reserve possible boot-time SMP configuration:
 635          */
 636         find_smp_config();
 637 #endif
 638 #ifdef CONFIG_BLK_DEV_INITRD
 639         if (LOADER_TYPE && INITRD_START) {
 640                 if (INITRD_START + INITRD_SIZE <= (end_pfn << PAGE_SHIFT)) {
 641                         reserve_bootmem_generic(INITRD_START, INITRD_SIZE);
 642                         initrd_start =
 643                                 INITRD_START ? INITRD_START + PAGE_OFFSET : 0;
 644                         initrd_end = initrd_start+INITRD_SIZE;
 645                 }
 646                 else {
 647                         printk(KERN_ERR "initrd extends beyond end of memory "
 648                             "(0x%08lx > 0x%08lx)\ndisabling initrd\n",
 649                             (unsigned long)(INITRD_START + INITRD_SIZE),
 650                             (unsigned long)(end_pfn << PAGE_SHIFT));
 651                         initrd_start = 0;
 652                 }
 653         }
 654 #endif
 655 #ifdef CONFIG_KEXEC
 656         if (crashk_res.start != crashk_res.end) {
 657                 reserve_bootmem(crashk_res.start,
 658                         crashk_res.end - crashk_res.start + 1);
 659         }
 660 #endif
 661
 662         sparse_init();
 663
 664         paging_init();
 665
 666         check_ioapic();
 667
 668 #ifdef CONFIG_ACPI
 669         /*
 670          * Read APIC and some other early information from ACPI tables.
 671          */
 672         acpi_boot_init();
 673 #endif
 674
 675 #ifdef CONFIG_X86_LOCAL_APIC
 676         /*
 677          * get boot-time SMP configuration:
 678          */
 679         if (smp_found_config)
 680                 get_smp_config();
 681         init_apic_mappings();
 682 #endif
 683
 684         /*
 685          * Request address space for all standard RAM and ROM resources
 686          * and also for regions reported as reserved by the e820.
 687          */
 688         probe_roms();
 689         e820_reserve_resources();
 690
 691         request_resource(&iomem_resource, &video_ram_resource);
 692
 693         {
 694         unsigned i;
 695         /* request I/O space for devices used on all i[345]86 PCs */
 696         for (i = 0; i < STANDARD_IO_RESOURCES; i++)
 697                 request_resource(&ioport_resource, &standard_io_resources[i]);
 698         }
 699
 700         e820_setup_gap();
 701
 702 #ifdef CONFIG_GART_IOMMU
 703        iommu_hole_init();
 704 #endif
 705
 706 #ifdef CONFIG_VT
 707 #if defined(CONFIG_VGA_CONSOLE)
 708         conswitchp = &vga_con;
 709 #elif defined(CONFIG_DUMMY_CONSOLE)
 710         conswitchp = &dummy_con;
 711 #endif
 712 #endif
 713 }
 714
 715 static int __cpuinit get_model_name(struct cpuinfo_x86 *c)
 716 {
 717         unsigned int *v;
 718
 719         if (c->extended_cpuid_level < 0x80000004)
 720                 return 0;
 721
 722         v = (unsigned int *) c->x86_model_id;
 723         cpuid(0x80000002, &v[0], &v[1], &v[2], &v[3]);
 724         cpuid(0x80000003, &v[4], &v[5], &v[6], &v[7]);
 725         cpuid(0x80000004, &v[8], &v[9], &v[10], &v[11]);
 726         c->x86_model_id[48] = 0;
 727         return 1;
 728 }
 729
 730
 731 static void __cpuinit display_cacheinfo(struct cpuinfo_x86 *c)
 732 {
 733         unsigned int n, dummy, eax, ebx, ecx, edx;
 734
 735         n = c->extended_cpuid_level;
 736
 737         if (n >= 0x80000005) {
 738                 cpuid(0x80000005, &dummy, &ebx, &ecx, &edx);
 739                 printk(KERN_INFO "CPU: L1 I Cache: %dK (%d bytes/line), D cache %dK (%d bytes/line)\n",
 740                         edx>>24, edx&0xFF, ecx>>24, ecx&0xFF);
 741                 c->x86_cache_size=(ecx>>24)+(edx>>24);
 742                 /* On K8 L1 TLB is inclusive, so don't count it */
 743                 c->x86_tlbsize = 0;
 744         }
 745
 746         if (n >= 0x80000006) {
 747                 cpuid(0x80000006, &dummy, &ebx, &ecx, &edx);
 748                 ecx = cpuid_ecx(0x80000006);
 749                 c->x86_cache_size = ecx >> 16;
 750                 c->x86_tlbsize += ((ebx >> 16) & 0xfff) + (ebx & 0xfff);
 751
 752                 printk(KERN_INFO "CPU: L2 Cache: %dK (%d bytes/line)\n",
 753                 c->x86_cache_size, ecx & 0xFF);
 754         }
 755
 756         if (n >= 0x80000007)
 757                 cpuid(0x80000007, &dummy, &dummy, &dummy, &c->x86_power);
 758         if (n >= 0x80000008) {
 759                 cpuid(0x80000008, &eax, &dummy, &dummy, &dummy);
 760                 c->x86_virt_bits = (eax >> 8) & 0xff;
 761                 c->x86_phys_bits = eax & 0xff;
 762         }
 763 }
 764
 765 #ifdef CONFIG_NUMA
 766 static int nearby_node(int apicid)
 767 {
 768         int i;
 769         for (i = apicid - 1; i >= 0; i--) {
 770                 int node = apicid_to_node[i];
 771                 if (node != NUMA_NO_NODE && node_online(node))
 772                         return node;
 773         }
 774         for (i = apicid + 1; i < MAX_LOCAL_APIC; i++) {
 775                 int node = apicid_to_node[i];
 776                 if (node != NUMA_NO_NODE && node_online(node))
 777                         return node;
 778         }
 779         return first_node(node_online_map); /* Shouldn't happen */
 780 }
 781 #endif
 782
 783 /*
 784  * On a AMD dual core setup the lower bits of the APIC id distingush the cores.
 785  * Assumes number of cores is a power of two.
 786  */
 787 static void __init amd_detect_cmp(struct cpuinfo_x86 *c)
 788 {
 789 #ifdef CONFIG_SMP
 790         int cpu = smp_processor_id();
 791         unsigned bits;
 792 #ifdef CONFIG_NUMA
 793         int node = 0;
 794         unsigned apicid = phys_proc_id[cpu];
 795 #endif
 796
 797         bits = 0;
 798         while ((1 << bits) < c->x86_max_cores)
 799                 bits++;
 800
 801         /* Low order bits define the core id (index of core in socket) */
 802         cpu_core_id[cpu] = phys_proc_id[cpu] & ((1 << bits)-1);
 803         /* Convert the APIC ID into the socket ID */
 804         phys_proc_id[cpu] >>= bits;
 805
 806 #ifdef CONFIG_NUMA
 807         node = phys_proc_id[cpu];
 808         if (apicid_to_node[apicid] != NUMA_NO_NODE)
 809                 node = apicid_to_node[apicid];
 810         if (!node_online(node)) {
 811                 /* Two possibilities here:
 812                    - The CPU is missing memory and no node was created.
 813                    In that case try picking one from a nearby CPU
 814                    - The APIC IDs differ from the HyperTransport node IDs
 815                    which the K8 northbridge parsing fills in.
 816                    Assume they are all increased by a constant offset,
 817                    but in the same order as the HT nodeids.
 818                    If that doesn't result in a usable node fall back to the
 819                    path for the previous case.  */
 820                 int ht_nodeid = apicid - (phys_proc_id[0] << bits);
 821                 if (ht_nodeid >= 0 &&
 822                     apicid_to_node[ht_nodeid] != NUMA_NO_NODE)
 823                         node = apicid_to_node[ht_nodeid];
 824                 /* Pick a nearby node */
 825                 if (!node_online(node))
 826                         node = nearby_node(apicid);
 827         }
 828         numa_set_node(cpu, node);
 829
 830         printk(KERN_INFO "CPU %d(%d) -> Node %d -> Core %d\n",
 831                         cpu, c->x86_max_cores, node, cpu_core_id[cpu]);
 832 #endif
 833 #endif
 834 }
 835
 836 static int __init init_amd(struct cpuinfo_x86 *c)
 837 {
 838         int r;
 839         int level;
 840
 841 #ifdef CONFIG_SMP
 842         unsigned long value;
 843
 844         /*
 845          * Disable TLB flush filter by setting HWCR.FFDIS on K8
 846          * bit 6 of msr C001_0015
 847          *
 848          * Errata 63 for SH-B3 steppings
 849          * Errata 122 for all steppings (F+ have it disabled by default)
 850          */
 851         if (c->x86 == 15) {
 852                 rdmsrl(MSR_K8_HWCR, value);
 853                 value |= 1 << 6;
 854                 wrmsrl(MSR_K8_HWCR, value);
 855         }
 856 #endif
 857
 858         /* Bit 31 in normal CPUID used for nonstandard 3DNow ID;
 859            3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway */
 860         clear_bit(0*32+31, &c->x86_capability);
 861
 862         /* C-stepping K8? */
 863         level = cpuid_eax(1);
 864         if ((level >= 0x0f48 && level < 0x0f50) || level >= 0x0f58)
 865                 set_bit(X86_FEATURE_K8_C, &c->x86_capability);
 866
 867         r = get_model_name(c);
 868         if (!r) {
 869                 switch (c->x86) {
 870                 case 15:
 871                         /* Should distinguish Models here, but this is only
 872                            a fallback anyways. */
 873                         strcpy(c->x86_model_id, "Hammer");
 874                         break;
 875                 }
 876         }
 877         display_cacheinfo(c);
 878
 879         if (c->extended_cpuid_level >= 0x80000008) {
 880                 c->x86_max_cores = (cpuid_ecx(0x80000008) & 0xff) + 1;
 881                 if (c->x86_max_cores & (c->x86_max_cores - 1))
 882                         c->x86_max_cores = 1;
 883
 884                 amd_detect_cmp(c);
 885         }
 886
 887         return r;
 888 }
 889
 890 static void __cpuinit detect_ht(struct cpuinfo_x86 *c)
 891 {
 892 #ifdef CONFIG_SMP
 893         u32     eax, ebx, ecx, edx;
 894         int     index_msb, core_bits;
 895         int     cpu = smp_processor_id();
 896
 897         cpuid(1, &eax, &ebx, &ecx, &edx);
 898
 899         c->apicid = phys_pkg_id(0);
 900
 901         if (!cpu_has(c, X86_FEATURE_HT) || cpu_has(c, X86_FEATURE_CMP_LEGACY))
 902                 return;
 903
 904         smp_num_siblings = (ebx & 0xff0000) >> 16;
 905
 906         if (smp_num_siblings == 1) {
 907                 printk(KERN_INFO  "CPU: Hyper-Threading is disabled\n");
 908         } else if (smp_num_siblings > 1 ) {
 909
 910                 if (smp_num_siblings > NR_CPUS) {
 911                         printk(KERN_WARNING "CPU: Unsupported number of the siblings %d", smp_num_siblings);
 912                         smp_num_siblings = 1;
 913                         return;
 914                 }
 915
 916                 index_msb = get_count_order(smp_num_siblings);
 917                 phys_proc_id[cpu] = phys_pkg_id(index_msb);
 918
 919                 printk(KERN_INFO  "CPU: Physical Processor ID: %d\n",
 920                        phys_proc_id[cpu]);
 921
 922                 smp_num_siblings = smp_num_siblings / c->x86_max_cores;
 923
 924                 index_msb = get_count_order(smp_num_siblings) ;
 925
 926                 core_bits = get_count_order(c->x86_max_cores);
 927
 928                 cpu_core_id[cpu] = phys_pkg_id(index_msb) &
 929                                                ((1 << core_bits) - 1);
 930
 931                 if (c->x86_max_cores > 1)
 932                         printk(KERN_INFO  "CPU: Processor Core ID: %d\n",
 933                                cpu_core_id[cpu]);
 934         }
 935 #endif
 936 }
 937
 938 /*
 939  * find out the number of processor cores on the die
 940  */
 941 static int __cpuinit intel_num_cpu_cores(struct cpuinfo_x86 *c)
 942 {
 943         unsigned int eax;
 944
 945         if (c->cpuid_level < 4)
 946                 return 1;
 947
 948         __asm__("cpuid"
 949                 : "=a" (eax)
 950                 : "0" (4), "c" (0)
 951                 : "bx", "dx");
 952
 953         if (eax & 0x1f)
 954                 return ((eax >> 26) + 1);
 955         else
 956                 return 1;
 957 }
 958
 959 static void srat_detect_node(void)
 960 {
 961 #ifdef CONFIG_NUMA
 962         unsigned node;
 963         int cpu = smp_processor_id();
 964
 965         /* Don't do the funky fallback heuristics the AMD version employs
 966            for now. */
 967         node = apicid_to_node[hard_smp_processor_id()];
 968         if (node == NUMA_NO_NODE)
 969                 node = 0;
 970         numa_set_node(cpu, node);
 971
 972         if (acpi_numa > 0)
 973                 printk(KERN_INFO "CPU %d -> Node %d\n", cpu, node);
 974 #endif
 975 }
 976
 977 static void __cpuinit init_intel(struct cpuinfo_x86 *c)
 978 {
 979         /* Cache sizes */
 980         unsigned n;
 981
 982         init_intel_cacheinfo(c);
 983         n = c->extended_cpuid_level;
 984         if (n >= 0x80000008) {
 985                 unsigned eax = cpuid_eax(0x80000008);
 986                 c->x86_virt_bits = (eax >> 8) & 0xff;
 987                 c->x86_phys_bits = eax & 0xff;
 988                 /* CPUID workaround for Intel 0F34 CPU */
 989                 if (c->x86_vendor == X86_VENDOR_INTEL &&
 990                     c->x86 == 0xF && c->x86_model == 0x3 &&
 991                     c->x86_mask == 0x4)
 992                         c->x86_phys_bits = 36;
 993         }
 994
 995         if (c->x86 == 15)
 996                 c->x86_cache_alignment = c->x86_clflush_size * 2;
 997         if (c->x86 >= 15)
 998                 set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);
 999         c->x86_max_cores = intel_num_cpu_cores(c);
1000
1001         srat_detect_node();
1002 }
1003
1004 static void __cpuinit get_cpu_vendor(struct cpuinfo_x86 *c)
1005 {
1006         char *v = c->x86_vendor_id;
1007
1008         if (!strcmp(v, "AuthenticAMD"))
1009                 c->x86_vendor = X86_VENDOR_AMD;
1010         else if (!strcmp(v, "GenuineIntel"))
1011                 c->x86_vendor = X86_VENDOR_INTEL;
1012         else
1013                 c->x86_vendor = X86_VENDOR_UNKNOWN;
1014 }
1015
1016 struct cpu_model_info {
1017         int vendor;
1018         int family;
1019         char *model_names[16];
1020 };
1021
1022 /* Do some early cpuid on the boot CPU to get some parameter that are
1023    needed before check_bugs. Everything advanced is in identify_cpu
1024    below. */
1025 void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c)
1026 {
1027         u32 tfms;
1028
1029         c->loops_per_jiffy = loops_per_jiffy;
1030         c->x86_cache_size = -1;
1031         c->x86_vendor = X86_VENDOR_UNKNOWN;
1032         c->x86_model = c->x86_mask = 0; /* So far unknown... */
1033         c->x86_vendor_id[0] = '\0'; /* Unset */
1034         c->x86_model_id[0] = '\0';  /* Unset */
1035         c->x86_clflush_size = 64;
1036         c->x86_cache_alignment = c->x86_clflush_size;
1037         c->x86_max_cores = 1;
1038         c->extended_cpuid_level = 0;
1039         memset(&c->x86_capability, 0, sizeof c->x86_capability);
1040
1041         /* Get vendor name */
1042         cpuid(0x00000000, (unsigned int *)&c->cpuid_level,
1043               (unsigned int *)&c->x86_vendor_id[0],
1044               (unsigned int *)&c->x86_vendor_id[8],
1045               (unsigned int *)&c->x86_vendor_id[4]);
1046
1047         get_cpu_vendor(c);
1048
1049         /* Initialize the standard set of capabilities */
1050         /* Note that the vendor-specific code below might override */
1051
1052         /* Intel-defined flags: level 0x00000001 */
1053         if (c->cpuid_level >= 0x00000001) {
1054                 __u32 misc;
1055                 cpuid(0x00000001, &tfms, &misc, &c->x86_capability[4],
1056                       &c->x86_capability[0]);
1057                 c->x86 = (tfms >> 8) & 0xf;
1058                 c->x86_model = (tfms >> 4) & 0xf;
1059                 c->x86_mask = tfms & 0xf;
1060                 if (c->x86 == 0xf)
1061                         c->x86 += (tfms >> 20) & 0xff;
1062                 if (c->x86 >= 0x6)
1063                         c->x86_model += ((tfms >> 16) & 0xF) << 4;
1064                 if (c->x86_capability[0] & (1<<19))
1065                         c->x86_clflush_size = ((misc >> 8) & 0xff) * 8;
1066         } else {
1067                 /* Have CPUID level 0 only - unheard of */
1068                 c->x86 = 4;
1069         }
1070
1071 #ifdef CONFIG_SMP
1072         phys_proc_id[smp_processor_id()] = (cpuid_ebx(1) >> 24) & 0xff;
1073 #endif
1074 }
1075
1076 /*
1077  * This does the hard work of actually picking apart the CPU stuff...
1078  */
1079 void __cpuinit identify_cpu(struct cpuinfo_x86 *c)
1080 {
1081         int i;
1082         u32 xlvl;
1083
1084         early_identify_cpu(c);
1085
1086         /* AMD-defined flags: level 0x80000001 */
1087         xlvl = cpuid_eax(0x80000000);
1088         c->extended_cpuid_level = xlvl;
1089         if ((xlvl & 0xffff0000) == 0x80000000) {
1090                 if (xlvl >= 0x80000001) {
1091                         c->x86_capability[1] = cpuid_edx(0x80000001);
1092                         c->x86_capability[6] = cpuid_ecx(0x80000001);
1093                 }
1094                 if (xlvl >= 0x80000004)
1095                         get_model_name(c); /* Default name */
1096         }
1097
1098         /* Transmeta-defined flags: level 0x80860001 */
1099         xlvl = cpuid_eax(0x80860000);
1100         if ((xlvl & 0xffff0000) == 0x80860000) {
1101                 /* Don't set x86_cpuid_level here for now to not confuse. */
1102                 if (xlvl >= 0x80860001)
1103                         c->x86_capability[2] = cpuid_edx(0x80860001);
1104         }
1105
1106         /*
1107          * Vendor-specific initialization.  In this section we
1108          * canonicalize the feature flags, meaning if there are
1109          * features a certain CPU supports which CPUID doesn't
1110          * tell us, CPUID claiming incorrect flags, or other bugs,
1111          * we handle them here.
1112          *
1113          * At the end of this section, c->x86_capability better
1114          * indicate the features this CPU genuinely supports!
1115          */
1116         switch (c->x86_vendor) {
1117         case X86_VENDOR_AMD:
1118                 init_amd(c);
1119                 break;
1120
1121         case X86_VENDOR_INTEL:
1122                 init_intel(c);
1123                 break;
1124
1125         case X86_VENDOR_UNKNOWN:
1126         default:
1127                 display_cacheinfo(c);
1128                 break;
1129         }
1130
1131         select_idle_routine(c);
1132         detect_ht(c);
1133
1134         /*
1135          * On SMP, boot_cpu_data holds the common feature set between
1136          * all CPUs; so make sure that we indicate which features are
1137          * common between the CPUs.  The first time this routine gets
1138          * executed, c == &boot_cpu_data.
1139          */
1140         if (c != &boot_cpu_data) {
1141                 /* AND the already accumulated flags with these */
1142                 for (i = 0 ; i < NCAPINTS ; i++)
1143                         boot_cpu_data.x86_capability[i] &= c->x86_capability[i];
1144         }
1145
1146 #ifdef CONFIG_X86_MCE
1147         mcheck_init(c);
1148 #endif
1149         if (c == &boot_cpu_data)
1150                 mtrr_bp_init();
1151         else
1152                 mtrr_ap_init();
1153 #ifdef CONFIG_NUMA
1154         numa_add_cpu(smp_processor_id());
1155 #endif
1156 }
1157
1158
1159 void __cpuinit print_cpu_info(struct cpuinfo_x86 *c)
1160 {
1161         if (c->x86_model_id[0])
1162                 printk("%s", c->x86_model_id);
1163
1164         if (c->x86_mask || c->cpuid_level >= 0)
1165                 printk(" stepping %02x\n", c->x86_mask);
1166         else
1167                 printk("\n");
1168 }
1169
1170 /*
1171  *      Get CPU information for use by the procfs.
1172  */
1173
1174 static int show_cpuinfo(struct seq_file *m, void *v)
1175 {
1176         struct cpuinfo_x86 *c = v;
1177
1178         /*
1179          * These flag bits must match the definitions in <asm/cpufeature.h>.
1180          * NULL means this bit is undefined or reserved; either way it doesn't
1181          * have meaning as far as Linux is concerned.  Note that it's important
1182          * to realize there is a difference between this table and CPUID -- if
1183          * applications want to get the raw CPUID data, they should access
1184          * /dev/cpu/<cpu_nr>/cpuid instead.
1185          */
1186         static char *x86_cap_flags[] = {
1187                 /* Intel-defined */
1188                 "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce",
1189                 "cx8", "apic", NULL, "sep", "mtrr", "pge", "mca", "cmov",
1190                 "pat", "pse36", "pn", "clflush", NULL, "dts", "acpi", "mmx",
1191                 "fxsr", "sse", "sse2", "ss", "ht", "tm", "ia64", NULL,
1192
1193                 /* AMD-defined */
1194                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1195                 NULL, NULL, NULL, "syscall", NULL, NULL, NULL, NULL,
1196                 NULL, NULL, NULL, NULL, "nx", NULL, "mmxext", NULL,
1197                 NULL, "fxsr_opt", NULL, NULL, NULL, "lm", "3dnowext", "3dnow",
1198
1199                 /* Transmeta-defined */
1200                 "recovery", "longrun", NULL, "lrti", NULL, NULL, NULL, NULL,
1201                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1202                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1203                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1204
1205                 /* Other (Linux-defined) */
1206                 "cxmmx", NULL, "cyrix_arr", "centaur_mcr", NULL,
1207                 "constant_tsc", NULL, NULL,
1208                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1209                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1210                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1211
1212                 /* Intel-defined (#2) */
1213                 "pni", NULL, NULL, "monitor", "ds_cpl", "vmx", NULL, "est",
1214                 "tm2", NULL, "cid", NULL, NULL, "cx16", "xtpr", NULL,
1215                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1216                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1217
1218                 /* VIA/Cyrix/Centaur-defined */
1219                 NULL, NULL, "rng", "rng_en", NULL, NULL, "ace", "ace_en",
1220                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1221                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1222                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1223
1224                 /* AMD-defined (#2) */
1225                 "lahf_lm", "cmp_legacy", NULL, NULL, NULL, NULL, NULL, NULL,
1226                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1227                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1228                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1229         };
1230         static char *x86_power_flags[] = {
1231                 "ts",   /* temperature sensor */
1232                 "fid",  /* frequency id control */
1233                 "vid",  /* voltage id control */
1234                 "ttp",  /* thermal trip */
1235                 "tm",
1236                 "stc"
1237         };
1238
1239
1240 #ifdef CONFIG_SMP
1241         if (!cpu_online(c-cpu_data))
1242                 return 0;
1243 #endif
1244
1245         seq_printf(m,"processor\t: %u\n"
1246                      "vendor_id\t: %s\n"
1247                      "cpu family\t: %d\n"
1248                      "model\t\t: %d\n"
1249                      "model name\t: %s\n",
1250                      (unsigned)(c-cpu_data),
1251                      c->x86_vendor_id[0] ? c->x86_vendor_id : "unknown",
1252                      c->x86,
1253                      (int)c->x86_model,
1254                      c->x86_model_id[0] ? c->x86_model_id : "unknown");
1255
1256         if (c->x86_mask || c->cpuid_level >= 0)
1257                 seq_printf(m, "stepping\t: %d\n", c->x86_mask);
1258         else
1259                 seq_printf(m, "stepping\t: unknown\n");
1260
1261         if (cpu_has(c,X86_FEATURE_TSC)) {
1262                 seq_printf(m, "cpu MHz\t\t: %u.%03u\n",
1263                              cpu_khz / 1000, (cpu_khz % 1000));
1264         }
1265
1266         /* Cache size */
1267         if (c->x86_cache_size >= 0)
1268                 seq_printf(m, "cache size\t: %d KB\n", c->x86_cache_size);
1269
1270 #ifdef CONFIG_SMP
1271         if (smp_num_siblings * c->x86_max_cores > 1) {
1272                 int cpu = c - cpu_data;
1273                 seq_printf(m, "physical id\t: %d\n", phys_proc_id[cpu]);
1274                 seq_printf(m, "siblings\t: %d\n", cpus_weight(cpu_core_map[cpu]));
1275                 seq_printf(m, "core id\t\t: %d\n", cpu_core_id[cpu]);
1276                 seq_printf(m, "cpu cores\t: %d\n", c->booted_cores);
1277         }
1278 #endif
1279
1280         seq_printf(m,
1281                 "fpu\t\t: yes\n"
1282                 "fpu_exception\t: yes\n"
1283                 "cpuid level\t: %d\n"
1284                 "wp\t\t: yes\n"
1285                 "flags\t\t:",
1286                    c->cpuid_level);
1287
1288         {
1289                 int i;
1290                 for ( i = 0 ; i < 32*NCAPINTS ; i++ )
1291                         if ( test_bit(i, &c->x86_capability) &&
1292                              x86_cap_flags[i] != NULL )
1293                                 seq_printf(m, " %s", x86_cap_flags[i]);
1294         }
1295
1296         seq_printf(m, "\nbogomips\t: %lu.%02lu\n",
1297                    c->loops_per_jiffy/(500000/HZ),
1298                    (c->loops_per_jiffy/(5000/HZ)) % 100);
1299
1300         if (c->x86_tlbsize > 0)
1301                 seq_printf(m, "TLB size\t: %d 4K pages\n", c->x86_tlbsize);
1302         seq_printf(m, "clflush size\t: %d\n", c->x86_clflush_size);
1303         seq_printf(m, "cache_alignment\t: %d\n", c->x86_cache_alignment);
1304
1305         seq_printf(m, "address sizes\t: %u bits physical, %u bits virtual\n",
1306                    c->x86_phys_bits, c->x86_virt_bits);
1307
1308         seq_printf(m, "power management:");
1309         {
1310                 unsigned i;
1311                 for (i = 0; i < 32; i++)
1312                         if (c->x86_power & (1 << i)) {
1313                                 if (i < ARRAY_SIZE(x86_power_flags))
1314                                         seq_printf(m, " %s", x86_power_flags[i]);
1315                                 else
1316                                         seq_printf(m, " [%d]", i);
1317                         }
1318         }
1319
1320         seq_printf(m, "\n\n");
1321
1322         return 0;
1323 }
1324
1325 static void *c_start(struct seq_file *m, loff_t *pos)
1326 {
1327         return *pos < NR_CPUS ? cpu_data + *pos : NULL;
1328 }
1329
1330 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
1331 {
1332         ++*pos;
1333         return c_start(m, pos);
1334 }
1335
1336 static void c_stop(struct seq_file *m, void *v)
1337 {
1338 }
1339
1340 struct seq_operations cpuinfo_op = {
1341         .start =c_start,
1342         .next = c_next,
1343         .stop = c_stop,
1344         .show = show_cpuinfo,
1345 };