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[ARM] prevent the vmalloc cmdline argument from eating all memory
[linux-2.6/mini2440.git] / drivers / hwmon / w83781d.c
blobfc12bd412e3a4917b5645339d3dd388af8f0d3a3
1 /*
2 w83781d.c - Part of lm_sensors, Linux kernel modules for hardware
3 monitoring
4 Copyright (c) 1998 - 2001 Frodo Looijaard <frodol@dds.nl>,
5 Philip Edelbrock <phil@netroedge.com>,
6 and Mark Studebaker <mdsxyz123@yahoo.com>
7 Copyright (c) 2007 - 2008 Jean Delvare <khali@linux-fr.org>
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 */
23
24 /*
25 Supports following chips:
26
27 Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
28 as99127f 7 3 0 3 0x31 0x12c3 yes no
29 as99127f rev.2 (type_name = as99127f) 0x31 0x5ca3 yes no
30 w83781d 7 3 0 3 0x10-1 0x5ca3 yes yes
31 w83782d 9 3 2-4 3 0x30 0x5ca3 yes yes
32 w83783s 5-6 3 2 1-2 0x40 0x5ca3 yes no
33
34 */
35
36 #include <linux/module.h>
37 #include <linux/init.h>
38 #include <linux/slab.h>
39 #include <linux/jiffies.h>
40 #include <linux/i2c.h>
41 #include <linux/hwmon.h>
42 #include <linux/hwmon-vid.h>
43 #include <linux/hwmon-sysfs.h>
44 #include <linux/sysfs.h>
45 #include <linux/err.h>
46 #include <linux/mutex.h>
47
48 #ifdef CONFIG_ISA
49 #include <linux/platform_device.h>
50 #include <linux/ioport.h>
51 #include <asm/io.h>
52 #endif
53
54 #include "lm75.h"
55
56 /* Addresses to scan */
57 static const unsigned short normal_i2c[] = { 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d,
58 0x2e, 0x2f, I2C_CLIENT_END };
59 /* Insmod parameters */
60 I2C_CLIENT_INSMOD_4(w83781d, w83782d, w83783s, as99127f);
61 I2C_CLIENT_MODULE_PARM(force_subclients, "List of subclient addresses: "
62 "{bus, clientaddr, subclientaddr1, subclientaddr2}");
63
64 static int reset;
65 module_param(reset, bool, 0);
66 MODULE_PARM_DESC(reset, "Set to one to reset chip on load");
67
68 static int init = 1;
69 module_param(init, bool, 0);
70 MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
71
72 /* Constants specified below */
73
74 /* Length of ISA address segment */
75 #define W83781D_EXTENT 8
76
77 /* Where are the ISA address/data registers relative to the base address */
78 #define W83781D_ADDR_REG_OFFSET 5
79 #define W83781D_DATA_REG_OFFSET 6
80
81 /* The device registers */
82 /* in nr from 0 to 8 */
83 #define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
84 (0x554 + (((nr) - 7) * 2)))
85 #define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
86 (0x555 + (((nr) - 7) * 2)))
87 #define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
88 (0x550 + (nr) - 7))
89
90 /* fan nr from 0 to 2 */
91 #define W83781D_REG_FAN_MIN(nr) (0x3b + (nr))
92 #define W83781D_REG_FAN(nr) (0x28 + (nr))
93
94 #define W83781D_REG_BANK 0x4E
95 #define W83781D_REG_TEMP2_CONFIG 0x152
96 #define W83781D_REG_TEMP3_CONFIG 0x252
97 /* temp nr from 1 to 3 */
98 #define W83781D_REG_TEMP(nr) ((nr == 3) ? (0x0250) : \
99 ((nr == 2) ? (0x0150) : \
100 (0x27)))
101 #define W83781D_REG_TEMP_HYST(nr) ((nr == 3) ? (0x253) : \
102 ((nr == 2) ? (0x153) : \
103 (0x3A)))
104 #define W83781D_REG_TEMP_OVER(nr) ((nr == 3) ? (0x255) : \
105 ((nr == 2) ? (0x155) : \
106 (0x39)))
107
108 #define W83781D_REG_CONFIG 0x40
109
110 /* Interrupt status (W83781D, AS99127F) */
111 #define W83781D_REG_ALARM1 0x41
112 #define W83781D_REG_ALARM2 0x42
113
114 /* Real-time status (W83782D, W83783S) */
115 #define W83782D_REG_ALARM1 0x459
116 #define W83782D_REG_ALARM2 0x45A
117 #define W83782D_REG_ALARM3 0x45B
118
119 #define W83781D_REG_BEEP_CONFIG 0x4D
120 #define W83781D_REG_BEEP_INTS1 0x56
121 #define W83781D_REG_BEEP_INTS2 0x57
122 #define W83781D_REG_BEEP_INTS3 0x453 /* not on W83781D */
123
124 #define W83781D_REG_VID_FANDIV 0x47
125
126 #define W83781D_REG_CHIPID 0x49
127 #define W83781D_REG_WCHIPID 0x58
128 #define W83781D_REG_CHIPMAN 0x4F
129 #define W83781D_REG_PIN 0x4B
130
131 /* 782D/783S only */
132 #define W83781D_REG_VBAT 0x5D
133
134 /* PWM 782D (1-4) and 783S (1-2) only */
135 static const u8 W83781D_REG_PWM[] = { 0x5B, 0x5A, 0x5E, 0x5F };
136 #define W83781D_REG_PWMCLK12 0x5C
137 #define W83781D_REG_PWMCLK34 0x45C
138
139 #define W83781D_REG_I2C_ADDR 0x48
140 #define W83781D_REG_I2C_SUBADDR 0x4A
141
142 /* The following are undocumented in the data sheets however we
143 received the information in an email from Winbond tech support */
144 /* Sensor selection - not on 781d */
145 #define W83781D_REG_SCFG1 0x5D
146 static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
147
148 #define W83781D_REG_SCFG2 0x59
149 static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
150
151 #define W83781D_DEFAULT_BETA 3435
152
153 /* Conversions */
154 #define IN_TO_REG(val) SENSORS_LIMIT(((val) + 8) / 16, 0, 255)
155 #define IN_FROM_REG(val) ((val) * 16)
156
157 static inline u8
158 FAN_TO_REG(long rpm, int div)
159 {
160 if (rpm == 0)
161 return 255;
162 rpm = SENSORS_LIMIT(rpm, 1, 1000000);
163 return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
164 }
165
166 static inline long
167 FAN_FROM_REG(u8 val, int div)
168 {
169 if (val == 0)
170 return -1;
171 if (val == 255)
172 return 0;
173 return 1350000 / (val * div);
174 }
175
176 #define TEMP_TO_REG(val) SENSORS_LIMIT((val) / 1000, -127, 128)
177 #define TEMP_FROM_REG(val) ((val) * 1000)
178
179 #define BEEP_MASK_FROM_REG(val,type) ((type) == as99127f ? \
180 (~(val)) & 0x7fff : (val) & 0xff7fff)
181 #define BEEP_MASK_TO_REG(val,type) ((type) == as99127f ? \
182 (~(val)) & 0x7fff : (val) & 0xff7fff)
183
184 #define DIV_FROM_REG(val) (1 << (val))
185
186 static inline u8
187 DIV_TO_REG(long val, enum chips type)
188 {
189 int i;
190 val = SENSORS_LIMIT(val, 1,
191 ((type == w83781d
192 || type == as99127f) ? 8 : 128)) >> 1;
193 for (i = 0; i < 7; i++) {
194 if (val == 0)
195 break;
196 val >>= 1;
197 }
198 return i;
199 }
200
201 struct w83781d_data {
202 struct i2c_client *client;
203 struct device *hwmon_dev;
204 struct mutex lock;
205 enum chips type;
206
207 /* For ISA device only */
208 const char *name;
209 int isa_addr;
210
211 struct mutex update_lock;
212 char valid; /* !=0 if following fields are valid */
213 unsigned long last_updated; /* In jiffies */
214
215 struct i2c_client *lm75[2]; /* for secondary I2C addresses */
216 /* array of 2 pointers to subclients */
217
218 u8 in[9]; /* Register value - 8 & 9 for 782D only */
219 u8 in_max[9]; /* Register value - 8 & 9 for 782D only */
220 u8 in_min[9]; /* Register value - 8 & 9 for 782D only */
221 u8 fan[3]; /* Register value */
222 u8 fan_min[3]; /* Register value */
223 s8 temp; /* Register value */
224 s8 temp_max; /* Register value */
225 s8 temp_max_hyst; /* Register value */
226 u16 temp_add[2]; /* Register value */
227 u16 temp_max_add[2]; /* Register value */
228 u16 temp_max_hyst_add[2]; /* Register value */
229 u8 fan_div[3]; /* Register encoding, shifted right */
230 u8 vid; /* Register encoding, combined */
231 u32 alarms; /* Register encoding, combined */
232 u32 beep_mask; /* Register encoding, combined */
233 u8 pwm[4]; /* Register value */
234 u8 pwm2_enable; /* Boolean */
235 u16 sens[3]; /* 782D/783S only.
236 1 = pentium diode; 2 = 3904 diode;
237 4 = thermistor */
238 u8 vrm;
239 };
240
241 static struct w83781d_data *w83781d_data_if_isa(void);
242 static int w83781d_alias_detect(struct i2c_client *client, u8 chipid);
243
244 static int w83781d_read_value(struct w83781d_data *data, u16 reg);
245 static int w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value);
246 static struct w83781d_data *w83781d_update_device(struct device *dev);
247 static void w83781d_init_device(struct device *dev);
248
249 /* following are the sysfs callback functions */
250 #define show_in_reg(reg) \
251 static ssize_t show_##reg (struct device *dev, struct device_attribute *da, \
252 char *buf) \
253 { \
254 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
255 struct w83781d_data *data = w83781d_update_device(dev); \
256 return sprintf(buf, "%ld\n", \
257 (long)IN_FROM_REG(data->reg[attr->index])); \
258 }
259 show_in_reg(in);
260 show_in_reg(in_min);
261 show_in_reg(in_max);
262
263 #define store_in_reg(REG, reg) \
264 static ssize_t store_in_##reg (struct device *dev, struct device_attribute \
265 *da, const char *buf, size_t count) \
266 { \
267 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
268 struct w83781d_data *data = dev_get_drvdata(dev); \
269 int nr = attr->index; \
270 u32 val; \
271 \
272 val = simple_strtoul(buf, NULL, 10); \
273 \
274 mutex_lock(&data->update_lock); \
275 data->in_##reg[nr] = IN_TO_REG(val); \
276 w83781d_write_value(data, W83781D_REG_IN_##REG(nr), data->in_##reg[nr]); \
277 \
278 mutex_unlock(&data->update_lock); \
279 return count; \
280 }
281 store_in_reg(MIN, min);
282 store_in_reg(MAX, max);
283
284 #define sysfs_in_offsets(offset) \
285 static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, \
286 show_in, NULL, offset); \
287 static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO | S_IWUSR, \
288 show_in_min, store_in_min, offset); \
289 static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO | S_IWUSR, \
290 show_in_max, store_in_max, offset)
291
292 sysfs_in_offsets(0);
293 sysfs_in_offsets(1);
294 sysfs_in_offsets(2);
295 sysfs_in_offsets(3);
296 sysfs_in_offsets(4);
297 sysfs_in_offsets(5);
298 sysfs_in_offsets(6);
299 sysfs_in_offsets(7);
300 sysfs_in_offsets(8);
301
302 #define show_fan_reg(reg) \
303 static ssize_t show_##reg (struct device *dev, struct device_attribute *da, \
304 char *buf) \
305 { \
306 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
307 struct w83781d_data *data = w83781d_update_device(dev); \
308 return sprintf(buf,"%ld\n", \
309 FAN_FROM_REG(data->reg[attr->index], \
310 DIV_FROM_REG(data->fan_div[attr->index]))); \
311 }
312 show_fan_reg(fan);
313 show_fan_reg(fan_min);
314
315 static ssize_t
316 store_fan_min(struct device *dev, struct device_attribute *da,
317 const char *buf, size_t count)
318 {
319 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
320 struct w83781d_data *data = dev_get_drvdata(dev);
321 int nr = attr->index;
322 u32 val;
323
324 val = simple_strtoul(buf, NULL, 10);
325
326 mutex_lock(&data->update_lock);
327 data->fan_min[nr] =
328 FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
329 w83781d_write_value(data, W83781D_REG_FAN_MIN(nr),
330 data->fan_min[nr]);
331
332 mutex_unlock(&data->update_lock);
333 return count;
334 }
335
336 static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0);
337 static SENSOR_DEVICE_ATTR(fan1_min, S_IRUGO | S_IWUSR,
338 show_fan_min, store_fan_min, 0);
339 static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1);
340 static SENSOR_DEVICE_ATTR(fan2_min, S_IRUGO | S_IWUSR,
341 show_fan_min, store_fan_min, 1);
342 static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2);
343 static SENSOR_DEVICE_ATTR(fan3_min, S_IRUGO | S_IWUSR,
344 show_fan_min, store_fan_min, 2);
345
346 #define show_temp_reg(reg) \
347 static ssize_t show_##reg (struct device *dev, struct device_attribute *da, \
348 char *buf) \
349 { \
350 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
351 struct w83781d_data *data = w83781d_update_device(dev); \
352 int nr = attr->index; \
353 if (nr >= 2) { /* TEMP2 and TEMP3 */ \
354 return sprintf(buf,"%d\n", \
355 LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \
356 } else { /* TEMP1 */ \
357 return sprintf(buf,"%ld\n", (long)TEMP_FROM_REG(data->reg)); \
358 } \
359 }
360 show_temp_reg(temp);
361 show_temp_reg(temp_max);
362 show_temp_reg(temp_max_hyst);
363
364 #define store_temp_reg(REG, reg) \
365 static ssize_t store_temp_##reg (struct device *dev, \
366 struct device_attribute *da, const char *buf, size_t count) \
367 { \
368 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
369 struct w83781d_data *data = dev_get_drvdata(dev); \
370 int nr = attr->index; \
371 long val; \
372 \
373 val = simple_strtol(buf, NULL, 10); \
374 \
375 mutex_lock(&data->update_lock); \
376 \
377 if (nr >= 2) { /* TEMP2 and TEMP3 */ \
378 data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \
379 w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \
380 data->temp_##reg##_add[nr-2]); \
381 } else { /* TEMP1 */ \
382 data->temp_##reg = TEMP_TO_REG(val); \
383 w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \
384 data->temp_##reg); \
385 } \
386 \
387 mutex_unlock(&data->update_lock); \
388 return count; \
389 }
390 store_temp_reg(OVER, max);
391 store_temp_reg(HYST, max_hyst);
392
393 #define sysfs_temp_offsets(offset) \
394 static SENSOR_DEVICE_ATTR(temp##offset##_input, S_IRUGO, \
395 show_temp, NULL, offset); \
396 static SENSOR_DEVICE_ATTR(temp##offset##_max, S_IRUGO | S_IWUSR, \
397 show_temp_max, store_temp_max, offset); \
398 static SENSOR_DEVICE_ATTR(temp##offset##_max_hyst, S_IRUGO | S_IWUSR, \
399 show_temp_max_hyst, store_temp_max_hyst, offset);
400
401 sysfs_temp_offsets(1);
402 sysfs_temp_offsets(2);
403 sysfs_temp_offsets(3);
404
405 static ssize_t
406 show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf)
407 {
408 struct w83781d_data *data = w83781d_update_device(dev);
409 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
410 }
411
412 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
413
414 static ssize_t
415 show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf)
416 {
417 struct w83781d_data *data = dev_get_drvdata(dev);
418 return sprintf(buf, "%ld\n", (long) data->vrm);
419 }
420
421 static ssize_t
422 store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
423 {
424 struct w83781d_data *data = dev_get_drvdata(dev);
425 u32 val;
426
427 val = simple_strtoul(buf, NULL, 10);
428 data->vrm = val;
429
430 return count;
431 }
432
433 static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
434
435 static ssize_t
436 show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf)
437 {
438 struct w83781d_data *data = w83781d_update_device(dev);
439 return sprintf(buf, "%u\n", data->alarms);
440 }
441
442 static DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
443
444 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
445 char *buf)
446 {
447 struct w83781d_data *data = w83781d_update_device(dev);
448 int bitnr = to_sensor_dev_attr(attr)->index;
449 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
450 }
451
452 /* The W83781D has a single alarm bit for temp2 and temp3 */
453 static ssize_t show_temp3_alarm(struct device *dev,
454 struct device_attribute *attr, char *buf)
455 {
456 struct w83781d_data *data = w83781d_update_device(dev);
457 int bitnr = (data->type == w83781d) ? 5 : 13;
458 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
459 }
460
461 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
462 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
463 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2);
464 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3);
465 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8);
466 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 9);
467 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 10);
468 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16);
469 static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17);
470 static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6);
471 static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7);
472 static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11);
473 static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4);
474 static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5);
475 static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_temp3_alarm, NULL, 0);
476
477 static ssize_t show_beep_mask (struct device *dev, struct device_attribute *attr, char *buf)
478 {
479 struct w83781d_data *data = w83781d_update_device(dev);
480 return sprintf(buf, "%ld\n",
481 (long)BEEP_MASK_FROM_REG(data->beep_mask, data->type));
482 }
483
484 static ssize_t
485 store_beep_mask(struct device *dev, struct device_attribute *attr,
486 const char *buf, size_t count)
487 {
488 struct w83781d_data *data = dev_get_drvdata(dev);
489 u32 val;
490
491 val = simple_strtoul(buf, NULL, 10);
492
493 mutex_lock(&data->update_lock);
494 data->beep_mask &= 0x8000; /* preserve beep enable */
495 data->beep_mask |= BEEP_MASK_TO_REG(val, data->type);
496 w83781d_write_value(data, W83781D_REG_BEEP_INTS1,
497 data->beep_mask & 0xff);
498 w83781d_write_value(data, W83781D_REG_BEEP_INTS2,
499 (data->beep_mask >> 8) & 0xff);
500 if (data->type != w83781d && data->type != as99127f) {
501 w83781d_write_value(data, W83781D_REG_BEEP_INTS3,
502 ((data->beep_mask) >> 16) & 0xff);
503 }
504 mutex_unlock(&data->update_lock);
505
506 return count;
507 }
508
509 static DEVICE_ATTR(beep_mask, S_IRUGO | S_IWUSR,
510 show_beep_mask, store_beep_mask);
511
512 static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
513 char *buf)
514 {
515 struct w83781d_data *data = w83781d_update_device(dev);
516 int bitnr = to_sensor_dev_attr(attr)->index;
517 return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1);
518 }
519
520 static ssize_t
521 store_beep(struct device *dev, struct device_attribute *attr,
522 const char *buf, size_t count)
523 {
524 struct w83781d_data *data = dev_get_drvdata(dev);
525 int bitnr = to_sensor_dev_attr(attr)->index;
526 unsigned long bit;
527 u8 reg;
528
529 bit = simple_strtoul(buf, NULL, 10);
530 if (bit & ~1)
531 return -EINVAL;
532
533 mutex_lock(&data->update_lock);
534 if (bit)
535 data->beep_mask |= (1 << bitnr);
536 else
537 data->beep_mask &= ~(1 << bitnr);
538
539 if (bitnr < 8) {
540 reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS1);
541 if (bit)
542 reg |= (1 << bitnr);
543 else
544 reg &= ~(1 << bitnr);
545 w83781d_write_value(data, W83781D_REG_BEEP_INTS1, reg);
546 } else if (bitnr < 16) {
547 reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS2);
548 if (bit)
549 reg |= (1 << (bitnr - 8));
550 else
551 reg &= ~(1 << (bitnr - 8));
552 w83781d_write_value(data, W83781D_REG_BEEP_INTS2, reg);
553 } else {
554 reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS3);
555 if (bit)
556 reg |= (1 << (bitnr - 16));
557 else
558 reg &= ~(1 << (bitnr - 16));
559 w83781d_write_value(data, W83781D_REG_BEEP_INTS3, reg);
560 }
561 mutex_unlock(&data->update_lock);
562
563 return count;
564 }
565
566 /* The W83781D has a single beep bit for temp2 and temp3 */
567 static ssize_t show_temp3_beep(struct device *dev,
568 struct device_attribute *attr, char *buf)
569 {
570 struct w83781d_data *data = w83781d_update_device(dev);
571 int bitnr = (data->type == w83781d) ? 5 : 13;
572 return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1);
573 }
574
575 static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
576 show_beep, store_beep, 0);
577 static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO | S_IWUSR,
578 show_beep, store_beep, 1);
579 static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO | S_IWUSR,
580 show_beep, store_beep, 2);
581 static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO | S_IWUSR,
582 show_beep, store_beep, 3);
583 static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO | S_IWUSR,
584 show_beep, store_beep, 8);
585 static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO | S_IWUSR,
586 show_beep, store_beep, 9);
587 static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO | S_IWUSR,
588 show_beep, store_beep, 10);
589 static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO | S_IWUSR,
590 show_beep, store_beep, 16);
591 static SENSOR_DEVICE_ATTR(in8_beep, S_IRUGO | S_IWUSR,
592 show_beep, store_beep, 17);
593 static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO | S_IWUSR,
594 show_beep, store_beep, 6);
595 static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO | S_IWUSR,
596 show_beep, store_beep, 7);
597 static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO | S_IWUSR,
598 show_beep, store_beep, 11);
599 static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
600 show_beep, store_beep, 4);
601 static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO | S_IWUSR,
602 show_beep, store_beep, 5);
603 static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO,
604 show_temp3_beep, store_beep, 13);
605 static SENSOR_DEVICE_ATTR(beep_enable, S_IRUGO | S_IWUSR,
606 show_beep, store_beep, 15);
607
608 static ssize_t
609 show_fan_div(struct device *dev, struct device_attribute *da, char *buf)
610 {
611 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
612 struct w83781d_data *data = w83781d_update_device(dev);
613 return sprintf(buf, "%ld\n",
614 (long) DIV_FROM_REG(data->fan_div[attr->index]));
615 }
616
617 /* Note: we save and restore the fan minimum here, because its value is
618 determined in part by the fan divisor. This follows the principle of
619 least surprise; the user doesn't expect the fan minimum to change just
620 because the divisor changed. */
621 static ssize_t
622 store_fan_div(struct device *dev, struct device_attribute *da,
623 const char *buf, size_t count)
624 {
625 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
626 struct w83781d_data *data = dev_get_drvdata(dev);
627 unsigned long min;
628 int nr = attr->index;
629 u8 reg;
630 unsigned long val = simple_strtoul(buf, NULL, 10);
631
632 mutex_lock(&data->update_lock);
633
634 /* Save fan_min */
635 min = FAN_FROM_REG(data->fan_min[nr],
636 DIV_FROM_REG(data->fan_div[nr]));
637
638 data->fan_div[nr] = DIV_TO_REG(val, data->type);
639
640 reg = (w83781d_read_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
641 & (nr==0 ? 0xcf : 0x3f))
642 | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6));
643 w83781d_write_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
644
645 /* w83781d and as99127f don't have extended divisor bits */
646 if (data->type != w83781d && data->type != as99127f) {
647 reg = (w83781d_read_value(data, W83781D_REG_VBAT)
648 & ~(1 << (5 + nr)))
649 | ((data->fan_div[nr] & 0x04) << (3 + nr));
650 w83781d_write_value(data, W83781D_REG_VBAT, reg);
651 }
652
653 /* Restore fan_min */
654 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
655 w83781d_write_value(data, W83781D_REG_FAN_MIN(nr), data->fan_min[nr]);
656
657 mutex_unlock(&data->update_lock);
658 return count;
659 }
660
661 static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR,
662 show_fan_div, store_fan_div, 0);
663 static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR,
664 show_fan_div, store_fan_div, 1);
665 static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR,
666 show_fan_div, store_fan_div, 2);
667
668 static ssize_t
669 show_pwm(struct device *dev, struct device_attribute *da, char *buf)
670 {
671 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
672 struct w83781d_data *data = w83781d_update_device(dev);
673 return sprintf(buf, "%d\n", (int)data->pwm[attr->index]);
674 }
675
676 static ssize_t
677 show_pwm2_enable(struct device *dev, struct device_attribute *da, char *buf)
678 {
679 struct w83781d_data *data = w83781d_update_device(dev);
680 return sprintf(buf, "%d\n", (int)data->pwm2_enable);
681 }
682
683 static ssize_t
684 store_pwm(struct device *dev, struct device_attribute *da, const char *buf,
685 size_t count)
686 {
687 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
688 struct w83781d_data *data = dev_get_drvdata(dev);
689 int nr = attr->index;
690 u32 val;
691
692 val = simple_strtoul(buf, NULL, 10);
693
694 mutex_lock(&data->update_lock);
695 data->pwm[nr] = SENSORS_LIMIT(val, 0, 255);
696 w83781d_write_value(data, W83781D_REG_PWM[nr], data->pwm[nr]);
697 mutex_unlock(&data->update_lock);
698 return count;
699 }
700
701 static ssize_t
702 store_pwm2_enable(struct device *dev, struct device_attribute *da,
703 const char *buf, size_t count)
704 {
705 struct w83781d_data *data = dev_get_drvdata(dev);
706 u32 val, reg;
707
708 val = simple_strtoul(buf, NULL, 10);
709
710 mutex_lock(&data->update_lock);
711
712 switch (val) {
713 case 0:
714 case 1:
715 reg = w83781d_read_value(data, W83781D_REG_PWMCLK12);
716 w83781d_write_value(data, W83781D_REG_PWMCLK12,
717 (reg & 0xf7) | (val << 3));
718
719 reg = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
720 w83781d_write_value(data, W83781D_REG_BEEP_CONFIG,
721 (reg & 0xef) | (!val << 4));
722
723 data->pwm2_enable = val;
724 break;
725
726 default:
727 mutex_unlock(&data->update_lock);
728 return -EINVAL;
729 }
730
731 mutex_unlock(&data->update_lock);
732 return count;
733 }
734
735 static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 0);
736 static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 1);
737 static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 2);
738 static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 3);
739 /* only PWM2 can be enabled/disabled */
740 static DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
741 show_pwm2_enable, store_pwm2_enable);
742
743 static ssize_t
744 show_sensor(struct device *dev, struct device_attribute *da, char *buf)
745 {
746 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
747 struct w83781d_data *data = w83781d_update_device(dev);
748 return sprintf(buf, "%d\n", (int)data->sens[attr->index]);
749 }
750
751 static ssize_t
752 store_sensor(struct device *dev, struct device_attribute *da,
753 const char *buf, size_t count)
754 {
755 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
756 struct w83781d_data *data = dev_get_drvdata(dev);
757 int nr = attr->index;
758 u32 val, tmp;
759
760 val = simple_strtoul(buf, NULL, 10);
761
762 mutex_lock(&data->update_lock);
763
764 switch (val) {
765 case 1: /* PII/Celeron diode */
766 tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
767 w83781d_write_value(data, W83781D_REG_SCFG1,
768 tmp | BIT_SCFG1[nr]);
769 tmp = w83781d_read_value(data, W83781D_REG_SCFG2);
770 w83781d_write_value(data, W83781D_REG_SCFG2,
771 tmp | BIT_SCFG2[nr]);
772 data->sens[nr] = val;
773 break;
774 case 2: /* 3904 */
775 tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
776 w83781d_write_value(data, W83781D_REG_SCFG1,
777 tmp | BIT_SCFG1[nr]);
778 tmp = w83781d_read_value(data, W83781D_REG_SCFG2);
779 w83781d_write_value(data, W83781D_REG_SCFG2,
780 tmp & ~BIT_SCFG2[nr]);
781 data->sens[nr] = val;
782 break;
783 case W83781D_DEFAULT_BETA:
784 dev_warn(dev, "Sensor type %d is deprecated, please use 4 "
785 "instead\n", W83781D_DEFAULT_BETA);
786 /* fall through */
787 case 4: /* thermistor */
788 tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
789 w83781d_write_value(data, W83781D_REG_SCFG1,
790 tmp & ~BIT_SCFG1[nr]);
791 data->sens[nr] = val;
792 break;
793 default:
794 dev_err(dev, "Invalid sensor type %ld; must be 1, 2, or 4\n",
795 (long) val);
796 break;
797 }
798
799 mutex_unlock(&data->update_lock);
800 return count;
801 }
802
803 static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR,
804 show_sensor, store_sensor, 0);
805 static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR,
806 show_sensor, store_sensor, 1);
807 static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR,
808 show_sensor, store_sensor, 2);
809
810 /* Assumes that adapter is of I2C, not ISA variety.
811 * OTHERWISE DON'T CALL THIS
812 */
813 static int
814 w83781d_detect_subclients(struct i2c_client *new_client)
815 {
816 int i, val1 = 0, id;
817 int err;
818 int address = new_client->addr;
819 unsigned short sc_addr[2];
820 struct i2c_adapter *adapter = new_client->adapter;
821 struct w83781d_data *data = i2c_get_clientdata(new_client);
822 enum chips kind = data->type;
823
824 id = i2c_adapter_id(adapter);
825
826 if (force_subclients[0] == id && force_subclients[1] == address) {
827 for (i = 2; i <= 3; i++) {
828 if (force_subclients[i] < 0x48 ||
829 force_subclients[i] > 0x4f) {
830 dev_err(&new_client->dev, "Invalid subclient "
831 "address %d; must be 0x48-0x4f\n",
832 force_subclients[i]);
833 err = -EINVAL;
834 goto ERROR_SC_1;
835 }
836 }
837 w83781d_write_value(data, W83781D_REG_I2C_SUBADDR,
838 (force_subclients[2] & 0x07) |
839 ((force_subclients[3] & 0x07) << 4));
840 sc_addr[0] = force_subclients[2];
841 } else {
842 val1 = w83781d_read_value(data, W83781D_REG_I2C_SUBADDR);
843 sc_addr[0] = 0x48 + (val1 & 0x07);
844 }
845
846 if (kind != w83783s) {
847 if (force_subclients[0] == id &&
848 force_subclients[1] == address) {
849 sc_addr[1] = force_subclients[3];
850 } else {
851 sc_addr[1] = 0x48 + ((val1 >> 4) & 0x07);
852 }
853 if (sc_addr[0] == sc_addr[1]) {
854 dev_err(&new_client->dev,
855 "Duplicate addresses 0x%x for subclients.\n",
856 sc_addr[0]);
857 err = -EBUSY;
858 goto ERROR_SC_2;
859 }
860 }
861
862 for (i = 0; i <= 1; i++) {
863 data->lm75[i] = i2c_new_dummy(adapter, sc_addr[i]);
864 if (!data->lm75[i]) {
865 dev_err(&new_client->dev, "Subclient %d "
866 "registration at address 0x%x "
867 "failed.\n", i, sc_addr[i]);
868 err = -ENOMEM;
869 if (i == 1)
870 goto ERROR_SC_3;
871 goto ERROR_SC_2;
872 }
873 if (kind == w83783s)
874 break;
875 }
876
877 return 0;
878
879 /* Undo inits in case of errors */
880 ERROR_SC_3:
881 i2c_unregister_device(data->lm75[0]);
882 ERROR_SC_2:
883 ERROR_SC_1:
884 return err;
885 }
886
887 #define IN_UNIT_ATTRS(X) \
888 &sensor_dev_attr_in##X##_input.dev_attr.attr, \
889 &sensor_dev_attr_in##X##_min.dev_attr.attr, \
890 &sensor_dev_attr_in##X##_max.dev_attr.attr, \
891 &sensor_dev_attr_in##X##_alarm.dev_attr.attr, \
892 &sensor_dev_attr_in##X##_beep.dev_attr.attr
893
894 #define FAN_UNIT_ATTRS(X) \
895 &sensor_dev_attr_fan##X##_input.dev_attr.attr, \
896 &sensor_dev_attr_fan##X##_min.dev_attr.attr, \
897 &sensor_dev_attr_fan##X##_div.dev_attr.attr, \
898 &sensor_dev_attr_fan##X##_alarm.dev_attr.attr, \
899 &sensor_dev_attr_fan##X##_beep.dev_attr.attr
900
901 #define TEMP_UNIT_ATTRS(X) \
902 &sensor_dev_attr_temp##X##_input.dev_attr.attr, \
903 &sensor_dev_attr_temp##X##_max.dev_attr.attr, \
904 &sensor_dev_attr_temp##X##_max_hyst.dev_attr.attr, \
905 &sensor_dev_attr_temp##X##_alarm.dev_attr.attr, \
906 &sensor_dev_attr_temp##X##_beep.dev_attr.attr
907
908 static struct attribute* w83781d_attributes[] = {
909 IN_UNIT_ATTRS(0),
910 IN_UNIT_ATTRS(2),
911 IN_UNIT_ATTRS(3),
912 IN_UNIT_ATTRS(4),
913 IN_UNIT_ATTRS(5),
914 IN_UNIT_ATTRS(6),
915 FAN_UNIT_ATTRS(1),
916 FAN_UNIT_ATTRS(2),
917 FAN_UNIT_ATTRS(3),
918 TEMP_UNIT_ATTRS(1),
919 TEMP_UNIT_ATTRS(2),
920 &dev_attr_cpu0_vid.attr,
921 &dev_attr_vrm.attr,
922 &dev_attr_alarms.attr,
923 &dev_attr_beep_mask.attr,
924 &sensor_dev_attr_beep_enable.dev_attr.attr,
925 NULL
926 };
927 static const struct attribute_group w83781d_group = {
928 .attrs = w83781d_attributes,
929 };
930
931 static struct attribute *w83781d_attributes_opt[] = {
932 IN_UNIT_ATTRS(1),
933 IN_UNIT_ATTRS(7),
934 IN_UNIT_ATTRS(8),
935 TEMP_UNIT_ATTRS(3),
936 &sensor_dev_attr_pwm1.dev_attr.attr,
937 &sensor_dev_attr_pwm2.dev_attr.attr,
938 &sensor_dev_attr_pwm3.dev_attr.attr,
939 &sensor_dev_attr_pwm4.dev_attr.attr,
940 &dev_attr_pwm2_enable.attr,
941 &sensor_dev_attr_temp1_type.dev_attr.attr,
942 &sensor_dev_attr_temp2_type.dev_attr.attr,
943 &sensor_dev_attr_temp3_type.dev_attr.attr,
944 NULL
945 };
946 static const struct attribute_group w83781d_group_opt = {
947 .attrs = w83781d_attributes_opt,
948 };
949
950 /* No clean up is done on error, it's up to the caller */
951 static int
952 w83781d_create_files(struct device *dev, int kind, int is_isa)
953 {
954 int err;
955
956 if ((err = sysfs_create_group(&dev->kobj, &w83781d_group)))
957 return err;
958
959 if (kind != w83783s) {
960 if ((err = device_create_file(dev,
961 &sensor_dev_attr_in1_input.dev_attr))
962 || (err = device_create_file(dev,
963 &sensor_dev_attr_in1_min.dev_attr))
964 || (err = device_create_file(dev,
965 &sensor_dev_attr_in1_max.dev_attr))
966 || (err = device_create_file(dev,
967 &sensor_dev_attr_in1_alarm.dev_attr))
968 || (err = device_create_file(dev,
969 &sensor_dev_attr_in1_beep.dev_attr)))
970 return err;
971 }
972 if (kind != as99127f && kind != w83781d && kind != w83783s) {
973 if ((err = device_create_file(dev,
974 &sensor_dev_attr_in7_input.dev_attr))
975 || (err = device_create_file(dev,
976 &sensor_dev_attr_in7_min.dev_attr))
977 || (err = device_create_file(dev,
978 &sensor_dev_attr_in7_max.dev_attr))
979 || (err = device_create_file(dev,
980 &sensor_dev_attr_in7_alarm.dev_attr))
981 || (err = device_create_file(dev,
982 &sensor_dev_attr_in7_beep.dev_attr))
983 || (err = device_create_file(dev,
984 &sensor_dev_attr_in8_input.dev_attr))
985 || (err = device_create_file(dev,
986 &sensor_dev_attr_in8_min.dev_attr))
987 || (err = device_create_file(dev,
988 &sensor_dev_attr_in8_max.dev_attr))
989 || (err = device_create_file(dev,
990 &sensor_dev_attr_in8_alarm.dev_attr))
991 || (err = device_create_file(dev,
992 &sensor_dev_attr_in8_beep.dev_attr)))
993 return err;
994 }
995 if (kind != w83783s) {
996 if ((err = device_create_file(dev,
997 &sensor_dev_attr_temp3_input.dev_attr))
998 || (err = device_create_file(dev,
999 &sensor_dev_attr_temp3_max.dev_attr))
1000 || (err = device_create_file(dev,
1001 &sensor_dev_attr_temp3_max_hyst.dev_attr))
1002 || (err = device_create_file(dev,
1003 &sensor_dev_attr_temp3_alarm.dev_attr))
1004 || (err = device_create_file(dev,
1005 &sensor_dev_attr_temp3_beep.dev_attr)))
1006 return err;
1007
1008 if (kind != w83781d) {
1009 err = sysfs_chmod_file(&dev->kobj,
1010 &sensor_dev_attr_temp3_alarm.dev_attr.attr,
1011 S_IRUGO | S_IWUSR);
1012 if (err)
1013 return err;
1014 }
1015 }
1016
1017 if (kind != w83781d && kind != as99127f) {
1018 if ((err = device_create_file(dev,
1019 &sensor_dev_attr_pwm1.dev_attr))
1020 || (err = device_create_file(dev,
1021 &sensor_dev_attr_pwm2.dev_attr))
1022 || (err = device_create_file(dev, &dev_attr_pwm2_enable)))
1023 return err;
1024 }
1025 if (kind == w83782d && !is_isa) {
1026 if ((err = device_create_file(dev,
1027 &sensor_dev_attr_pwm3.dev_attr))
1028 || (err = device_create_file(dev,
1029 &sensor_dev_attr_pwm4.dev_attr)))
1030 return err;
1031 }
1032
1033 if (kind != as99127f && kind != w83781d) {
1034 if ((err = device_create_file(dev,
1035 &sensor_dev_attr_temp1_type.dev_attr))
1036 || (err = device_create_file(dev,
1037 &sensor_dev_attr_temp2_type.dev_attr)))
1038 return err;
1039 if (kind != w83783s) {
1040 if ((err = device_create_file(dev,
1041 &sensor_dev_attr_temp3_type.dev_attr)))
1042 return err;
1043 }
1044 }
1045
1046 return 0;
1047 }
1048
1049 /* Return 0 if detection is successful, -ENODEV otherwise */
1050 static int
1051 w83781d_detect(struct i2c_client *client, int kind,
1052 struct i2c_board_info *info)
1053 {
1054 int val1 = 0, val2;
1055 struct w83781d_data *isa = w83781d_data_if_isa();
1056 struct i2c_adapter *adapter = client->adapter;
1057 int address = client->addr;
1058 const char *client_name = "";
1059 enum vendor { winbond, asus } vendid;
1060
1061 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1062 return -ENODEV;
1063
1064 /* We block updates of the ISA device to minimize the risk of
1065 concurrent access to the same W83781D chip through different
1066 interfaces. */
1067 if (isa)
1068 mutex_lock(&isa->update_lock);
1069
1070 /* The w8378?d may be stuck in some other bank than bank 0. This may
1071 make reading other information impossible. Specify a force=... or
1072 force_*=... parameter, and the Winbond will be reset to the right
1073 bank. */
1074 if (kind < 0) {
1075 if (i2c_smbus_read_byte_data
1076 (client, W83781D_REG_CONFIG) & 0x80) {
1077 dev_dbg(&adapter->dev, "Detection of w83781d chip "
1078 "failed at step 3\n");
1079 goto err_nodev;
1080 }
1081 val1 = i2c_smbus_read_byte_data(client, W83781D_REG_BANK);
1082 val2 = i2c_smbus_read_byte_data(client, W83781D_REG_CHIPMAN);
1083 /* Check for Winbond or Asus ID if in bank 0 */
1084 if ((!(val1 & 0x07)) &&
1085 (((!(val1 & 0x80)) && (val2 != 0xa3) && (val2 != 0xc3))
1086 || ((val1 & 0x80) && (val2 != 0x5c) && (val2 != 0x12)))) {
1087 dev_dbg(&adapter->dev, "Detection of w83781d chip "
1088 "failed at step 4\n");
1089 goto err_nodev;
1090 }
1091 /* If Winbond SMBus, check address at 0x48.
1092 Asus doesn't support, except for as99127f rev.2 */
1093 if ((!(val1 & 0x80) && (val2 == 0xa3)) ||
1094 ((val1 & 0x80) && (val2 == 0x5c))) {
1095 if (i2c_smbus_read_byte_data
1096 (client, W83781D_REG_I2C_ADDR) != address) {
1097 dev_dbg(&adapter->dev, "Detection of w83781d "
1098 "chip failed at step 5\n");
1099 goto err_nodev;
1100 }
1101 }
1102 }
1103
1104 /* We have either had a force parameter, or we have already detected the
1105 Winbond. Put it now into bank 0 and Vendor ID High Byte */
1106 i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1107 (i2c_smbus_read_byte_data(client, W83781D_REG_BANK)
1108 & 0x78) | 0x80);
1109
1110 /* Determine the chip type. */
1111 if (kind <= 0) {
1112 /* get vendor ID */
1113 val2 = i2c_smbus_read_byte_data(client, W83781D_REG_CHIPMAN);
1114 if (val2 == 0x5c)
1115 vendid = winbond;
1116 else if (val2 == 0x12)
1117 vendid = asus;
1118 else {
1119 dev_dbg(&adapter->dev, "w83781d chip vendor is "
1120 "neither Winbond nor Asus\n");
1121 goto err_nodev;
1122 }
1123
1124 val1 = i2c_smbus_read_byte_data(client, W83781D_REG_WCHIPID);
1125 if ((val1 == 0x10 || val1 == 0x11) && vendid == winbond)
1126 kind = w83781d;
1127 else if (val1 == 0x30 && vendid == winbond)
1128 kind = w83782d;
1129 else if (val1 == 0x40 && vendid == winbond && address == 0x2d)
1130 kind = w83783s;
1131 else if (val1 == 0x31)
1132 kind = as99127f;
1133 else {
1134 if (kind == 0)
1135 dev_warn(&adapter->dev, "Ignoring 'force' "
1136 "parameter for unknown chip at "
1137 "address 0x%02x\n", address);
1138 goto err_nodev;
1139 }
1140
1141 if ((kind == w83781d || kind == w83782d)
1142 && w83781d_alias_detect(client, val1)) {
1143 dev_dbg(&adapter->dev, "Device at 0x%02x appears to "
1144 "be the same as ISA device\n", address);
1145 goto err_nodev;
1146 }
1147 }
1148
1149 if (isa)
1150 mutex_unlock(&isa->update_lock);
1151
1152 if (kind == w83781d) {
1153 client_name = "w83781d";
1154 } else if (kind == w83782d) {
1155 client_name = "w83782d";
1156 } else if (kind == w83783s) {
1157 client_name = "w83783s";
1158 } else if (kind == as99127f) {
1159 client_name = "as99127f";
1160 }
1161
1162 strlcpy(info->type, client_name, I2C_NAME_SIZE);
1163
1164 return 0;
1165
1166 err_nodev:
1167 if (isa)
1168 mutex_unlock(&isa->update_lock);
1169 return -ENODEV;
1170 }
1171
1172 static int
1173 w83781d_probe(struct i2c_client *client, const struct i2c_device_id *id)
1174 {
1175 struct device *dev = &client->dev;
1176 struct w83781d_data *data;
1177 int err;
1178
1179 data = kzalloc(sizeof(struct w83781d_data), GFP_KERNEL);
1180 if (!data) {
1181 err = -ENOMEM;
1182 goto ERROR1;
1183 }
1184
1185 i2c_set_clientdata(client, data);
1186 mutex_init(&data->lock);
1187 mutex_init(&data->update_lock);
1188
1189 data->type = id->driver_data;
1190 data->client = client;
1191
1192 /* attach secondary i2c lm75-like clients */
1193 err = w83781d_detect_subclients(client);
1194 if (err)
1195 goto ERROR3;
1196
1197 /* Initialize the chip */
1198 w83781d_init_device(dev);
1199
1200 /* Register sysfs hooks */
1201 err = w83781d_create_files(dev, data->type, 0);
1202 if (err)
1203 goto ERROR4;
1204
1205 data->hwmon_dev = hwmon_device_register(dev);
1206 if (IS_ERR(data->hwmon_dev)) {
1207 err = PTR_ERR(data->hwmon_dev);
1208 goto ERROR4;
1209 }
1210
1211 return 0;
1212
1213 ERROR4:
1214 sysfs_remove_group(&dev->kobj, &w83781d_group);
1215 sysfs_remove_group(&dev->kobj, &w83781d_group_opt);
1216
1217 if (data->lm75[0])
1218 i2c_unregister_device(data->lm75[0]);
1219 if (data->lm75[1])
1220 i2c_unregister_device(data->lm75[1]);
1221 ERROR3:
1222 i2c_set_clientdata(client, NULL);
1223 kfree(data);
1224 ERROR1:
1225 return err;
1226 }
1227
1228 static int
1229 w83781d_remove(struct i2c_client *client)
1230 {
1231 struct w83781d_data *data = i2c_get_clientdata(client);
1232 struct device *dev = &client->dev;
1233
1234 hwmon_device_unregister(data->hwmon_dev);
1235
1236 sysfs_remove_group(&dev->kobj, &w83781d_group);
1237 sysfs_remove_group(&dev->kobj, &w83781d_group_opt);
1238
1239 if (data->lm75[0])
1240 i2c_unregister_device(data->lm75[0]);
1241 if (data->lm75[1])
1242 i2c_unregister_device(data->lm75[1]);
1243
1244 i2c_set_clientdata(client, NULL);
1245 kfree(data);
1246
1247 return 0;
1248 }
1249
1250 static int
1251 w83781d_read_value_i2c(struct w83781d_data *data, u16 reg)
1252 {
1253 struct i2c_client *client = data->client;
1254 int res, bank;
1255 struct i2c_client *cl;
1256
1257 bank = (reg >> 8) & 0x0f;
1258 if (bank > 2)
1259 /* switch banks */
1260 i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1261 bank);
1262 if (bank == 0 || bank > 2) {
1263 res = i2c_smbus_read_byte_data(client, reg & 0xff);
1264 } else {
1265 /* switch to subclient */
1266 cl = data->lm75[bank - 1];
1267 /* convert from ISA to LM75 I2C addresses */
1268 switch (reg & 0xff) {
1269 case 0x50: /* TEMP */
1270 res = swab16(i2c_smbus_read_word_data(cl, 0));
1271 break;
1272 case 0x52: /* CONFIG */
1273 res = i2c_smbus_read_byte_data(cl, 1);
1274 break;
1275 case 0x53: /* HYST */
1276 res = swab16(i2c_smbus_read_word_data(cl, 2));
1277 break;
1278 case 0x55: /* OVER */
1279 default:
1280 res = swab16(i2c_smbus_read_word_data(cl, 3));
1281 break;
1282 }
1283 }
1284 if (bank > 2)
1285 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1286
1287 return res;
1288 }
1289
1290 static int
1291 w83781d_write_value_i2c(struct w83781d_data *data, u16 reg, u16 value)
1292 {
1293 struct i2c_client *client = data->client;
1294 int bank;
1295 struct i2c_client *cl;
1296
1297 bank = (reg >> 8) & 0x0f;
1298 if (bank > 2)
1299 /* switch banks */
1300 i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1301 bank);
1302 if (bank == 0 || bank > 2) {
1303 i2c_smbus_write_byte_data(client, reg & 0xff,
1304 value & 0xff);
1305 } else {
1306 /* switch to subclient */
1307 cl = data->lm75[bank - 1];
1308 /* convert from ISA to LM75 I2C addresses */
1309 switch (reg & 0xff) {
1310 case 0x52: /* CONFIG */
1311 i2c_smbus_write_byte_data(cl, 1, value & 0xff);
1312 break;
1313 case 0x53: /* HYST */
1314 i2c_smbus_write_word_data(cl, 2, swab16(value));
1315 break;
1316 case 0x55: /* OVER */
1317 i2c_smbus_write_word_data(cl, 3, swab16(value));
1318 break;
1319 }
1320 }
1321 if (bank > 2)
1322 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1323
1324 return 0;
1325 }
1326
1327 static void
1328 w83781d_init_device(struct device *dev)
1329 {
1330 struct w83781d_data *data = dev_get_drvdata(dev);
1331 int i, p;
1332 int type = data->type;
1333 u8 tmp;
1334
1335 if (reset && type != as99127f) { /* this resets registers we don't have
1336 documentation for on the as99127f */
1337 /* Resetting the chip has been the default for a long time,
1338 but it causes the BIOS initializations (fan clock dividers,
1339 thermal sensor types...) to be lost, so it is now optional.
1340 It might even go away if nobody reports it as being useful,
1341 as I see very little reason why this would be needed at
1342 all. */
1343 dev_info(dev, "If reset=1 solved a problem you were "
1344 "having, please report!\n");
1345
1346 /* save these registers */
1347 i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
1348 p = w83781d_read_value(data, W83781D_REG_PWMCLK12);
1349 /* Reset all except Watchdog values and last conversion values
1350 This sets fan-divs to 2, among others */
1351 w83781d_write_value(data, W83781D_REG_CONFIG, 0x80);
1352 /* Restore the registers and disable power-on abnormal beep.
1353 This saves FAN 1/2/3 input/output values set by BIOS. */
1354 w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80);
1355 w83781d_write_value(data, W83781D_REG_PWMCLK12, p);
1356 /* Disable master beep-enable (reset turns it on).
1357 Individual beep_mask should be reset to off but for some reason
1358 disabling this bit helps some people not get beeped */
1359 w83781d_write_value(data, W83781D_REG_BEEP_INTS2, 0);
1360 }
1361
1362 /* Disable power-on abnormal beep, as advised by the datasheet.
1363 Already done if reset=1. */
1364 if (init && !reset && type != as99127f) {
1365 i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
1366 w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80);
1367 }
1368
1369 data->vrm = vid_which_vrm();
1370
1371 if ((type != w83781d) && (type != as99127f)) {
1372 tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
1373 for (i = 1; i <= 3; i++) {
1374 if (!(tmp & BIT_SCFG1[i - 1])) {
1375 data->sens[i - 1] = 4;
1376 } else {
1377 if (w83781d_read_value
1378 (data,
1379 W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
1380 data->sens[i - 1] = 1;
1381 else
1382 data->sens[i - 1] = 2;
1383 }
1384 if (type == w83783s && i == 2)
1385 break;
1386 }
1387 }
1388
1389 if (init && type != as99127f) {
1390 /* Enable temp2 */
1391 tmp = w83781d_read_value(data, W83781D_REG_TEMP2_CONFIG);
1392 if (tmp & 0x01) {
1393 dev_warn(dev, "Enabling temp2, readings "
1394 "might not make sense\n");
1395 w83781d_write_value(data, W83781D_REG_TEMP2_CONFIG,
1396 tmp & 0xfe);
1397 }
1398
1399 /* Enable temp3 */
1400 if (type != w83783s) {
1401 tmp = w83781d_read_value(data,
1402 W83781D_REG_TEMP3_CONFIG);
1403 if (tmp & 0x01) {
1404 dev_warn(dev, "Enabling temp3, "
1405 "readings might not make sense\n");
1406 w83781d_write_value(data,
1407 W83781D_REG_TEMP3_CONFIG, tmp & 0xfe);
1408 }
1409 }
1410 }
1411
1412 /* Start monitoring */
1413 w83781d_write_value(data, W83781D_REG_CONFIG,
1414 (w83781d_read_value(data,
1415 W83781D_REG_CONFIG) & 0xf7)
1416 | 0x01);
1417
1418 /* A few vars need to be filled upon startup */
1419 for (i = 0; i < 3; i++) {
1420 data->fan_min[i] = w83781d_read_value(data,
1421 W83781D_REG_FAN_MIN(i));
1422 }
1423
1424 mutex_init(&data->update_lock);
1425 }
1426
1427 static struct w83781d_data *w83781d_update_device(struct device *dev)
1428 {
1429 struct w83781d_data *data = dev_get_drvdata(dev);
1430 struct i2c_client *client = data->client;
1431 int i;
1432
1433 mutex_lock(&data->update_lock);
1434
1435 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1436 || !data->valid) {
1437 dev_dbg(dev, "Starting device update\n");
1438
1439 for (i = 0; i <= 8; i++) {
1440 if (data->type == w83783s && i == 1)
1441 continue; /* 783S has no in1 */
1442 data->in[i] =
1443 w83781d_read_value(data, W83781D_REG_IN(i));
1444 data->in_min[i] =
1445 w83781d_read_value(data, W83781D_REG_IN_MIN(i));
1446 data->in_max[i] =
1447 w83781d_read_value(data, W83781D_REG_IN_MAX(i));
1448 if ((data->type != w83782d) && (i == 6))
1449 break;
1450 }
1451 for (i = 0; i < 3; i++) {
1452 data->fan[i] =
1453 w83781d_read_value(data, W83781D_REG_FAN(i));
1454 data->fan_min[i] =
1455 w83781d_read_value(data, W83781D_REG_FAN_MIN(i));
1456 }
1457 if (data->type != w83781d && data->type != as99127f) {
1458 for (i = 0; i < 4; i++) {
1459 data->pwm[i] =
1460 w83781d_read_value(data,
1461 W83781D_REG_PWM[i]);
1462 if ((data->type != w83782d || !client->driver)
1463 && i == 1)
1464 break;
1465 }
1466 /* Only PWM2 can be disabled */
1467 data->pwm2_enable = (w83781d_read_value(data,
1468 W83781D_REG_PWMCLK12) & 0x08) >> 3;
1469 }
1470
1471 data->temp = w83781d_read_value(data, W83781D_REG_TEMP(1));
1472 data->temp_max =
1473 w83781d_read_value(data, W83781D_REG_TEMP_OVER(1));
1474 data->temp_max_hyst =
1475 w83781d_read_value(data, W83781D_REG_TEMP_HYST(1));
1476 data->temp_add[0] =
1477 w83781d_read_value(data, W83781D_REG_TEMP(2));
1478 data->temp_max_add[0] =
1479 w83781d_read_value(data, W83781D_REG_TEMP_OVER(2));
1480 data->temp_max_hyst_add[0] =
1481 w83781d_read_value(data, W83781D_REG_TEMP_HYST(2));
1482 if (data->type != w83783s) {
1483 data->temp_add[1] =
1484 w83781d_read_value(data, W83781D_REG_TEMP(3));
1485 data->temp_max_add[1] =
1486 w83781d_read_value(data,
1487 W83781D_REG_TEMP_OVER(3));
1488 data->temp_max_hyst_add[1] =
1489 w83781d_read_value(data,
1490 W83781D_REG_TEMP_HYST(3));
1491 }
1492 i = w83781d_read_value(data, W83781D_REG_VID_FANDIV);
1493 data->vid = i & 0x0f;
1494 data->vid |= (w83781d_read_value(data,
1495 W83781D_REG_CHIPID) & 0x01) << 4;
1496 data->fan_div[0] = (i >> 4) & 0x03;
1497 data->fan_div[1] = (i >> 6) & 0x03;
1498 data->fan_div[2] = (w83781d_read_value(data,
1499 W83781D_REG_PIN) >> 6) & 0x03;
1500 if ((data->type != w83781d) && (data->type != as99127f)) {
1501 i = w83781d_read_value(data, W83781D_REG_VBAT);
1502 data->fan_div[0] |= (i >> 3) & 0x04;
1503 data->fan_div[1] |= (i >> 4) & 0x04;
1504 data->fan_div[2] |= (i >> 5) & 0x04;
1505 }
1506 if (data->type == w83782d) {
1507 data->alarms = w83781d_read_value(data,
1508 W83782D_REG_ALARM1)
1509 | (w83781d_read_value(data,
1510 W83782D_REG_ALARM2) << 8)
1511 | (w83781d_read_value(data,
1512 W83782D_REG_ALARM3) << 16);
1513 } else if (data->type == w83783s) {
1514 data->alarms = w83781d_read_value(data,
1515 W83782D_REG_ALARM1)
1516 | (w83781d_read_value(data,
1517 W83782D_REG_ALARM2) << 8);
1518 } else {
1519 /* No real-time status registers, fall back to
1520 interrupt status registers */
1521 data->alarms = w83781d_read_value(data,
1522 W83781D_REG_ALARM1)
1523 | (w83781d_read_value(data,
1524 W83781D_REG_ALARM2) << 8);
1525 }
1526 i = w83781d_read_value(data, W83781D_REG_BEEP_INTS2);
1527 data->beep_mask = (i << 8) +
1528 w83781d_read_value(data, W83781D_REG_BEEP_INTS1);
1529 if ((data->type != w83781d) && (data->type != as99127f)) {
1530 data->beep_mask |=
1531 w83781d_read_value(data,
1532 W83781D_REG_BEEP_INTS3) << 16;
1533 }
1534 data->last_updated = jiffies;
1535 data->valid = 1;
1536 }
1537
1538 mutex_unlock(&data->update_lock);
1539
1540 return data;
1541 }
1542
1543 static const struct i2c_device_id w83781d_ids[] = {
1544 { "w83781d", w83781d, },
1545 { "w83782d", w83782d, },
1546 { "w83783s", w83783s, },
1547 { "as99127f", as99127f },
1548 { /* LIST END */ }
1549 };
1550 MODULE_DEVICE_TABLE(i2c, w83781d_ids);
1551
1552 static struct i2c_driver w83781d_driver = {
1553 .class = I2C_CLASS_HWMON,
1554 .driver = {
1555 .name = "w83781d",
1556 },
1557 .probe = w83781d_probe,
1558 .remove = w83781d_remove,
1559 .id_table = w83781d_ids,
1560 .detect = w83781d_detect,
1561 .address_data = &addr_data,
1562 };
1563
1564 /*
1565 * ISA related code
1566 */
1567 #ifdef CONFIG_ISA
1568
1569 /* ISA device, if found */
1570 static struct platform_device *pdev;
1571
1572 static unsigned short isa_address = 0x290;
1573
1574 /* I2C devices get this name attribute automatically, but for ISA devices
1575 we must create it by ourselves. */
1576 static ssize_t
1577 show_name(struct device *dev, struct device_attribute *devattr, char *buf)
1578 {
1579 struct w83781d_data *data = dev_get_drvdata(dev);
1580 return sprintf(buf, "%s\n", data->name);
1581 }
1582 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
1583
1584 static struct w83781d_data *w83781d_data_if_isa(void)
1585 {
1586 return pdev ? platform_get_drvdata(pdev) : NULL;
1587 }
1588
1589 /* Returns 1 if the I2C chip appears to be an alias of the ISA chip */
1590 static int w83781d_alias_detect(struct i2c_client *client, u8 chipid)
1591 {
1592 struct w83781d_data *isa;
1593 int i;
1594
1595 if (!pdev) /* No ISA chip */
1596 return 0;
1597
1598 isa = platform_get_drvdata(pdev);
1599
1600 if (w83781d_read_value(isa, W83781D_REG_I2C_ADDR) != client->addr)
1601 return 0; /* Address doesn't match */
1602 if (w83781d_read_value(isa, W83781D_REG_WCHIPID) != chipid)
1603 return 0; /* Chip type doesn't match */
1604
1605 /* We compare all the limit registers, the config register and the
1606 * interrupt mask registers */
1607 for (i = 0x2b; i <= 0x3d; i++) {
1608 if (w83781d_read_value(isa, i) !=
1609 i2c_smbus_read_byte_data(client, i))
1610 return 0;
1611 }
1612 if (w83781d_read_value(isa, W83781D_REG_CONFIG) !=
1613 i2c_smbus_read_byte_data(client, W83781D_REG_CONFIG))
1614 return 0;
1615 for (i = 0x43; i <= 0x46; i++) {
1616 if (w83781d_read_value(isa, i) !=
1617 i2c_smbus_read_byte_data(client, i))
1618 return 0;
1619 }
1620
1621 return 1;
1622 }
1623
1624 static int
1625 w83781d_read_value_isa(struct w83781d_data *data, u16 reg)
1626 {
1627 int word_sized, res;
1628
1629 word_sized = (((reg & 0xff00) == 0x100)
1630 || ((reg & 0xff00) == 0x200))
1631 && (((reg & 0x00ff) == 0x50)
1632 || ((reg & 0x00ff) == 0x53)
1633 || ((reg & 0x00ff) == 0x55));
1634 if (reg & 0xff00) {
1635 outb_p(W83781D_REG_BANK,
1636 data->isa_addr + W83781D_ADDR_REG_OFFSET);
1637 outb_p(reg >> 8,
1638 data->isa_addr + W83781D_DATA_REG_OFFSET);
1639 }
1640 outb_p(reg & 0xff, data->isa_addr + W83781D_ADDR_REG_OFFSET);
1641 res = inb_p(data->isa_addr + W83781D_DATA_REG_OFFSET);
1642 if (word_sized) {
1643 outb_p((reg & 0xff) + 1,
1644 data->isa_addr + W83781D_ADDR_REG_OFFSET);
1645 res =
1646 (res << 8) + inb_p(data->isa_addr +
1647 W83781D_DATA_REG_OFFSET);
1648 }
1649 if (reg & 0xff00) {
1650 outb_p(W83781D_REG_BANK,
1651 data->isa_addr + W83781D_ADDR_REG_OFFSET);
1652 outb_p(0, data->isa_addr + W83781D_DATA_REG_OFFSET);
1653 }
1654 return res;
1655 }
1656
1657 static void
1658 w83781d_write_value_isa(struct w83781d_data *data, u16 reg, u16 value)
1659 {
1660 int word_sized;
1661
1662 word_sized = (((reg & 0xff00) == 0x100)
1663 || ((reg & 0xff00) == 0x200))
1664 && (((reg & 0x00ff) == 0x53)
1665 || ((reg & 0x00ff) == 0x55));
1666 if (reg & 0xff00) {
1667 outb_p(W83781D_REG_BANK,
1668 data->isa_addr + W83781D_ADDR_REG_OFFSET);
1669 outb_p(reg >> 8,
1670 data->isa_addr + W83781D_DATA_REG_OFFSET);
1671 }
1672 outb_p(reg & 0xff, data->isa_addr + W83781D_ADDR_REG_OFFSET);
1673 if (word_sized) {
1674 outb_p(value >> 8,
1675 data->isa_addr + W83781D_DATA_REG_OFFSET);
1676 outb_p((reg & 0xff) + 1,
1677 data->isa_addr + W83781D_ADDR_REG_OFFSET);
1678 }
1679 outb_p(value & 0xff, data->isa_addr + W83781D_DATA_REG_OFFSET);
1680 if (reg & 0xff00) {
1681 outb_p(W83781D_REG_BANK,
1682 data->isa_addr + W83781D_ADDR_REG_OFFSET);
1683 outb_p(0, data->isa_addr + W83781D_DATA_REG_OFFSET);
1684 }
1685 }
1686
1687 /* The SMBus locks itself, usually, but nothing may access the Winbond between
1688 bank switches. ISA access must always be locked explicitly!
1689 We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks,
1690 would slow down the W83781D access and should not be necessary.
1691 There are some ugly typecasts here, but the good news is - they should
1692 nowhere else be necessary! */
1693 static int
1694 w83781d_read_value(struct w83781d_data *data, u16 reg)
1695 {
1696 struct i2c_client *client = data->client;
1697 int res;
1698
1699 mutex_lock(&data->lock);
1700 if (client)
1701 res = w83781d_read_value_i2c(data, reg);
1702 else
1703 res = w83781d_read_value_isa(data, reg);
1704 mutex_unlock(&data->lock);
1705 return res;
1706 }
1707
1708 static int
1709 w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value)
1710 {
1711 struct i2c_client *client = data->client;
1712
1713 mutex_lock(&data->lock);
1714 if (client)
1715 w83781d_write_value_i2c(data, reg, value);
1716 else
1717 w83781d_write_value_isa(data, reg, value);
1718 mutex_unlock(&data->lock);
1719 return 0;
1720 }
1721
1722 static int __devinit
1723 w83781d_isa_probe(struct platform_device *pdev)
1724 {
1725 int err, reg;
1726 struct w83781d_data *data;
1727 struct resource *res;
1728
1729 /* Reserve the ISA region */
1730 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1731 if (!request_region(res->start + W83781D_ADDR_REG_OFFSET, 2,
1732 "w83781d")) {
1733 err = -EBUSY;
1734 goto exit;
1735 }
1736
1737 data = kzalloc(sizeof(struct w83781d_data), GFP_KERNEL);
1738 if (!data) {
1739 err = -ENOMEM;
1740 goto exit_release_region;
1741 }
1742 mutex_init(&data->lock);
1743 data->isa_addr = res->start;
1744 platform_set_drvdata(pdev, data);
1745
1746 reg = w83781d_read_value(data, W83781D_REG_WCHIPID);
1747 switch (reg) {
1748 case 0x30:
1749 data->type = w83782d;
1750 data->name = "w83782d";
1751 break;
1752 default:
1753 data->type = w83781d;
1754 data->name = "w83781d";
1755 }
1756
1757 /* Initialize the W83781D chip */
1758 w83781d_init_device(&pdev->dev);
1759
1760 /* Register sysfs hooks */
1761 err = w83781d_create_files(&pdev->dev, data->type, 1);
1762 if (err)
1763 goto exit_remove_files;
1764
1765 err = device_create_file(&pdev->dev, &dev_attr_name);
1766 if (err)
1767 goto exit_remove_files;
1768
1769 data->hwmon_dev = hwmon_device_register(&pdev->dev);
1770 if (IS_ERR(data->hwmon_dev)) {
1771 err = PTR_ERR(data->hwmon_dev);
1772 goto exit_remove_files;
1773 }
1774
1775 return 0;
1776
1777 exit_remove_files:
1778 sysfs_remove_group(&pdev->dev.kobj, &w83781d_group);
1779 sysfs_remove_group(&pdev->dev.kobj, &w83781d_group_opt);
1780 device_remove_file(&pdev->dev, &dev_attr_name);
1781 kfree(data);
1782 exit_release_region:
1783 release_region(res->start + W83781D_ADDR_REG_OFFSET, 2);
1784 exit:
1785 return err;
1786 }
1787
1788 static int __devexit
1789 w83781d_isa_remove(struct platform_device *pdev)
1790 {
1791 struct w83781d_data *data = platform_get_drvdata(pdev);
1792
1793 hwmon_device_unregister(data->hwmon_dev);
1794 sysfs_remove_group(&pdev->dev.kobj, &w83781d_group);
1795 sysfs_remove_group(&pdev->dev.kobj, &w83781d_group_opt);
1796 device_remove_file(&pdev->dev, &dev_attr_name);
1797 release_region(data->isa_addr + W83781D_ADDR_REG_OFFSET, 2);
1798 kfree(data);
1799
1800 return 0;
1801 }
1802
1803 static struct platform_driver w83781d_isa_driver = {
1804 .driver = {
1805 .owner = THIS_MODULE,
1806 .name = "w83781d",
1807 },
1808 .probe = w83781d_isa_probe,
1809 .remove = __devexit_p(w83781d_isa_remove),
1810 };
1811
1812 /* return 1 if a supported chip is found, 0 otherwise */
1813 static int __init
1814 w83781d_isa_found(unsigned short address)
1815 {
1816 int val, save, found = 0;
1817
1818 /* We have to request the region in two parts because some
1819 boards declare base+4 to base+7 as a PNP device */
1820 if (!request_region(address, 4, "w83781d")) {
1821 pr_debug("w83781d: Failed to request low part of region\n");
1822 return 0;
1823 }
1824 if (!request_region(address + 4, 4, "w83781d")) {
1825 pr_debug("w83781d: Failed to request high part of region\n");
1826 release_region(address, 4);
1827 return 0;
1828 }
1829
1830 #define REALLY_SLOW_IO
1831 /* We need the timeouts for at least some W83781D-like
1832 chips. But only if we read 'undefined' registers. */
1833 val = inb_p(address + 1);
1834 if (inb_p(address + 2) != val
1835 || inb_p(address + 3) != val
1836 || inb_p(address + 7) != val) {
1837 pr_debug("w83781d: Detection failed at step 1\n");
1838 goto release;
1839 }
1840 #undef REALLY_SLOW_IO
1841
1842 /* We should be able to change the 7 LSB of the address port. The
1843 MSB (busy flag) should be clear initially, set after the write. */
1844 save = inb_p(address + W83781D_ADDR_REG_OFFSET);
1845 if (save & 0x80) {
1846 pr_debug("w83781d: Detection failed at step 2\n");
1847 goto release;
1848 }
1849 val = ~save & 0x7f;
1850 outb_p(val, address + W83781D_ADDR_REG_OFFSET);
1851 if (inb_p(address + W83781D_ADDR_REG_OFFSET) != (val | 0x80)) {
1852 outb_p(save, address + W83781D_ADDR_REG_OFFSET);
1853 pr_debug("w83781d: Detection failed at step 3\n");
1854 goto release;
1855 }
1856
1857 /* We found a device, now see if it could be a W83781D */
1858 outb_p(W83781D_REG_CONFIG, address + W83781D_ADDR_REG_OFFSET);
1859 val = inb_p(address + W83781D_DATA_REG_OFFSET);
1860 if (val & 0x80) {
1861 pr_debug("w83781d: Detection failed at step 4\n");
1862 goto release;
1863 }
1864 outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET);
1865 save = inb_p(address + W83781D_DATA_REG_OFFSET);
1866 outb_p(W83781D_REG_CHIPMAN, address + W83781D_ADDR_REG_OFFSET);
1867 val = inb_p(address + W83781D_DATA_REG_OFFSET);
1868 if ((!(save & 0x80) && (val != 0xa3))
1869 || ((save & 0x80) && (val != 0x5c))) {
1870 pr_debug("w83781d: Detection failed at step 5\n");
1871 goto release;
1872 }
1873 outb_p(W83781D_REG_I2C_ADDR, address + W83781D_ADDR_REG_OFFSET);
1874 val = inb_p(address + W83781D_DATA_REG_OFFSET);
1875 if (val < 0x03 || val > 0x77) { /* Not a valid I2C address */
1876 pr_debug("w83781d: Detection failed at step 6\n");
1877 goto release;
1878 }
1879
1880 /* The busy flag should be clear again */
1881 if (inb_p(address + W83781D_ADDR_REG_OFFSET) & 0x80) {
1882 pr_debug("w83781d: Detection failed at step 7\n");
1883 goto release;
1884 }
1885
1886 /* Determine the chip type */
1887 outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET);
1888 save = inb_p(address + W83781D_DATA_REG_OFFSET);
1889 outb_p(save & 0xf8, address + W83781D_DATA_REG_OFFSET);
1890 outb_p(W83781D_REG_WCHIPID, address + W83781D_ADDR_REG_OFFSET);
1891 val = inb_p(address + W83781D_DATA_REG_OFFSET);
1892 if ((val & 0xfe) == 0x10 /* W83781D */
1893 || val == 0x30) /* W83782D */
1894 found = 1;
1895
1896 if (found)
1897 pr_info("w83781d: Found a %s chip at %#x\n",
1898 val == 0x30 ? "W83782D" : "W83781D", (int)address);
1899
1900 release:
1901 release_region(address + 4, 4);
1902 release_region(address, 4);
1903 return found;
1904 }
1905
1906 static int __init
1907 w83781d_isa_device_add(unsigned short address)
1908 {
1909 struct resource res = {
1910 .start = address,
1911 .end = address + W83781D_EXTENT - 1,
1912 .name = "w83781d",
1913 .flags = IORESOURCE_IO,
1914 };
1915 int err;
1916
1917 pdev = platform_device_alloc("w83781d", address);
1918 if (!pdev) {
1919 err = -ENOMEM;
1920 printk(KERN_ERR "w83781d: Device allocation failed\n");
1921 goto exit;
1922 }
1923
1924 err = platform_device_add_resources(pdev, &res, 1);
1925 if (err) {
1926 printk(KERN_ERR "w83781d: Device resource addition failed "
1927 "(%d)\n", err);
1928 goto exit_device_put;
1929 }
1930
1931 err = platform_device_add(pdev);
1932 if (err) {
1933 printk(KERN_ERR "w83781d: Device addition failed (%d)\n",
1934 err);
1935 goto exit_device_put;
1936 }
1937
1938 return 0;
1939
1940 exit_device_put:
1941 platform_device_put(pdev);
1942 exit:
1943 pdev = NULL;
1944 return err;
1945 }
1946
1947 static int __init
1948 w83781d_isa_register(void)
1949 {
1950 int res;
1951
1952 if (w83781d_isa_found(isa_address)) {
1953 res = platform_driver_register(&w83781d_isa_driver);
1954 if (res)
1955 goto exit;
1956
1957 /* Sets global pdev as a side effect */
1958 res = w83781d_isa_device_add(isa_address);
1959 if (res)
1960 goto exit_unreg_isa_driver;
1961 }
1962
1963 return 0;
1964
1965 exit_unreg_isa_driver:
1966 platform_driver_unregister(&w83781d_isa_driver);
1967 exit:
1968 return res;
1969 }
1970
1971 static void
1972 w83781d_isa_unregister(void)
1973 {
1974 if (pdev) {
1975 platform_device_unregister(pdev);
1976 platform_driver_unregister(&w83781d_isa_driver);
1977 }
1978 }
1979 #else /* !CONFIG_ISA */
1980
1981 static struct w83781d_data *w83781d_data_if_isa(void)
1982 {
1983 return NULL;
1984 }
1985
1986 static int
1987 w83781d_alias_detect(struct i2c_client *client, u8 chipid)
1988 {
1989 return 0;
1990 }
1991
1992 static int
1993 w83781d_read_value(struct w83781d_data *data, u16 reg)
1994 {
1995 int res;
1996
1997 mutex_lock(&data->lock);
1998 res = w83781d_read_value_i2c(data, reg);
1999 mutex_unlock(&data->lock);
2000
2001 return res;
2002 }
2003
2004 static int
2005 w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value)
2006 {
2007 mutex_lock(&data->lock);
2008 w83781d_write_value_i2c(data, reg, value);
2009 mutex_unlock(&data->lock);
2010
2011 return 0;
2012 }
2013
2014 static int __init
2015 w83781d_isa_register(void)
2016 {
2017 return 0;
2018 }
2019
2020 static void
2021 w83781d_isa_unregister(void)
2022 {
2023 }
2024 #endif /* CONFIG_ISA */
2025
2026 static int __init
2027 sensors_w83781d_init(void)
2028 {
2029 int res;
2030
2031 /* We register the ISA device first, so that we can skip the
2032 * registration of an I2C interface to the same device. */
2033 res = w83781d_isa_register();
2034 if (res)
2035 goto exit;
2036
2037 res = i2c_add_driver(&w83781d_driver);
2038 if (res)
2039 goto exit_unreg_isa;
2040
2041 return 0;
2042
2043 exit_unreg_isa:
2044 w83781d_isa_unregister();
2045 exit:
2046 return res;
2047 }
2048
2049 static void __exit
2050 sensors_w83781d_exit(void)
2051 {
2052 w83781d_isa_unregister();
2053 i2c_del_driver(&w83781d_driver);
2054 }
2055
2056 MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
2057 "Philip Edelbrock <phil@netroedge.com>, "
2058 "and Mark Studebaker <mdsxyz123@yahoo.com>");
2059 MODULE_DESCRIPTION("W83781D driver");
2060 MODULE_LICENSE("GPL");
2061
2062 module_init(sensors_w83781d_init);
2063 module_exit(sensors_w83781d_exit);
Support for the Chinese Samsung S3C2440 based development boards