arch/ia64/hp/common/hwsw_iommu.c

   1 /*
   2  * Copyright (c) 2004 Hewlett-Packard Development Company, L.P.
   3  *   Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
   4  *
   5  * This is a pseudo I/O MMU which dispatches to the hardware I/O MMU
   6  * whenever possible.  We assume that the hardware I/O MMU requires
   7  * full 32-bit addressability, as is the case, e.g., for HP zx1-based
   8  * systems (there, the I/O MMU window is mapped at 3-4GB).  If a
   9  * device doesn't provide full 32-bit addressability, we fall back on
  10  * the sw I/O TLB.  This is good enough to let us support broken
  11  * hardware such as soundcards which have a DMA engine that can
  12  * address only 28 bits.
  13  */
  14
  15 #include <linux/device.h>
  16 #include <linux/dma-mapping.h>
  17 #include <linux/swiotlb.h>
  18 #include <asm/machvec.h>
  19
  20 /* swiotlb declarations & definitions: */
  21 extern int swiotlb_late_init_with_default_size (size_t size);
  22
  23 /* hwiommu declarations & definitions: */
  24
  25 extern ia64_mv_dma_alloc_coherent       sba_alloc_coherent;
  26 extern ia64_mv_dma_free_coherent        sba_free_coherent;
  27 extern ia64_mv_dma_map_single_attrs     sba_map_single_attrs;
  28 extern ia64_mv_dma_unmap_single_attrs   sba_unmap_single_attrs;
  29 extern ia64_mv_dma_map_sg_attrs         sba_map_sg_attrs;
  30 extern ia64_mv_dma_unmap_sg_attrs       sba_unmap_sg_attrs;
  31 extern ia64_mv_dma_supported            sba_dma_supported;
  32 extern ia64_mv_dma_mapping_error        sba_dma_mapping_error;
  33
  34 #define hwiommu_alloc_coherent          sba_alloc_coherent
  35 #define hwiommu_free_coherent           sba_free_coherent
  36 #define hwiommu_map_single_attrs        sba_map_single_attrs
  37 #define hwiommu_unmap_single_attrs      sba_unmap_single_attrs
  38 #define hwiommu_map_sg_attrs            sba_map_sg_attrs
  39 #define hwiommu_unmap_sg_attrs          sba_unmap_sg_attrs
  40 #define hwiommu_dma_supported           sba_dma_supported
  41 #define hwiommu_dma_mapping_error       sba_dma_mapping_error
  42 #define hwiommu_sync_single_for_cpu     machvec_dma_sync_single
  43 #define hwiommu_sync_sg_for_cpu         machvec_dma_sync_sg
  44 #define hwiommu_sync_single_for_device  machvec_dma_sync_single
  45 #define hwiommu_sync_sg_for_device      machvec_dma_sync_sg
  46
  47
  48 /*
  49  * Note: we need to make the determination of whether or not to use
  50  * the sw I/O TLB based purely on the device structure.  Anything else
  51  * would be unreliable or would be too intrusive.
  52  */
  53 static inline int
  54 use_swiotlb (struct device *dev)
  55 {
  56         return dev && dev->dma_mask && !hwiommu_dma_supported(dev, *dev->dma_mask);
  57 }
  58
  59 void __init
  60 hwsw_init (void)
  61 {
  62         /* default to a smallish 2MB sw I/O TLB */
  63         if (swiotlb_late_init_with_default_size (2 * (1<<20)) != 0) {
  64 #ifdef CONFIG_IA64_GENERIC
  65                 /* Better to have normal DMA than panic */
  66                 printk(KERN_WARNING "%s: Failed to initialize software I/O TLB,"
  67                        " reverting to hpzx1 platform vector\n", __func__);
  68                 machvec_init("hpzx1");
  69 #else
  70                 panic("Unable to initialize software I/O TLB services");
  71 #endif
  72         }
  73 }
  74
  75 void *
  76 hwsw_alloc_coherent (struct device *dev, size_t size, dma_addr_t *dma_handle, gfp_t flags)
  77 {
  78         if (use_swiotlb(dev))
  79                 return swiotlb_alloc_coherent(dev, size, dma_handle, flags);
  80         else
  81                 return hwiommu_alloc_coherent(dev, size, dma_handle, flags);
  82 }
  83
  84 void
  85 hwsw_free_coherent (struct device *dev, size_t size, void *vaddr, dma_addr_t dma_handle)
  86 {
  87         if (use_swiotlb(dev))
  88                 swiotlb_free_coherent(dev, size, vaddr, dma_handle);
  89         else
  90                 hwiommu_free_coherent(dev, size, vaddr, dma_handle);
  91 }
  92
  93 dma_addr_t
  94 hwsw_map_single_attrs(struct device *dev, void *addr, size_t size, int dir,
  95                        struct dma_attrs *attrs)
  96 {
  97         if (use_swiotlb(dev))
  98                 return swiotlb_map_single_attrs(dev, addr, size, dir, attrs);
  99         else
 100                 return hwiommu_map_single_attrs(dev, addr, size, dir, attrs);
 101 }
 102 EXPORT_SYMBOL(hwsw_map_single_attrs);
 103
 104 void
 105 hwsw_unmap_single_attrs(struct device *dev, dma_addr_t iova, size_t size,
 106                          int dir, struct dma_attrs *attrs)
 107 {
 108         if (use_swiotlb(dev))
 109                 return swiotlb_unmap_single_attrs(dev, iova, size, dir, attrs);
 110         else
 111                 return hwiommu_unmap_single_attrs(dev, iova, size, dir, attrs);
 112 }
 113 EXPORT_SYMBOL(hwsw_unmap_single_attrs);
 114
 115 int
 116 hwsw_map_sg_attrs(struct device *dev, struct scatterlist *sglist, int nents,
 117                    int dir, struct dma_attrs *attrs)
 118 {
 119         if (use_swiotlb(dev))
 120                 return swiotlb_map_sg_attrs(dev, sglist, nents, dir, attrs);
 121         else
 122                 return hwiommu_map_sg_attrs(dev, sglist, nents, dir, attrs);
 123 }
 124 EXPORT_SYMBOL(hwsw_map_sg_attrs);
 125
 126 void
 127 hwsw_unmap_sg_attrs(struct device *dev, struct scatterlist *sglist, int nents,
 128                      int dir, struct dma_attrs *attrs)
 129 {
 130         if (use_swiotlb(dev))
 131                 return swiotlb_unmap_sg_attrs(dev, sglist, nents, dir, attrs);
 132         else
 133                 return hwiommu_unmap_sg_attrs(dev, sglist, nents, dir, attrs);
 134 }
 135 EXPORT_SYMBOL(hwsw_unmap_sg_attrs);
 136
 137 void
 138 hwsw_sync_single_for_cpu (struct device *dev, dma_addr_t addr, size_t size, int dir)
 139 {
 140         if (use_swiotlb(dev))
 141                 swiotlb_sync_single_for_cpu(dev, addr, size, dir);
 142         else
 143                 hwiommu_sync_single_for_cpu(dev, addr, size, dir);
 144 }
 145
 146 void
 147 hwsw_sync_sg_for_cpu (struct device *dev, struct scatterlist *sg, int nelems, int dir)
 148 {
 149         if (use_swiotlb(dev))
 150                 swiotlb_sync_sg_for_cpu(dev, sg, nelems, dir);
 151         else
 152                 hwiommu_sync_sg_for_cpu(dev, sg, nelems, dir);
 153 }
 154
 155 void
 156 hwsw_sync_single_for_device (struct device *dev, dma_addr_t addr, size_t size, int dir)
 157 {
 158         if (use_swiotlb(dev))
 159                 swiotlb_sync_single_for_device(dev, addr, size, dir);
 160         else
 161                 hwiommu_sync_single_for_device(dev, addr, size, dir);
 162 }
 163
 164 void
 165 hwsw_sync_sg_for_device (struct device *dev, struct scatterlist *sg, int nelems, int dir)
 166 {
 167         if (use_swiotlb(dev))
 168                 swiotlb_sync_sg_for_device(dev, sg, nelems, dir);
 169         else
 170                 hwiommu_sync_sg_for_device(dev, sg, nelems, dir);
 171 }
 172
 173 int
 174 hwsw_dma_supported (struct device *dev, u64 mask)
 175 {
 176         if (hwiommu_dma_supported(dev, mask))
 177                 return 1;
 178         return swiotlb_dma_supported(dev, mask);
 179 }
 180
 181 int
 182 hwsw_dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
 183 {
 184         return hwiommu_dma_mapping_error(dev, dma_addr) ||
 185                 swiotlb_dma_mapping_error(dev, dma_addr);
 186 }
 187
 188 EXPORT_SYMBOL(hwsw_dma_mapping_error);
 189 EXPORT_SYMBOL(hwsw_dma_supported);
 190 EXPORT_SYMBOL(hwsw_alloc_coherent);
 191 EXPORT_SYMBOL(hwsw_free_coherent);
 192 EXPORT_SYMBOL(hwsw_sync_single_for_cpu);
 193 EXPORT_SYMBOL(hwsw_sync_single_for_device);
 194 EXPORT_SYMBOL(hwsw_sync_sg_for_cpu);
 195 EXPORT_SYMBOL(hwsw_sync_sg_for_device);
 196
 197 struct dma_mapping_ops hwsw_dma_ops = {
 198         .alloc_coherent         = hwsw_alloc_coherent,
 199         .free_coherent          = hwsw_free_coherent,
 200         .map_single_attrs       = hwsw_map_single_attrs,
 201         .unmap_single_attrs     = hwsw_unmap_single_attrs,
 202         .map_sg_attrs           = hwsw_map_sg_attrs,
 203         .unmap_sg_attrs         = hwsw_unmap_sg_attrs,
 204         .sync_single_for_cpu    = hwsw_sync_single_for_cpu,
 205         .sync_sg_for_cpu        = hwsw_sync_sg_for_cpu,
 206         .sync_single_for_device = hwsw_sync_single_for_device,
 207         .sync_sg_for_device     = hwsw_sync_sg_for_device,
 208         .dma_supported_op       = hwsw_dma_supported,
 209         .mapping_error          = hwsw_dma_mapping_error,
 210 };