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slub: record page flag overlays explicitly
[linux-2.6/mini2440.git] / drivers / net / declance.c
blob3e3506411ac08a50501e8049bb6f0b74af9a0363
1 /*
2 * Lance ethernet driver for the MIPS processor based
3 * DECstation family
4 *
5 *
6 * adopted from sunlance.c by Richard van den Berg
7 *
8 * Copyright (C) 2002, 2003, 2005, 2006 Maciej W. Rozycki
9 *
10 * additional sources:
11 * - PMAD-AA TURBOchannel Ethernet Module Functional Specification,
12 * Revision 1.2
13 *
14 * History:
15 *
16 * v0.001: The kernel accepts the code and it shows the hardware address.
17 *
18 * v0.002: Removed most sparc stuff, left only some module and dma stuff.
19 *
20 * v0.003: Enhanced base address calculation from proposals by
21 * Harald Koerfgen and Thomas Riemer.
22 *
23 * v0.004: lance-regs is pointing at the right addresses, added prom
24 * check. First start of address mapping and DMA.
25 *
26 * v0.005: started to play around with LANCE-DMA. This driver will not
27 * work for non IOASIC lances. HK
28 *
29 * v0.006: added pointer arrays to lance_private and setup routine for
30 * them in dec_lance_init. HK
31 *
32 * v0.007: Big shit. The LANCE seems to use a different DMA mechanism to
33 * access the init block. This looks like one (short) word at a
34 * time, but the smallest amount the IOASIC can transfer is a
35 * (long) word. So we have a 2-2 padding here. Changed
36 * lance_init_block accordingly. The 16-16 padding for the buffers
37 * seems to be correct. HK
38 *
39 * v0.008: mods to make PMAX_LANCE work. 01/09/1999 triemer
40 *
41 * v0.009: Module support fixes, multiple interfaces support, various
42 * bits. macro
43 *
44 * v0.010: Fixes for the PMAD mapping of the LANCE buffer and for the
45 * PMAX requirement to only use halfword accesses to the
46 * buffer. macro
47 *
48 * v0.011: Converted the PMAD to the driver model. macro
49 */
50
51 #include <linux/crc32.h>
52 #include <linux/delay.h>
53 #include <linux/errno.h>
54 #include <linux/if_ether.h>
55 #include <linux/init.h>
56 #include <linux/kernel.h>
57 #include <linux/module.h>
58 #include <linux/netdevice.h>
59 #include <linux/etherdevice.h>
60 #include <linux/spinlock.h>
61 #include <linux/stddef.h>
62 #include <linux/string.h>
63 #include <linux/tc.h>
64 #include <linux/types.h>
65
66 #include <asm/addrspace.h>
67 #include <asm/system.h>
68
69 #include <asm/dec/interrupts.h>
70 #include <asm/dec/ioasic.h>
71 #include <asm/dec/ioasic_addrs.h>
72 #include <asm/dec/kn01.h>
73 #include <asm/dec/machtype.h>
74 #include <asm/dec/system.h>
75
76 static char version[] __devinitdata =
77 "declance.c: v0.011 by Linux MIPS DECstation task force\n";
78
79 MODULE_AUTHOR("Linux MIPS DECstation task force");
80 MODULE_DESCRIPTION("DEC LANCE (DECstation onboard, PMAD-xx) driver");
81 MODULE_LICENSE("GPL");
82
83 #define __unused __attribute__ ((unused))
84
85 /*
86 * card types
87 */
88 #define ASIC_LANCE 1
89 #define PMAD_LANCE 2
90 #define PMAX_LANCE 3
91
92
93 #define LE_CSR0 0
94 #define LE_CSR1 1
95 #define LE_CSR2 2
96 #define LE_CSR3 3
97
98 #define LE_MO_PROM 0x8000 /* Enable promiscuous mode */
99
100 #define LE_C0_ERR 0x8000 /* Error: set if BAB, SQE, MISS or ME is set */
101 #define LE_C0_BABL 0x4000 /* BAB: Babble: tx timeout. */
102 #define LE_C0_CERR 0x2000 /* SQE: Signal quality error */
103 #define LE_C0_MISS 0x1000 /* MISS: Missed a packet */
104 #define LE_C0_MERR 0x0800 /* ME: Memory error */
105 #define LE_C0_RINT 0x0400 /* Received interrupt */
106 #define LE_C0_TINT 0x0200 /* Transmitter Interrupt */
107 #define LE_C0_IDON 0x0100 /* IFIN: Init finished. */
108 #define LE_C0_INTR 0x0080 /* Interrupt or error */
109 #define LE_C0_INEA 0x0040 /* Interrupt enable */
110 #define LE_C0_RXON 0x0020 /* Receiver on */
111 #define LE_C0_TXON 0x0010 /* Transmitter on */
112 #define LE_C0_TDMD 0x0008 /* Transmitter demand */
113 #define LE_C0_STOP 0x0004 /* Stop the card */
114 #define LE_C0_STRT 0x0002 /* Start the card */
115 #define LE_C0_INIT 0x0001 /* Init the card */
116
117 #define LE_C3_BSWP 0x4 /* SWAP */
118 #define LE_C3_ACON 0x2 /* ALE Control */
119 #define LE_C3_BCON 0x1 /* Byte control */
120
121 /* Receive message descriptor 1 */
122 #define LE_R1_OWN 0x8000 /* Who owns the entry */
123 #define LE_R1_ERR 0x4000 /* Error: if FRA, OFL, CRC or BUF is set */
124 #define LE_R1_FRA 0x2000 /* FRA: Frame error */
125 #define LE_R1_OFL 0x1000 /* OFL: Frame overflow */
126 #define LE_R1_CRC 0x0800 /* CRC error */
127 #define LE_R1_BUF 0x0400 /* BUF: Buffer error */
128 #define LE_R1_SOP 0x0200 /* Start of packet */
129 #define LE_R1_EOP 0x0100 /* End of packet */
130 #define LE_R1_POK 0x0300 /* Packet is complete: SOP + EOP */
131
132 /* Transmit message descriptor 1 */
133 #define LE_T1_OWN 0x8000 /* Lance owns the packet */
134 #define LE_T1_ERR 0x4000 /* Error summary */
135 #define LE_T1_EMORE 0x1000 /* Error: more than one retry needed */
136 #define LE_T1_EONE 0x0800 /* Error: one retry needed */
137 #define LE_T1_EDEF 0x0400 /* Error: deferred */
138 #define LE_T1_SOP 0x0200 /* Start of packet */
139 #define LE_T1_EOP 0x0100 /* End of packet */
140 #define LE_T1_POK 0x0300 /* Packet is complete: SOP + EOP */
141
142 #define LE_T3_BUF 0x8000 /* Buffer error */
143 #define LE_T3_UFL 0x4000 /* Error underflow */
144 #define LE_T3_LCOL 0x1000 /* Error late collision */
145 #define LE_T3_CLOS 0x0800 /* Error carrier loss */
146 #define LE_T3_RTY 0x0400 /* Error retry */
147 #define LE_T3_TDR 0x03ff /* Time Domain Reflectometry counter */
148
149 /* Define: 2^4 Tx buffers and 2^4 Rx buffers */
150
151 #ifndef LANCE_LOG_TX_BUFFERS
152 #define LANCE_LOG_TX_BUFFERS 4
153 #define LANCE_LOG_RX_BUFFERS 4
154 #endif
155
156 #define TX_RING_SIZE (1 << (LANCE_LOG_TX_BUFFERS))
157 #define TX_RING_MOD_MASK (TX_RING_SIZE - 1)
158
159 #define RX_RING_SIZE (1 << (LANCE_LOG_RX_BUFFERS))
160 #define RX_RING_MOD_MASK (RX_RING_SIZE - 1)
161
162 #define PKT_BUF_SZ 1536
163 #define RX_BUFF_SIZE PKT_BUF_SZ
164 #define TX_BUFF_SIZE PKT_BUF_SZ
165
166 #undef TEST_HITS
167 #define ZERO 0
168
169 /*
170 * The DS2100/3100 have a linear 64 kB buffer which supports halfword
171 * accesses only. Each halfword of the buffer is word-aligned in the
172 * CPU address space.
173 *
174 * The PMAD-AA has a 128 kB buffer on-board.
175 *
176 * The IOASIC LANCE devices use a shared memory region. This region
177 * as seen from the CPU is (max) 128 kB long and has to be on an 128 kB
178 * boundary. The LANCE sees this as a 64 kB long continuous memory
179 * region.
180 *
181 * The LANCE's DMA address is used as an index in this buffer and DMA
182 * takes place in bursts of eight 16-bit words which are packed into
183 * four 32-bit words by the IOASIC. This leads to a strange padding:
184 * 16 bytes of valid data followed by a 16 byte gap :-(.
185 */
186
187 struct lance_rx_desc {
188 unsigned short rmd0; /* low address of packet */
189 unsigned short rmd1; /* high address of packet
190 and descriptor bits */
191 short length; /* 2s complement (negative!)
192 of buffer length */
193 unsigned short mblength; /* actual number of bytes received */
194 };
195
196 struct lance_tx_desc {
197 unsigned short tmd0; /* low address of packet */
198 unsigned short tmd1; /* high address of packet
199 and descriptor bits */
200 short length; /* 2s complement (negative!)
201 of buffer length */
202 unsigned short misc;
203 };
204
205
206 /* First part of the LANCE initialization block, described in databook. */
207 struct lance_init_block {
208 unsigned short mode; /* pre-set mode (reg. 15) */
209
210 unsigned short phys_addr[3]; /* physical ethernet address */
211 unsigned short filter[4]; /* multicast filter */
212
213 /* Receive and transmit ring base, along with extra bits. */
214 unsigned short rx_ptr; /* receive descriptor addr */
215 unsigned short rx_len; /* receive len and high addr */
216 unsigned short tx_ptr; /* transmit descriptor addr */
217 unsigned short tx_len; /* transmit len and high addr */
218
219 short gap[4];
220
221 /* The buffer descriptors */
222 struct lance_rx_desc brx_ring[RX_RING_SIZE];
223 struct lance_tx_desc btx_ring[TX_RING_SIZE];
224 };
225
226 #define BUF_OFFSET_CPU sizeof(struct lance_init_block)
227 #define BUF_OFFSET_LNC sizeof(struct lance_init_block)
228
229 #define shift_off(off, type) \
230 (type == ASIC_LANCE || type == PMAX_LANCE ? off << 1 : off)
231
232 #define lib_off(rt, type) \
233 shift_off(offsetof(struct lance_init_block, rt), type)
234
235 #define lib_ptr(ib, rt, type) \
236 ((volatile u16 *)((u8 *)(ib) + lib_off(rt, type)))
237
238 #define rds_off(rt, type) \
239 shift_off(offsetof(struct lance_rx_desc, rt), type)
240
241 #define rds_ptr(rd, rt, type) \
242 ((volatile u16 *)((u8 *)(rd) + rds_off(rt, type)))
243
244 #define tds_off(rt, type) \
245 shift_off(offsetof(struct lance_tx_desc, rt), type)
246
247 #define tds_ptr(td, rt, type) \
248 ((volatile u16 *)((u8 *)(td) + tds_off(rt, type)))
249
250 struct lance_private {
251 struct net_device *next;
252 int type;
253 int dma_irq;
254 volatile struct lance_regs *ll;
255
256 spinlock_t lock;
257
258 int rx_new, tx_new;
259 int rx_old, tx_old;
260
261 unsigned short busmaster_regval;
262
263 struct timer_list multicast_timer;
264
265 /* Pointers to the ring buffers as seen from the CPU */
266 char *rx_buf_ptr_cpu[RX_RING_SIZE];
267 char *tx_buf_ptr_cpu[TX_RING_SIZE];
268
269 /* Pointers to the ring buffers as seen from the LANCE */
270 uint rx_buf_ptr_lnc[RX_RING_SIZE];
271 uint tx_buf_ptr_lnc[TX_RING_SIZE];
272 };
273
274 #define TX_BUFFS_AVAIL ((lp->tx_old<=lp->tx_new)?\
275 lp->tx_old+TX_RING_MOD_MASK-lp->tx_new:\
276 lp->tx_old - lp->tx_new-1)
277
278 /* The lance control ports are at an absolute address, machine and tc-slot
279 * dependent.
280 * DECstations do only 32-bit access and the LANCE uses 16 bit addresses,
281 * so we have to give the structure an extra member making rap pointing
282 * at the right address
283 */
284 struct lance_regs {
285 volatile unsigned short rdp; /* register data port */
286 unsigned short pad;
287 volatile unsigned short rap; /* register address port */
288 };
289
290 int dec_lance_debug = 2;
291
292 static struct tc_driver dec_lance_tc_driver;
293 static struct net_device *root_lance_dev;
294
295 static inline void writereg(volatile unsigned short *regptr, short value)
296 {
297 *regptr = value;
298 iob();
299 }
300
301 /* Load the CSR registers */
302 static void load_csrs(struct lance_private *lp)
303 {
304 volatile struct lance_regs *ll = lp->ll;
305 uint leptr;
306
307 /* The address space as seen from the LANCE
308 * begins at address 0. HK
309 */
310 leptr = 0;
311
312 writereg(&ll->rap, LE_CSR1);
313 writereg(&ll->rdp, (leptr & 0xFFFF));
314 writereg(&ll->rap, LE_CSR2);
315 writereg(&ll->rdp, leptr >> 16);
316 writereg(&ll->rap, LE_CSR3);
317 writereg(&ll->rdp, lp->busmaster_regval);
318
319 /* Point back to csr0 */
320 writereg(&ll->rap, LE_CSR0);
321 }
322
323 /*
324 * Our specialized copy routines
325 *
326 */
327 static void cp_to_buf(const int type, void *to, const void *from, int len)
328 {
329 unsigned short *tp, *fp, clen;
330 unsigned char *rtp, *rfp;
331
332 if (type == PMAD_LANCE) {
333 memcpy(to, from, len);
334 } else if (type == PMAX_LANCE) {
335 clen = len >> 1;
336 tp = (unsigned short *) to;
337 fp = (unsigned short *) from;
338
339 while (clen--) {
340 *tp++ = *fp++;
341 tp++;
342 }
343
344 clen = len & 1;
345 rtp = (unsigned char *) tp;
346 rfp = (unsigned char *) fp;
347 while (clen--) {
348 *rtp++ = *rfp++;
349 }
350 } else {
351 /*
352 * copy 16 Byte chunks
353 */
354 clen = len >> 4;
355 tp = (unsigned short *) to;
356 fp = (unsigned short *) from;
357 while (clen--) {
358 *tp++ = *fp++;
359 *tp++ = *fp++;
360 *tp++ = *fp++;
361 *tp++ = *fp++;
362 *tp++ = *fp++;
363 *tp++ = *fp++;
364 *tp++ = *fp++;
365 *tp++ = *fp++;
366 tp += 8;
367 }
368
369 /*
370 * do the rest, if any.
371 */
372 clen = len & 15;
373 rtp = (unsigned char *) tp;
374 rfp = (unsigned char *) fp;
375 while (clen--) {
376 *rtp++ = *rfp++;
377 }
378 }
379
380 iob();
381 }
382
383 static void cp_from_buf(const int type, void *to, const void *from, int len)
384 {
385 unsigned short *tp, *fp, clen;
386 unsigned char *rtp, *rfp;
387
388 if (type == PMAD_LANCE) {
389 memcpy(to, from, len);
390 } else if (type == PMAX_LANCE) {
391 clen = len >> 1;
392 tp = (unsigned short *) to;
393 fp = (unsigned short *) from;
394 while (clen--) {
395 *tp++ = *fp++;
396 fp++;
397 }
398
399 clen = len & 1;
400
401 rtp = (unsigned char *) tp;
402 rfp = (unsigned char *) fp;
403
404 while (clen--) {
405 *rtp++ = *rfp++;
406 }
407 } else {
408
409 /*
410 * copy 16 Byte chunks
411 */
412 clen = len >> 4;
413 tp = (unsigned short *) to;
414 fp = (unsigned short *) from;
415 while (clen--) {
416 *tp++ = *fp++;
417 *tp++ = *fp++;
418 *tp++ = *fp++;
419 *tp++ = *fp++;
420 *tp++ = *fp++;
421 *tp++ = *fp++;
422 *tp++ = *fp++;
423 *tp++ = *fp++;
424 fp += 8;
425 }
426
427 /*
428 * do the rest, if any.
429 */
430 clen = len & 15;
431 rtp = (unsigned char *) tp;
432 rfp = (unsigned char *) fp;
433 while (clen--) {
434 *rtp++ = *rfp++;
435 }
436
437
438 }
439
440 }
441
442 /* Setup the Lance Rx and Tx rings */
443 static void lance_init_ring(struct net_device *dev)
444 {
445 struct lance_private *lp = netdev_priv(dev);
446 volatile u16 *ib = (volatile u16 *)dev->mem_start;
447 uint leptr;
448 int i;
449
450 /* Lock out other processes while setting up hardware */
451 netif_stop_queue(dev);
452 lp->rx_new = lp->tx_new = 0;
453 lp->rx_old = lp->tx_old = 0;
454
455 /* Copy the ethernet address to the lance init block.
456 * XXX bit 0 of the physical address registers has to be zero
457 */
458 *lib_ptr(ib, phys_addr[0], lp->type) = (dev->dev_addr[1] << 8) |
459 dev->dev_addr[0];
460 *lib_ptr(ib, phys_addr[1], lp->type) = (dev->dev_addr[3] << 8) |
461 dev->dev_addr[2];
462 *lib_ptr(ib, phys_addr[2], lp->type) = (dev->dev_addr[5] << 8) |
463 dev->dev_addr[4];
464 /* Setup the initialization block */
465
466 /* Setup rx descriptor pointer */
467 leptr = offsetof(struct lance_init_block, brx_ring);
468 *lib_ptr(ib, rx_len, lp->type) = (LANCE_LOG_RX_BUFFERS << 13) |
469 (leptr >> 16);
470 *lib_ptr(ib, rx_ptr, lp->type) = leptr;
471 if (ZERO)
472 printk("RX ptr: %8.8x(%8.8x)\n",
473 leptr, lib_off(brx_ring, lp->type));
474
475 /* Setup tx descriptor pointer */
476 leptr = offsetof(struct lance_init_block, btx_ring);
477 *lib_ptr(ib, tx_len, lp->type) = (LANCE_LOG_TX_BUFFERS << 13) |
478 (leptr >> 16);
479 *lib_ptr(ib, tx_ptr, lp->type) = leptr;
480 if (ZERO)
481 printk("TX ptr: %8.8x(%8.8x)\n",
482 leptr, lib_off(btx_ring, lp->type));
483
484 if (ZERO)
485 printk("TX rings:\n");
486
487 /* Setup the Tx ring entries */
488 for (i = 0; i < TX_RING_SIZE; i++) {
489 leptr = lp->tx_buf_ptr_lnc[i];
490 *lib_ptr(ib, btx_ring[i].tmd0, lp->type) = leptr;
491 *lib_ptr(ib, btx_ring[i].tmd1, lp->type) = (leptr >> 16) &
492 0xff;
493 *lib_ptr(ib, btx_ring[i].length, lp->type) = 0xf000;
494 /* The ones required by tmd2 */
495 *lib_ptr(ib, btx_ring[i].misc, lp->type) = 0;
496 if (i < 3 && ZERO)
497 printk("%d: 0x%8.8x(0x%8.8x)\n",
498 i, leptr, (uint)lp->tx_buf_ptr_cpu[i]);
499 }
500
501 /* Setup the Rx ring entries */
502 if (ZERO)
503 printk("RX rings:\n");
504 for (i = 0; i < RX_RING_SIZE; i++) {
505 leptr = lp->rx_buf_ptr_lnc[i];
506 *lib_ptr(ib, brx_ring[i].rmd0, lp->type) = leptr;
507 *lib_ptr(ib, brx_ring[i].rmd1, lp->type) = ((leptr >> 16) &
508 0xff) |
509 LE_R1_OWN;
510 *lib_ptr(ib, brx_ring[i].length, lp->type) = -RX_BUFF_SIZE |
511 0xf000;
512 *lib_ptr(ib, brx_ring[i].mblength, lp->type) = 0;
513 if (i < 3 && ZERO)
514 printk("%d: 0x%8.8x(0x%8.8x)\n",
515 i, leptr, (uint)lp->rx_buf_ptr_cpu[i]);
516 }
517 iob();
518 }
519
520 static int init_restart_lance(struct lance_private *lp)
521 {
522 volatile struct lance_regs *ll = lp->ll;
523 int i;
524
525 writereg(&ll->rap, LE_CSR0);
526 writereg(&ll->rdp, LE_C0_INIT);
527
528 /* Wait for the lance to complete initialization */
529 for (i = 0; (i < 100) && !(ll->rdp & LE_C0_IDON); i++) {
530 udelay(10);
531 }
532 if ((i == 100) || (ll->rdp & LE_C0_ERR)) {
533 printk("LANCE unopened after %d ticks, csr0=%4.4x.\n",
534 i, ll->rdp);
535 return -1;
536 }
537 if ((ll->rdp & LE_C0_ERR)) {
538 printk("LANCE unopened after %d ticks, csr0=%4.4x.\n",
539 i, ll->rdp);
540 return -1;
541 }
542 writereg(&ll->rdp, LE_C0_IDON);
543 writereg(&ll->rdp, LE_C0_STRT);
544 writereg(&ll->rdp, LE_C0_INEA);
545
546 return 0;
547 }
548
549 static int lance_rx(struct net_device *dev)
550 {
551 struct lance_private *lp = netdev_priv(dev);
552 volatile u16 *ib = (volatile u16 *)dev->mem_start;
553 volatile u16 *rd;
554 unsigned short bits;
555 int entry, len;
556 struct sk_buff *skb;
557
558 #ifdef TEST_HITS
559 {
560 int i;
561
562 printk("[");
563 for (i = 0; i < RX_RING_SIZE; i++) {
564 if (i == lp->rx_new)
565 printk("%s", *lib_ptr(ib, brx_ring[i].rmd1,
566 lp->type) &
567 LE_R1_OWN ? "_" : "X");
568 else
569 printk("%s", *lib_ptr(ib, brx_ring[i].rmd1,
570 lp->type) &
571 LE_R1_OWN ? "." : "1");
572 }
573 printk("]");
574 }
575 #endif
576
577 for (rd = lib_ptr(ib, brx_ring[lp->rx_new], lp->type);
578 !((bits = *rds_ptr(rd, rmd1, lp->type)) & LE_R1_OWN);
579 rd = lib_ptr(ib, brx_ring[lp->rx_new], lp->type)) {
580 entry = lp->rx_new;
581
582 /* We got an incomplete frame? */
583 if ((bits & LE_R1_POK) != LE_R1_POK) {
584 dev->stats.rx_over_errors++;
585 dev->stats.rx_errors++;
586 } else if (bits & LE_R1_ERR) {
587 /* Count only the end frame as a rx error,
588 * not the beginning
589 */
590 if (bits & LE_R1_BUF)
591 dev->stats.rx_fifo_errors++;
592 if (bits & LE_R1_CRC)
593 dev->stats.rx_crc_errors++;
594 if (bits & LE_R1_OFL)
595 dev->stats.rx_over_errors++;
596 if (bits & LE_R1_FRA)
597 dev->stats.rx_frame_errors++;
598 if (bits & LE_R1_EOP)
599 dev->stats.rx_errors++;
600 } else {
601 len = (*rds_ptr(rd, mblength, lp->type) & 0xfff) - 4;
602 skb = dev_alloc_skb(len + 2);
603
604 if (skb == 0) {
605 printk("%s: Memory squeeze, deferring packet.\n",
606 dev->name);
607 dev->stats.rx_dropped++;
608 *rds_ptr(rd, mblength, lp->type) = 0;
609 *rds_ptr(rd, rmd1, lp->type) =
610 ((lp->rx_buf_ptr_lnc[entry] >> 16) &
611 0xff) | LE_R1_OWN;
612 lp->rx_new = (entry + 1) & RX_RING_MOD_MASK;
613 return 0;
614 }
615 dev->stats.rx_bytes += len;
616
617 skb_reserve(skb, 2); /* 16 byte align */
618 skb_put(skb, len); /* make room */
619
620 cp_from_buf(lp->type, skb->data,
621 (char *)lp->rx_buf_ptr_cpu[entry], len);
622
623 skb->protocol = eth_type_trans(skb, dev);
624 netif_rx(skb);
625 dev->last_rx = jiffies;
626 dev->stats.rx_packets++;
627 }
628
629 /* Return the packet to the pool */
630 *rds_ptr(rd, mblength, lp->type) = 0;
631 *rds_ptr(rd, length, lp->type) = -RX_BUFF_SIZE | 0xf000;
632 *rds_ptr(rd, rmd1, lp->type) =
633 ((lp->rx_buf_ptr_lnc[entry] >> 16) & 0xff) | LE_R1_OWN;
634 lp->rx_new = (entry + 1) & RX_RING_MOD_MASK;
635 }
636 return 0;
637 }
638
639 static void lance_tx(struct net_device *dev)
640 {
641 struct lance_private *lp = netdev_priv(dev);
642 volatile u16 *ib = (volatile u16 *)dev->mem_start;
643 volatile struct lance_regs *ll = lp->ll;
644 volatile u16 *td;
645 int i, j;
646 int status;
647
648 j = lp->tx_old;
649
650 spin_lock(&lp->lock);
651
652 for (i = j; i != lp->tx_new; i = j) {
653 td = lib_ptr(ib, btx_ring[i], lp->type);
654 /* If we hit a packet not owned by us, stop */
655 if (*tds_ptr(td, tmd1, lp->type) & LE_T1_OWN)
656 break;
657
658 if (*tds_ptr(td, tmd1, lp->type) & LE_T1_ERR) {
659 status = *tds_ptr(td, misc, lp->type);
660
661 dev->stats.tx_errors++;
662 if (status & LE_T3_RTY)
663 dev->stats.tx_aborted_errors++;
664 if (status & LE_T3_LCOL)
665 dev->stats.tx_window_errors++;
666
667 if (status & LE_T3_CLOS) {
668 dev->stats.tx_carrier_errors++;
669 printk("%s: Carrier Lost\n", dev->name);
670 /* Stop the lance */
671 writereg(&ll->rap, LE_CSR0);
672 writereg(&ll->rdp, LE_C0_STOP);
673 lance_init_ring(dev);
674 load_csrs(lp);
675 init_restart_lance(lp);
676 goto out;
677 }
678 /* Buffer errors and underflows turn off the
679 * transmitter, restart the adapter.
680 */
681 if (status & (LE_T3_BUF | LE_T3_UFL)) {
682 dev->stats.tx_fifo_errors++;
683
684 printk("%s: Tx: ERR_BUF|ERR_UFL, restarting\n",
685 dev->name);
686 /* Stop the lance */
687 writereg(&ll->rap, LE_CSR0);
688 writereg(&ll->rdp, LE_C0_STOP);
689 lance_init_ring(dev);
690 load_csrs(lp);
691 init_restart_lance(lp);
692 goto out;
693 }
694 } else if ((*tds_ptr(td, tmd1, lp->type) & LE_T1_POK) ==
695 LE_T1_POK) {
696 /*
697 * So we don't count the packet more than once.
698 */
699 *tds_ptr(td, tmd1, lp->type) &= ~(LE_T1_POK);
700
701 /* One collision before packet was sent. */
702 if (*tds_ptr(td, tmd1, lp->type) & LE_T1_EONE)
703 dev->stats.collisions++;
704
705 /* More than one collision, be optimistic. */
706 if (*tds_ptr(td, tmd1, lp->type) & LE_T1_EMORE)
707 dev->stats.collisions += 2;
708
709 dev->stats.tx_packets++;
710 }
711 j = (j + 1) & TX_RING_MOD_MASK;
712 }
713 lp->tx_old = j;
714 out:
715 if (netif_queue_stopped(dev) &&
716 TX_BUFFS_AVAIL > 0)
717 netif_wake_queue(dev);
718
719 spin_unlock(&lp->lock);
720 }
721
722 static irqreturn_t lance_dma_merr_int(int irq, void *dev_id)
723 {
724 struct net_device *dev = dev_id;
725
726 printk(KERN_ERR "%s: DMA error\n", dev->name);
727 return IRQ_HANDLED;
728 }
729
730 static irqreturn_t lance_interrupt(int irq, void *dev_id)
731 {
732 struct net_device *dev = dev_id;
733 struct lance_private *lp = netdev_priv(dev);
734 volatile struct lance_regs *ll = lp->ll;
735 int csr0;
736
737 writereg(&ll->rap, LE_CSR0);
738 csr0 = ll->rdp;
739
740 /* Acknowledge all the interrupt sources ASAP */
741 writereg(&ll->rdp, csr0 & (LE_C0_INTR | LE_C0_TINT | LE_C0_RINT));
742
743 if ((csr0 & LE_C0_ERR)) {
744 /* Clear the error condition */
745 writereg(&ll->rdp, LE_C0_BABL | LE_C0_ERR | LE_C0_MISS |
746 LE_C0_CERR | LE_C0_MERR);
747 }
748 if (csr0 & LE_C0_RINT)
749 lance_rx(dev);
750
751 if (csr0 & LE_C0_TINT)
752 lance_tx(dev);
753
754 if (csr0 & LE_C0_BABL)
755 dev->stats.tx_errors++;
756
757 if (csr0 & LE_C0_MISS)
758 dev->stats.rx_errors++;
759
760 if (csr0 & LE_C0_MERR) {
761 printk("%s: Memory error, status %04x\n", dev->name, csr0);
762
763 writereg(&ll->rdp, LE_C0_STOP);
764
765 lance_init_ring(dev);
766 load_csrs(lp);
767 init_restart_lance(lp);
768 netif_wake_queue(dev);
769 }
770
771 writereg(&ll->rdp, LE_C0_INEA);
772 writereg(&ll->rdp, LE_C0_INEA);
773 return IRQ_HANDLED;
774 }
775
776 static int lance_open(struct net_device *dev)
777 {
778 volatile u16 *ib = (volatile u16 *)dev->mem_start;
779 struct lance_private *lp = netdev_priv(dev);
780 volatile struct lance_regs *ll = lp->ll;
781 int status = 0;
782
783 /* Stop the Lance */
784 writereg(&ll->rap, LE_CSR0);
785 writereg(&ll->rdp, LE_C0_STOP);
786
787 /* Set mode and clear multicast filter only at device open,
788 * so that lance_init_ring() called at any error will not
789 * forget multicast filters.
790 *
791 * BTW it is common bug in all lance drivers! --ANK
792 */
793 *lib_ptr(ib, mode, lp->type) = 0;
794 *lib_ptr(ib, filter[0], lp->type) = 0;
795 *lib_ptr(ib, filter[1], lp->type) = 0;
796 *lib_ptr(ib, filter[2], lp->type) = 0;
797 *lib_ptr(ib, filter[3], lp->type) = 0;
798
799 lance_init_ring(dev);
800 load_csrs(lp);
801
802 netif_start_queue(dev);
803
804 /* Associate IRQ with lance_interrupt */
805 if (request_irq(dev->irq, &lance_interrupt, 0, "lance", dev)) {
806 printk("%s: Can't get IRQ %d\n", dev->name, dev->irq);
807 return -EAGAIN;
808 }
809 if (lp->dma_irq >= 0) {
810 unsigned long flags;
811
812 if (request_irq(lp->dma_irq, &lance_dma_merr_int, 0,
813 "lance error", dev)) {
814 free_irq(dev->irq, dev);
815 printk("%s: Can't get DMA IRQ %d\n", dev->name,
816 lp->dma_irq);
817 return -EAGAIN;
818 }
819
820 spin_lock_irqsave(&ioasic_ssr_lock, flags);
821
822 fast_mb();
823 /* Enable I/O ASIC LANCE DMA. */
824 ioasic_write(IO_REG_SSR,
825 ioasic_read(IO_REG_SSR) | IO_SSR_LANCE_DMA_EN);
826
827 fast_mb();
828 spin_unlock_irqrestore(&ioasic_ssr_lock, flags);
829 }
830
831 status = init_restart_lance(lp);
832 return status;
833 }
834
835 static int lance_close(struct net_device *dev)
836 {
837 struct lance_private *lp = netdev_priv(dev);
838 volatile struct lance_regs *ll = lp->ll;
839
840 netif_stop_queue(dev);
841 del_timer_sync(&lp->multicast_timer);
842
843 /* Stop the card */
844 writereg(&ll->rap, LE_CSR0);
845 writereg(&ll->rdp, LE_C0_STOP);
846
847 if (lp->dma_irq >= 0) {
848 unsigned long flags;
849
850 spin_lock_irqsave(&ioasic_ssr_lock, flags);
851
852 fast_mb();
853 /* Disable I/O ASIC LANCE DMA. */
854 ioasic_write(IO_REG_SSR,
855 ioasic_read(IO_REG_SSR) & ~IO_SSR_LANCE_DMA_EN);
856
857 fast_iob();
858 spin_unlock_irqrestore(&ioasic_ssr_lock, flags);
859
860 free_irq(lp->dma_irq, dev);
861 }
862 free_irq(dev->irq, dev);
863 return 0;
864 }
865
866 static inline int lance_reset(struct net_device *dev)
867 {
868 struct lance_private *lp = netdev_priv(dev);
869 volatile struct lance_regs *ll = lp->ll;
870 int status;
871
872 /* Stop the lance */
873 writereg(&ll->rap, LE_CSR0);
874 writereg(&ll->rdp, LE_C0_STOP);
875
876 lance_init_ring(dev);
877 load_csrs(lp);
878 dev->trans_start = jiffies;
879 status = init_restart_lance(lp);
880 return status;
881 }
882
883 static void lance_tx_timeout(struct net_device *dev)
884 {
885 struct lance_private *lp = netdev_priv(dev);
886 volatile struct lance_regs *ll = lp->ll;
887
888 printk(KERN_ERR "%s: transmit timed out, status %04x, reset\n",
889 dev->name, ll->rdp);
890 lance_reset(dev);
891 netif_wake_queue(dev);
892 }
893
894 static int lance_start_xmit(struct sk_buff *skb, struct net_device *dev)
895 {
896 struct lance_private *lp = netdev_priv(dev);
897 volatile struct lance_regs *ll = lp->ll;
898 volatile u16 *ib = (volatile u16 *)dev->mem_start;
899 int entry, len;
900
901 len = skb->len;
902
903 if (len < ETH_ZLEN) {
904 if (skb_padto(skb, ETH_ZLEN))
905 return 0;
906 len = ETH_ZLEN;
907 }
908
909 dev->stats.tx_bytes += len;
910
911 entry = lp->tx_new;
912 *lib_ptr(ib, btx_ring[entry].length, lp->type) = (-len);
913 *lib_ptr(ib, btx_ring[entry].misc, lp->type) = 0;
914
915 cp_to_buf(lp->type, (char *)lp->tx_buf_ptr_cpu[entry], skb->data, len);
916
917 /* Now, give the packet to the lance */
918 *lib_ptr(ib, btx_ring[entry].tmd1, lp->type) =
919 ((lp->tx_buf_ptr_lnc[entry] >> 16) & 0xff) |
920 (LE_T1_POK | LE_T1_OWN);
921 lp->tx_new = (entry + 1) & TX_RING_MOD_MASK;
922
923 if (TX_BUFFS_AVAIL <= 0)
924 netif_stop_queue(dev);
925
926 /* Kick the lance: transmit now */
927 writereg(&ll->rdp, LE_C0_INEA | LE_C0_TDMD);
928
929 dev->trans_start = jiffies;
930 dev_kfree_skb(skb);
931
932 return 0;
933 }
934
935 static void lance_load_multicast(struct net_device *dev)
936 {
937 struct lance_private *lp = netdev_priv(dev);
938 volatile u16 *ib = (volatile u16 *)dev->mem_start;
939 struct dev_mc_list *dmi = dev->mc_list;
940 char *addrs;
941 int i;
942 u32 crc;
943
944 /* set all multicast bits */
945 if (dev->flags & IFF_ALLMULTI) {
946 *lib_ptr(ib, filter[0], lp->type) = 0xffff;
947 *lib_ptr(ib, filter[1], lp->type) = 0xffff;
948 *lib_ptr(ib, filter[2], lp->type) = 0xffff;
949 *lib_ptr(ib, filter[3], lp->type) = 0xffff;
950 return;
951 }
952 /* clear the multicast filter */
953 *lib_ptr(ib, filter[0], lp->type) = 0;
954 *lib_ptr(ib, filter[1], lp->type) = 0;
955 *lib_ptr(ib, filter[2], lp->type) = 0;
956 *lib_ptr(ib, filter[3], lp->type) = 0;
957
958 /* Add addresses */
959 for (i = 0; i < dev->mc_count; i++) {
960 addrs = dmi->dmi_addr;
961 dmi = dmi->next;
962
963 /* multicast address? */
964 if (!(*addrs & 1))
965 continue;
966
967 crc = ether_crc_le(ETH_ALEN, addrs);
968 crc = crc >> 26;
969 *lib_ptr(ib, filter[crc >> 4], lp->type) |= 1 << (crc & 0xf);
970 }
971 return;
972 }
973
974 static void lance_set_multicast(struct net_device *dev)
975 {
976 struct lance_private *lp = netdev_priv(dev);
977 volatile u16 *ib = (volatile u16 *)dev->mem_start;
978 volatile struct lance_regs *ll = lp->ll;
979
980 if (!netif_running(dev))
981 return;
982
983 if (lp->tx_old != lp->tx_new) {
984 mod_timer(&lp->multicast_timer, jiffies + 4 * HZ/100);
985 netif_wake_queue(dev);
986 return;
987 }
988
989 netif_stop_queue(dev);
990
991 writereg(&ll->rap, LE_CSR0);
992 writereg(&ll->rdp, LE_C0_STOP);
993
994 lance_init_ring(dev);
995
996 if (dev->flags & IFF_PROMISC) {
997 *lib_ptr(ib, mode, lp->type) |= LE_MO_PROM;
998 } else {
999 *lib_ptr(ib, mode, lp->type) &= ~LE_MO_PROM;
1000 lance_load_multicast(dev);
1001 }
1002 load_csrs(lp);
1003 init_restart_lance(lp);
1004 netif_wake_queue(dev);
1005 }
1006
1007 static void lance_set_multicast_retry(unsigned long _opaque)
1008 {
1009 struct net_device *dev = (struct net_device *) _opaque;
1010
1011 lance_set_multicast(dev);
1012 }
1013
1014 static int __init dec_lance_probe(struct device *bdev, const int type)
1015 {
1016 static unsigned version_printed;
1017 static const char fmt[] = "declance%d";
1018 char name[10];
1019 struct net_device *dev;
1020 struct lance_private *lp;
1021 volatile struct lance_regs *ll;
1022 resource_size_t start = 0, len = 0;
1023 int i, ret;
1024 unsigned long esar_base;
1025 unsigned char *esar;
1026 DECLARE_MAC_BUF(mac);
1027
1028 if (dec_lance_debug && version_printed++ == 0)
1029 printk(version);
1030
1031 if (bdev)
1032 snprintf(name, sizeof(name), "%s", bdev->bus_id);
1033 else {
1034 i = 0;
1035 dev = root_lance_dev;
1036 while (dev) {
1037 i++;
1038 lp = (struct lance_private *)dev->priv;
1039 dev = lp->next;
1040 }
1041 snprintf(name, sizeof(name), fmt, i);
1042 }
1043
1044 dev = alloc_etherdev(sizeof(struct lance_private));
1045 if (!dev) {
1046 printk(KERN_ERR "%s: Unable to allocate etherdev, aborting.\n",
1047 name);
1048 ret = -ENOMEM;
1049 goto err_out;
1050 }
1051
1052 /*
1053 * alloc_etherdev ensures the data structures used by the LANCE
1054 * are aligned.
1055 */
1056 lp = netdev_priv(dev);
1057 spin_lock_init(&lp->lock);
1058
1059 lp->type = type;
1060 switch (type) {
1061 case ASIC_LANCE:
1062 dev->base_addr = CKSEG1ADDR(dec_kn_slot_base + IOASIC_LANCE);
1063
1064 /* buffer space for the on-board LANCE shared memory */
1065 /*
1066 * FIXME: ugly hack!
1067 */
1068 dev->mem_start = CKSEG1ADDR(0x00020000);
1069 dev->mem_end = dev->mem_start + 0x00020000;
1070 dev->irq = dec_interrupt[DEC_IRQ_LANCE];
1071 esar_base = CKSEG1ADDR(dec_kn_slot_base + IOASIC_ESAR);
1072
1073 /* Workaround crash with booting KN04 2.1k from Disk */
1074 memset((void *)dev->mem_start, 0,
1075 dev->mem_end - dev->mem_start);
1076
1077 /*
1078 * setup the pointer arrays, this sucks [tm] :-(
1079 */
1080 for (i = 0; i < RX_RING_SIZE; i++) {
1081 lp->rx_buf_ptr_cpu[i] =
1082 (char *)(dev->mem_start + 2 * BUF_OFFSET_CPU +
1083 2 * i * RX_BUFF_SIZE);
1084 lp->rx_buf_ptr_lnc[i] =
1085 (BUF_OFFSET_LNC + i * RX_BUFF_SIZE);
1086 }
1087 for (i = 0; i < TX_RING_SIZE; i++) {
1088 lp->tx_buf_ptr_cpu[i] =
1089 (char *)(dev->mem_start + 2 * BUF_OFFSET_CPU +
1090 2 * RX_RING_SIZE * RX_BUFF_SIZE +
1091 2 * i * TX_BUFF_SIZE);
1092 lp->tx_buf_ptr_lnc[i] =
1093 (BUF_OFFSET_LNC +
1094 RX_RING_SIZE * RX_BUFF_SIZE +
1095 i * TX_BUFF_SIZE);
1096 }
1097
1098 /* Setup I/O ASIC LANCE DMA. */
1099 lp->dma_irq = dec_interrupt[DEC_IRQ_LANCE_MERR];
1100 ioasic_write(IO_REG_LANCE_DMA_P,
1101 CPHYSADDR(dev->mem_start) << 3);
1102
1103 break;
1104 #ifdef CONFIG_TC
1105 case PMAD_LANCE:
1106 dev_set_drvdata(bdev, dev);
1107
1108 start = to_tc_dev(bdev)->resource.start;
1109 len = to_tc_dev(bdev)->resource.end - start + 1;
1110 if (!request_mem_region(start, len, bdev->bus_id)) {
1111 printk(KERN_ERR
1112 "%s: Unable to reserve MMIO resource\n",
1113 bdev->bus_id);
1114 ret = -EBUSY;
1115 goto err_out_dev;
1116 }
1117
1118 dev->mem_start = CKSEG1ADDR(start);
1119 dev->mem_end = dev->mem_start + 0x100000;
1120 dev->base_addr = dev->mem_start + 0x100000;
1121 dev->irq = to_tc_dev(bdev)->interrupt;
1122 esar_base = dev->mem_start + 0x1c0002;
1123 lp->dma_irq = -1;
1124
1125 for (i = 0; i < RX_RING_SIZE; i++) {
1126 lp->rx_buf_ptr_cpu[i] =
1127 (char *)(dev->mem_start + BUF_OFFSET_CPU +
1128 i * RX_BUFF_SIZE);
1129 lp->rx_buf_ptr_lnc[i] =
1130 (BUF_OFFSET_LNC + i * RX_BUFF_SIZE);
1131 }
1132 for (i = 0; i < TX_RING_SIZE; i++) {
1133 lp->tx_buf_ptr_cpu[i] =
1134 (char *)(dev->mem_start + BUF_OFFSET_CPU +
1135 RX_RING_SIZE * RX_BUFF_SIZE +
1136 i * TX_BUFF_SIZE);
1137 lp->tx_buf_ptr_lnc[i] =
1138 (BUF_OFFSET_LNC +
1139 RX_RING_SIZE * RX_BUFF_SIZE +
1140 i * TX_BUFF_SIZE);
1141 }
1142
1143 break;
1144 #endif
1145 case PMAX_LANCE:
1146 dev->irq = dec_interrupt[DEC_IRQ_LANCE];
1147 dev->base_addr = CKSEG1ADDR(KN01_SLOT_BASE + KN01_LANCE);
1148 dev->mem_start = CKSEG1ADDR(KN01_SLOT_BASE + KN01_LANCE_MEM);
1149 dev->mem_end = dev->mem_start + KN01_SLOT_SIZE;
1150 esar_base = CKSEG1ADDR(KN01_SLOT_BASE + KN01_ESAR + 1);
1151 lp->dma_irq = -1;
1152
1153 /*
1154 * setup the pointer arrays, this sucks [tm] :-(
1155 */
1156 for (i = 0; i < RX_RING_SIZE; i++) {
1157 lp->rx_buf_ptr_cpu[i] =
1158 (char *)(dev->mem_start + 2 * BUF_OFFSET_CPU +
1159 2 * i * RX_BUFF_SIZE);
1160 lp->rx_buf_ptr_lnc[i] =
1161 (BUF_OFFSET_LNC + i * RX_BUFF_SIZE);
1162 }
1163 for (i = 0; i < TX_RING_SIZE; i++) {
1164 lp->tx_buf_ptr_cpu[i] =
1165 (char *)(dev->mem_start + 2 * BUF_OFFSET_CPU +
1166 2 * RX_RING_SIZE * RX_BUFF_SIZE +
1167 2 * i * TX_BUFF_SIZE);
1168 lp->tx_buf_ptr_lnc[i] =
1169 (BUF_OFFSET_LNC +
1170 RX_RING_SIZE * RX_BUFF_SIZE +
1171 i * TX_BUFF_SIZE);
1172 }
1173
1174 break;
1175
1176 default:
1177 printk(KERN_ERR "%s: declance_init called with unknown type\n",
1178 name);
1179 ret = -ENODEV;
1180 goto err_out_dev;
1181 }
1182
1183 ll = (struct lance_regs *) dev->base_addr;
1184 esar = (unsigned char *) esar_base;
1185
1186 /* prom checks */
1187 /* First, check for test pattern */
1188 if (esar[0x60] != 0xff && esar[0x64] != 0x00 &&
1189 esar[0x68] != 0x55 && esar[0x6c] != 0xaa) {
1190 printk(KERN_ERR
1191 "%s: Ethernet station address prom not found!\n",
1192 name);
1193 ret = -ENODEV;
1194 goto err_out_resource;
1195 }
1196 /* Check the prom contents */
1197 for (i = 0; i < 8; i++) {
1198 if (esar[i * 4] != esar[0x3c - i * 4] &&
1199 esar[i * 4] != esar[0x40 + i * 4] &&
1200 esar[0x3c - i * 4] != esar[0x40 + i * 4]) {
1201 printk(KERN_ERR "%s: Something is wrong with the "
1202 "ethernet station address prom!\n", name);
1203 ret = -ENODEV;
1204 goto err_out_resource;
1205 }
1206 }
1207
1208 /* Copy the ethernet address to the device structure, later to the
1209 * lance initialization block so the lance gets it every time it's
1210 * (re)initialized.
1211 */
1212 switch (type) {
1213 case ASIC_LANCE:
1214 printk("%s: IOASIC onboard LANCE", name);
1215 break;
1216 case PMAD_LANCE:
1217 printk("%s: PMAD-AA", name);
1218 break;
1219 case PMAX_LANCE:
1220 printk("%s: PMAX onboard LANCE", name);
1221 break;
1222 }
1223 for (i = 0; i < 6; i++)
1224 dev->dev_addr[i] = esar[i * 4];
1225
1226 printk(", addr = %s, irq = %d\n",
1227 print_mac(mac, dev->dev_addr), dev->irq);
1228
1229 dev->open = &lance_open;
1230 dev->stop = &lance_close;
1231 dev->hard_start_xmit = &lance_start_xmit;
1232 dev->tx_timeout = &lance_tx_timeout;
1233 dev->watchdog_timeo = 5*HZ;
1234 dev->set_multicast_list = &lance_set_multicast;
1235
1236 /* lp->ll is the location of the registers for lance card */
1237 lp->ll = ll;
1238
1239 /* busmaster_regval (CSR3) should be zero according to the PMAD-AA
1240 * specification.
1241 */
1242 lp->busmaster_regval = 0;
1243
1244 dev->dma = 0;
1245
1246 /* We cannot sleep if the chip is busy during a
1247 * multicast list update event, because such events
1248 * can occur from interrupts (ex. IPv6). So we
1249 * use a timer to try again later when necessary. -DaveM
1250 */
1251 init_timer(&lp->multicast_timer);
1252 lp->multicast_timer.data = (unsigned long) dev;
1253 lp->multicast_timer.function = &lance_set_multicast_retry;
1254
1255 ret = register_netdev(dev);
1256 if (ret) {
1257 printk(KERN_ERR
1258 "%s: Unable to register netdev, aborting.\n", name);
1259 goto err_out_resource;
1260 }
1261
1262 if (!bdev) {
1263 lp->next = root_lance_dev;
1264 root_lance_dev = dev;
1265 }
1266
1267 printk("%s: registered as %s.\n", name, dev->name);
1268 return 0;
1269
1270 err_out_resource:
1271 if (bdev)
1272 release_mem_region(start, len);
1273
1274 err_out_dev:
1275 free_netdev(dev);
1276
1277 err_out:
1278 return ret;
1279 }
1280
1281 static void __exit dec_lance_remove(struct device *bdev)
1282 {
1283 struct net_device *dev = dev_get_drvdata(bdev);
1284 resource_size_t start, len;
1285
1286 unregister_netdev(dev);
1287 start = to_tc_dev(bdev)->resource.start;
1288 len = to_tc_dev(bdev)->resource.end - start + 1;
1289 release_mem_region(start, len);
1290 free_netdev(dev);
1291 }
1292
1293 /* Find all the lance cards on the system and initialize them */
1294 static int __init dec_lance_platform_probe(void)
1295 {
1296 int count = 0;
1297
1298 if (dec_interrupt[DEC_IRQ_LANCE] >= 0) {
1299 if (dec_interrupt[DEC_IRQ_LANCE_MERR] >= 0) {
1300 if (dec_lance_probe(NULL, ASIC_LANCE) >= 0)
1301 count++;
1302 } else if (!TURBOCHANNEL) {
1303 if (dec_lance_probe(NULL, PMAX_LANCE) >= 0)
1304 count++;
1305 }
1306 }
1307
1308 return (count > 0) ? 0 : -ENODEV;
1309 }
1310
1311 static void __exit dec_lance_platform_remove(void)
1312 {
1313 while (root_lance_dev) {
1314 struct net_device *dev = root_lance_dev;
1315 struct lance_private *lp = netdev_priv(dev);
1316
1317 unregister_netdev(dev);
1318 root_lance_dev = lp->next;
1319 free_netdev(dev);
1320 }
1321 }
1322
1323 #ifdef CONFIG_TC
1324 static int __init dec_lance_tc_probe(struct device *dev);
1325 static int __exit dec_lance_tc_remove(struct device *dev);
1326
1327 static const struct tc_device_id dec_lance_tc_table[] = {
1328 { "DEC ", "PMAD-AA " },
1329 { }
1330 };
1331 MODULE_DEVICE_TABLE(tc, dec_lance_tc_table);
1332
1333 static struct tc_driver dec_lance_tc_driver = {
1334 .id_table = dec_lance_tc_table,
1335 .driver = {
1336 .name = "declance",
1337 .bus = &tc_bus_type,
1338 .probe = dec_lance_tc_probe,
1339 .remove = __exit_p(dec_lance_tc_remove),
1340 },
1341 };
1342
1343 static int __init dec_lance_tc_probe(struct device *dev)
1344 {
1345 int status = dec_lance_probe(dev, PMAD_LANCE);
1346 if (!status)
1347 get_device(dev);
1348 return status;
1349 }
1350
1351 static int __exit dec_lance_tc_remove(struct device *dev)
1352 {
1353 put_device(dev);
1354 dec_lance_remove(dev);
1355 return 0;
1356 }
1357 #endif
1358
1359 static int __init dec_lance_init(void)
1360 {
1361 int status;
1362
1363 status = tc_register_driver(&dec_lance_tc_driver);
1364 if (!status)
1365 dec_lance_platform_probe();
1366 return status;
1367 }
1368
1369 static void __exit dec_lance_exit(void)
1370 {
1371 dec_lance_platform_remove();
1372 tc_unregister_driver(&dec_lance_tc_driver);
1373 }
1374
1375
1376 module_init(dec_lance_init);
1377 module_exit(dec_lance_exit);
Support for the Chinese Samsung S3C2440 based development boards