arch/arm/mach-orion5x/wrt350n-v2-setup.c

   1 /*
   2  * arch/arm/mach-orion5x/wrt350n-v2-setup.c
   3  *
   4  * This file is licensed under the terms of the GNU General Public
   5  * License version 2.  This program is licensed "as is" without any
   6  * warranty of any kind, whether express or implied.
   7  */
   8
   9 #include <linux/kernel.h>
  10 #include <linux/init.h>
  11 #include <linux/platform_device.h>
  12 #include <linux/pci.h>
  13 #include <linux/irq.h>
  14 #include <linux/delay.h>
  15 #include <linux/mtd/physmap.h>
  16 #include <linux/mv643xx_eth.h>
  17 #include <asm/mach-types.h>
  18 #include <asm/gpio.h>
  19 #include <asm/mach/arch.h>
  20 #include <asm/mach/pci.h>
  21 #include <asm/arch/orion5x.h>
  22 #include "common.h"
  23 #include "mpp.h"
  24
  25 static struct orion5x_mpp_mode wrt350n_v2_mpp_modes[] __initdata = {
  26         {  0, MPP_GPIO },               /* Power LED green (0=on) */
  27         {  1, MPP_GPIO },               /* Security LED (0=on) */
  28         {  2, MPP_GPIO },               /* Internal Button (0=on) */
  29         {  3, MPP_GPIO },               /* Reset Button (0=on) */
  30         {  4, MPP_GPIO },               /* PCI int */
  31         {  5, MPP_GPIO },               /* Power LED orange (0=on) */
  32         {  6, MPP_GPIO },               /* USB LED (0=on) */
  33         {  7, MPP_GPIO },               /* Wireless LED (0=on) */
  34         {  8, MPP_UNUSED },             /* ??? */
  35         {  9, MPP_GIGE },               /* GE_RXERR */
  36         { 10, MPP_UNUSED },             /* ??? */
  37         { 11, MPP_UNUSED },             /* ??? */
  38         { 12, MPP_GIGE },               /* GE_TXD[4] */
  39         { 13, MPP_GIGE },               /* GE_TXD[5] */
  40         { 14, MPP_GIGE },               /* GE_TXD[6] */
  41         { 15, MPP_GIGE },               /* GE_TXD[7] */
  42         { 16, MPP_GIGE },               /* GE_RXD[4] */
  43         { 17, MPP_GIGE },               /* GE_RXD[5] */
  44         { 18, MPP_GIGE },               /* GE_RXD[6] */
  45         { 19, MPP_GIGE },               /* GE_RXD[7] */
  46         { -1 },
  47 };
  48
  49 /*
  50  * 8M NOR flash Device bus boot chip select
  51  */
  52 #define WRT350N_V2_NOR_BOOT_BASE        0xf4000000
  53 #define WRT350N_V2_NOR_BOOT_SIZE        SZ_8M
  54
  55 static struct mtd_partition wrt350n_v2_nor_flash_partitions[] = {
  56         {
  57                 .name           = "kernel",
  58                 .offset         = 0x00000000,
  59                 .size           = 0x00760000,
  60         }, {
  61                 .name           = "rootfs",
  62                 .offset         = 0x001a0000,
  63                 .size           = 0x005c0000,
  64         }, {
  65                 .name           = "lang",
  66                 .offset         = 0x00760000,
  67                 .size           = 0x00040000,
  68         }, {
  69                 .name           = "nvram",
  70                 .offset         = 0x007a0000,
  71                 .size           = 0x00020000,
  72         }, {
  73                 .name           = "u-boot",
  74                 .offset         = 0x007c0000,
  75                 .size           = 0x00040000,
  76         },
  77 };
  78
  79 static struct physmap_flash_data wrt350n_v2_nor_flash_data = {
  80         .width          = 1,
  81         .parts          = wrt350n_v2_nor_flash_partitions,
  82         .nr_parts       = ARRAY_SIZE(wrt350n_v2_nor_flash_partitions),
  83 };
  84
  85 static struct resource wrt350n_v2_nor_flash_resource = {
  86         .flags          = IORESOURCE_MEM,
  87         .start          = WRT350N_V2_NOR_BOOT_BASE,
  88         .end            = WRT350N_V2_NOR_BOOT_BASE + WRT350N_V2_NOR_BOOT_SIZE - 1,
  89 };
  90
  91 static struct platform_device wrt350n_v2_nor_flash = {
  92         .name                   = "physmap-flash",
  93         .id                     = 0,
  94         .dev            = {
  95                 .platform_data  = &wrt350n_v2_nor_flash_data,
  96         },
  97         .num_resources          = 1,
  98         .resource               = &wrt350n_v2_nor_flash_resource,
  99 };
 100
 101 static struct mv643xx_eth_platform_data wrt350n_v2_eth_data = {
 102         .phy_addr       = -1,
 103 };
 104
 105 static void __init wrt350n_v2_init(void)
 106 {
 107         /*
 108          * Setup basic Orion functions. Need to be called early.
 109          */
 110         orion5x_init();
 111
 112         orion5x_mpp_conf(wrt350n_v2_mpp_modes);
 113
 114         /*
 115          * Configure peripherals.
 116          */
 117         orion5x_ehci0_init();
 118         orion5x_eth_init(&wrt350n_v2_eth_data);
 119         orion5x_uart0_init();
 120
 121         orion5x_setup_dev_boot_win(WRT350N_V2_NOR_BOOT_BASE,
 122                                    WRT350N_V2_NOR_BOOT_SIZE);
 123         platform_device_register(&wrt350n_v2_nor_flash);
 124 }
 125
 126 static int __init wrt350n_v2_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
 127 {
 128         int irq;
 129
 130         /*
 131          * Check for devices with hard-wired IRQs.
 132          */
 133         irq = orion5x_pci_map_irq(dev, slot, pin);
 134         if (irq != -1)
 135                 return irq;
 136
 137         /*
 138          * Mini-PCI slot.
 139          */
 140         if (slot == 7)
 141                 return gpio_to_irq(4);
 142
 143         return -1;
 144 }
 145
 146 static struct hw_pci wrt350n_v2_pci __initdata = {
 147         .nr_controllers = 2,
 148         .swizzle        = pci_std_swizzle,
 149         .setup          = orion5x_pci_sys_setup,
 150         .scan           = orion5x_pci_sys_scan_bus,
 151         .map_irq        = wrt350n_v2_pci_map_irq,
 152 };
 153
 154 static int __init wrt350n_v2_pci_init(void)
 155 {
 156         if (machine_is_wrt350n_v2())
 157                 pci_common_init(&wrt350n_v2_pci);
 158
 159         return 0;
 160 }
 161 subsys_initcall(wrt350n_v2_pci_init);
 162
 163 MACHINE_START(WRT350N_V2, "Linksys WRT350N v2")
 164         /* Maintainer: Lennert Buytenhek <buytenh@marvell.com> */
 165         .phys_io        = ORION5X_REGS_PHYS_BASE,
 166         .io_pg_offst    = ((ORION5X_REGS_VIRT_BASE) >> 18) & 0xFFFC,
 167         .boot_params    = 0x00000100,
 168         .init_machine   = wrt350n_v2_init,
 169         .map_io         = orion5x_map_io,
 170         .init_irq       = orion5x_init_irq,
 171         .timer          = &orion5x_timer,
 172         .fixup          = tag_fixup_mem32,
 173 MACHINE_END