arch/arm/mach-s3c2410/mach-anubis.c

   1 /* linux/arch/arm/mach-s3c2410/mach-anubis.c
   2  *
   3  * Copyright (c) 2003-2005 Simtec Electronics
   4  *      http://armlinux.simtec.co.uk/
   5  *      Ben Dooks <ben@simtec.co.uk>
   6  *
   7  *
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * published by the Free Software Foundation.
  12  *
  13  * Modifications:
  14  *      02-May-2005 BJD  Copied from mach-bast.c
  15  *      20-Sep-2005 BJD  Added static to non-exported items
  16 */
  17
  18 #include <linux/kernel.h>
  19 #include <linux/types.h>
  20 #include <linux/interrupt.h>
  21 #include <linux/list.h>
  22 #include <linux/timer.h>
  23 #include <linux/init.h>
  24 #include <linux/platform_device.h>
  25
  26 #include <asm/mach/arch.h>
  27 #include <asm/mach/map.h>
  28 #include <asm/mach/irq.h>
  29
  30 #include <asm/arch/anubis-map.h>
  31 #include <asm/arch/anubis-irq.h>
  32 #include <asm/arch/anubis-cpld.h>
  33
  34 #include <asm/hardware.h>
  35 #include <asm/io.h>
  36 #include <asm/irq.h>
  37 #include <asm/mach-types.h>
  38
  39 #include <asm/arch/regs-serial.h>
  40 #include <asm/arch/regs-gpio.h>
  41 #include <asm/arch/regs-mem.h>
  42 #include <asm/arch/regs-lcd.h>
  43 #include <asm/arch/nand.h>
  44
  45 #include <linux/mtd/mtd.h>
  46 #include <linux/mtd/nand.h>
  47 #include <linux/mtd/nand_ecc.h>
  48 #include <linux/mtd/partitions.h>
  49
  50 #include "clock.h"
  51 #include "devs.h"
  52 #include "cpu.h"
  53
  54 #define COPYRIGHT ", (c) 2005 Simtec Electronics"
  55
  56 static struct map_desc anubis_iodesc[] __initdata = {
  57   /* ISA IO areas */
  58
  59   {
  60         .virtual        = (u32)S3C24XX_VA_ISA_BYTE,
  61         .pfn            = __phys_to_pfn(0x0),
  62         .length         = SZ_4M,
  63         .type           = MT_DEVICE,
  64   }, {
  65         .virtual        = (u32)S3C24XX_VA_ISA_WORD,
  66         .pfn            = __phys_to_pfn(0x0),
  67         .length         = SZ_4M,
  68         .type           = MT_DEVICE,
  69   },
  70
  71   /* we could possibly compress the next set down into a set of smaller tables
  72    * pagetables, but that would mean using an L2 section, and it still means
  73    * we cannot actually feed the same register to an LDR due to 16K spacing
  74    */
  75
  76   /* CPLD control registers */
  77
  78   {
  79         .virtual        = (u32)ANUBIS_VA_CTRL1,
  80         .pfn            = __phys_to_pfn(ANUBIS_PA_CTRL1),
  81         .length         = SZ_4K,
  82         .type           = MT_DEVICE,
  83   }, {
  84         .virtual        = (u32)ANUBIS_VA_CTRL2,
  85         .pfn            = __phys_to_pfn(ANUBIS_PA_CTRL2),
  86         .length         = SZ_4K,
  87         .type           = MT_DEVICE,
  88   },
  89 };
  90
  91 #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
  92 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
  93 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
  94
  95 static struct s3c24xx_uart_clksrc anubis_serial_clocks[] = {
  96         [0] = {
  97                 .name           = "uclk",
  98                 .divisor        = 1,
  99                 .min_baud       = 0,
 100                 .max_baud       = 0,
 101         },
 102         [1] = {
 103                 .name           = "pclk",
 104                 .divisor        = 1,
 105                 .min_baud       = 0,
 106                 .max_baud       = 0,
 107         }
 108 };
 109
 110
 111 static struct s3c2410_uartcfg anubis_uartcfgs[] __initdata = {
 112         [0] = {
 113                 .hwport      = 0,
 114                 .flags       = 0,
 115                 .ucon        = UCON,
 116                 .ulcon       = ULCON,
 117                 .ufcon       = UFCON,
 118                 .clocks      = anubis_serial_clocks,
 119                 .clocks_size = ARRAY_SIZE(anubis_serial_clocks),
 120         },
 121         [1] = {
 122                 .hwport      = 2,
 123                 .flags       = 0,
 124                 .ucon        = UCON,
 125                 .ulcon       = ULCON,
 126                 .ufcon       = UFCON,
 127                 .clocks      = anubis_serial_clocks,
 128                 .clocks_size = ARRAY_SIZE(anubis_serial_clocks),
 129         },
 130 };
 131
 132 /* NAND Flash on Anubis board */
 133
 134 static int external_map[]   = { 2 };
 135 static int chip0_map[]      = { 0 };
 136 static int chip1_map[]      = { 1 };
 137
 138 static struct mtd_partition anubis_default_nand_part[] = {
 139         [0] = {
 140                 .name   = "Boot Agent",
 141                 .size   = SZ_16K,
 142                 .offset = 0,
 143         },
 144         [1] = {
 145                 .name   = "/boot",
 146                 .size   = SZ_4M - SZ_16K,
 147                 .offset = SZ_16K,
 148         },
 149         [2] = {
 150                 .name   = "user1",
 151                 .offset = SZ_4M,
 152                 .size   = SZ_32M - SZ_4M,
 153         },
 154         [3] = {
 155                 .name   = "user2",
 156                 .offset = SZ_32M,
 157                 .size   = MTDPART_SIZ_FULL,
 158         }
 159 };
 160
 161 /* the Anubis has 3 selectable slots for nand-flash, the two
 162  * on-board chip areas, as well as the external slot.
 163  *
 164  * Note, there is no current hot-plug support for the External
 165  * socket.
 166 */
 167
 168 static struct s3c2410_nand_set anubis_nand_sets[] = {
 169         [1] = {
 170                 .name           = "External",
 171                 .nr_chips       = 1,
 172                 .nr_map         = external_map,
 173                 .nr_partitions  = ARRAY_SIZE(anubis_default_nand_part),
 174                 .partitions     = anubis_default_nand_part,
 175         },
 176         [0] = {
 177                 .name           = "chip0",
 178                 .nr_chips       = 1,
 179                 .nr_map         = chip0_map,
 180                 .nr_partitions  = ARRAY_SIZE(anubis_default_nand_part),
 181                 .partitions     = anubis_default_nand_part,
 182         },
 183         [2] = {
 184                 .name           = "chip1",
 185                 .nr_chips       = 1,
 186                 .nr_map         = chip1_map,
 187                 .nr_partitions  = ARRAY_SIZE(anubis_default_nand_part),
 188                 .partitions     = anubis_default_nand_part,
 189         },
 190 };
 191
 192 static void anubis_nand_select(struct s3c2410_nand_set *set, int slot)
 193 {
 194         unsigned int tmp;
 195
 196         slot = set->nr_map[slot] & 3;
 197
 198         pr_debug("anubis_nand: selecting slot %d (set %p,%p)\n",
 199                  slot, set, set->nr_map);
 200
 201         tmp = __raw_readb(ANUBIS_VA_CTRL1);
 202         tmp &= ~ANUBIS_CTRL1_NANDSEL;
 203         tmp |= slot;
 204
 205         pr_debug("anubis_nand: ctrl1 now %02x\n", tmp);
 206
 207         __raw_writeb(tmp, ANUBIS_VA_CTRL1);
 208 }
 209
 210 static struct s3c2410_platform_nand anubis_nand_info = {
 211         .tacls          = 25,
 212         .twrph0         = 55,
 213         .twrph1         = 40,
 214         .nr_sets        = ARRAY_SIZE(anubis_nand_sets),
 215         .sets           = anubis_nand_sets,
 216         .select_chip    = anubis_nand_select,
 217 };
 218
 219 /* IDE channels */
 220
 221 static struct resource anubis_ide0_resource[] = {
 222         {
 223                 .start  = S3C2410_CS3,
 224                 .end    = S3C2410_CS3 + (8*32) - 1,
 225                 .flags  = IORESOURCE_MEM,
 226         }, {
 227                 .start  = S3C2410_CS3 + (1<<26),
 228                 .end    = S3C2410_CS3 + (1<<26) + (8*32) - 1,
 229                 .flags  = IORESOURCE_MEM,
 230         }, {
 231                 .start  = IRQ_IDE0,
 232                 .end    = IRQ_IDE0,
 233                 .flags  = IORESOURCE_IRQ,
 234         },
 235 };
 236
 237 static struct platform_device anubis_device_ide0 = {
 238         .name           = "simtec-ide",
 239         .id             = 0,
 240         .num_resources  = ARRAY_SIZE(anubis_ide0_resource),
 241         .resource       = anubis_ide0_resource,
 242 };
 243
 244 static struct resource anubis_ide1_resource[] = {
 245         {
 246                 .start  = S3C2410_CS4,
 247                 .end    = S3C2410_CS4 + (8*32) - 1,
 248                 .flags  = IORESOURCE_MEM,
 249         }, {
 250                 .start  = S3C2410_CS4 + (1<<26),
 251                 .end    = S3C2410_CS4 + (1<<26) + (8*32) - 1,
 252                 .flags  = IORESOURCE_MEM,
 253         }, {
 254                 .start  = IRQ_IDE0,
 255                 .end    = IRQ_IDE0,
 256                 .flags  = IORESOURCE_IRQ,
 257         },
 258 };
 259
 260
 261 static struct platform_device anubis_device_ide1 = {
 262         .name           = "simtec-ide",
 263         .id             = 1,
 264         .num_resources  = ARRAY_SIZE(anubis_ide1_resource),
 265         .resource       = anubis_ide1_resource,
 266 };
 267
 268 /* Standard Anubis devices */
 269
 270 static struct platform_device *anubis_devices[] __initdata = {
 271         &s3c_device_usb,
 272         &s3c_device_wdt,
 273         &s3c_device_adc,
 274         &s3c_device_i2c,
 275         &s3c_device_rtc,
 276         &s3c_device_nand,
 277         &anubis_device_ide0,
 278         &anubis_device_ide1,
 279 };
 280
 281 static struct clk *anubis_clocks[] = {
 282         &s3c24xx_dclk0,
 283         &s3c24xx_dclk1,
 284         &s3c24xx_clkout0,
 285         &s3c24xx_clkout1,
 286         &s3c24xx_uclk,
 287 };
 288
 289 static struct s3c24xx_board anubis_board __initdata = {
 290         .devices       = anubis_devices,
 291         .devices_count = ARRAY_SIZE(anubis_devices),
 292         .clocks        = anubis_clocks,
 293         .clocks_count  = ARRAY_SIZE(anubis_clocks),
 294 };
 295
 296 static void __init anubis_map_io(void)
 297 {
 298         /* initialise the clocks */
 299
 300         s3c24xx_dclk0.parent = NULL;
 301         s3c24xx_dclk0.rate   = 12*1000*1000;
 302
 303         s3c24xx_dclk1.parent = NULL;
 304         s3c24xx_dclk1.rate   = 24*1000*1000;
 305
 306         s3c24xx_clkout0.parent  = &s3c24xx_dclk0;
 307         s3c24xx_clkout1.parent  = &s3c24xx_dclk1;
 308
 309         s3c24xx_uclk.parent  = &s3c24xx_clkout1;
 310
 311         s3c_device_nand.dev.platform_data = &anubis_nand_info;
 312
 313         s3c24xx_init_io(anubis_iodesc, ARRAY_SIZE(anubis_iodesc));
 314         s3c24xx_init_clocks(0);
 315         s3c24xx_init_uarts(anubis_uartcfgs, ARRAY_SIZE(anubis_uartcfgs));
 316         s3c24xx_set_board(&anubis_board);
 317
 318         /* ensure that the GPIO is setup */
 319         s3c2410_gpio_setpin(S3C2410_GPA0, 1);
 320 }
 321
 322 MACHINE_START(ANUBIS, "Simtec-Anubis")
 323         /* Maintainer: Ben Dooks <ben@simtec.co.uk> */
 324         .phys_io        = S3C2410_PA_UART,
 325         .io_pg_offst    = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
 326         .boot_params    = S3C2410_SDRAM_PA + 0x100,
 327         .map_io         = anubis_map_io,
 328         .init_irq       = s3c24xx_init_irq,
 329         .timer          = &s3c24xx_timer,
 330 MACHINE_END