1 #ifndef _ASM_X86_PARAVIRT_H
2 #define _ASM_X86_PARAVIRT_H
3 /* Various instructions on x86 need to be replaced for
4 * para-virtualization: those hooks are defined here. */
7 #include <asm/pgtable_types.h>
10 #include <asm/paravirt_types.h>
13 #include <linux/types.h>
14 #include <linux/cpumask.h>
16 static inline int paravirt_enabled(void)
18 return pv_info
.paravirt_enabled
;
21 static inline void load_sp0(struct tss_struct
*tss
,
22 struct thread_struct
*thread
)
24 PVOP_VCALL2(pv_cpu_ops
.load_sp0
, tss
, thread
);
27 static inline unsigned long get_wallclock(void)
29 return PVOP_CALL0(unsigned long, pv_time_ops
.get_wallclock
);
32 static inline int set_wallclock(unsigned long nowtime
)
34 return PVOP_CALL1(int, pv_time_ops
.set_wallclock
, nowtime
);
37 /* The paravirtualized CPUID instruction. */
38 static inline void __cpuid(unsigned int *eax
, unsigned int *ebx
,
39 unsigned int *ecx
, unsigned int *edx
)
41 PVOP_VCALL4(pv_cpu_ops
.cpuid
, eax
, ebx
, ecx
, edx
);
45 * These special macros can be used to get or set a debugging register
47 static inline unsigned long paravirt_get_debugreg(int reg
)
49 return PVOP_CALL1(unsigned long, pv_cpu_ops
.get_debugreg
, reg
);
51 #define get_debugreg(var, reg) var = paravirt_get_debugreg(reg)
52 static inline void set_debugreg(unsigned long val
, int reg
)
54 PVOP_VCALL2(pv_cpu_ops
.set_debugreg
, reg
, val
);
57 static inline void clts(void)
59 PVOP_VCALL0(pv_cpu_ops
.clts
);
62 static inline unsigned long read_cr0(void)
64 return PVOP_CALL0(unsigned long, pv_cpu_ops
.read_cr0
);
67 static inline void write_cr0(unsigned long x
)
69 PVOP_VCALL1(pv_cpu_ops
.write_cr0
, x
);
72 static inline unsigned long read_cr2(void)
74 return PVOP_CALL0(unsigned long, pv_mmu_ops
.read_cr2
);
77 static inline void write_cr2(unsigned long x
)
79 PVOP_VCALL1(pv_mmu_ops
.write_cr2
, x
);
82 static inline unsigned long read_cr3(void)
84 return PVOP_CALL0(unsigned long, pv_mmu_ops
.read_cr3
);
87 static inline void write_cr3(unsigned long x
)
89 PVOP_VCALL1(pv_mmu_ops
.write_cr3
, x
);
92 static inline unsigned long read_cr4(void)
94 return PVOP_CALL0(unsigned long, pv_cpu_ops
.read_cr4
);
96 static inline unsigned long read_cr4_safe(void)
98 return PVOP_CALL0(unsigned long, pv_cpu_ops
.read_cr4_safe
);
101 static inline void write_cr4(unsigned long x
)
103 PVOP_VCALL1(pv_cpu_ops
.write_cr4
, x
);
107 static inline unsigned long read_cr8(void)
109 return PVOP_CALL0(unsigned long, pv_cpu_ops
.read_cr8
);
112 static inline void write_cr8(unsigned long x
)
114 PVOP_VCALL1(pv_cpu_ops
.write_cr8
, x
);
118 static inline void raw_safe_halt(void)
120 PVOP_VCALL0(pv_irq_ops
.safe_halt
);
123 static inline void halt(void)
125 PVOP_VCALL0(pv_irq_ops
.safe_halt
);
128 static inline void wbinvd(void)
130 PVOP_VCALL0(pv_cpu_ops
.wbinvd
);
133 #define get_kernel_rpl() (pv_info.kernel_rpl)
135 static inline u64
paravirt_read_msr(unsigned msr
, int *err
)
137 return PVOP_CALL2(u64
, pv_cpu_ops
.read_msr
, msr
, err
);
139 static inline u64
paravirt_read_msr_amd(unsigned msr
, int *err
)
141 return PVOP_CALL2(u64
, pv_cpu_ops
.read_msr_amd
, msr
, err
);
143 static inline int paravirt_write_msr(unsigned msr
, unsigned low
, unsigned high
)
145 return PVOP_CALL3(int, pv_cpu_ops
.write_msr
, msr
, low
, high
);
148 /* These should all do BUG_ON(_err), but our headers are too tangled. */
149 #define rdmsr(msr, val1, val2) \
152 u64 _l = paravirt_read_msr(msr, &_err); \
157 #define wrmsr(msr, val1, val2) \
159 paravirt_write_msr(msr, val1, val2); \
162 #define rdmsrl(msr, val) \
165 val = paravirt_read_msr(msr, &_err); \
168 #define wrmsrl(msr, val) wrmsr(msr, (u32)((u64)(val)), ((u64)(val))>>32)
169 #define wrmsr_safe(msr, a, b) paravirt_write_msr(msr, a, b)
171 /* rdmsr with exception handling */
172 #define rdmsr_safe(msr, a, b) \
175 u64 _l = paravirt_read_msr(msr, &_err); \
181 static inline int rdmsrl_safe(unsigned msr
, unsigned long long *p
)
185 *p
= paravirt_read_msr(msr
, &err
);
188 static inline int rdmsrl_amd_safe(unsigned msr
, unsigned long long *p
)
192 *p
= paravirt_read_msr_amd(msr
, &err
);
196 static inline u64
paravirt_read_tsc(void)
198 return PVOP_CALL0(u64
, pv_cpu_ops
.read_tsc
);
201 #define rdtscl(low) \
203 u64 _l = paravirt_read_tsc(); \
207 #define rdtscll(val) (val = paravirt_read_tsc())
209 static inline unsigned long long paravirt_sched_clock(void)
211 return PVOP_CALL0(unsigned long long, pv_time_ops
.sched_clock
);
213 #define calibrate_tsc() (pv_time_ops.get_tsc_khz())
215 static inline unsigned long long paravirt_read_pmc(int counter
)
217 return PVOP_CALL1(u64
, pv_cpu_ops
.read_pmc
, counter
);
220 #define rdpmc(counter, low, high) \
222 u64 _l = paravirt_read_pmc(counter); \
227 static inline unsigned long long paravirt_rdtscp(unsigned int *aux
)
229 return PVOP_CALL1(u64
, pv_cpu_ops
.read_tscp
, aux
);
232 #define rdtscp(low, high, aux) \
235 unsigned long __val = paravirt_rdtscp(&__aux); \
236 (low) = (u32)__val; \
237 (high) = (u32)(__val >> 32); \
241 #define rdtscpll(val, aux) \
243 unsigned long __aux; \
244 val = paravirt_rdtscp(&__aux); \
248 static inline void paravirt_alloc_ldt(struct desc_struct
*ldt
, unsigned entries
)
250 PVOP_VCALL2(pv_cpu_ops
.alloc_ldt
, ldt
, entries
);
253 static inline void paravirt_free_ldt(struct desc_struct
*ldt
, unsigned entries
)
255 PVOP_VCALL2(pv_cpu_ops
.free_ldt
, ldt
, entries
);
258 static inline void load_TR_desc(void)
260 PVOP_VCALL0(pv_cpu_ops
.load_tr_desc
);
262 static inline void load_gdt(const struct desc_ptr
*dtr
)
264 PVOP_VCALL1(pv_cpu_ops
.load_gdt
, dtr
);
266 static inline void load_idt(const struct desc_ptr
*dtr
)
268 PVOP_VCALL1(pv_cpu_ops
.load_idt
, dtr
);
270 static inline void set_ldt(const void *addr
, unsigned entries
)
272 PVOP_VCALL2(pv_cpu_ops
.set_ldt
, addr
, entries
);
274 static inline void store_gdt(struct desc_ptr
*dtr
)
276 PVOP_VCALL1(pv_cpu_ops
.store_gdt
, dtr
);
278 static inline void store_idt(struct desc_ptr
*dtr
)
280 PVOP_VCALL1(pv_cpu_ops
.store_idt
, dtr
);
282 static inline unsigned long paravirt_store_tr(void)
284 return PVOP_CALL0(unsigned long, pv_cpu_ops
.store_tr
);
286 #define store_tr(tr) ((tr) = paravirt_store_tr())
287 static inline void load_TLS(struct thread_struct
*t
, unsigned cpu
)
289 PVOP_VCALL2(pv_cpu_ops
.load_tls
, t
, cpu
);
293 static inline void load_gs_index(unsigned int gs
)
295 PVOP_VCALL1(pv_cpu_ops
.load_gs_index
, gs
);
299 static inline void write_ldt_entry(struct desc_struct
*dt
, int entry
,
302 PVOP_VCALL3(pv_cpu_ops
.write_ldt_entry
, dt
, entry
, desc
);
305 static inline void write_gdt_entry(struct desc_struct
*dt
, int entry
,
306 void *desc
, int type
)
308 PVOP_VCALL4(pv_cpu_ops
.write_gdt_entry
, dt
, entry
, desc
, type
);
311 static inline void write_idt_entry(gate_desc
*dt
, int entry
, const gate_desc
*g
)
313 PVOP_VCALL3(pv_cpu_ops
.write_idt_entry
, dt
, entry
, g
);
315 static inline void set_iopl_mask(unsigned mask
)
317 PVOP_VCALL1(pv_cpu_ops
.set_iopl_mask
, mask
);
320 /* The paravirtualized I/O functions */
321 static inline void slow_down_io(void)
323 pv_cpu_ops
.io_delay();
324 #ifdef REALLY_SLOW_IO
325 pv_cpu_ops
.io_delay();
326 pv_cpu_ops
.io_delay();
327 pv_cpu_ops
.io_delay();
332 static inline void startup_ipi_hook(int phys_apicid
, unsigned long start_eip
,
333 unsigned long start_esp
)
335 PVOP_VCALL3(pv_apic_ops
.startup_ipi_hook
,
336 phys_apicid
, start_eip
, start_esp
);
340 static inline void paravirt_activate_mm(struct mm_struct
*prev
,
341 struct mm_struct
*next
)
343 PVOP_VCALL2(pv_mmu_ops
.activate_mm
, prev
, next
);
346 static inline void arch_dup_mmap(struct mm_struct
*oldmm
,
347 struct mm_struct
*mm
)
349 PVOP_VCALL2(pv_mmu_ops
.dup_mmap
, oldmm
, mm
);
352 static inline void arch_exit_mmap(struct mm_struct
*mm
)
354 PVOP_VCALL1(pv_mmu_ops
.exit_mmap
, mm
);
357 static inline void __flush_tlb(void)
359 PVOP_VCALL0(pv_mmu_ops
.flush_tlb_user
);
361 static inline void __flush_tlb_global(void)
363 PVOP_VCALL0(pv_mmu_ops
.flush_tlb_kernel
);
365 static inline void __flush_tlb_single(unsigned long addr
)
367 PVOP_VCALL1(pv_mmu_ops
.flush_tlb_single
, addr
);
370 static inline void flush_tlb_others(const struct cpumask
*cpumask
,
371 struct mm_struct
*mm
,
374 PVOP_VCALL3(pv_mmu_ops
.flush_tlb_others
, cpumask
, mm
, va
);
377 static inline int paravirt_pgd_alloc(struct mm_struct
*mm
)
379 return PVOP_CALL1(int, pv_mmu_ops
.pgd_alloc
, mm
);
382 static inline void paravirt_pgd_free(struct mm_struct
*mm
, pgd_t
*pgd
)
384 PVOP_VCALL2(pv_mmu_ops
.pgd_free
, mm
, pgd
);
387 static inline void paravirt_alloc_pte(struct mm_struct
*mm
, unsigned long pfn
)
389 PVOP_VCALL2(pv_mmu_ops
.alloc_pte
, mm
, pfn
);
391 static inline void paravirt_release_pte(unsigned long pfn
)
393 PVOP_VCALL1(pv_mmu_ops
.release_pte
, pfn
);
396 static inline void paravirt_alloc_pmd(struct mm_struct
*mm
, unsigned long pfn
)
398 PVOP_VCALL2(pv_mmu_ops
.alloc_pmd
, mm
, pfn
);
401 static inline void paravirt_alloc_pmd_clone(unsigned long pfn
, unsigned long clonepfn
,
402 unsigned long start
, unsigned long count
)
404 PVOP_VCALL4(pv_mmu_ops
.alloc_pmd_clone
, pfn
, clonepfn
, start
, count
);
406 static inline void paravirt_release_pmd(unsigned long pfn
)
408 PVOP_VCALL1(pv_mmu_ops
.release_pmd
, pfn
);
411 static inline void paravirt_alloc_pud(struct mm_struct
*mm
, unsigned long pfn
)
413 PVOP_VCALL2(pv_mmu_ops
.alloc_pud
, mm
, pfn
);
415 static inline void paravirt_release_pud(unsigned long pfn
)
417 PVOP_VCALL1(pv_mmu_ops
.release_pud
, pfn
);
420 #ifdef CONFIG_HIGHPTE
421 static inline void *kmap_atomic_pte(struct page
*page
, enum km_type type
)
424 ret
= PVOP_CALL2(unsigned long, pv_mmu_ops
.kmap_atomic_pte
, page
, type
);
429 static inline void pte_update(struct mm_struct
*mm
, unsigned long addr
,
432 PVOP_VCALL3(pv_mmu_ops
.pte_update
, mm
, addr
, ptep
);
435 static inline void pte_update_defer(struct mm_struct
*mm
, unsigned long addr
,
438 PVOP_VCALL3(pv_mmu_ops
.pte_update_defer
, mm
, addr
, ptep
);
441 static inline pte_t
__pte(pteval_t val
)
445 if (sizeof(pteval_t
) > sizeof(long))
446 ret
= PVOP_CALLEE2(pteval_t
,
448 val
, (u64
)val
>> 32);
450 ret
= PVOP_CALLEE1(pteval_t
,
454 return (pte_t
) { .pte
= ret
};
457 static inline pteval_t
pte_val(pte_t pte
)
461 if (sizeof(pteval_t
) > sizeof(long))
462 ret
= PVOP_CALLEE2(pteval_t
, pv_mmu_ops
.pte_val
,
463 pte
.pte
, (u64
)pte
.pte
>> 32);
465 ret
= PVOP_CALLEE1(pteval_t
, pv_mmu_ops
.pte_val
,
471 static inline pgd_t
__pgd(pgdval_t val
)
475 if (sizeof(pgdval_t
) > sizeof(long))
476 ret
= PVOP_CALLEE2(pgdval_t
, pv_mmu_ops
.make_pgd
,
477 val
, (u64
)val
>> 32);
479 ret
= PVOP_CALLEE1(pgdval_t
, pv_mmu_ops
.make_pgd
,
482 return (pgd_t
) { ret
};
485 static inline pgdval_t
pgd_val(pgd_t pgd
)
489 if (sizeof(pgdval_t
) > sizeof(long))
490 ret
= PVOP_CALLEE2(pgdval_t
, pv_mmu_ops
.pgd_val
,
491 pgd
.pgd
, (u64
)pgd
.pgd
>> 32);
493 ret
= PVOP_CALLEE1(pgdval_t
, pv_mmu_ops
.pgd_val
,
499 #define __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
500 static inline pte_t
ptep_modify_prot_start(struct mm_struct
*mm
, unsigned long addr
,
505 ret
= PVOP_CALL3(pteval_t
, pv_mmu_ops
.ptep_modify_prot_start
,
508 return (pte_t
) { .pte
= ret
};
511 static inline void ptep_modify_prot_commit(struct mm_struct
*mm
, unsigned long addr
,
512 pte_t
*ptep
, pte_t pte
)
514 if (sizeof(pteval_t
) > sizeof(long))
516 pv_mmu_ops
.ptep_modify_prot_commit(mm
, addr
, ptep
, pte
);
518 PVOP_VCALL4(pv_mmu_ops
.ptep_modify_prot_commit
,
519 mm
, addr
, ptep
, pte
.pte
);
522 static inline void set_pte(pte_t
*ptep
, pte_t pte
)
524 if (sizeof(pteval_t
) > sizeof(long))
525 PVOP_VCALL3(pv_mmu_ops
.set_pte
, ptep
,
526 pte
.pte
, (u64
)pte
.pte
>> 32);
528 PVOP_VCALL2(pv_mmu_ops
.set_pte
, ptep
,
532 static inline void set_pte_at(struct mm_struct
*mm
, unsigned long addr
,
533 pte_t
*ptep
, pte_t pte
)
535 if (sizeof(pteval_t
) > sizeof(long))
537 pv_mmu_ops
.set_pte_at(mm
, addr
, ptep
, pte
);
539 PVOP_VCALL4(pv_mmu_ops
.set_pte_at
, mm
, addr
, ptep
, pte
.pte
);
542 static inline void set_pmd(pmd_t
*pmdp
, pmd_t pmd
)
544 pmdval_t val
= native_pmd_val(pmd
);
546 if (sizeof(pmdval_t
) > sizeof(long))
547 PVOP_VCALL3(pv_mmu_ops
.set_pmd
, pmdp
, val
, (u64
)val
>> 32);
549 PVOP_VCALL2(pv_mmu_ops
.set_pmd
, pmdp
, val
);
552 #if PAGETABLE_LEVELS >= 3
553 static inline pmd_t
__pmd(pmdval_t val
)
557 if (sizeof(pmdval_t
) > sizeof(long))
558 ret
= PVOP_CALLEE2(pmdval_t
, pv_mmu_ops
.make_pmd
,
559 val
, (u64
)val
>> 32);
561 ret
= PVOP_CALLEE1(pmdval_t
, pv_mmu_ops
.make_pmd
,
564 return (pmd_t
) { ret
};
567 static inline pmdval_t
pmd_val(pmd_t pmd
)
571 if (sizeof(pmdval_t
) > sizeof(long))
572 ret
= PVOP_CALLEE2(pmdval_t
, pv_mmu_ops
.pmd_val
,
573 pmd
.pmd
, (u64
)pmd
.pmd
>> 32);
575 ret
= PVOP_CALLEE1(pmdval_t
, pv_mmu_ops
.pmd_val
,
581 static inline void set_pud(pud_t
*pudp
, pud_t pud
)
583 pudval_t val
= native_pud_val(pud
);
585 if (sizeof(pudval_t
) > sizeof(long))
586 PVOP_VCALL3(pv_mmu_ops
.set_pud
, pudp
,
587 val
, (u64
)val
>> 32);
589 PVOP_VCALL2(pv_mmu_ops
.set_pud
, pudp
,
592 #if PAGETABLE_LEVELS == 4
593 static inline pud_t
__pud(pudval_t val
)
597 if (sizeof(pudval_t
) > sizeof(long))
598 ret
= PVOP_CALLEE2(pudval_t
, pv_mmu_ops
.make_pud
,
599 val
, (u64
)val
>> 32);
601 ret
= PVOP_CALLEE1(pudval_t
, pv_mmu_ops
.make_pud
,
604 return (pud_t
) { ret
};
607 static inline pudval_t
pud_val(pud_t pud
)
611 if (sizeof(pudval_t
) > sizeof(long))
612 ret
= PVOP_CALLEE2(pudval_t
, pv_mmu_ops
.pud_val
,
613 pud
.pud
, (u64
)pud
.pud
>> 32);
615 ret
= PVOP_CALLEE1(pudval_t
, pv_mmu_ops
.pud_val
,
621 static inline void set_pgd(pgd_t
*pgdp
, pgd_t pgd
)
623 pgdval_t val
= native_pgd_val(pgd
);
625 if (sizeof(pgdval_t
) > sizeof(long))
626 PVOP_VCALL3(pv_mmu_ops
.set_pgd
, pgdp
,
627 val
, (u64
)val
>> 32);
629 PVOP_VCALL2(pv_mmu_ops
.set_pgd
, pgdp
,
633 static inline void pgd_clear(pgd_t
*pgdp
)
635 set_pgd(pgdp
, __pgd(0));
638 static inline void pud_clear(pud_t
*pudp
)
640 set_pud(pudp
, __pud(0));
643 #endif /* PAGETABLE_LEVELS == 4 */
645 #endif /* PAGETABLE_LEVELS >= 3 */
647 #ifdef CONFIG_X86_PAE
648 /* Special-case pte-setting operations for PAE, which can't update a
649 64-bit pte atomically */
650 static inline void set_pte_atomic(pte_t
*ptep
, pte_t pte
)
652 PVOP_VCALL3(pv_mmu_ops
.set_pte_atomic
, ptep
,
653 pte
.pte
, pte
.pte
>> 32);
656 static inline void pte_clear(struct mm_struct
*mm
, unsigned long addr
,
659 PVOP_VCALL3(pv_mmu_ops
.pte_clear
, mm
, addr
, ptep
);
662 static inline void pmd_clear(pmd_t
*pmdp
)
664 PVOP_VCALL1(pv_mmu_ops
.pmd_clear
, pmdp
);
666 #else /* !CONFIG_X86_PAE */
667 static inline void set_pte_atomic(pte_t
*ptep
, pte_t pte
)
672 static inline void pte_clear(struct mm_struct
*mm
, unsigned long addr
,
675 set_pte_at(mm
, addr
, ptep
, __pte(0));
678 static inline void pmd_clear(pmd_t
*pmdp
)
680 set_pmd(pmdp
, __pmd(0));
682 #endif /* CONFIG_X86_PAE */
684 #define __HAVE_ARCH_START_CONTEXT_SWITCH
685 static inline void arch_start_context_switch(struct task_struct
*prev
)
687 PVOP_VCALL1(pv_cpu_ops
.start_context_switch
, prev
);
690 static inline void arch_end_context_switch(struct task_struct
*next
)
692 PVOP_VCALL1(pv_cpu_ops
.end_context_switch
, next
);
695 #define __HAVE_ARCH_ENTER_LAZY_MMU_MODE
696 static inline void arch_enter_lazy_mmu_mode(void)
698 PVOP_VCALL0(pv_mmu_ops
.lazy_mode
.enter
);
701 static inline void arch_leave_lazy_mmu_mode(void)
703 PVOP_VCALL0(pv_mmu_ops
.lazy_mode
.leave
);
706 void arch_flush_lazy_mmu_mode(void);
708 static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx
,
709 phys_addr_t phys
, pgprot_t flags
)
711 pv_mmu_ops
.set_fixmap(idx
, phys
, flags
);
714 #if defined(CONFIG_SMP) && defined(CONFIG_PARAVIRT_SPINLOCKS)
716 static inline int __raw_spin_is_locked(struct raw_spinlock
*lock
)
718 return PVOP_CALL1(int, pv_lock_ops
.spin_is_locked
, lock
);
721 static inline int __raw_spin_is_contended(struct raw_spinlock
*lock
)
723 return PVOP_CALL1(int, pv_lock_ops
.spin_is_contended
, lock
);
725 #define __raw_spin_is_contended __raw_spin_is_contended
727 static __always_inline
void __raw_spin_lock(struct raw_spinlock
*lock
)
729 PVOP_VCALL1(pv_lock_ops
.spin_lock
, lock
);
732 static __always_inline
void __raw_spin_lock_flags(struct raw_spinlock
*lock
,
735 PVOP_VCALL2(pv_lock_ops
.spin_lock_flags
, lock
, flags
);
738 static __always_inline
int __raw_spin_trylock(struct raw_spinlock
*lock
)
740 return PVOP_CALL1(int, pv_lock_ops
.spin_trylock
, lock
);
743 static __always_inline
void __raw_spin_unlock(struct raw_spinlock
*lock
)
745 PVOP_VCALL1(pv_lock_ops
.spin_unlock
, lock
);
751 #define PV_SAVE_REGS "pushl %ecx; pushl %edx;"
752 #define PV_RESTORE_REGS "popl %edx; popl %ecx;"
754 /* save and restore all caller-save registers, except return value */
755 #define PV_SAVE_ALL_CALLER_REGS "pushl %ecx;"
756 #define PV_RESTORE_ALL_CALLER_REGS "popl %ecx;"
758 #define PV_FLAGS_ARG "0"
759 #define PV_EXTRA_CLOBBERS
760 #define PV_VEXTRA_CLOBBERS
762 /* save and restore all caller-save registers, except return value */
763 #define PV_SAVE_ALL_CALLER_REGS \
772 #define PV_RESTORE_ALL_CALLER_REGS \
782 /* We save some registers, but all of them, that's too much. We clobber all
783 * caller saved registers but the argument parameter */
784 #define PV_SAVE_REGS "pushq %%rdi;"
785 #define PV_RESTORE_REGS "popq %%rdi;"
786 #define PV_EXTRA_CLOBBERS EXTRA_CLOBBERS, "rcx" , "rdx", "rsi"
787 #define PV_VEXTRA_CLOBBERS EXTRA_CLOBBERS, "rdi", "rcx" , "rdx", "rsi"
788 #define PV_FLAGS_ARG "D"
792 * Generate a thunk around a function which saves all caller-save
793 * registers except for the return value. This allows C functions to
794 * be called from assembler code where fewer than normal registers are
795 * available. It may also help code generation around calls from C
796 * code if the common case doesn't use many registers.
798 * When a callee is wrapped in a thunk, the caller can assume that all
799 * arg regs and all scratch registers are preserved across the
800 * call. The return value in rax/eax will not be saved, even for void
803 #define PV_CALLEE_SAVE_REGS_THUNK(func) \
804 extern typeof(func) __raw_callee_save_##func; \
805 static void *__##func##__ __used = func; \
807 asm(".pushsection .text;" \
808 "__raw_callee_save_" #func ": " \
809 PV_SAVE_ALL_CALLER_REGS \
811 PV_RESTORE_ALL_CALLER_REGS \
815 /* Get a reference to a callee-save function */
816 #define PV_CALLEE_SAVE(func) \
817 ((struct paravirt_callee_save) { __raw_callee_save_##func })
819 /* Promise that "func" already uses the right calling convention */
820 #define __PV_IS_CALLEE_SAVE(func) \
821 ((struct paravirt_callee_save) { func })
823 static inline unsigned long __raw_local_save_flags(void)
827 asm volatile(paravirt_alt(PARAVIRT_CALL
)
829 : paravirt_type(pv_irq_ops
.save_fl
),
830 paravirt_clobber(CLBR_EAX
)
835 static inline void raw_local_irq_restore(unsigned long f
)
837 asm volatile(paravirt_alt(PARAVIRT_CALL
)
840 paravirt_type(pv_irq_ops
.restore_fl
),
841 paravirt_clobber(CLBR_EAX
)
845 static inline void raw_local_irq_disable(void)
847 asm volatile(paravirt_alt(PARAVIRT_CALL
)
849 : paravirt_type(pv_irq_ops
.irq_disable
),
850 paravirt_clobber(CLBR_EAX
)
851 : "memory", "eax", "cc");
854 static inline void raw_local_irq_enable(void)
856 asm volatile(paravirt_alt(PARAVIRT_CALL
)
858 : paravirt_type(pv_irq_ops
.irq_enable
),
859 paravirt_clobber(CLBR_EAX
)
860 : "memory", "eax", "cc");
863 static inline unsigned long __raw_local_irq_save(void)
867 f
= __raw_local_save_flags();
868 raw_local_irq_disable();
873 /* Make sure as little as possible of this mess escapes. */
888 extern void default_banner(void);
890 #else /* __ASSEMBLY__ */
892 #define _PVSITE(ptype, clobbers, ops, word, algn) \
896 .pushsection .parainstructions,"a"; \
905 #define COND_PUSH(set, mask, reg) \
906 .if ((~(set)) & mask); push %reg; .endif
907 #define COND_POP(set, mask, reg) \
908 .if ((~(set)) & mask); pop %reg; .endif
912 #define PV_SAVE_REGS(set) \
913 COND_PUSH(set, CLBR_RAX, rax); \
914 COND_PUSH(set, CLBR_RCX, rcx); \
915 COND_PUSH(set, CLBR_RDX, rdx); \
916 COND_PUSH(set, CLBR_RSI, rsi); \
917 COND_PUSH(set, CLBR_RDI, rdi); \
918 COND_PUSH(set, CLBR_R8, r8); \
919 COND_PUSH(set, CLBR_R9, r9); \
920 COND_PUSH(set, CLBR_R10, r10); \
921 COND_PUSH(set, CLBR_R11, r11)
922 #define PV_RESTORE_REGS(set) \
923 COND_POP(set, CLBR_R11, r11); \
924 COND_POP(set, CLBR_R10, r10); \
925 COND_POP(set, CLBR_R9, r9); \
926 COND_POP(set, CLBR_R8, r8); \
927 COND_POP(set, CLBR_RDI, rdi); \
928 COND_POP(set, CLBR_RSI, rsi); \
929 COND_POP(set, CLBR_RDX, rdx); \
930 COND_POP(set, CLBR_RCX, rcx); \
931 COND_POP(set, CLBR_RAX, rax)
933 #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 8)
934 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .quad, 8)
935 #define PARA_INDIRECT(addr) *addr(%rip)
937 #define PV_SAVE_REGS(set) \
938 COND_PUSH(set, CLBR_EAX, eax); \
939 COND_PUSH(set, CLBR_EDI, edi); \
940 COND_PUSH(set, CLBR_ECX, ecx); \
941 COND_PUSH(set, CLBR_EDX, edx)
942 #define PV_RESTORE_REGS(set) \
943 COND_POP(set, CLBR_EDX, edx); \
944 COND_POP(set, CLBR_ECX, ecx); \
945 COND_POP(set, CLBR_EDI, edi); \
946 COND_POP(set, CLBR_EAX, eax)
948 #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 4)
949 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .long, 4)
950 #define PARA_INDIRECT(addr) *%cs:addr
953 #define INTERRUPT_RETURN \
954 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_iret), CLBR_NONE, \
955 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_iret))
957 #define DISABLE_INTERRUPTS(clobbers) \
958 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_disable), clobbers, \
959 PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE); \
960 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_disable); \
961 PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);)
963 #define ENABLE_INTERRUPTS(clobbers) \
964 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_enable), clobbers, \
965 PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE); \
966 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_enable); \
967 PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);)
969 #define USERGS_SYSRET32 \
970 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret32), \
972 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret32))
975 #define GET_CR0_INTO_EAX \
976 push %ecx; push %edx; \
977 call PARA_INDIRECT(pv_cpu_ops+PV_CPU_read_cr0); \
980 #define ENABLE_INTERRUPTS_SYSEXIT \
981 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_sysexit), \
983 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_irq_enable_sysexit))
986 #else /* !CONFIG_X86_32 */
989 * If swapgs is used while the userspace stack is still current,
990 * there's no way to call a pvop. The PV replacement *must* be
991 * inlined, or the swapgs instruction must be trapped and emulated.
993 #define SWAPGS_UNSAFE_STACK \
994 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \
998 * Note: swapgs is very special, and in practise is either going to be
999 * implemented with a single "swapgs" instruction or something very
1000 * special. Either way, we don't need to save any registers for
1004 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \
1005 call PARA_INDIRECT(pv_cpu_ops+PV_CPU_swapgs) \
1008 #define GET_CR2_INTO_RCX \
1009 call PARA_INDIRECT(pv_mmu_ops+PV_MMU_read_cr2); \
1013 #define PARAVIRT_ADJUST_EXCEPTION_FRAME \
1014 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_adjust_exception_frame), \
1016 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_adjust_exception_frame))
1018 #define USERGS_SYSRET64 \
1019 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret64), \
1021 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret64))
1023 #define ENABLE_INTERRUPTS_SYSEXIT32 \
1024 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_sysexit), \
1026 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_irq_enable_sysexit))
1027 #endif /* CONFIG_X86_32 */
1029 #endif /* __ASSEMBLY__ */
1030 #else /* CONFIG_PARAVIRT */
1031 # define default_banner x86_init_noop
1032 #endif /* !CONFIG_PARAVIRT */
1033 #endif /* _ASM_X86_PARAVIRT_H */