[POWERPC] iSeries has no legacy I/O
[linux-2.6/mini2440.git] / arch / powerpc / platforms / iseries / setup.c
bloba0ff7ba7d666addc2a78a3f20276e9de56d09f61
1 /*
2 * Copyright (c) 2000 Mike Corrigan <mikejc@us.ibm.com>
3 * Copyright (c) 1999-2000 Grant Erickson <grant@lcse.umn.edu>
5 * Description:
6 * Architecture- / platform-specific boot-time initialization code for
7 * the IBM iSeries LPAR. Adapted from original code by Grant Erickson and
8 * code by Gary Thomas, Cort Dougan <cort@fsmlabs.com>, and Dan Malek
9 * <dan@net4x.com>.
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation; either version
14 * 2 of the License, or (at your option) any later version.
17 #undef DEBUG
19 #include <linux/init.h>
20 #include <linux/threads.h>
21 #include <linux/smp.h>
22 #include <linux/param.h>
23 #include <linux/string.h>
24 #include <linux/initrd.h>
25 #include <linux/seq_file.h>
26 #include <linux/kdev_t.h>
27 #include <linux/major.h>
28 #include <linux/root_dev.h>
29 #include <linux/kernel.h>
31 #include <asm/processor.h>
32 #include <asm/machdep.h>
33 #include <asm/page.h>
34 #include <asm/mmu.h>
35 #include <asm/pgtable.h>
36 #include <asm/mmu_context.h>
37 #include <asm/cputable.h>
38 #include <asm/sections.h>
39 #include <asm/iommu.h>
40 #include <asm/firmware.h>
41 #include <asm/system.h>
42 #include <asm/time.h>
43 #include <asm/paca.h>
44 #include <asm/cache.h>
45 #include <asm/sections.h>
46 #include <asm/abs_addr.h>
47 #include <asm/iseries/hv_lp_config.h>
48 #include <asm/iseries/hv_call_event.h>
49 #include <asm/iseries/hv_call_xm.h>
50 #include <asm/iseries/it_lp_queue.h>
51 #include <asm/iseries/mf.h>
52 #include <asm/iseries/hv_lp_event.h>
53 #include <asm/iseries/lpar_map.h>
54 #include <asm/udbg.h>
55 #include <asm/irq.h>
57 #include "naca.h"
58 #include "setup.h"
59 #include "irq.h"
60 #include "vpd_areas.h"
61 #include "processor_vpd.h"
62 #include "it_lp_naca.h"
63 #include "main_store.h"
64 #include "call_sm.h"
65 #include "call_hpt.h"
67 #ifdef DEBUG
68 #define DBG(fmt...) udbg_printf(fmt)
69 #else
70 #define DBG(fmt...)
71 #endif
73 /* Function Prototypes */
74 static unsigned long build_iSeries_Memory_Map(void);
75 static void iseries_shared_idle(void);
76 static void iseries_dedicated_idle(void);
77 #ifdef CONFIG_PCI
78 extern void iSeries_pci_final_fixup(void);
79 #else
80 static void iSeries_pci_final_fixup(void) { }
81 #endif
83 extern int rd_size; /* Defined in drivers/block/rd.c */
85 extern unsigned long iSeries_recal_tb;
86 extern unsigned long iSeries_recal_titan;
88 struct MemoryBlock {
89 unsigned long absStart;
90 unsigned long absEnd;
91 unsigned long logicalStart;
92 unsigned long logicalEnd;
96 * Process the main store vpd to determine where the holes in memory are
97 * and return the number of physical blocks and fill in the array of
98 * block data.
100 static unsigned long iSeries_process_Condor_mainstore_vpd(
101 struct MemoryBlock *mb_array, unsigned long max_entries)
103 unsigned long holeFirstChunk, holeSizeChunks;
104 unsigned long numMemoryBlocks = 1;
105 struct IoHriMainStoreSegment4 *msVpd =
106 (struct IoHriMainStoreSegment4 *)xMsVpd;
107 unsigned long holeStart = msVpd->nonInterleavedBlocksStartAdr;
108 unsigned long holeEnd = msVpd->nonInterleavedBlocksEndAdr;
109 unsigned long holeSize = holeEnd - holeStart;
111 printk("Mainstore_VPD: Condor\n");
113 * Determine if absolute memory has any
114 * holes so that we can interpret the
115 * access map we get back from the hypervisor
116 * correctly.
118 mb_array[0].logicalStart = 0;
119 mb_array[0].logicalEnd = 0x100000000;
120 mb_array[0].absStart = 0;
121 mb_array[0].absEnd = 0x100000000;
123 if (holeSize) {
124 numMemoryBlocks = 2;
125 holeStart = holeStart & 0x000fffffffffffff;
126 holeStart = addr_to_chunk(holeStart);
127 holeFirstChunk = holeStart;
128 holeSize = addr_to_chunk(holeSize);
129 holeSizeChunks = holeSize;
130 printk( "Main store hole: start chunk = %0lx, size = %0lx chunks\n",
131 holeFirstChunk, holeSizeChunks );
132 mb_array[0].logicalEnd = holeFirstChunk;
133 mb_array[0].absEnd = holeFirstChunk;
134 mb_array[1].logicalStart = holeFirstChunk;
135 mb_array[1].logicalEnd = 0x100000000 - holeSizeChunks;
136 mb_array[1].absStart = holeFirstChunk + holeSizeChunks;
137 mb_array[1].absEnd = 0x100000000;
139 return numMemoryBlocks;
142 #define MaxSegmentAreas 32
143 #define MaxSegmentAdrRangeBlocks 128
144 #define MaxAreaRangeBlocks 4
146 static unsigned long iSeries_process_Regatta_mainstore_vpd(
147 struct MemoryBlock *mb_array, unsigned long max_entries)
149 struct IoHriMainStoreSegment5 *msVpdP =
150 (struct IoHriMainStoreSegment5 *)xMsVpd;
151 unsigned long numSegmentBlocks = 0;
152 u32 existsBits = msVpdP->msAreaExists;
153 unsigned long area_num;
155 printk("Mainstore_VPD: Regatta\n");
157 for (area_num = 0; area_num < MaxSegmentAreas; ++area_num ) {
158 unsigned long numAreaBlocks;
159 struct IoHriMainStoreArea4 *currentArea;
161 if (existsBits & 0x80000000) {
162 unsigned long block_num;
164 currentArea = &msVpdP->msAreaArray[area_num];
165 numAreaBlocks = currentArea->numAdrRangeBlocks;
166 printk("ms_vpd: processing area %2ld blocks=%ld",
167 area_num, numAreaBlocks);
168 for (block_num = 0; block_num < numAreaBlocks;
169 ++block_num ) {
170 /* Process an address range block */
171 struct MemoryBlock tempBlock;
172 unsigned long i;
174 tempBlock.absStart =
175 (unsigned long)currentArea->xAdrRangeBlock[block_num].blockStart;
176 tempBlock.absEnd =
177 (unsigned long)currentArea->xAdrRangeBlock[block_num].blockEnd;
178 tempBlock.logicalStart = 0;
179 tempBlock.logicalEnd = 0;
180 printk("\n block %ld absStart=%016lx absEnd=%016lx",
181 block_num, tempBlock.absStart,
182 tempBlock.absEnd);
184 for (i = 0; i < numSegmentBlocks; ++i) {
185 if (mb_array[i].absStart ==
186 tempBlock.absStart)
187 break;
189 if (i == numSegmentBlocks) {
190 if (numSegmentBlocks == max_entries)
191 panic("iSeries_process_mainstore_vpd: too many memory blocks");
192 mb_array[numSegmentBlocks] = tempBlock;
193 ++numSegmentBlocks;
194 } else
195 printk(" (duplicate)");
197 printk("\n");
199 existsBits <<= 1;
201 /* Now sort the blocks found into ascending sequence */
202 if (numSegmentBlocks > 1) {
203 unsigned long m, n;
205 for (m = 0; m < numSegmentBlocks - 1; ++m) {
206 for (n = numSegmentBlocks - 1; m < n; --n) {
207 if (mb_array[n].absStart <
208 mb_array[n-1].absStart) {
209 struct MemoryBlock tempBlock;
211 tempBlock = mb_array[n];
212 mb_array[n] = mb_array[n-1];
213 mb_array[n-1] = tempBlock;
219 * Assign "logical" addresses to each block. These
220 * addresses correspond to the hypervisor "bitmap" space.
221 * Convert all addresses into units of 256K chunks.
224 unsigned long i, nextBitmapAddress;
226 printk("ms_vpd: %ld sorted memory blocks\n", numSegmentBlocks);
227 nextBitmapAddress = 0;
228 for (i = 0; i < numSegmentBlocks; ++i) {
229 unsigned long length = mb_array[i].absEnd -
230 mb_array[i].absStart;
232 mb_array[i].logicalStart = nextBitmapAddress;
233 mb_array[i].logicalEnd = nextBitmapAddress + length;
234 nextBitmapAddress += length;
235 printk(" Bitmap range: %016lx - %016lx\n"
236 " Absolute range: %016lx - %016lx\n",
237 mb_array[i].logicalStart,
238 mb_array[i].logicalEnd,
239 mb_array[i].absStart, mb_array[i].absEnd);
240 mb_array[i].absStart = addr_to_chunk(mb_array[i].absStart &
241 0x000fffffffffffff);
242 mb_array[i].absEnd = addr_to_chunk(mb_array[i].absEnd &
243 0x000fffffffffffff);
244 mb_array[i].logicalStart =
245 addr_to_chunk(mb_array[i].logicalStart);
246 mb_array[i].logicalEnd = addr_to_chunk(mb_array[i].logicalEnd);
250 return numSegmentBlocks;
253 static unsigned long iSeries_process_mainstore_vpd(struct MemoryBlock *mb_array,
254 unsigned long max_entries)
256 unsigned long i;
257 unsigned long mem_blocks = 0;
259 if (cpu_has_feature(CPU_FTR_SLB))
260 mem_blocks = iSeries_process_Regatta_mainstore_vpd(mb_array,
261 max_entries);
262 else
263 mem_blocks = iSeries_process_Condor_mainstore_vpd(mb_array,
264 max_entries);
266 printk("Mainstore_VPD: numMemoryBlocks = %ld \n", mem_blocks);
267 for (i = 0; i < mem_blocks; ++i) {
268 printk("Mainstore_VPD: block %3ld logical chunks %016lx - %016lx\n"
269 " abs chunks %016lx - %016lx\n",
270 i, mb_array[i].logicalStart, mb_array[i].logicalEnd,
271 mb_array[i].absStart, mb_array[i].absEnd);
273 return mem_blocks;
276 static void __init iSeries_get_cmdline(void)
278 char *p, *q;
280 /* copy the command line parameter from the primary VSP */
281 HvCallEvent_dmaToSp(cmd_line, 2 * 64* 1024, 256,
282 HvLpDma_Direction_RemoteToLocal);
284 p = cmd_line;
285 q = cmd_line + 255;
286 while(p < q) {
287 if (!*p || *p == '\n')
288 break;
289 ++p;
291 *p = 0;
294 static void __init iSeries_init_early(void)
296 DBG(" -> iSeries_init_early()\n");
298 #if defined(CONFIG_BLK_DEV_INITRD)
300 * If the init RAM disk has been configured and there is
301 * a non-zero starting address for it, set it up
303 if (naca.xRamDisk) {
304 initrd_start = (unsigned long)__va(naca.xRamDisk);
305 initrd_end = initrd_start + naca.xRamDiskSize * HW_PAGE_SIZE;
306 initrd_below_start_ok = 1; // ramdisk in kernel space
307 ROOT_DEV = Root_RAM0;
308 if (((rd_size * 1024) / HW_PAGE_SIZE) < naca.xRamDiskSize)
309 rd_size = (naca.xRamDiskSize * HW_PAGE_SIZE) / 1024;
310 } else
311 #endif /* CONFIG_BLK_DEV_INITRD */
313 /* ROOT_DEV = MKDEV(VIODASD_MAJOR, 1); */
316 iSeries_recal_tb = get_tb();
317 iSeries_recal_titan = HvCallXm_loadTod();
320 * Initialize the DMA/TCE management
322 iommu_init_early_iSeries();
324 /* Initialize machine-dependency vectors */
325 #ifdef CONFIG_SMP
326 smp_init_iSeries();
327 #endif
329 /* Associate Lp Event Queue 0 with processor 0 */
330 HvCallEvent_setLpEventQueueInterruptProc(0, 0);
332 mf_init();
334 /* If we were passed an initrd, set the ROOT_DEV properly if the values
335 * look sensible. If not, clear initrd reference.
337 #ifdef CONFIG_BLK_DEV_INITRD
338 if (initrd_start >= KERNELBASE && initrd_end >= KERNELBASE &&
339 initrd_end > initrd_start)
340 ROOT_DEV = Root_RAM0;
341 else
342 initrd_start = initrd_end = 0;
343 #endif /* CONFIG_BLK_DEV_INITRD */
345 DBG(" <- iSeries_init_early()\n");
348 struct mschunks_map mschunks_map = {
349 /* XXX We don't use these, but Piranha might need them. */
350 .chunk_size = MSCHUNKS_CHUNK_SIZE,
351 .chunk_shift = MSCHUNKS_CHUNK_SHIFT,
352 .chunk_mask = MSCHUNKS_OFFSET_MASK,
354 EXPORT_SYMBOL(mschunks_map);
356 void mschunks_alloc(unsigned long num_chunks)
358 klimit = _ALIGN(klimit, sizeof(u32));
359 mschunks_map.mapping = (u32 *)klimit;
360 klimit += num_chunks * sizeof(u32);
361 mschunks_map.num_chunks = num_chunks;
365 * The iSeries may have very large memories ( > 128 GB ) and a partition
366 * may get memory in "chunks" that may be anywhere in the 2**52 real
367 * address space. The chunks are 256K in size. To map this to the
368 * memory model Linux expects, the AS/400 specific code builds a
369 * translation table to translate what Linux thinks are "physical"
370 * addresses to the actual real addresses. This allows us to make
371 * it appear to Linux that we have contiguous memory starting at
372 * physical address zero while in fact this could be far from the truth.
373 * To avoid confusion, I'll let the words physical and/or real address
374 * apply to the Linux addresses while I'll use "absolute address" to
375 * refer to the actual hardware real address.
377 * build_iSeries_Memory_Map gets information from the Hypervisor and
378 * looks at the Main Store VPD to determine the absolute addresses
379 * of the memory that has been assigned to our partition and builds
380 * a table used to translate Linux's physical addresses to these
381 * absolute addresses. Absolute addresses are needed when
382 * communicating with the hypervisor (e.g. to build HPT entries)
384 * Returns the physical memory size
387 static unsigned long __init build_iSeries_Memory_Map(void)
389 u32 loadAreaFirstChunk, loadAreaLastChunk, loadAreaSize;
390 u32 nextPhysChunk;
391 u32 hptFirstChunk, hptLastChunk, hptSizeChunks, hptSizePages;
392 u32 totalChunks,moreChunks;
393 u32 currChunk, thisChunk, absChunk;
394 u32 currDword;
395 u32 chunkBit;
396 u64 map;
397 struct MemoryBlock mb[32];
398 unsigned long numMemoryBlocks, curBlock;
400 /* Chunk size on iSeries is 256K bytes */
401 totalChunks = (u32)HvLpConfig_getMsChunks();
402 mschunks_alloc(totalChunks);
405 * Get absolute address of our load area
406 * and map it to physical address 0
407 * This guarantees that the loadarea ends up at physical 0
408 * otherwise, it might not be returned by PLIC as the first
409 * chunks
412 loadAreaFirstChunk = (u32)addr_to_chunk(itLpNaca.xLoadAreaAddr);
413 loadAreaSize = itLpNaca.xLoadAreaChunks;
416 * Only add the pages already mapped here.
417 * Otherwise we might add the hpt pages
418 * The rest of the pages of the load area
419 * aren't in the HPT yet and can still
420 * be assigned an arbitrary physical address
422 if ((loadAreaSize * 64) > HvPagesToMap)
423 loadAreaSize = HvPagesToMap / 64;
425 loadAreaLastChunk = loadAreaFirstChunk + loadAreaSize - 1;
428 * TODO Do we need to do something if the HPT is in the 64MB load area?
429 * This would be required if the itLpNaca.xLoadAreaChunks includes
430 * the HPT size
433 printk("Mapping load area - physical addr = 0000000000000000\n"
434 " absolute addr = %016lx\n",
435 chunk_to_addr(loadAreaFirstChunk));
436 printk("Load area size %dK\n", loadAreaSize * 256);
438 for (nextPhysChunk = 0; nextPhysChunk < loadAreaSize; ++nextPhysChunk)
439 mschunks_map.mapping[nextPhysChunk] =
440 loadAreaFirstChunk + nextPhysChunk;
443 * Get absolute address of our HPT and remember it so
444 * we won't map it to any physical address
446 hptFirstChunk = (u32)addr_to_chunk(HvCallHpt_getHptAddress());
447 hptSizePages = (u32)HvCallHpt_getHptPages();
448 hptSizeChunks = hptSizePages >>
449 (MSCHUNKS_CHUNK_SHIFT - HW_PAGE_SHIFT);
450 hptLastChunk = hptFirstChunk + hptSizeChunks - 1;
452 printk("HPT absolute addr = %016lx, size = %dK\n",
453 chunk_to_addr(hptFirstChunk), hptSizeChunks * 256);
456 * Determine if absolute memory has any
457 * holes so that we can interpret the
458 * access map we get back from the hypervisor
459 * correctly.
461 numMemoryBlocks = iSeries_process_mainstore_vpd(mb, 32);
464 * Process the main store access map from the hypervisor
465 * to build up our physical -> absolute translation table
467 curBlock = 0;
468 currChunk = 0;
469 currDword = 0;
470 moreChunks = totalChunks;
472 while (moreChunks) {
473 map = HvCallSm_get64BitsOfAccessMap(itLpNaca.xLpIndex,
474 currDword);
475 thisChunk = currChunk;
476 while (map) {
477 chunkBit = map >> 63;
478 map <<= 1;
479 if (chunkBit) {
480 --moreChunks;
481 while (thisChunk >= mb[curBlock].logicalEnd) {
482 ++curBlock;
483 if (curBlock >= numMemoryBlocks)
484 panic("out of memory blocks");
486 if (thisChunk < mb[curBlock].logicalStart)
487 panic("memory block error");
489 absChunk = mb[curBlock].absStart +
490 (thisChunk - mb[curBlock].logicalStart);
491 if (((absChunk < hptFirstChunk) ||
492 (absChunk > hptLastChunk)) &&
493 ((absChunk < loadAreaFirstChunk) ||
494 (absChunk > loadAreaLastChunk))) {
495 mschunks_map.mapping[nextPhysChunk] =
496 absChunk;
497 ++nextPhysChunk;
500 ++thisChunk;
502 ++currDword;
503 currChunk += 64;
507 * main store size (in chunks) is
508 * totalChunks - hptSizeChunks
509 * which should be equal to
510 * nextPhysChunk
512 return chunk_to_addr(nextPhysChunk);
516 * Document me.
518 static void __init iSeries_setup_arch(void)
520 if (get_lppaca()->shared_proc) {
521 ppc_md.idle_loop = iseries_shared_idle;
522 printk(KERN_DEBUG "Using shared processor idle loop\n");
523 } else {
524 ppc_md.idle_loop = iseries_dedicated_idle;
525 printk(KERN_DEBUG "Using dedicated idle loop\n");
528 /* Setup the Lp Event Queue */
529 setup_hvlpevent_queue();
531 printk("Max logical processors = %d\n",
532 itVpdAreas.xSlicMaxLogicalProcs);
533 printk("Max physical processors = %d\n",
534 itVpdAreas.xSlicMaxPhysicalProcs);
537 static void iSeries_show_cpuinfo(struct seq_file *m)
539 seq_printf(m, "machine\t\t: 64-bit iSeries Logical Partition\n");
542 static void __init iSeries_progress(char * st, unsigned short code)
544 printk("Progress: [%04x] - %s\n", (unsigned)code, st);
545 mf_display_progress(code);
548 static void __init iSeries_fixup_klimit(void)
551 * Change klimit to take into account any ram disk
552 * that may be included
554 if (naca.xRamDisk)
555 klimit = KERNELBASE + (u64)naca.xRamDisk +
556 (naca.xRamDiskSize * HW_PAGE_SIZE);
559 static int __init iSeries_src_init(void)
561 /* clear the progress line */
562 ppc_md.progress(" ", 0xffff);
563 return 0;
566 late_initcall(iSeries_src_init);
568 static inline void process_iSeries_events(void)
570 asm volatile ("li 0,0x5555; sc" : : : "r0", "r3");
573 static void yield_shared_processor(void)
575 unsigned long tb;
577 HvCall_setEnabledInterrupts(HvCall_MaskIPI |
578 HvCall_MaskLpEvent |
579 HvCall_MaskLpProd |
580 HvCall_MaskTimeout);
582 tb = get_tb();
583 /* Compute future tb value when yield should expire */
584 HvCall_yieldProcessor(HvCall_YieldTimed, tb+tb_ticks_per_jiffy);
587 * The decrementer stops during the yield. Force a fake decrementer
588 * here and let the timer_interrupt code sort out the actual time.
590 get_lppaca()->int_dword.fields.decr_int = 1;
591 ppc64_runlatch_on();
592 process_iSeries_events();
595 static void iseries_shared_idle(void)
597 while (1) {
598 while (!need_resched() && !hvlpevent_is_pending()) {
599 local_irq_disable();
600 ppc64_runlatch_off();
602 /* Recheck with irqs off */
603 if (!need_resched() && !hvlpevent_is_pending())
604 yield_shared_processor();
606 HMT_medium();
607 local_irq_enable();
610 ppc64_runlatch_on();
612 if (hvlpevent_is_pending())
613 process_iSeries_events();
615 preempt_enable_no_resched();
616 schedule();
617 preempt_disable();
621 static void iseries_dedicated_idle(void)
623 set_thread_flag(TIF_POLLING_NRFLAG);
625 while (1) {
626 if (!need_resched()) {
627 while (!need_resched()) {
628 ppc64_runlatch_off();
629 HMT_low();
631 if (hvlpevent_is_pending()) {
632 HMT_medium();
633 ppc64_runlatch_on();
634 process_iSeries_events();
638 HMT_medium();
641 ppc64_runlatch_on();
642 preempt_enable_no_resched();
643 schedule();
644 preempt_disable();
648 #ifndef CONFIG_PCI
649 void __init iSeries_init_IRQ(void) { }
650 #endif
653 * iSeries has no legacy IO, anything calling this function has to
654 * fail or bad things will happen
656 static int iseries_check_legacy_ioport(unsigned int baseport)
658 return -ENODEV;
661 static int __init iseries_probe(void)
663 unsigned long root = of_get_flat_dt_root();
664 if (!of_flat_dt_is_compatible(root, "IBM,iSeries"))
665 return 0;
667 hpte_init_iSeries();
669 return 1;
672 define_machine(iseries) {
673 .name = "iSeries",
674 .setup_arch = iSeries_setup_arch,
675 .show_cpuinfo = iSeries_show_cpuinfo,
676 .init_IRQ = iSeries_init_IRQ,
677 .get_irq = iSeries_get_irq,
678 .init_early = iSeries_init_early,
679 .pcibios_fixup = iSeries_pci_final_fixup,
680 .restart = mf_reboot,
681 .power_off = mf_power_off,
682 .halt = mf_power_off,
683 .get_boot_time = iSeries_get_boot_time,
684 .set_rtc_time = iSeries_set_rtc_time,
685 .get_rtc_time = iSeries_get_rtc_time,
686 .calibrate_decr = generic_calibrate_decr,
687 .progress = iSeries_progress,
688 .probe = iseries_probe,
689 .check_legacy_ioport = iseries_check_legacy_ioport,
690 /* XXX Implement enable_pmcs for iSeries */
693 void * __init iSeries_early_setup(void)
695 unsigned long phys_mem_size;
697 powerpc_firmware_features |= FW_FEATURE_ISERIES;
698 powerpc_firmware_features |= FW_FEATURE_LPAR;
700 iSeries_fixup_klimit();
703 * Initialize the table which translate Linux physical addresses to
704 * AS/400 absolute addresses
706 phys_mem_size = build_iSeries_Memory_Map();
708 iSeries_get_cmdline();
710 return (void *) __pa(build_flat_dt(phys_mem_size));
713 static void hvputc(char c)
715 if (c == '\n')
716 hvputc('\r');
718 HvCall_writeLogBuffer(&c, 1);
721 void __init udbg_init_iseries(void)
723 udbg_putc = hvputc;