arch/arm/mach-s3c2410/mach-anubis.c

   1 /* linux/arch/arm/mach-s3c2410/mach-anubis.c
   2  *
   3  * Copyright (c) 2003-2005 Simtec Electronics
   4  *      http://armlinux.simtec.co.uk/
   5  *      Ben Dooks <ben@simtec.co.uk>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10 */
  11
  12 #include <linux/kernel.h>
  13 #include <linux/types.h>
  14 #include <linux/interrupt.h>
  15 #include <linux/list.h>
  16 #include <linux/timer.h>
  17 #include <linux/init.h>
  18 #include <linux/platform_device.h>
  19
  20 #include <asm/mach/arch.h>
  21 #include <asm/mach/map.h>
  22 #include <asm/mach/irq.h>
  23
  24 #include <asm/arch/anubis-map.h>
  25 #include <asm/arch/anubis-irq.h>
  26 #include <asm/arch/anubis-cpld.h>
  27
  28 #include <asm/hardware.h>
  29 #include <asm/io.h>
  30 #include <asm/irq.h>
  31 #include <asm/mach-types.h>
  32
  33 #include <asm/arch/regs-serial.h>
  34 #include <asm/arch/regs-gpio.h>
  35 #include <asm/arch/regs-mem.h>
  36 #include <asm/arch/regs-lcd.h>
  37 #include <asm/arch/nand.h>
  38
  39 #include <linux/mtd/mtd.h>
  40 #include <linux/mtd/nand.h>
  41 #include <linux/mtd/nand_ecc.h>
  42 #include <linux/mtd/partitions.h>
  43
  44 #include "clock.h"
  45 #include "devs.h"
  46 #include "cpu.h"
  47
  48 #define COPYRIGHT ", (c) 2005 Simtec Electronics"
  49
  50 static struct map_desc anubis_iodesc[] __initdata = {
  51   /* ISA IO areas */
  52
  53   {
  54         .virtual        = (u32)S3C24XX_VA_ISA_BYTE,
  55         .pfn            = __phys_to_pfn(0x0),
  56         .length         = SZ_4M,
  57         .type           = MT_DEVICE,
  58   }, {
  59         .virtual        = (u32)S3C24XX_VA_ISA_WORD,
  60         .pfn            = __phys_to_pfn(0x0),
  61         .length         = SZ_4M,
  62         .type           = MT_DEVICE,
  63   },
  64
  65   /* we could possibly compress the next set down into a set of smaller tables
  66    * pagetables, but that would mean using an L2 section, and it still means
  67    * we cannot actually feed the same register to an LDR due to 16K spacing
  68    */
  69
  70   /* CPLD control registers */
  71
  72   {
  73         .virtual        = (u32)ANUBIS_VA_CTRL1,
  74         .pfn            = __phys_to_pfn(ANUBIS_PA_CTRL1),
  75         .length         = SZ_4K,
  76         .type           = MT_DEVICE,
  77   }, {
  78         .virtual        = (u32)ANUBIS_VA_CTRL2,
  79         .pfn            = __phys_to_pfn(ANUBIS_PA_CTRL2),
  80         .length         = SZ_4K,
  81         .type           = MT_DEVICE,
  82   },
  83 };
  84
  85 #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
  86 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
  87 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
  88
  89 static struct s3c24xx_uart_clksrc anubis_serial_clocks[] = {
  90         [0] = {
  91                 .name           = "uclk",
  92                 .divisor        = 1,
  93                 .min_baud       = 0,
  94                 .max_baud       = 0,
  95         },
  96         [1] = {
  97                 .name           = "pclk",
  98                 .divisor        = 1,
  99                 .min_baud       = 0,
 100                 .max_baud       = 0,
 101         }
 102 };
 103
 104
 105 static struct s3c2410_uartcfg anubis_uartcfgs[] __initdata = {
 106         [0] = {
 107                 .hwport      = 0,
 108                 .flags       = 0,
 109                 .ucon        = UCON,
 110                 .ulcon       = ULCON,
 111                 .ufcon       = UFCON,
 112                 .clocks      = anubis_serial_clocks,
 113                 .clocks_size = ARRAY_SIZE(anubis_serial_clocks),
 114         },
 115         [1] = {
 116                 .hwport      = 2,
 117                 .flags       = 0,
 118                 .ucon        = UCON,
 119                 .ulcon       = ULCON,
 120                 .ufcon       = UFCON,
 121                 .clocks      = anubis_serial_clocks,
 122                 .clocks_size = ARRAY_SIZE(anubis_serial_clocks),
 123         },
 124 };
 125
 126 /* NAND Flash on Anubis board */
 127
 128 static int external_map[]   = { 2 };
 129 static int chip0_map[]      = { 0 };
 130 static int chip1_map[]      = { 1 };
 131
 132 static struct mtd_partition anubis_default_nand_part[] = {
 133         [0] = {
 134                 .name   = "Boot Agent",
 135                 .size   = SZ_16K,
 136                 .offset = 0,
 137         },
 138         [1] = {
 139                 .name   = "/boot",
 140                 .size   = SZ_4M - SZ_16K,
 141                 .offset = SZ_16K,
 142         },
 143         [2] = {
 144                 .name   = "user1",
 145                 .offset = SZ_4M,
 146                 .size   = SZ_32M - SZ_4M,
 147         },
 148         [3] = {
 149                 .name   = "user2",
 150                 .offset = SZ_32M,
 151                 .size   = MTDPART_SIZ_FULL,
 152         }
 153 };
 154
 155 /* the Anubis has 3 selectable slots for nand-flash, the two
 156  * on-board chip areas, as well as the external slot.
 157  *
 158  * Note, there is no current hot-plug support for the External
 159  * socket.
 160 */
 161
 162 static struct s3c2410_nand_set anubis_nand_sets[] = {
 163         [1] = {
 164                 .name           = "External",
 165                 .nr_chips       = 1,
 166                 .nr_map         = external_map,
 167                 .nr_partitions  = ARRAY_SIZE(anubis_default_nand_part),
 168                 .partitions     = anubis_default_nand_part,
 169         },
 170         [0] = {
 171                 .name           = "chip0",
 172                 .nr_chips       = 1,
 173                 .nr_map         = chip0_map,
 174                 .nr_partitions  = ARRAY_SIZE(anubis_default_nand_part),
 175                 .partitions     = anubis_default_nand_part,
 176         },
 177         [2] = {
 178                 .name           = "chip1",
 179                 .nr_chips       = 1,
 180                 .nr_map         = chip1_map,
 181                 .nr_partitions  = ARRAY_SIZE(anubis_default_nand_part),
 182                 .partitions     = anubis_default_nand_part,
 183         },
 184 };
 185
 186 static void anubis_nand_select(struct s3c2410_nand_set *set, int slot)
 187 {
 188         unsigned int tmp;
 189
 190         slot = set->nr_map[slot] & 3;
 191
 192         pr_debug("anubis_nand: selecting slot %d (set %p,%p)\n",
 193                  slot, set, set->nr_map);
 194
 195         tmp = __raw_readb(ANUBIS_VA_CTRL1);
 196         tmp &= ~ANUBIS_CTRL1_NANDSEL;
 197         tmp |= slot;
 198
 199         pr_debug("anubis_nand: ctrl1 now %02x\n", tmp);
 200
 201         __raw_writeb(tmp, ANUBIS_VA_CTRL1);
 202 }
 203
 204 static struct s3c2410_platform_nand anubis_nand_info = {
 205         .tacls          = 25,
 206         .twrph0         = 55,
 207         .twrph1         = 40,
 208         .nr_sets        = ARRAY_SIZE(anubis_nand_sets),
 209         .sets           = anubis_nand_sets,
 210         .select_chip    = anubis_nand_select,
 211 };
 212
 213 /* IDE channels */
 214
 215 static struct resource anubis_ide0_resource[] = {
 216         {
 217                 .start  = S3C2410_CS3,
 218                 .end    = S3C2410_CS3 + (8*32) - 1,
 219                 .flags  = IORESOURCE_MEM,
 220         }, {
 221                 .start  = S3C2410_CS3 + (1<<26),
 222                 .end    = S3C2410_CS3 + (1<<26) + (8*32) - 1,
 223                 .flags  = IORESOURCE_MEM,
 224         }, {
 225                 .start  = IRQ_IDE0,
 226                 .end    = IRQ_IDE0,
 227                 .flags  = IORESOURCE_IRQ,
 228         },
 229 };
 230
 231 static struct platform_device anubis_device_ide0 = {
 232         .name           = "simtec-ide",
 233         .id             = 0,
 234         .num_resources  = ARRAY_SIZE(anubis_ide0_resource),
 235         .resource       = anubis_ide0_resource,
 236 };
 237
 238 static struct resource anubis_ide1_resource[] = {
 239         {
 240                 .start  = S3C2410_CS4,
 241                 .end    = S3C2410_CS4 + (8*32) - 1,
 242                 .flags  = IORESOURCE_MEM,
 243         }, {
 244                 .start  = S3C2410_CS4 + (1<<26),
 245                 .end    = S3C2410_CS4 + (1<<26) + (8*32) - 1,
 246                 .flags  = IORESOURCE_MEM,
 247         }, {
 248                 .start  = IRQ_IDE0,
 249                 .end    = IRQ_IDE0,
 250                 .flags  = IORESOURCE_IRQ,
 251         },
 252 };
 253
 254
 255 static struct platform_device anubis_device_ide1 = {
 256         .name           = "simtec-ide",
 257         .id             = 1,
 258         .num_resources  = ARRAY_SIZE(anubis_ide1_resource),
 259         .resource       = anubis_ide1_resource,
 260 };
 261
 262 /* Standard Anubis devices */
 263
 264 static struct platform_device *anubis_devices[] __initdata = {
 265         &s3c_device_usb,
 266         &s3c_device_wdt,
 267         &s3c_device_adc,
 268         &s3c_device_i2c,
 269         &s3c_device_rtc,
 270         &s3c_device_nand,
 271         &anubis_device_ide0,
 272         &anubis_device_ide1,
 273 };
 274
 275 static struct clk *anubis_clocks[] = {
 276         &s3c24xx_dclk0,
 277         &s3c24xx_dclk1,
 278         &s3c24xx_clkout0,
 279         &s3c24xx_clkout1,
 280         &s3c24xx_uclk,
 281 };
 282
 283 static struct s3c24xx_board anubis_board __initdata = {
 284         .devices       = anubis_devices,
 285         .devices_count = ARRAY_SIZE(anubis_devices),
 286         .clocks        = anubis_clocks,
 287         .clocks_count  = ARRAY_SIZE(anubis_clocks),
 288 };
 289
 290 static void __init anubis_map_io(void)
 291 {
 292         /* initialise the clocks */
 293
 294         s3c24xx_dclk0.parent = NULL;
 295         s3c24xx_dclk0.rate   = 12*1000*1000;
 296
 297         s3c24xx_dclk1.parent = NULL;
 298         s3c24xx_dclk1.rate   = 24*1000*1000;
 299
 300         s3c24xx_clkout0.parent  = &s3c24xx_dclk0;
 301         s3c24xx_clkout1.parent  = &s3c24xx_dclk1;
 302
 303         s3c24xx_uclk.parent  = &s3c24xx_clkout1;
 304
 305         s3c_device_nand.dev.platform_data = &anubis_nand_info;
 306
 307         s3c24xx_init_io(anubis_iodesc, ARRAY_SIZE(anubis_iodesc));
 308         s3c24xx_init_clocks(0);
 309         s3c24xx_init_uarts(anubis_uartcfgs, ARRAY_SIZE(anubis_uartcfgs));
 310         s3c24xx_set_board(&anubis_board);
 311
 312         /* ensure that the GPIO is setup */
 313         s3c2410_gpio_setpin(S3C2410_GPA0, 1);
 314 }
 315
 316 MACHINE_START(ANUBIS, "Simtec-Anubis")
 317         /* Maintainer: Ben Dooks <ben@simtec.co.uk> */
 318         .phys_io        = S3C2410_PA_UART,
 319         .io_pg_offst    = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
 320         .boot_params    = S3C2410_SDRAM_PA + 0x100,
 321         .map_io         = anubis_map_io,
 322         .init_irq       = s3c24xx_init_irq,
 323         .timer          = &s3c24xx_timer,
 324 MACHINE_END