?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
USB: uhci: don't use pseudo negative values
[linux-2.6/mini2440.git] / drivers / staging / me4000 / me4000.c
blobe1c4a8078901b2a86bd16550f68570a2bf087f53
1 /* Device driver for Meilhaus ME-4000 board family.
2 * ================================================
3 *
4 * Copyright (C) 2003 Meilhaus Electronic GmbH (support@meilhaus.de)
5 *
6 * This file is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 *
20 * Author: Guenter Gebhardt <g.gebhardt@meilhaus.de>
21 */
22
23 #include <linux/module.h>
24 #include <linux/fs.h>
25 #include <linux/sched.h>
26 #include <linux/interrupt.h>
27 #include <linux/pci.h>
28 #include <linux/errno.h>
29 #include <linux/delay.h>
30 #include <linux/mm.h>
31 #include <linux/unistd.h>
32 #include <linux/list.h>
33 #include <linux/proc_fs.h>
34 #include <linux/types.h>
35 #include <linux/poll.h>
36 #include <linux/vmalloc.h>
37 #include <linux/slab.h>
38 #include <asm/pgtable.h>
39 #include <asm/uaccess.h>
40 #include <asm/io.h>
41 #include <asm/system.h>
42
43 /* Include-File for the Meilhaus ME-4000 I/O board */
44 #include "me4000.h"
45 #include "me4000_firmware.h"
46 #include "me4610_firmware.h"
47
48 /* Administrative stuff for modinfo */
49 MODULE_AUTHOR("Guenter Gebhardt <g.gebhardt@meilhaus.de>");
50 MODULE_DESCRIPTION
51 ("Device Driver Module for Meilhaus ME-4000 boards version 1.0.5");
52 MODULE_SUPPORTED_DEVICE("Meilhaus ME-4000 Multi I/O boards");
53 MODULE_LICENSE("GPL");
54
55 /* Board specific data are kept in a global list */
56 static LIST_HEAD(me4000_board_info_list);
57
58 /* Major Device Numbers. 0 means to get it automatically from the System */
59 static int me4000_ao_major_driver_no;
60 static int me4000_ai_major_driver_no;
61 static int me4000_dio_major_driver_no;
62 static int me4000_cnt_major_driver_no;
63 static int me4000_ext_int_major_driver_no;
64
65 /* Let the user specify a custom major driver number */
66 module_param(me4000_ao_major_driver_no, int, 0);
67 MODULE_PARM_DESC(me4000_ao_major_driver_no,
68 "Major driver number for analog output (default 0)");
69
70 module_param(me4000_ai_major_driver_no, int, 0);
71 MODULE_PARM_DESC(me4000_ai_major_driver_no,
72 "Major driver number for analog input (default 0)");
73
74 module_param(me4000_dio_major_driver_no, int, 0);
75 MODULE_PARM_DESC(me4000_dio_major_driver_no,
76 "Major driver number digital I/O (default 0)");
77
78 module_param(me4000_cnt_major_driver_no, int, 0);
79 MODULE_PARM_DESC(me4000_cnt_major_driver_no,
80 "Major driver number for counter (default 0)");
81
82 module_param(me4000_ext_int_major_driver_no, int, 0);
83 MODULE_PARM_DESC(me4000_ext_int_major_driver_no,
84 "Major driver number for external interrupt (default 0)");
85
86 /*-----------------------------------------------------------------------------
87 Board detection and initialization
88 ---------------------------------------------------------------------------*/
89 static int me4000_probe(struct pci_dev *dev, const struct pci_device_id *id);
90 static int me4000_xilinx_download(struct me4000_info *);
91 static int me4000_reset_board(struct me4000_info *);
92
93 static void clear_board_info_list(void);
94 static void release_ao_contexts(struct me4000_info *board_info);
95 /*-----------------------------------------------------------------------------
96 Stuff used by all device parts
97 ---------------------------------------------------------------------------*/
98 static int me4000_open(struct inode *, struct file *);
99 static int me4000_release(struct inode *, struct file *);
100
101 static int me4000_get_user_info(struct me4000_user_info *,
102 struct me4000_info *board_info);
103 static int me4000_read_procmem(char *, char **, off_t, int, int *, void *);
104
105 /*-----------------------------------------------------------------------------
106 Analog output stuff
107 ---------------------------------------------------------------------------*/
108 static ssize_t me4000_ao_write_sing(struct file *, const char *, size_t,
109 loff_t *);
110 static ssize_t me4000_ao_write_wrap(struct file *, const char *, size_t,
111 loff_t *);
112 static ssize_t me4000_ao_write_cont(struct file *, const char *, size_t,
113 loff_t *);
114
115 static int me4000_ao_ioctl_sing(struct inode *, struct file *, unsigned int,
116 unsigned long);
117 static int me4000_ao_ioctl_wrap(struct inode *, struct file *, unsigned int,
118 unsigned long);
119 static int me4000_ao_ioctl_cont(struct inode *, struct file *, unsigned int,
120 unsigned long);
121
122 static unsigned int me4000_ao_poll_cont(struct file *, poll_table *);
123 static int me4000_ao_fsync_cont(struct file *, struct dentry *, int);
124
125 static int me4000_ao_start(unsigned long *, struct me4000_ao_context *);
126 static int me4000_ao_stop(struct me4000_ao_context *);
127 static int me4000_ao_immediate_stop(struct me4000_ao_context *);
128 static int me4000_ao_timer_set_divisor(u32 *, struct me4000_ao_context *);
129 static int me4000_ao_preload(struct me4000_ao_context *);
130 static int me4000_ao_preload_update(struct me4000_ao_context *);
131 static int me4000_ao_ex_trig_set_edge(int *, struct me4000_ao_context *);
132 static int me4000_ao_ex_trig_enable(struct me4000_ao_context *);
133 static int me4000_ao_ex_trig_disable(struct me4000_ao_context *);
134 static int me4000_ao_prepare(struct me4000_ao_context *ao_info);
135 static int me4000_ao_reset(struct me4000_ao_context *ao_info);
136 static int me4000_ao_enable_do(struct me4000_ao_context *);
137 static int me4000_ao_disable_do(struct me4000_ao_context *);
138 static int me4000_ao_fsm_state(int *, struct me4000_ao_context *);
139
140 static int me4000_ao_simultaneous_ex_trig(struct me4000_ao_context *ao_context);
141 static int me4000_ao_simultaneous_sw(struct me4000_ao_context *ao_context);
142 static int me4000_ao_simultaneous_disable(struct me4000_ao_context *ao_context);
143 static int me4000_ao_simultaneous_update(
144 struct me4000_ao_channel_list *channels,
145 struct me4000_ao_context *ao_context);
146
147 static int me4000_ao_synchronous_ex_trig(struct me4000_ao_context *ao_context);
148 static int me4000_ao_synchronous_sw(struct me4000_ao_context *ao_context);
149 static int me4000_ao_synchronous_disable(struct me4000_ao_context *ao_context);
150
151 static int me4000_ao_ex_trig_timeout(unsigned long *arg,
152 struct me4000_ao_context *ao_context);
153 static int me4000_ao_get_free_buffer(unsigned long *arg,
154 struct me4000_ao_context *ao_context);
155
156 /*-----------------------------------------------------------------------------
157 Analog input stuff
158 ---------------------------------------------------------------------------*/
159 static int me4000_ai_single(struct me4000_ai_single *,
160 struct me4000_ai_context *);
161 static int me4000_ai_ioctl_sing(struct inode *, struct file *, unsigned int,
162 unsigned long);
163
164 static ssize_t me4000_ai_read(struct file *, char *, size_t, loff_t *);
165 static int me4000_ai_ioctl_sw(struct inode *, struct file *, unsigned int,
166 unsigned long);
167 static unsigned int me4000_ai_poll(struct file *, poll_table *);
168 static int me4000_ai_fasync(int fd, struct file *file_p, int mode);
169
170 static int me4000_ai_ioctl_ext(struct inode *, struct file *, unsigned int,
171 unsigned long);
172
173 static int me4000_ai_prepare(struct me4000_ai_context *ai_context);
174 static int me4000_ai_reset(struct me4000_ai_context *ai_context);
175 static int me4000_ai_config(struct me4000_ai_config *,
176 struct me4000_ai_context *);
177 static int me4000_ai_start(struct me4000_ai_context *);
178 static int me4000_ai_start_ex(unsigned long *, struct me4000_ai_context *);
179 static int me4000_ai_stop(struct me4000_ai_context *);
180 static int me4000_ai_immediate_stop(struct me4000_ai_context *);
181 static int me4000_ai_ex_trig_enable(struct me4000_ai_context *);
182 static int me4000_ai_ex_trig_disable(struct me4000_ai_context *);
183 static int me4000_ai_ex_trig_setup(struct me4000_ai_trigger *,
184 struct me4000_ai_context *);
185 static int me4000_ai_sc_setup(struct me4000_ai_sc *arg,
186 struct me4000_ai_context *ai_context);
187 static int me4000_ai_offset_enable(struct me4000_ai_context *ai_context);
188 static int me4000_ai_offset_disable(struct me4000_ai_context *ai_context);
189 static int me4000_ai_fullscale_enable(struct me4000_ai_context *ai_context);
190 static int me4000_ai_fullscale_disable(struct me4000_ai_context *ai_context);
191 static int me4000_ai_fsm_state(int *arg, struct me4000_ai_context *ai_context);
192 static int me4000_ai_get_count_buffer(unsigned long *arg,
193 struct me4000_ai_context *ai_context);
194
195 /*-----------------------------------------------------------------------------
196 EEPROM stuff
197 ---------------------------------------------------------------------------*/
198 static int me4000_eeprom_read(struct me4000_eeprom *arg,
199 struct me4000_ai_context *ai_context);
200 static int me4000_eeprom_write(struct me4000_eeprom *arg,
201 struct me4000_ai_context *ai_context);
202
203 /*-----------------------------------------------------------------------------
204 Digital I/O stuff
205 ---------------------------------------------------------------------------*/
206 static int me4000_dio_ioctl(struct inode *, struct file *, unsigned int,
207 unsigned long);
208 static int me4000_dio_config(struct me4000_dio_config *,
209 struct me4000_dio_context *);
210 static int me4000_dio_get_byte(struct me4000_dio_byte *,
211 struct me4000_dio_context *);
212 static int me4000_dio_set_byte(struct me4000_dio_byte *,
213 struct me4000_dio_context *);
214 static int me4000_dio_reset(struct me4000_dio_context *);
215
216 /*-----------------------------------------------------------------------------
217 Counter stuff
218 ---------------------------------------------------------------------------*/
219 static int me4000_cnt_ioctl(struct inode *, struct file *, unsigned int,
220 unsigned long);
221 static int me4000_cnt_config(struct me4000_cnt_config *,
222 struct me4000_cnt_context *);
223 static int me4000_cnt_read(struct me4000_cnt *, struct me4000_cnt_context *);
224 static int me4000_cnt_write(struct me4000_cnt *, struct me4000_cnt_context *);
225 static int me4000_cnt_reset(struct me4000_cnt_context *);
226
227 /*-----------------------------------------------------------------------------
228 External interrupt routines
229 ---------------------------------------------------------------------------*/
230 static int me4000_ext_int_ioctl(struct inode *, struct file *, unsigned int,
231 unsigned long);
232 static int me4000_ext_int_enable(struct me4000_ext_int_context *);
233 static int me4000_ext_int_disable(struct me4000_ext_int_context *);
234 static int me4000_ext_int_count(unsigned long *arg,
235 struct me4000_ext_int_context *ext_int_context);
236 static int me4000_ext_int_fasync(int fd, struct file *file_ptr, int mode);
237
238 /*-----------------------------------------------------------------------------
239 The interrupt service routines
240 ---------------------------------------------------------------------------*/
241 static irqreturn_t me4000_ao_isr(int, void *);
242 static irqreturn_t me4000_ai_isr(int, void *);
243 static irqreturn_t me4000_ext_int_isr(int, void *);
244
245 /*-----------------------------------------------------------------------------
246 Inline functions
247 ---------------------------------------------------------------------------*/
248
249 static int inline me4000_buf_count(struct me4000_circ_buf buf, int size)
250 {
251 return ((buf.head - buf.tail) & (size - 1));
252 }
253
254 static int inline me4000_buf_space(struct me4000_circ_buf buf, int size)
255 {
256 return ((buf.tail - (buf.head + 1)) & (size - 1));
257 }
258
259 static int inline me4000_values_to_end(struct me4000_circ_buf buf, int size)
260 {
261 int end;
262 int n;
263 end = size - buf.tail;
264 n = (buf.head + end) & (size - 1);
265 return (n < end) ? n : end;
266 }
267
268 static int inline me4000_space_to_end(struct me4000_circ_buf buf, int size)
269 {
270 int end;
271 int n;
272
273 end = size - 1 - buf.head;
274 n = (end + buf.tail) & (size - 1);
275 return (n <= end) ? n : (end + 1);
276 }
277
278 static void inline me4000_outb(unsigned char value, unsigned long port)
279 {
280 PORT_PDEBUG("--> 0x%02X port 0x%04lX\n", value, port);
281 outb(value, port);
282 }
283
284 static void inline me4000_outl(unsigned long value, unsigned long port)
285 {
286 PORT_PDEBUG("--> 0x%08lX port 0x%04lX\n", value, port);
287 outl(value, port);
288 }
289
290 static unsigned long inline me4000_inl(unsigned long port)
291 {
292 unsigned long value;
293 value = inl(port);
294 PORT_PDEBUG("<-- 0x%08lX port 0x%04lX\n", value, port);
295 return value;
296 }
297
298 static unsigned char inline me4000_inb(unsigned long port)
299 {
300 unsigned char value;
301 value = inb(port);
302 PORT_PDEBUG("<-- 0x%08X port 0x%04lX\n", value, port);
303 return value;
304 }
305
306 static struct pci_driver me4000_driver = {
307 .name = ME4000_NAME,
308 .id_table = me4000_pci_table,
309 .probe = me4000_probe
310 };
311
312 static struct file_operations me4000_ao_fops_sing = {
313 .owner = THIS_MODULE,
314 .write = me4000_ao_write_sing,
315 .ioctl = me4000_ao_ioctl_sing,
316 .open = me4000_open,
317 .release = me4000_release,
318 };
319
320 static struct file_operations me4000_ao_fops_wrap = {
321 .owner = THIS_MODULE,
322 .write = me4000_ao_write_wrap,
323 .ioctl = me4000_ao_ioctl_wrap,
324 .open = me4000_open,
325 .release = me4000_release,
326 };
327
328 static struct file_operations me4000_ao_fops_cont = {
329 .owner = THIS_MODULE,
330 .write = me4000_ao_write_cont,
331 .poll = me4000_ao_poll_cont,
332 .ioctl = me4000_ao_ioctl_cont,
333 .open = me4000_open,
334 .release = me4000_release,
335 .fsync = me4000_ao_fsync_cont,
336 };
337
338 static struct file_operations me4000_ai_fops_sing = {
339 .owner = THIS_MODULE,
340 .ioctl = me4000_ai_ioctl_sing,
341 .open = me4000_open,
342 .release = me4000_release,
343 };
344
345 static struct file_operations me4000_ai_fops_cont_sw = {
346 .owner = THIS_MODULE,
347 .read = me4000_ai_read,
348 .poll = me4000_ai_poll,
349 .ioctl = me4000_ai_ioctl_sw,
350 .open = me4000_open,
351 .release = me4000_release,
352 .fasync = me4000_ai_fasync,
353 };
354
355 static struct file_operations me4000_ai_fops_cont_et = {
356 .owner = THIS_MODULE,
357 .read = me4000_ai_read,
358 .poll = me4000_ai_poll,
359 .ioctl = me4000_ai_ioctl_ext,
360 .open = me4000_open,
361 .release = me4000_release,
362 };
363
364 static struct file_operations me4000_ai_fops_cont_et_value = {
365 .owner = THIS_MODULE,
366 .read = me4000_ai_read,
367 .poll = me4000_ai_poll,
368 .ioctl = me4000_ai_ioctl_ext,
369 .open = me4000_open,
370 .release = me4000_release,
371 };
372
373 static struct file_operations me4000_ai_fops_cont_et_chanlist = {
374 .owner = THIS_MODULE,
375 .read = me4000_ai_read,
376 .poll = me4000_ai_poll,
377 .ioctl = me4000_ai_ioctl_ext,
378 .open = me4000_open,
379 .release = me4000_release,
380 };
381
382 static struct file_operations me4000_dio_fops = {
383 .owner = THIS_MODULE,
384 .ioctl = me4000_dio_ioctl,
385 .open = me4000_open,
386 .release = me4000_release,
387 };
388
389 static struct file_operations me4000_cnt_fops = {
390 .owner = THIS_MODULE,
391 .ioctl = me4000_cnt_ioctl,
392 .open = me4000_open,
393 .release = me4000_release,
394 };
395
396 static struct file_operations me4000_ext_int_fops = {
397 .owner = THIS_MODULE,
398 .ioctl = me4000_ext_int_ioctl,
399 .open = me4000_open,
400 .release = me4000_release,
401 .fasync = me4000_ext_int_fasync,
402 };
403
404 static struct file_operations *me4000_ao_fops_array[] = {
405 &me4000_ao_fops_sing, // single operations
406 &me4000_ao_fops_wrap, // wraparound operations
407 &me4000_ao_fops_cont, // continous operations
408 };
409
410 static struct file_operations *me4000_ai_fops_array[] = {
411 &me4000_ai_fops_sing, // single operations
412 &me4000_ai_fops_cont_sw, // continuous operations with software start
413 &me4000_ai_fops_cont_et, // continous operations with external trigger
414 &me4000_ai_fops_cont_et_value, // sample values by external trigger
415 &me4000_ai_fops_cont_et_chanlist, // work through one channel list by external trigger
416 };
417
418 static int __init me4000_init_module(void)
419 {
420 int result;
421
422 CALL_PDEBUG("init_module() is executed\n");
423
424 /* Register driver capabilities */
425 result = pci_register_driver(&me4000_driver);
426 PDEBUG("init_module():%d devices detected\n", result);
427 if (result < 0) {
428 printk(KERN_ERR "ME4000:init_module():Can't register driver\n");
429 goto INIT_ERROR_1;
430 }
431
432 /* Allocate major number for analog output */
433 result =
434 register_chrdev(me4000_ao_major_driver_no, ME4000_AO_NAME,
435 &me4000_ao_fops_sing);
436 if (result < 0) {
437 printk(KERN_ERR "ME4000:init_module():Can't get AO major no\n");
438 goto INIT_ERROR_2;
439 } else {
440 me4000_ao_major_driver_no = result;
441 }
442 PDEBUG("init_module():Major driver number for AO = %ld\n",
443 me4000_ao_major_driver_no);
444
445 /* Allocate major number for analog input */
446 result =
447 register_chrdev(me4000_ai_major_driver_no, ME4000_AI_NAME,
448 &me4000_ai_fops_sing);
449 if (result < 0) {
450 printk(KERN_ERR "ME4000:init_module():Can't get AI major no\n");
451 goto INIT_ERROR_3;
452 } else {
453 me4000_ai_major_driver_no = result;
454 }
455 PDEBUG("init_module():Major driver number for AI = %ld\n",
456 me4000_ai_major_driver_no);
457
458 /* Allocate major number for digital I/O */
459 result =
460 register_chrdev(me4000_dio_major_driver_no, ME4000_DIO_NAME,
461 &me4000_dio_fops);
462 if (result < 0) {
463 printk(KERN_ERR
464 "ME4000:init_module():Can't get DIO major no\n");
465 goto INIT_ERROR_4;
466 } else {
467 me4000_dio_major_driver_no = result;
468 }
469 PDEBUG("init_module():Major driver number for DIO = %ld\n",
470 me4000_dio_major_driver_no);
471
472 /* Allocate major number for counter */
473 result =
474 register_chrdev(me4000_cnt_major_driver_no, ME4000_CNT_NAME,
475 &me4000_cnt_fops);
476 if (result < 0) {
477 printk(KERN_ERR
478 "ME4000:init_module():Can't get CNT major no\n");
479 goto INIT_ERROR_5;
480 } else {
481 me4000_cnt_major_driver_no = result;
482 }
483 PDEBUG("init_module():Major driver number for CNT = %ld\n",
484 me4000_cnt_major_driver_no);
485
486 /* Allocate major number for external interrupt */
487 result =
488 register_chrdev(me4000_ext_int_major_driver_no, ME4000_EXT_INT_NAME,
489 &me4000_ext_int_fops);
490 if (result < 0) {
491 printk(KERN_ERR
492 "ME4000:init_module():Can't get major no for external interrupt\n");
493 goto INIT_ERROR_6;
494 } else {
495 me4000_ext_int_major_driver_no = result;
496 }
497 PDEBUG
498 ("init_module():Major driver number for external interrupt = %ld\n",
499 me4000_ext_int_major_driver_no);
500
501 /* Create the /proc/me4000 entry */
502 if (!create_proc_read_entry
503 ("me4000", 0, NULL, me4000_read_procmem, NULL)) {
504 result = -ENODEV;
505 printk(KERN_ERR
506 "ME4000:init_module():Can't create proc entry\n");
507 goto INIT_ERROR_7;
508 }
509
510 return 0;
511
512 INIT_ERROR_7:
513 unregister_chrdev(me4000_ext_int_major_driver_no, ME4000_EXT_INT_NAME);
514
515 INIT_ERROR_6:
516 unregister_chrdev(me4000_cnt_major_driver_no, ME4000_CNT_NAME);
517
518 INIT_ERROR_5:
519 unregister_chrdev(me4000_dio_major_driver_no, ME4000_DIO_NAME);
520
521 INIT_ERROR_4:
522 unregister_chrdev(me4000_ai_major_driver_no, ME4000_AI_NAME);
523
524 INIT_ERROR_3:
525 unregister_chrdev(me4000_ao_major_driver_no, ME4000_AO_NAME);
526
527 INIT_ERROR_2:
528 pci_unregister_driver(&me4000_driver);
529 clear_board_info_list();
530
531 INIT_ERROR_1:
532 return result;
533 }
534
535 module_init(me4000_init_module);
536
537 static void clear_board_info_list(void)
538 {
539 struct me4000_info *board_info, *board_info_safe;
540 struct me4000_ao_context *ao_context, *ao_context_safe;
541
542 /* Clear context lists */
543 list_for_each_entry(board_info, &me4000_board_info_list, list) {
544 /* Clear analog output context list */
545 list_for_each_entry_safe(ao_context, ao_context_safe,
546 &board_info->ao_context_list, list) {
547 me4000_ao_reset(ao_context);
548 free_irq(ao_context->irq, ao_context);
549 if (ao_context->circ_buf.buf)
550 kfree(ao_context->circ_buf.buf);
551 list_del(&ao_context->list);
552 kfree(ao_context);
553 }
554
555 /* Clear analog input context */
556 if (board_info->ai_context->circ_buf.buf)
557 kfree(board_info->ai_context->circ_buf.buf);
558 kfree(board_info->ai_context);
559
560 /* Clear digital I/O context */
561 kfree(board_info->dio_context);
562
563 /* Clear counter context */
564 kfree(board_info->cnt_context);
565
566 /* Clear external interrupt context */
567 kfree(board_info->ext_int_context);
568 }
569
570 /* Clear the board info list */
571 list_for_each_entry_safe(board_info, board_info_safe,
572 &me4000_board_info_list, list) {
573 pci_release_regions(board_info->pci_dev_p);
574 list_del(&board_info->list);
575 kfree(board_info);
576 }
577 }
578
579 static int get_registers(struct pci_dev *dev, struct me4000_info *board_info)
580 {
581
582 /*--------------------------- plx regbase ---------------------------------*/
583
584 board_info->plx_regbase = pci_resource_start(dev, 1);
585 if (board_info->plx_regbase == 0) {
586 printk(KERN_ERR
587 "ME4000:get_registers():PCI base address 1 is not available\n");
588 return -ENODEV;
589 }
590 board_info->plx_regbase_size = pci_resource_len(dev, 1);
591
592 PDEBUG
593 ("get_registers():PLX configuration registers at address 0x%4lX [0x%4lX]\n",
594 board_info->plx_regbase, board_info->plx_regbase_size);
595
596 /*--------------------------- me4000 regbase ------------------------------*/
597
598 board_info->me4000_regbase = pci_resource_start(dev, 2);
599 if (board_info->me4000_regbase == 0) {
600 printk(KERN_ERR
601 "ME4000:get_registers():PCI base address 2 is not available\n");
602 return -ENODEV;
603 }
604 board_info->me4000_regbase_size = pci_resource_len(dev, 2);
605
606 PDEBUG("get_registers():ME4000 registers at address 0x%4lX [0x%4lX]\n",
607 board_info->me4000_regbase, board_info->me4000_regbase_size);
608
609 /*--------------------------- timer regbase ------------------------------*/
610
611 board_info->timer_regbase = pci_resource_start(dev, 3);
612 if (board_info->timer_regbase == 0) {
613 printk(KERN_ERR
614 "ME4000:get_registers():PCI base address 3 is not available\n");
615 return -ENODEV;
616 }
617 board_info->timer_regbase_size = pci_resource_len(dev, 3);
618
619 PDEBUG("get_registers():Timer registers at address 0x%4lX [0x%4lX]\n",
620 board_info->timer_regbase, board_info->timer_regbase_size);
621
622 /*--------------------------- program regbase ------------------------------*/
623
624 board_info->program_regbase = pci_resource_start(dev, 5);
625 if (board_info->program_regbase == 0) {
626 printk(KERN_ERR
627 "get_registers():ME4000:PCI base address 5 is not available\n");
628 return -ENODEV;
629 }
630 board_info->program_regbase_size = pci_resource_len(dev, 5);
631
632 PDEBUG("get_registers():Program registers at address 0x%4lX [0x%4lX]\n",
633 board_info->program_regbase, board_info->program_regbase_size);
634
635 return 0;
636 }
637
638 static int init_board_info(struct pci_dev *pci_dev_p,
639 struct me4000_info *board_info)
640 {
641 int i;
642 int result;
643 struct list_head *board_p;
644 board_info->pci_dev_p = pci_dev_p;
645
646 for (i = 0; i < ARRAY_SIZE(me4000_boards); i++) {
647 if (me4000_boards[i].device_id == pci_dev_p->device) {
648 board_info->board_p = &me4000_boards[i];
649 break;
650 }
651 }
652 if (i == ARRAY_SIZE(me4000_boards)) {
653 printk(KERN_ERR
654 "ME4000:init_board_info():Device ID not valid\n");
655 return -ENODEV;
656 }
657
658 /* Get the index of the board in the global list */
659 i = 0;
660 list_for_each(board_p, &me4000_board_info_list) {
661 if (board_p == &board_info->list) {
662 board_info->board_count = i;
663 break;
664 }
665 i++;
666 }
667 if (board_p == &me4000_board_info_list) {
668 printk(KERN_ERR
669 "ME4000:init_board_info():Cannot get index of board\n");
670 return -ENODEV;
671 }
672
673 /* Init list head for analog output contexts */
674 INIT_LIST_HEAD(&board_info->ao_context_list);
675
676 /* Init spin locks */
677 spin_lock_init(&board_info->preload_lock);
678 spin_lock_init(&board_info->ai_ctrl_lock);
679
680 /* Get the serial number */
681 result = pci_read_config_dword(pci_dev_p, 0x2C, &board_info->serial_no);
682 if (result != PCIBIOS_SUCCESSFUL) {
683 printk(KERN_WARNING
684 "ME4000:init_board_info: Can't get serial_no\n");
685 return result;
686 }
687 PDEBUG("init_board_info():serial_no = 0x%x\n", board_info->serial_no);
688
689 /* Get the hardware revision */
690 result =
691 pci_read_config_byte(pci_dev_p, 0x08, &board_info->hw_revision);
692 if (result != PCIBIOS_SUCCESSFUL) {
693 printk(KERN_WARNING
694 "ME4000:init_board_info():Can't get hw_revision\n");
695 return result;
696 }
697 PDEBUG("init_board_info():hw_revision = 0x%x\n",
698 board_info->hw_revision);
699
700 /* Get the vendor id */
701 board_info->vendor_id = pci_dev_p->vendor;
702 PDEBUG("init_board_info():vendor_id = 0x%x\n", board_info->vendor_id);
703
704 /* Get the device id */
705 board_info->device_id = pci_dev_p->device;
706 PDEBUG("init_board_info():device_id = 0x%x\n", board_info->device_id);
707
708 /* Get the pci device number */
709 board_info->pci_dev_no = PCI_FUNC(pci_dev_p->devfn);
710 PDEBUG("init_board_info():pci_func_no = 0x%x\n",
711 board_info->pci_func_no);
712
713 /* Get the pci slot number */
714 board_info->pci_dev_no = PCI_SLOT(pci_dev_p->devfn);
715 PDEBUG("init_board_info():pci_dev_no = 0x%x\n", board_info->pci_dev_no);
716
717 /* Get the pci bus number */
718 board_info->pci_bus_no = pci_dev_p->bus->number;
719 PDEBUG("init_board_info():pci_bus_no = 0x%x\n", board_info->pci_bus_no);
720
721 /* Get the irq assigned to the board */
722 board_info->irq = pci_dev_p->irq;
723 PDEBUG("init_board_info():irq = %d\n", board_info->irq);
724
725 return 0;
726 }
727
728 static int alloc_ao_contexts(struct me4000_info *info)
729 {
730 int i;
731 int err;
732 struct me4000_ao_context *ao_context;
733
734 for (i = 0; i < info->board_p->ao.count; i++) {
735 ao_context = kzalloc(sizeof(struct me4000_ao_context),
736 GFP_KERNEL);
737 if (!ao_context) {
738 printk(KERN_ERR
739 "alloc_ao_contexts():Can't get memory for ao context\n");
740 release_ao_contexts(info);
741 return -ENOMEM;
742 }
743
744 spin_lock_init(&ao_context->use_lock);
745 spin_lock_init(&ao_context->int_lock);
746 ao_context->irq = info->irq;
747 init_waitqueue_head(&ao_context->wait_queue);
748 ao_context->board_info = info;
749
750 if (info->board_p->ao.fifo_count) {
751 /* Allocate circular buffer */
752 ao_context->circ_buf.buf =
753 kzalloc(ME4000_AO_BUFFER_SIZE, GFP_KERNEL);
754 if (!ao_context->circ_buf.buf) {
755 printk(KERN_ERR
756 "alloc_ao_contexts():Can't get circular buffer\n");
757 release_ao_contexts(info);
758 return -ENOMEM;
759 }
760
761 /* Clear the circular buffer */
762 ao_context->circ_buf.head = 0;
763 ao_context->circ_buf.tail = 0;
764 }
765
766 switch (i) {
767 case 0:
768 ao_context->ctrl_reg =
769 info->me4000_regbase + ME4000_AO_00_CTRL_REG;
770 ao_context->status_reg =
771 info->me4000_regbase + ME4000_AO_00_STATUS_REG;
772 ao_context->fifo_reg =
773 info->me4000_regbase + ME4000_AO_00_FIFO_REG;
774 ao_context->single_reg =
775 info->me4000_regbase + ME4000_AO_00_SINGLE_REG;
776 ao_context->timer_reg =
777 info->me4000_regbase + ME4000_AO_00_TIMER_REG;
778 ao_context->irq_status_reg =
779 info->me4000_regbase + ME4000_IRQ_STATUS_REG;
780 ao_context->preload_reg =
781 info->me4000_regbase + ME4000_AO_LOADSETREG_XX;
782 break;
783 case 1:
784 ao_context->ctrl_reg =
785 info->me4000_regbase + ME4000_AO_01_CTRL_REG;
786 ao_context->status_reg =
787 info->me4000_regbase + ME4000_AO_01_STATUS_REG;
788 ao_context->fifo_reg =
789 info->me4000_regbase + ME4000_AO_01_FIFO_REG;
790 ao_context->single_reg =
791 info->me4000_regbase + ME4000_AO_01_SINGLE_REG;
792 ao_context->timer_reg =
793 info->me4000_regbase + ME4000_AO_01_TIMER_REG;
794 ao_context->irq_status_reg =
795 info->me4000_regbase + ME4000_IRQ_STATUS_REG;
796 ao_context->preload_reg =
797 info->me4000_regbase + ME4000_AO_LOADSETREG_XX;
798 break;
799 case 2:
800 ao_context->ctrl_reg =
801 info->me4000_regbase + ME4000_AO_02_CTRL_REG;
802 ao_context->status_reg =
803 info->me4000_regbase + ME4000_AO_02_STATUS_REG;
804 ao_context->fifo_reg =
805 info->me4000_regbase + ME4000_AO_02_FIFO_REG;
806 ao_context->single_reg =
807 info->me4000_regbase + ME4000_AO_02_SINGLE_REG;
808 ao_context->timer_reg =
809 info->me4000_regbase + ME4000_AO_02_TIMER_REG;
810 ao_context->irq_status_reg =
811 info->me4000_regbase + ME4000_IRQ_STATUS_REG;
812 ao_context->preload_reg =
813 info->me4000_regbase + ME4000_AO_LOADSETREG_XX;
814 break;
815 case 3:
816 ao_context->ctrl_reg =
817 info->me4000_regbase + ME4000_AO_03_CTRL_REG;
818 ao_context->status_reg =
819 info->me4000_regbase + ME4000_AO_03_STATUS_REG;
820 ao_context->fifo_reg =
821 info->me4000_regbase + ME4000_AO_03_FIFO_REG;
822 ao_context->single_reg =
823 info->me4000_regbase + ME4000_AO_03_SINGLE_REG;
824 ao_context->timer_reg =
825 info->me4000_regbase + ME4000_AO_03_TIMER_REG;
826 ao_context->irq_status_reg =
827 info->me4000_regbase + ME4000_IRQ_STATUS_REG;
828 ao_context->preload_reg =
829 info->me4000_regbase + ME4000_AO_LOADSETREG_XX;
830 break;
831 default:
832 break;
833 }
834
835 if (info->board_p->ao.fifo_count) {
836 /* Request the interrupt line */
837 err =
838 request_irq(ao_context->irq, me4000_ao_isr,
839 IRQF_DISABLED | IRQF_SHARED,
840 ME4000_NAME, ao_context);
841 if (err) {
842 printk(KERN_ERR
843 "%s:Can't get interrupt line", __func__);
844 kfree(ao_context->circ_buf.buf);
845 kfree(ao_context);
846 release_ao_contexts(info);
847 return -ENODEV;
848 }
849 }
850
851 list_add_tail(&ao_context->list, &info->ao_context_list);
852 ao_context->index = i;
853 }
854
855 return 0;
856 }
857
858 static void release_ao_contexts(struct me4000_info *board_info)
859 {
860 struct me4000_ao_context *ao_context, *ao_context_safe;
861
862 /* Clear analog output context list */
863 list_for_each_entry_safe(ao_context, ao_context_safe,
864 &board_info->ao_context_list, list) {
865 free_irq(ao_context->irq, ao_context);
866 kfree(ao_context->circ_buf.buf);
867 list_del(&ao_context->list);
868 kfree(ao_context);
869 }
870 }
871
872 static int alloc_ai_context(struct me4000_info *info)
873 {
874 struct me4000_ai_context *ai_context;
875
876 if (info->board_p->ai.count) {
877 ai_context = kzalloc(sizeof(struct me4000_ai_context),
878 GFP_KERNEL);
879 if (!ai_context) {
880 printk(KERN_ERR
881 "ME4000:alloc_ai_context():Can't get memory for ai context\n");
882 return -ENOMEM;
883 }
884
885 info->ai_context = ai_context;
886
887 spin_lock_init(&ai_context->use_lock);
888 spin_lock_init(&ai_context->int_lock);
889 ai_context->number = 0;
890 ai_context->irq = info->irq;
891 init_waitqueue_head(&ai_context->wait_queue);
892 ai_context->board_info = info;
893
894 ai_context->ctrl_reg =
895 info->me4000_regbase + ME4000_AI_CTRL_REG;
896 ai_context->status_reg =
897 info->me4000_regbase + ME4000_AI_STATUS_REG;
898 ai_context->channel_list_reg =
899 info->me4000_regbase + ME4000_AI_CHANNEL_LIST_REG;
900 ai_context->data_reg =
901 info->me4000_regbase + ME4000_AI_DATA_REG;
902 ai_context->chan_timer_reg =
903 info->me4000_regbase + ME4000_AI_CHAN_TIMER_REG;
904 ai_context->chan_pre_timer_reg =
905 info->me4000_regbase + ME4000_AI_CHAN_PRE_TIMER_REG;
906 ai_context->scan_timer_low_reg =
907 info->me4000_regbase + ME4000_AI_SCAN_TIMER_LOW_REG;
908 ai_context->scan_timer_high_reg =
909 info->me4000_regbase + ME4000_AI_SCAN_TIMER_HIGH_REG;
910 ai_context->scan_pre_timer_low_reg =
911 info->me4000_regbase + ME4000_AI_SCAN_PRE_TIMER_LOW_REG;
912 ai_context->scan_pre_timer_high_reg =
913 info->me4000_regbase + ME4000_AI_SCAN_PRE_TIMER_HIGH_REG;
914 ai_context->start_reg =
915 info->me4000_regbase + ME4000_AI_START_REG;
916 ai_context->irq_status_reg =
917 info->me4000_regbase + ME4000_IRQ_STATUS_REG;
918 ai_context->sample_counter_reg =
919 info->me4000_regbase + ME4000_AI_SAMPLE_COUNTER_REG;
920 }
921
922 return 0;
923 }
924
925 static int alloc_dio_context(struct me4000_info *info)
926 {
927 struct me4000_dio_context *dio_context;
928
929 if (info->board_p->dio.count) {
930 dio_context = kzalloc(sizeof(struct me4000_dio_context),
931 GFP_KERNEL);
932 if (!dio_context) {
933 printk(KERN_ERR
934 "ME4000:alloc_dio_context():Can't get memory for dio context\n");
935 return -ENOMEM;
936 }
937
938 info->dio_context = dio_context;
939
940 spin_lock_init(&dio_context->use_lock);
941 dio_context->board_info = info;
942
943 dio_context->dio_count = info->board_p->dio.count;
944
945 dio_context->dir_reg =
946 info->me4000_regbase + ME4000_DIO_DIR_REG;
947 dio_context->ctrl_reg =
948 info->me4000_regbase + ME4000_DIO_CTRL_REG;
949 dio_context->port_0_reg =
950 info->me4000_regbase + ME4000_DIO_PORT_0_REG;
951 dio_context->port_1_reg =
952 info->me4000_regbase + ME4000_DIO_PORT_1_REG;
953 dio_context->port_2_reg =
954 info->me4000_regbase + ME4000_DIO_PORT_2_REG;
955 dio_context->port_3_reg =
956 info->me4000_regbase + ME4000_DIO_PORT_3_REG;
957 }
958
959 return 0;
960 }
961
962 static int alloc_cnt_context(struct me4000_info *info)
963 {
964 struct me4000_cnt_context *cnt_context;
965
966 if (info->board_p->cnt.count) {
967 cnt_context = kzalloc(sizeof(struct me4000_cnt_context),
968 GFP_KERNEL);
969 if (!cnt_context) {
970 printk(KERN_ERR
971 "ME4000:alloc_cnt_context():Can't get memory for cnt context\n");
972 return -ENOMEM;
973 }
974
975 info->cnt_context = cnt_context;
976
977 spin_lock_init(&cnt_context->use_lock);
978 cnt_context->board_info = info;
979
980 cnt_context->ctrl_reg =
981 info->timer_regbase + ME4000_CNT_CTRL_REG;
982 cnt_context->counter_0_reg =
983 info->timer_regbase + ME4000_CNT_COUNTER_0_REG;
984 cnt_context->counter_1_reg =
985 info->timer_regbase + ME4000_CNT_COUNTER_1_REG;
986 cnt_context->counter_2_reg =
987 info->timer_regbase + ME4000_CNT_COUNTER_2_REG;
988 }
989
990 return 0;
991 }
992
993 static int alloc_ext_int_context(struct me4000_info *info)
994 {
995 struct me4000_ext_int_context *ext_int_context;
996
997 if (info->board_p->cnt.count) {
998 ext_int_context =
999 kzalloc(sizeof(struct me4000_ext_int_context), GFP_KERNEL);
1000 if (!ext_int_context) {
1001 printk(KERN_ERR
1002 "ME4000:alloc_ext_int_context():Can't get memory for cnt context\n");
1003 return -ENOMEM;
1004 }
1005
1006 info->ext_int_context = ext_int_context;
1007
1008 spin_lock_init(&ext_int_context->use_lock);
1009 ext_int_context->board_info = info;
1010
1011 ext_int_context->fasync_ptr = NULL;
1012 ext_int_context->irq = info->irq;
1013
1014 ext_int_context->ctrl_reg =
1015 info->me4000_regbase + ME4000_AI_CTRL_REG;
1016 ext_int_context->irq_status_reg =
1017 info->me4000_regbase + ME4000_IRQ_STATUS_REG;
1018 }
1019
1020 return 0;
1021 }
1022
1023 static int me4000_probe(struct pci_dev *dev, const struct pci_device_id *id)
1024 {
1025 int result = 0;
1026 struct me4000_info *board_info;
1027
1028 CALL_PDEBUG("me4000_probe() is executed\n");
1029
1030 /* Allocate structure for board context */
1031 board_info = kzalloc(sizeof(struct me4000_info), GFP_KERNEL);
1032 if (!board_info) {
1033 printk(KERN_ERR
1034 "ME4000:Can't get memory for board info structure\n");
1035 result = -ENOMEM;
1036 goto PROBE_ERROR_1;
1037 }
1038
1039 /* Add to global linked list */
1040 list_add_tail(&board_info->list, &me4000_board_info_list);
1041
1042 /* Get the PCI base registers */
1043 result = get_registers(dev, board_info);
1044 if (result) {
1045 printk(KERN_ERR "%s:Cannot get registers\n", __func__);
1046 goto PROBE_ERROR_2;
1047 }
1048
1049 /* Enable the device */
1050 result = pci_enable_device(dev);
1051 if (result < 0) {
1052 printk(KERN_ERR "%s:Cannot enable PCI device\n", __func__);
1053 goto PROBE_ERROR_2;
1054 }
1055
1056 /* Request the PCI register regions */
1057 result = pci_request_regions(dev, ME4000_NAME);
1058 if (result < 0) {
1059 printk(KERN_ERR "%s:Cannot request I/O regions\n", __func__);
1060 goto PROBE_ERROR_2;
1061 }
1062
1063 /* Initialize board info */
1064 result = init_board_info(dev, board_info);
1065 if (result) {
1066 printk(KERN_ERR "%s:Cannot init baord info\n", __func__);
1067 goto PROBE_ERROR_3;
1068 }
1069
1070 /* Download the xilinx firmware */
1071 result = me4000_xilinx_download(board_info);
1072 if (result) {
1073 printk(KERN_ERR "%s:Can't download firmware\n", __func__);
1074 goto PROBE_ERROR_3;
1075 }
1076
1077 /* Make a hardware reset */
1078 result = me4000_reset_board(board_info);
1079 if (result) {
1080 printk(KERN_ERR "%s :Can't reset board\n", __func__);
1081 goto PROBE_ERROR_3;
1082 }
1083
1084 /* Allocate analog output context structures */
1085 result = alloc_ao_contexts(board_info);
1086 if (result) {
1087 printk(KERN_ERR "%s:Cannot allocate ao contexts\n", __func__);
1088 goto PROBE_ERROR_3;
1089 }
1090
1091 /* Allocate analog input context */
1092 result = alloc_ai_context(board_info);
1093 if (result) {
1094 printk(KERN_ERR "%s:Cannot allocate ai context\n", __func__);
1095 goto PROBE_ERROR_4;
1096 }
1097
1098 /* Allocate digital I/O context */
1099 result = alloc_dio_context(board_info);
1100 if (result) {
1101 printk(KERN_ERR "%s:Cannot allocate dio context\n", __func__);
1102 goto PROBE_ERROR_5;
1103 }
1104
1105 /* Allocate counter context */
1106 result = alloc_cnt_context(board_info);
1107 if (result) {
1108 printk(KERN_ERR "%s:Cannot allocate cnt context\n", __func__);
1109 goto PROBE_ERROR_6;
1110 }
1111
1112 /* Allocate external interrupt context */
1113 result = alloc_ext_int_context(board_info);
1114 if (result) {
1115 printk(KERN_ERR
1116 "%s:Cannot allocate ext_int context\n", __func__);
1117 goto PROBE_ERROR_7;
1118 }
1119
1120 return 0;
1121
1122 PROBE_ERROR_7:
1123 kfree(board_info->cnt_context);
1124
1125 PROBE_ERROR_6:
1126 kfree(board_info->dio_context);
1127
1128 PROBE_ERROR_5:
1129 kfree(board_info->ai_context);
1130
1131 PROBE_ERROR_4:
1132 release_ao_contexts(board_info);
1133
1134 PROBE_ERROR_3:
1135 pci_release_regions(dev);
1136
1137 PROBE_ERROR_2:
1138 list_del(&board_info->list);
1139 kfree(board_info);
1140
1141 PROBE_ERROR_1:
1142 return result;
1143 }
1144
1145 static int me4000_xilinx_download(struct me4000_info *info)
1146 {
1147 int size = 0;
1148 u32 value = 0;
1149 int idx = 0;
1150 unsigned char *firm;
1151 wait_queue_head_t queue;
1152
1153 CALL_PDEBUG("me4000_xilinx_download() is executed\n");
1154
1155 init_waitqueue_head(&queue);
1156
1157 firm = (info->device_id == 0x4610) ? xilinx_firm_4610 : xilinx_firm;
1158
1159 /*
1160 * Set PLX local interrupt 2 polarity to high.
1161 * Interrupt is thrown by init pin of xilinx.
1162 */
1163 outl(0x10, info->plx_regbase + PLX_INTCSR);
1164
1165 /* Set /CS and /WRITE of the Xilinx */
1166 value = inl(info->plx_regbase + PLX_ICR);
1167 value |= 0x100;
1168 outl(value, info->plx_regbase + PLX_ICR);
1169
1170 /* Init Xilinx with CS1 */
1171 inb(info->program_regbase + 0xC8);
1172
1173 /* Wait until /INIT pin is set */
1174 udelay(20);
1175 if (!(inl(info->plx_regbase + PLX_INTCSR) & 0x20)) {
1176 printk(KERN_ERR "%s:Can't init Xilinx\n", __func__);
1177 return -EIO;
1178 }
1179
1180 /* Reset /CS and /WRITE of the Xilinx */
1181 value = inl(info->plx_regbase + PLX_ICR);
1182 value &= ~0x100;
1183 outl(value, info->plx_regbase + PLX_ICR);
1184
1185 /* Download Xilinx firmware */
1186 size = (firm[0] << 24) + (firm[1] << 16) + (firm[2] << 8) + firm[3];
1187 udelay(10);
1188
1189 for (idx = 0; idx < size; idx++) {
1190 outb(firm[16 + idx], info->program_regbase);
1191
1192 udelay(10);
1193
1194 /* Check if BUSY flag is low */
1195 if (inl(info->plx_regbase + PLX_ICR) & 0x20) {
1196 printk(KERN_ERR
1197 "%s:Xilinx is still busy (idx = %d)\n", __func__,
1198 idx);
1199 return -EIO;
1200 }
1201 }
1202
1203 PDEBUG("me4000_xilinx_download():%d bytes written\n", idx);
1204
1205 /* If done flag is high download was successful */
1206 if (inl(info->plx_regbase + PLX_ICR) & 0x4) {
1207 PDEBUG("me4000_xilinx_download():Done flag is set\n");
1208 PDEBUG("me4000_xilinx_download():Download was successful\n");
1209 } else {
1210 printk(KERN_ERR
1211 "ME4000:%s:DONE flag is not set\n", __func__);
1212 printk(KERN_ERR
1213 "ME4000:%s:Download not succesful\n", __func__);
1214 return -EIO;
1215 }
1216
1217 /* Set /CS and /WRITE */
1218 value = inl(info->plx_regbase + PLX_ICR);
1219 value |= 0x100;
1220 outl(value, info->plx_regbase + PLX_ICR);
1221
1222 return 0;
1223 }
1224
1225 static int me4000_reset_board(struct me4000_info *info)
1226 {
1227 unsigned long icr;
1228
1229 CALL_PDEBUG("me4000_reset_board() is executed\n");
1230
1231 /* Make a hardware reset */
1232 icr = me4000_inl(info->plx_regbase + PLX_ICR);
1233 icr |= 0x40000000;
1234 me4000_outl(icr, info->plx_regbase + PLX_ICR);
1235 icr &= ~0x40000000;
1236 me4000_outl(icr, info->plx_regbase + PLX_ICR);
1237
1238 /* Set both stop bits in the analog input control register */
1239 me4000_outl(ME4000_AI_CTRL_BIT_IMMEDIATE_STOP | ME4000_AI_CTRL_BIT_STOP,
1240 info->me4000_regbase + ME4000_AI_CTRL_REG);
1241
1242 /* Set both stop bits in the analog output control register */
1243 me4000_outl(ME4000_AO_CTRL_BIT_IMMEDIATE_STOP | ME4000_AO_CTRL_BIT_STOP,
1244 info->me4000_regbase + ME4000_AO_00_CTRL_REG);
1245 me4000_outl(ME4000_AO_CTRL_BIT_IMMEDIATE_STOP | ME4000_AO_CTRL_BIT_STOP,
1246 info->me4000_regbase + ME4000_AO_01_CTRL_REG);
1247 me4000_outl(ME4000_AO_CTRL_BIT_IMMEDIATE_STOP | ME4000_AO_CTRL_BIT_STOP,
1248 info->me4000_regbase + ME4000_AO_02_CTRL_REG);
1249 me4000_outl(ME4000_AO_CTRL_BIT_IMMEDIATE_STOP | ME4000_AO_CTRL_BIT_STOP,
1250 info->me4000_regbase + ME4000_AO_03_CTRL_REG);
1251
1252 /* 0x8000 to the DACs means an output voltage of 0V */
1253 me4000_outl(0x8000, info->me4000_regbase + ME4000_AO_00_SINGLE_REG);
1254 me4000_outl(0x8000, info->me4000_regbase + ME4000_AO_01_SINGLE_REG);
1255 me4000_outl(0x8000, info->me4000_regbase + ME4000_AO_02_SINGLE_REG);
1256 me4000_outl(0x8000, info->me4000_regbase + ME4000_AO_03_SINGLE_REG);
1257
1258 /* Enable interrupts on the PLX */
1259 me4000_outl(0x43, info->plx_regbase + PLX_INTCSR);
1260
1261 /* Set the adustment register for AO demux */
1262 me4000_outl(ME4000_AO_DEMUX_ADJUST_VALUE,
1263 info->me4000_regbase + ME4000_AO_DEMUX_ADJUST_REG);
1264
1265 /* Set digital I/O direction for port 0 to output on isolated versions */
1266 if (!(me4000_inl(info->me4000_regbase + ME4000_DIO_DIR_REG) & 0x1)) {
1267 me4000_outl(0x1, info->me4000_regbase + ME4000_DIO_CTRL_REG);
1268 }
1269
1270 return 0;
1271 }
1272
1273 static int me4000_open(struct inode *inode_p, struct file *file_p)
1274 {
1275 int board, dev, mode;
1276 int err = 0;
1277 int i;
1278 struct list_head *ptr;
1279 struct me4000_info *board_info = NULL;
1280 struct me4000_ao_context *ao_context = NULL;
1281 struct me4000_ai_context *ai_context = NULL;
1282 struct me4000_dio_context *dio_context = NULL;
1283 struct me4000_cnt_context *cnt_context = NULL;
1284 struct me4000_ext_int_context *ext_int_context = NULL;
1285
1286 CALL_PDEBUG("me4000_open() is executed\n");
1287
1288 /* Analog output */
1289 if (MAJOR(inode_p->i_rdev) == me4000_ao_major_driver_no) {
1290 board = AO_BOARD(inode_p->i_rdev);
1291 dev = AO_PORT(inode_p->i_rdev);
1292 mode = AO_MODE(inode_p->i_rdev);
1293
1294 PDEBUG("me4000_open():board = %d ao = %d mode = %d\n", board,
1295 dev, mode);
1296
1297 /* Search for the board context */
1298 i = 0;
1299 list_for_each(ptr, &me4000_board_info_list) {
1300 if (i == board)
1301 break;
1302 i++;
1303 }
1304 board_info = list_entry(ptr, struct me4000_info, list);
1305
1306 if (ptr == &me4000_board_info_list) {
1307 printk(KERN_ERR
1308 "ME4000:me4000_open():Board %d not in device list\n",
1309 board);
1310 return -ENODEV;
1311 }
1312
1313 /* Search for the dac context */
1314 i = 0;
1315 list_for_each(ptr, &board_info->ao_context_list) {
1316 if (i == dev)
1317 break;
1318 i++;
1319 }
1320 ao_context = list_entry(ptr, struct me4000_ao_context, list);
1321
1322 if (ptr == &board_info->ao_context_list) {
1323 printk(KERN_ERR
1324 "ME4000:me4000_open():Device %d not in device list\n",
1325 dev);
1326 return -ENODEV;
1327 }
1328
1329 /* Check if mode is valid */
1330 if (mode > 2) {
1331 printk(KERN_ERR
1332 "ME4000:me4000_open():Mode is not valid\n");
1333 return -ENODEV;
1334 }
1335
1336 /* Check if mode is valid for this AO */
1337 if ((mode != ME4000_AO_CONV_MODE_SINGLE)
1338 && (dev >= board_info->board_p->ao.fifo_count)) {
1339 printk(KERN_ERR
1340 "ME4000:me4000_open():AO %d only in single mode available\n",
1341 dev);
1342 return -ENODEV;
1343 }
1344
1345 /* Check if already opened */
1346 spin_lock(&ao_context->use_lock);
1347 if (ao_context->dac_in_use) {
1348 printk(KERN_ERR
1349 "ME4000:me4000_open():AO %d already in use\n",
1350 dev);
1351 spin_unlock(&ao_context->use_lock);
1352 return -EBUSY;
1353 }
1354 ao_context->dac_in_use = 1;
1355 spin_unlock(&ao_context->use_lock);
1356
1357 ao_context->mode = mode;
1358
1359 /* Hold the context in private data */
1360 file_p->private_data = ao_context;
1361
1362 /* Set file operations pointer */
1363 file_p->f_op = me4000_ao_fops_array[mode];
1364
1365 err = me4000_ao_prepare(ao_context);
1366 if (err) {
1367 ao_context->dac_in_use = 0;
1368 return 1;
1369 }
1370 }
1371 /* Analog input */
1372 else if (MAJOR(inode_p->i_rdev) == me4000_ai_major_driver_no) {
1373 board = AI_BOARD(inode_p->i_rdev);
1374 mode = AI_MODE(inode_p->i_rdev);
1375
1376 PDEBUG("me4000_open():ai board = %d mode = %d\n", board, mode);
1377
1378 /* Search for the board context */
1379 i = 0;
1380 list_for_each(ptr, &me4000_board_info_list) {
1381 if (i == board)
1382 break;
1383 i++;
1384 }
1385 board_info = list_entry(ptr, struct me4000_info, list);
1386
1387 if (ptr == &me4000_board_info_list) {
1388 printk(KERN_ERR
1389 "ME4000:me4000_open():Board %d not in device list\n",
1390 board);
1391 return -ENODEV;
1392 }
1393
1394 ai_context = board_info->ai_context;
1395
1396 /* Check if mode is valid */
1397 if (mode > 5) {
1398 printk(KERN_ERR
1399 "ME4000:me4000_open():Mode is not valid\n");
1400 return -EINVAL;
1401 }
1402
1403 /* Check if already opened */
1404 spin_lock(&ai_context->use_lock);
1405 if (ai_context->in_use) {
1406 printk(KERN_ERR
1407 "ME4000:me4000_open():AI already in use\n");
1408 spin_unlock(&ai_context->use_lock);
1409 return -EBUSY;
1410 }
1411 ai_context->in_use = 1;
1412 spin_unlock(&ai_context->use_lock);
1413
1414 ai_context->mode = mode;
1415
1416 /* Hold the context in private data */
1417 file_p->private_data = ai_context;
1418
1419 /* Set file operations pointer */
1420 file_p->f_op = me4000_ai_fops_array[mode];
1421
1422 /* Prepare analog input */
1423 me4000_ai_prepare(ai_context);
1424 }
1425 /* Digital I/O */
1426 else if (MAJOR(inode_p->i_rdev) == me4000_dio_major_driver_no) {
1427 board = DIO_BOARD(inode_p->i_rdev);
1428 dev = 0;
1429 mode = 0;
1430
1431 PDEBUG("me4000_open():board = %d\n", board);
1432
1433 /* Search for the board context */
1434 list_for_each_entry(board_info, &me4000_board_info_list, list) {
1435 if (board_info->board_count == board)
1436 break;
1437 }
1438
1439 if (&board_info->list == &me4000_board_info_list) {
1440 printk(KERN_ERR
1441 "ME4000:me4000_open():Board %d not in device list\n",
1442 board);
1443 return -ENODEV;
1444 }
1445
1446 /* Search for the dio context */
1447 dio_context = board_info->dio_context;
1448
1449 /* Check if already opened */
1450 spin_lock(&dio_context->use_lock);
1451 if (dio_context->in_use) {
1452 printk(KERN_ERR
1453 "ME4000:me4000_open():DIO already in use\n");
1454 spin_unlock(&dio_context->use_lock);
1455 return -EBUSY;
1456 }
1457 dio_context->in_use = 1;
1458 spin_unlock(&dio_context->use_lock);
1459
1460 /* Hold the context in private data */
1461 file_p->private_data = dio_context;
1462
1463 /* Set file operations pointer to single functions */
1464 file_p->f_op = &me4000_dio_fops;
1465
1466 //me4000_dio_reset(dio_context);
1467 }
1468 /* Counters */
1469 else if (MAJOR(inode_p->i_rdev) == me4000_cnt_major_driver_no) {
1470 board = CNT_BOARD(inode_p->i_rdev);
1471 dev = 0;
1472 mode = 0;
1473
1474 PDEBUG("me4000_open():board = %d\n", board);
1475
1476 /* Search for the board context */
1477 list_for_each_entry(board_info, &me4000_board_info_list, list) {
1478 if (board_info->board_count == board)
1479 break;
1480 }
1481
1482 if (&board_info->list == &me4000_board_info_list) {
1483 printk(KERN_ERR
1484 "ME4000:me4000_open():Board %d not in device list\n",
1485 board);
1486 return -ENODEV;
1487 }
1488
1489 /* Get the cnt context */
1490 cnt_context = board_info->cnt_context;
1491
1492 /* Check if already opened */
1493 spin_lock(&cnt_context->use_lock);
1494 if (cnt_context->in_use) {
1495 printk(KERN_ERR
1496 "ME4000:me4000_open():CNT already in use\n");
1497 spin_unlock(&cnt_context->use_lock);
1498 return -EBUSY;
1499 }
1500 cnt_context->in_use = 1;
1501 spin_unlock(&cnt_context->use_lock);
1502
1503 /* Hold the context in private data */
1504 file_p->private_data = cnt_context;
1505
1506 /* Set file operations pointer to single functions */
1507 file_p->f_op = &me4000_cnt_fops;
1508 }
1509 /* External Interrupt */
1510 else if (MAJOR(inode_p->i_rdev) == me4000_ext_int_major_driver_no) {
1511 board = EXT_INT_BOARD(inode_p->i_rdev);
1512 dev = 0;
1513 mode = 0;
1514
1515 PDEBUG("me4000_open():board = %d\n", board);
1516
1517 /* Search for the board context */
1518 list_for_each_entry(board_info, &me4000_board_info_list, list) {
1519 if (board_info->board_count == board)
1520 break;
1521 }
1522
1523 if (&board_info->list == &me4000_board_info_list) {
1524 printk(KERN_ERR
1525 "ME4000:me4000_open():Board %d not in device list\n",
1526 board);
1527 return -ENODEV;
1528 }
1529
1530 /* Get the external interrupt context */
1531 ext_int_context = board_info->ext_int_context;
1532
1533 /* Check if already opened */
1534 spin_lock(&cnt_context->use_lock);
1535 if (ext_int_context->in_use) {
1536 printk(KERN_ERR
1537 "ME4000:me4000_open():External interrupt already in use\n");
1538 spin_unlock(&ext_int_context->use_lock);
1539 return -EBUSY;
1540 }
1541 ext_int_context->in_use = 1;
1542 spin_unlock(&ext_int_context->use_lock);
1543
1544 /* Hold the context in private data */
1545 file_p->private_data = ext_int_context;
1546
1547 /* Set file operations pointer to single functions */
1548 file_p->f_op = &me4000_ext_int_fops;
1549
1550 /* Request the interrupt line */
1551 err =
1552 request_irq(ext_int_context->irq, me4000_ext_int_isr,
1553 IRQF_DISABLED | IRQF_SHARED, ME4000_NAME,
1554 ext_int_context);
1555 if (err) {
1556 printk(KERN_ERR
1557 "ME4000:me4000_open():Can't get interrupt line");
1558 ext_int_context->in_use = 0;
1559 return -ENODEV;
1560 }
1561
1562 /* Reset the counter */
1563 me4000_ext_int_disable(ext_int_context);
1564 } else {
1565 printk(KERN_ERR "ME4000:me4000_open():Major number unknown\n");
1566 return -EINVAL;
1567 }
1568
1569 return 0;
1570 }
1571
1572 static int me4000_release(struct inode *inode_p, struct file *file_p)
1573 {
1574 struct me4000_ao_context *ao_context;
1575 struct me4000_ai_context *ai_context;
1576 struct me4000_dio_context *dio_context;
1577 struct me4000_cnt_context *cnt_context;
1578 struct me4000_ext_int_context *ext_int_context;
1579
1580 CALL_PDEBUG("me4000_release() is executed\n");
1581
1582 if (MAJOR(inode_p->i_rdev) == me4000_ao_major_driver_no) {
1583 ao_context = file_p->private_data;
1584
1585 /* Mark DAC as unused */
1586 ao_context->dac_in_use = 0;
1587 } else if (MAJOR(inode_p->i_rdev) == me4000_ai_major_driver_no) {
1588 ai_context = file_p->private_data;
1589
1590 /* Reset the analog input */
1591 me4000_ai_reset(ai_context);
1592
1593 /* Free the interrupt and the circular buffer */
1594 if (ai_context->mode) {
1595 free_irq(ai_context->irq, ai_context);
1596 kfree(ai_context->circ_buf.buf);
1597 ai_context->circ_buf.buf = NULL;
1598 ai_context->circ_buf.head = 0;
1599 ai_context->circ_buf.tail = 0;
1600 }
1601
1602 /* Mark AI as unused */
1603 ai_context->in_use = 0;
1604 } else if (MAJOR(inode_p->i_rdev) == me4000_dio_major_driver_no) {
1605 dio_context = file_p->private_data;
1606
1607 /* Mark digital I/O as unused */
1608 dio_context->in_use = 0;
1609 } else if (MAJOR(inode_p->i_rdev) == me4000_cnt_major_driver_no) {
1610 cnt_context = file_p->private_data;
1611
1612 /* Mark counters as unused */
1613 cnt_context->in_use = 0;
1614 } else if (MAJOR(inode_p->i_rdev) == me4000_ext_int_major_driver_no) {
1615 ext_int_context = file_p->private_data;
1616
1617 /* Disable the externel interrupt */
1618 me4000_ext_int_disable(ext_int_context);
1619
1620 free_irq(ext_int_context->irq, ext_int_context);
1621
1622 /* Mark as unused */
1623 ext_int_context->in_use = 0;
1624 } else {
1625 printk(KERN_ERR
1626 "ME4000:me4000_release():Major number unknown\n");
1627 return -EINVAL;
1628 }
1629
1630 return 0;
1631 }
1632
1633 /*------------------------------- Analog output stuff --------------------------------------*/
1634
1635 static int me4000_ao_prepare(struct me4000_ao_context *ao_context)
1636 {
1637 unsigned long flags;
1638
1639 CALL_PDEBUG("me4000_ao_prepare() is executed\n");
1640
1641 if (ao_context->mode == ME4000_AO_CONV_MODE_CONTINUOUS) {
1642 /* Only do anything if not already in the correct mode */
1643 unsigned long mode = me4000_inl(ao_context->ctrl_reg);
1644 if ((mode & ME4000_AO_CONV_MODE_CONTINUOUS)
1645 && (mode & ME4000_AO_CTRL_BIT_ENABLE_FIFO)) {
1646 return 0;
1647 }
1648
1649 /* Stop any conversion */
1650 me4000_ao_immediate_stop(ao_context);
1651
1652 /* Set the control register to default state */
1653 spin_lock_irqsave(&ao_context->int_lock, flags);
1654 me4000_outl(ME4000_AO_CONV_MODE_CONTINUOUS |
1655 ME4000_AO_CTRL_BIT_ENABLE_FIFO |
1656 ME4000_AO_CTRL_BIT_STOP |
1657 ME4000_AO_CTRL_BIT_IMMEDIATE_STOP,
1658 ao_context->ctrl_reg);
1659 spin_unlock_irqrestore(&ao_context->int_lock, flags);
1660
1661 /* Set to fastest sample rate */
1662 me4000_outl(65, ao_context->timer_reg);
1663 } else if (ao_context->mode == ME4000_AO_CONV_MODE_WRAPAROUND) {
1664 /* Only do anything if not already in the correct mode */
1665 unsigned long mode = me4000_inl(ao_context->ctrl_reg);
1666 if ((mode & ME4000_AO_CONV_MODE_WRAPAROUND)
1667 && (mode & ME4000_AO_CTRL_BIT_ENABLE_FIFO)) {
1668 return 0;
1669 }
1670
1671 /* Stop any conversion */
1672 me4000_ao_immediate_stop(ao_context);
1673
1674 /* Set the control register to default state */
1675 spin_lock_irqsave(&ao_context->int_lock, flags);
1676 me4000_outl(ME4000_AO_CONV_MODE_WRAPAROUND |
1677 ME4000_AO_CTRL_BIT_ENABLE_FIFO |
1678 ME4000_AO_CTRL_BIT_STOP |
1679 ME4000_AO_CTRL_BIT_IMMEDIATE_STOP,
1680 ao_context->ctrl_reg);
1681 spin_unlock_irqrestore(&ao_context->int_lock, flags);
1682
1683 /* Set to fastest sample rate */
1684 me4000_outl(65, ao_context->timer_reg);
1685 } else if (ao_context->mode == ME4000_AO_CONV_MODE_SINGLE) {
1686 /* Only do anything if not already in the correct mode */
1687 unsigned long mode = me4000_inl(ao_context->ctrl_reg);
1688 if (!
1689 (mode &
1690 (ME4000_AO_CONV_MODE_WRAPAROUND |
1691 ME4000_AO_CONV_MODE_CONTINUOUS))) {
1692 return 0;
1693 }
1694
1695 /* Stop any conversion */
1696 me4000_ao_immediate_stop(ao_context);
1697
1698 /* Clear the control register */
1699 spin_lock_irqsave(&ao_context->int_lock, flags);
1700 me4000_outl(0x0, ao_context->ctrl_reg);
1701 spin_unlock_irqrestore(&ao_context->int_lock, flags);
1702
1703 /* Set voltage to 0V */
1704 me4000_outl(0x8000, ao_context->single_reg);
1705 } else {
1706 printk(KERN_ERR
1707 "ME4000:me4000_ao_prepare():Invalid mode specified\n");
1708 return -EINVAL;
1709 }
1710
1711 return 0;
1712 }
1713
1714 static int me4000_ao_reset(struct me4000_ao_context *ao_context)
1715 {
1716 u32 tmp;
1717 wait_queue_head_t queue;
1718 unsigned long flags;
1719
1720 CALL_PDEBUG("me4000_ao_reset() is executed\n");
1721
1722 init_waitqueue_head(&queue);
1723
1724 if (ao_context->mode == ME4000_AO_CONV_MODE_WRAPAROUND) {
1725 /*
1726 * First stop conversion of the DAC before reconfigure.
1727 * This is essantial, cause of the state machine.
1728 * If not stopped before configuring mode, it could
1729 * walk in a undefined state.
1730 */
1731 tmp = me4000_inl(ao_context->ctrl_reg);
1732 tmp |= ME4000_AO_CTRL_BIT_IMMEDIATE_STOP;
1733 me4000_outl(tmp, ao_context->ctrl_reg);
1734
1735 wait_event_timeout(queue,
1736 (inl(ao_context->status_reg) &
1737 ME4000_AO_STATUS_BIT_FSM) == 0,
1738 1);
1739
1740 /* Set to transparent mode */
1741 me4000_ao_simultaneous_disable(ao_context);
1742
1743 /* Set to single mode in order to set default voltage */
1744 me4000_outl(0x0, ao_context->ctrl_reg);
1745
1746 /* Set voltage to 0V */
1747 me4000_outl(0x8000, ao_context->single_reg);
1748
1749 /* Set to fastest sample rate */
1750 me4000_outl(65, ao_context->timer_reg);
1751
1752 /* Set the original mode and enable FIFO */
1753 me4000_outl(ME4000_AO_CONV_MODE_WRAPAROUND |
1754 ME4000_AO_CTRL_BIT_ENABLE_FIFO |
1755 ME4000_AO_CTRL_BIT_STOP |
1756 ME4000_AO_CTRL_BIT_IMMEDIATE_STOP,
1757 ao_context->ctrl_reg);
1758 } else if (ao_context->mode == ME4000_AO_CONV_MODE_CONTINUOUS) {
1759 /*
1760 * First stop conversion of the DAC before reconfigure.
1761 * This is essantial, cause of the state machine.
1762 * If not stopped before configuring mode, it could
1763 * walk in a undefined state.
1764 */
1765 spin_lock_irqsave(&ao_context->int_lock, flags);
1766 tmp = me4000_inl(ao_context->ctrl_reg);
1767 tmp |= ME4000_AO_CTRL_BIT_STOP;
1768 me4000_outl(tmp, ao_context->ctrl_reg);
1769 spin_unlock_irqrestore(&ao_context->int_lock, flags);
1770
1771 wait_event_timeout(queue,
1772 (inl(ao_context->status_reg) &
1773 ME4000_AO_STATUS_BIT_FSM) == 0,
1774 1);
1775
1776 /* Clear the circular buffer */
1777 ao_context->circ_buf.head = 0;
1778 ao_context->circ_buf.tail = 0;
1779
1780 /* Set to transparent mode */
1781 me4000_ao_simultaneous_disable(ao_context);
1782
1783 /* Set to single mode in order to set default voltage */
1784 spin_lock_irqsave(&ao_context->int_lock, flags);
1785 tmp = me4000_inl(ao_context->ctrl_reg);
1786 me4000_outl(0x0, ao_context->ctrl_reg);
1787
1788 /* Set voltage to 0V */
1789 me4000_outl(0x8000, ao_context->single_reg);
1790
1791 /* Set to fastest sample rate */
1792 me4000_outl(65, ao_context->timer_reg);
1793
1794 /* Set the original mode and enable FIFO */
1795 me4000_outl(ME4000_AO_CONV_MODE_CONTINUOUS |
1796 ME4000_AO_CTRL_BIT_ENABLE_FIFO |
1797 ME4000_AO_CTRL_BIT_STOP |
1798 ME4000_AO_CTRL_BIT_IMMEDIATE_STOP,
1799 ao_context->ctrl_reg);
1800 spin_unlock_irqrestore(&ao_context->int_lock, flags);
1801 } else {
1802 /* Set to transparent mode */
1803 me4000_ao_simultaneous_disable(ao_context);
1804
1805 /* Set voltage to 0V */
1806 me4000_outl(0x8000, ao_context->single_reg);
1807 }
1808
1809 return 0;
1810 }
1811
1812 static ssize_t me4000_ao_write_sing(struct file *filep, const char *buff,
1813 size_t cnt, loff_t *offp)
1814 {
1815 struct me4000_ao_context *ao_context = filep->private_data;
1816 u32 value;
1817 const u16 *buffer = (const u16 *)buff;
1818
1819 CALL_PDEBUG("me4000_ao_write_sing() is executed\n");
1820
1821 if (cnt != 2) {
1822 printk(KERN_ERR
1823 "%s:Write count is not 2\n", __func__);
1824 return -EINVAL;
1825 }
1826
1827 if (get_user(value, buffer)) {
1828 printk(KERN_ERR
1829 "%s:Cannot copy data from user\n", __func__);
1830 return -EFAULT;
1831 }
1832
1833 me4000_outl(value, ao_context->single_reg);
1834
1835 return 2;
1836 }
1837
1838 static ssize_t me4000_ao_write_wrap(struct file *filep, const char *buff,
1839 size_t cnt, loff_t *offp)
1840 {
1841 struct me4000_ao_context *ao_context = filep->private_data;
1842 size_t i;
1843 u32 value;
1844 u32 tmp;
1845 const u16 *buffer = (const u16 *)buff;
1846 size_t count = cnt / 2;
1847
1848 CALL_PDEBUG("me4000_ao_write_wrap() is executed\n");
1849
1850 /* Check if a conversion is already running */
1851 if (inl(ao_context->status_reg) & ME4000_AO_STATUS_BIT_FSM) {
1852 printk(KERN_ERR
1853 "%s:There is already a conversion running\n", __func__);
1854 return -EBUSY;
1855 }
1856
1857 if (count > ME4000_AO_FIFO_COUNT) {
1858 printk(KERN_ERR
1859 "%s:Can't load more than %d values\n", __func__,
1860 ME4000_AO_FIFO_COUNT);
1861 return -ENOSPC;
1862 }
1863
1864 /* Reset the FIFO */
1865 tmp = inl(ao_context->ctrl_reg);
1866 tmp &= ~ME4000_AO_CTRL_BIT_ENABLE_FIFO;
1867 outl(tmp, ao_context->ctrl_reg);
1868 tmp |= ME4000_AO_CTRL_BIT_ENABLE_FIFO;
1869 outl(tmp, ao_context->ctrl_reg);
1870
1871 for (i = 0; i < count; i++) {
1872 if (get_user(value, buffer + i)) {
1873 printk(KERN_ERR
1874 "%s:Cannot copy data from user\n", __func__);
1875 return -EFAULT;
1876 }
1877 if (((ao_context->fifo_reg & 0xFF) == ME4000_AO_01_FIFO_REG)
1878 || ((ao_context->fifo_reg & 0xFF) == ME4000_AO_03_FIFO_REG))
1879 value = value << 16;
1880 outl(value, ao_context->fifo_reg);
1881 }
1882 CALL_PDEBUG("me4000_ao_write_wrap() is leaved with %d\n", i * 2);
1883
1884 return i * 2;
1885 }
1886
1887 static ssize_t me4000_ao_write_cont(struct file *filep, const char *buff,
1888 size_t cnt, loff_t *offp)
1889 {
1890 struct me4000_ao_context *ao_context = filep->private_data;
1891 const u16 *buffer = (const u16 *)buff;
1892 size_t count = cnt / 2;
1893 unsigned long flags;
1894 u32 tmp;
1895 int c = 0;
1896 int k = 0;
1897 int ret = 0;
1898 u16 svalue;
1899 u32 lvalue;
1900 int i;
1901 wait_queue_head_t queue;
1902
1903 CALL_PDEBUG("me4000_ao_write_cont() is executed\n");
1904
1905 init_waitqueue_head(&queue);
1906
1907 /* Check count */
1908 if (count <= 0) {
1909 PDEBUG("me4000_ao_write_cont():Count is 0\n");
1910 return 0;
1911 }
1912
1913 if (filep->f_flags & O_APPEND) {
1914 PDEBUG("me4000_ao_write_cont():Append data to data stream\n");
1915 while (count > 0) {
1916 if (filep->f_flags & O_NONBLOCK) {
1917 if (ao_context->pipe_flag) {
1918 printk(KERN_ERR
1919 "ME4000:me4000_ao_write_cont():Broken pipe in nonblocking write\n");
1920 return -EPIPE;
1921 }
1922 c = me4000_space_to_end(ao_context->circ_buf,
1923 ME4000_AO_BUFFER_COUNT);
1924 if (!c) {
1925 PDEBUG
1926 ("me4000_ao_write_cont():Returning from nonblocking write\n");
1927 break;
1928 }
1929 } else {
1930 wait_event_interruptible(ao_context->wait_queue,
1931 (c =
1932 me4000_space_to_end
1933 (ao_context->circ_buf,
1934 ME4000_AO_BUFFER_COUNT)));
1935 if (ao_context->pipe_flag) {
1936 printk(KERN_ERR
1937 "me4000_ao_write_cont():Broken pipe in blocking write\n");
1938 return -EPIPE;
1939 }
1940 if (signal_pending(current)) {
1941 printk(KERN_ERR
1942 "me4000_ao_write_cont():Wait for free buffer interrupted from signal\n");
1943 return -EINTR;
1944 }
1945 }
1946
1947 PDEBUG("me4000_ao_write_cont():Space to end = %d\n", c);
1948
1949 /* Only able to write size of free buffer or size of count */
1950 if (count < c)
1951 c = count;
1952
1953 k = 2 * c;
1954 k -= copy_from_user(ao_context->circ_buf.buf +
1955 ao_context->circ_buf.head, buffer,
1956 k);
1957 c = k / 2;
1958 PDEBUG
1959 ("me4000_ao_write_cont():Copy %d values from user space\n",
1960 c);
1961
1962 if (!c)
1963 return -EFAULT;
1964
1965 ao_context->circ_buf.head =
1966 (ao_context->circ_buf.head +
1967 c) & (ME4000_AO_BUFFER_COUNT - 1);
1968 buffer += c;
1969 count -= c;
1970 ret += c;
1971
1972 /* Values are now available so enable interrupts */
1973 spin_lock_irqsave(&ao_context->int_lock, flags);
1974 if (me4000_buf_count
1975 (ao_context->circ_buf, ME4000_AO_BUFFER_COUNT)) {
1976 tmp = me4000_inl(ao_context->ctrl_reg);
1977 tmp |= ME4000_AO_CTRL_BIT_ENABLE_IRQ;
1978 me4000_outl(tmp, ao_context->ctrl_reg);
1979 }
1980 spin_unlock_irqrestore(&ao_context->int_lock, flags);
1981 }
1982
1983 /* Wait until the state machine is stopped if O_SYNC is set */
1984 if (filep->f_flags & O_SYNC) {
1985 while (inl(ao_context->status_reg) &
1986 ME4000_AO_STATUS_BIT_FSM) {
1987 interruptible_sleep_on_timeout(&queue, 1);
1988 if (ao_context->pipe_flag) {
1989 PDEBUG
1990 ("me4000_ao_write_cont():Broken pipe detected after sync\n");
1991 return -EPIPE;
1992 }
1993 if (signal_pending(current)) {
1994 printk(KERN_ERR
1995 "me4000_ao_write_cont():Wait on state machine after sync interrupted\n");
1996 return -EINTR;
1997 }
1998 }
1999 }
2000 } else {
2001 PDEBUG("me4000_ao_write_cont():Preload DAC FIFO\n");
2002 if ((me4000_inl(ao_context->status_reg) &
2003 ME4000_AO_STATUS_BIT_FSM)) {
2004 printk(KERN_ERR
2005 "me4000_ao_write_cont():Can't Preload DAC FIFO while conversion is running\n");
2006 return -EBUSY;
2007 }
2008
2009 /* Clear the FIFO */
2010 spin_lock_irqsave(&ao_context->int_lock, flags);
2011 tmp = me4000_inl(ao_context->ctrl_reg);
2012 tmp &=
2013 ~(ME4000_AO_CTRL_BIT_ENABLE_FIFO |
2014 ME4000_AO_CTRL_BIT_ENABLE_IRQ);
2015 me4000_outl(tmp, ao_context->ctrl_reg);
2016 tmp |= ME4000_AO_CTRL_BIT_ENABLE_FIFO;
2017 me4000_outl(tmp, ao_context->ctrl_reg);
2018 spin_unlock_irqrestore(&ao_context->int_lock, flags);
2019
2020 /* Clear the circular buffer */
2021 ao_context->circ_buf.head = 0;
2022 ao_context->circ_buf.tail = 0;
2023
2024 /* Reset the broken pipe flag */
2025 ao_context->pipe_flag = 0;
2026
2027 /* Only able to write size of fifo or count */
2028 c = ME4000_AO_FIFO_COUNT;
2029 if (count < c)
2030 c = count;
2031
2032 PDEBUG
2033 ("me4000_ao_write_cont():Write %d values to DAC on 0x%lX\n",
2034 c, ao_context->fifo_reg);
2035
2036 /* Write values to the fifo */
2037 for (i = 0; i < c; i++) {
2038 if (get_user(svalue, buffer))
2039 return -EFAULT;
2040
2041 if (((ao_context->fifo_reg & 0xFF) ==
2042 ME4000_AO_01_FIFO_REG)
2043 || ((ao_context->fifo_reg & 0xFF) ==
2044 ME4000_AO_03_FIFO_REG)) {
2045 lvalue = ((u32) svalue) << 16;
2046 } else
2047 lvalue = (u32) svalue;
2048
2049 outl(lvalue, ao_context->fifo_reg);
2050 buffer++;
2051 }
2052 count -= c;
2053 ret += c;
2054
2055 while (1) {
2056 /* Get free buffer */
2057 c = me4000_space_to_end(ao_context->circ_buf,
2058 ME4000_AO_BUFFER_COUNT);
2059
2060 if (c == 0)
2061 return (2 * ret);
2062
2063 /* Only able to write size of free buffer or size of count */
2064 if (count < c)
2065 c = count;
2066
2067 /* If count = 0 return to user */
2068 if (c <= 0) {
2069 PDEBUG
2070 ("me4000_ao_write_cont():Count reached 0\n");
2071 break;
2072 }
2073
2074 k = 2 * c;
2075 k -= copy_from_user(ao_context->circ_buf.buf +
2076 ao_context->circ_buf.head, buffer,
2077 k);
2078 c = k / 2;
2079 PDEBUG
2080 ("me4000_ao_write_cont():Wrote %d values to buffer\n",
2081 c);
2082
2083 if (!c)
2084 return -EFAULT;
2085
2086 ao_context->circ_buf.head =
2087 (ao_context->circ_buf.head +
2088 c) & (ME4000_AO_BUFFER_COUNT - 1);
2089 buffer += c;
2090 count -= c;
2091 ret += c;
2092
2093 /* If values in the buffer are available so enable interrupts */
2094 spin_lock_irqsave(&ao_context->int_lock, flags);
2095 if (me4000_buf_count
2096 (ao_context->circ_buf, ME4000_AO_BUFFER_COUNT)) {
2097 PDEBUG
2098 ("me4000_ao_write_cont():Enable Interrupts\n");
2099 tmp = me4000_inl(ao_context->ctrl_reg);
2100 tmp |= ME4000_AO_CTRL_BIT_ENABLE_IRQ;
2101 me4000_outl(tmp, ao_context->ctrl_reg);
2102 }
2103 spin_unlock_irqrestore(&ao_context->int_lock, flags);
2104 }
2105 }
2106
2107 if (filep->f_flags & O_NONBLOCK) {
2108 return (ret == 0) ? -EAGAIN : 2 * ret;
2109 }
2110
2111 return 2 * ret;
2112 }
2113
2114 static unsigned int me4000_ao_poll_cont(struct file *file_p, poll_table *wait)
2115 {
2116 struct me4000_ao_context *ao_context;
2117 unsigned long mask = 0;
2118
2119 CALL_PDEBUG("me4000_ao_poll_cont() is executed\n");
2120
2121 ao_context = file_p->private_data;
2122
2123 poll_wait(file_p, &ao_context->wait_queue, wait);
2124
2125 /* Get free buffer */
2126 if (me4000_space_to_end(ao_context->circ_buf, ME4000_AO_BUFFER_COUNT))
2127 mask |= POLLOUT | POLLWRNORM;
2128
2129 CALL_PDEBUG("me4000_ao_poll_cont():Return mask %lX\n", mask);
2130
2131 return mask;
2132 }
2133
2134 static int me4000_ao_fsync_cont(struct file *file_p, struct dentry *dentry_p,
2135 int datasync)
2136 {
2137 struct me4000_ao_context *ao_context;
2138 wait_queue_head_t queue;
2139
2140 CALL_PDEBUG("me4000_ao_fsync_cont() is executed\n");
2141
2142 ao_context = file_p->private_data;
2143 init_waitqueue_head(&queue);
2144
2145 while (inl(ao_context->status_reg) & ME4000_AO_STATUS_BIT_FSM) {
2146 interruptible_sleep_on_timeout(&queue, 1);
2147 wait_event_interruptible_timeout(queue,
2148 !(inl(ao_context->status_reg) & ME4000_AO_STATUS_BIT_FSM),
2149 1);
2150 if (ao_context->pipe_flag) {
2151 printk(KERN_ERR
2152 "%s:Broken pipe detected\n", __func__);
2153 return -EPIPE;
2154 }
2155
2156 if (signal_pending(current)) {
2157 printk(KERN_ERR
2158 "%s:Wait on state machine interrupted\n",
2159 __func__);
2160 return -EINTR;
2161 }
2162 }
2163
2164 return 0;
2165 }
2166
2167 static int me4000_ao_ioctl_sing(struct inode *inode_p, struct file *file_p,
2168 unsigned int service, unsigned long arg)
2169 {
2170 struct me4000_ao_context *ao_context;
2171
2172 CALL_PDEBUG("me4000_ao_ioctl_sing() is executed\n");
2173
2174 ao_context = file_p->private_data;
2175
2176 if (_IOC_TYPE(service) != ME4000_MAGIC) {
2177 return -ENOTTY;
2178 PDEBUG("me4000_ao_ioctl_sing():Wrong magic number\n");
2179 }
2180
2181 switch (service) {
2182 case ME4000_AO_EX_TRIG_SETUP:
2183 return me4000_ao_ex_trig_set_edge((int *)arg, ao_context);
2184 case ME4000_AO_EX_TRIG_ENABLE:
2185 return me4000_ao_ex_trig_enable(ao_context);
2186 case ME4000_AO_EX_TRIG_DISABLE:
2187 return me4000_ao_ex_trig_disable(ao_context);
2188 case ME4000_AO_PRELOAD:
2189 return me4000_ao_preload(ao_context);
2190 case ME4000_AO_PRELOAD_UPDATE:
2191 return me4000_ao_preload_update(ao_context);
2192 case ME4000_GET_USER_INFO:
2193 return me4000_get_user_info((struct me4000_user_info *)arg,
2194 ao_context->board_info);
2195 case ME4000_AO_SIMULTANEOUS_EX_TRIG:
2196 return me4000_ao_simultaneous_ex_trig(ao_context);
2197 case ME4000_AO_SIMULTANEOUS_SW:
2198 return me4000_ao_simultaneous_sw(ao_context);
2199 case ME4000_AO_SIMULTANEOUS_DISABLE:
2200 return me4000_ao_simultaneous_disable(ao_context);
2201 case ME4000_AO_SIMULTANEOUS_UPDATE:
2202 return
2203 me4000_ao_simultaneous_update(
2204 (struct me4000_ao_channel_list *)arg,
2205 ao_context);
2206 case ME4000_AO_EX_TRIG_TIMEOUT:
2207 return me4000_ao_ex_trig_timeout((unsigned long *)arg,
2208 ao_context);
2209 case ME4000_AO_DISABLE_DO:
2210 return me4000_ao_disable_do(ao_context);
2211 default:
2212 printk(KERN_ERR
2213 "me4000_ao_ioctl_sing():Service number invalid\n");
2214 return -ENOTTY;
2215 }
2216
2217 return 0;
2218 }
2219
2220 static int me4000_ao_ioctl_wrap(struct inode *inode_p, struct file *file_p,
2221 unsigned int service, unsigned long arg)
2222 {
2223 struct me4000_ao_context *ao_context;
2224
2225 CALL_PDEBUG("me4000_ao_ioctl_wrap() is executed\n");
2226
2227 ao_context = file_p->private_data;
2228
2229 if (_IOC_TYPE(service) != ME4000_MAGIC) {
2230 return -ENOTTY;
2231 PDEBUG("me4000_ao_ioctl_wrap():Wrong magic number\n");
2232 }
2233
2234 switch (service) {
2235 case ME4000_AO_START:
2236 return me4000_ao_start((unsigned long *)arg, ao_context);
2237 case ME4000_AO_STOP:
2238 return me4000_ao_stop(ao_context);
2239 case ME4000_AO_IMMEDIATE_STOP:
2240 return me4000_ao_immediate_stop(ao_context);
2241 case ME4000_AO_RESET:
2242 return me4000_ao_reset(ao_context);
2243 case ME4000_AO_TIMER_SET_DIVISOR:
2244 return me4000_ao_timer_set_divisor((u32 *) arg, ao_context);
2245 case ME4000_AO_EX_TRIG_SETUP:
2246 return me4000_ao_ex_trig_set_edge((int *)arg, ao_context);
2247 case ME4000_AO_EX_TRIG_ENABLE:
2248 return me4000_ao_ex_trig_enable(ao_context);
2249 case ME4000_AO_EX_TRIG_DISABLE:
2250 return me4000_ao_ex_trig_disable(ao_context);
2251 case ME4000_GET_USER_INFO:
2252 return me4000_get_user_info((struct me4000_user_info *)arg,
2253 ao_context->board_info);
2254 case ME4000_AO_FSM_STATE:
2255 return me4000_ao_fsm_state((int *)arg, ao_context);
2256 case ME4000_AO_ENABLE_DO:
2257 return me4000_ao_enable_do(ao_context);
2258 case ME4000_AO_DISABLE_DO:
2259 return me4000_ao_disable_do(ao_context);
2260 case ME4000_AO_SYNCHRONOUS_EX_TRIG:
2261 return me4000_ao_synchronous_ex_trig(ao_context);
2262 case ME4000_AO_SYNCHRONOUS_SW:
2263 return me4000_ao_synchronous_sw(ao_context);
2264 case ME4000_AO_SYNCHRONOUS_DISABLE:
2265 return me4000_ao_synchronous_disable(ao_context);
2266 default:
2267 return -ENOTTY;
2268 }
2269 return 0;
2270 }
2271
2272 static int me4000_ao_ioctl_cont(struct inode *inode_p, struct file *file_p,
2273 unsigned int service, unsigned long arg)
2274 {
2275 struct me4000_ao_context *ao_context;
2276
2277 CALL_PDEBUG("me4000_ao_ioctl_cont() is executed\n");
2278
2279 ao_context = file_p->private_data;
2280
2281 if (_IOC_TYPE(service) != ME4000_MAGIC) {
2282 return -ENOTTY;
2283 PDEBUG("me4000_ao_ioctl_cont():Wrong magic number\n");
2284 }
2285
2286 switch (service) {
2287 case ME4000_AO_START:
2288 return me4000_ao_start((unsigned long *)arg, ao_context);
2289 case ME4000_AO_STOP:
2290 return me4000_ao_stop(ao_context);
2291 case ME4000_AO_IMMEDIATE_STOP:
2292 return me4000_ao_immediate_stop(ao_context);
2293 case ME4000_AO_RESET:
2294 return me4000_ao_reset(ao_context);
2295 case ME4000_AO_TIMER_SET_DIVISOR:
2296 return me4000_ao_timer_set_divisor((u32 *) arg, ao_context);
2297 case ME4000_AO_EX_TRIG_SETUP:
2298 return me4000_ao_ex_trig_set_edge((int *)arg, ao_context);
2299 case ME4000_AO_EX_TRIG_ENABLE:
2300 return me4000_ao_ex_trig_enable(ao_context);
2301 case ME4000_AO_EX_TRIG_DISABLE:
2302 return me4000_ao_ex_trig_disable(ao_context);
2303 case ME4000_AO_ENABLE_DO:
2304 return me4000_ao_enable_do(ao_context);
2305 case ME4000_AO_DISABLE_DO:
2306 return me4000_ao_disable_do(ao_context);
2307 case ME4000_AO_FSM_STATE:
2308 return me4000_ao_fsm_state((int *)arg, ao_context);
2309 case ME4000_GET_USER_INFO:
2310 return me4000_get_user_info((struct me4000_user_info *)arg,
2311 ao_context->board_info);
2312 case ME4000_AO_SYNCHRONOUS_EX_TRIG:
2313 return me4000_ao_synchronous_ex_trig(ao_context);
2314 case ME4000_AO_SYNCHRONOUS_SW:
2315 return me4000_ao_synchronous_sw(ao_context);
2316 case ME4000_AO_SYNCHRONOUS_DISABLE:
2317 return me4000_ao_synchronous_disable(ao_context);
2318 case ME4000_AO_GET_FREE_BUFFER:
2319 return me4000_ao_get_free_buffer((unsigned long *)arg,
2320 ao_context);
2321 default:
2322 return -ENOTTY;
2323 }
2324 return 0;
2325 }
2326
2327 static int me4000_ao_start(unsigned long *arg,
2328 struct me4000_ao_context *ao_context)
2329 {
2330 u32 tmp;
2331 wait_queue_head_t queue;
2332 unsigned long ref;
2333 unsigned long timeout;
2334 unsigned long flags;
2335
2336 CALL_PDEBUG("me4000_ao_start() is executed\n");
2337
2338 if (get_user(timeout, arg)) {
2339 printk(KERN_ERR
2340 "me4000_ao_start():Cannot copy data from user\n");
2341 return -EFAULT;
2342 }
2343
2344 init_waitqueue_head(&queue);
2345
2346 spin_lock_irqsave(&ao_context->int_lock, flags);
2347 tmp = inl(ao_context->ctrl_reg);
2348 tmp &= ~(ME4000_AO_CTRL_BIT_STOP | ME4000_AO_CTRL_BIT_IMMEDIATE_STOP);
2349 me4000_outl(tmp, ao_context->ctrl_reg);
2350 spin_unlock_irqrestore(&ao_context->int_lock, flags);
2351
2352 if ((tmp & ME4000_AO_CTRL_BIT_ENABLE_EX_TRIG)) {
2353 if (timeout) {
2354 ref = jiffies;
2355 while (!
2356 (inl(ao_context->status_reg) &
2357 ME4000_AO_STATUS_BIT_FSM)) {
2358 interruptible_sleep_on_timeout(&queue, 1);
2359 if (signal_pending(current)) {
2360 printk(KERN_ERR
2361 "ME4000:me4000_ao_start():Wait on start of state machine interrupted\n");
2362 return -EINTR;
2363 }
2364 if (((jiffies - ref) > (timeout * HZ / USER_HZ))) { // 2.6 has diffrent definitions for HZ in user and kernel space
2365 printk(KERN_ERR
2366 "ME4000:me4000_ao_start():Timeout reached\n");
2367 return -EIO;
2368 }
2369 }
2370 }
2371 } else {
2372 me4000_outl(0x8000, ao_context->single_reg);
2373 }
2374
2375 return 0;
2376 }
2377
2378 static int me4000_ao_stop(struct me4000_ao_context *ao_context)
2379 {
2380 u32 tmp;
2381 wait_queue_head_t queue;
2382 unsigned long flags;
2383
2384 init_waitqueue_head(&queue);
2385
2386 CALL_PDEBUG("me4000_ao_stop() is executed\n");
2387
2388 /* Set the stop bit */
2389 spin_lock_irqsave(&ao_context->int_lock, flags);
2390 tmp = inl(ao_context->ctrl_reg);
2391 tmp |= ME4000_AO_CTRL_BIT_STOP;
2392 me4000_outl(tmp, ao_context->ctrl_reg);
2393 spin_unlock_irqrestore(&ao_context->int_lock, flags);
2394
2395 while (inl(ao_context->status_reg) & ME4000_AO_STATUS_BIT_FSM) {
2396 interruptible_sleep_on_timeout(&queue, 1);
2397 if (signal_pending(current)) {
2398 printk(KERN_ERR
2399 "me4000_ao_stop():Wait on state machine after stop interrupted\n");
2400 return -EINTR;
2401 }
2402 }
2403
2404 /* Clear the stop bit */
2405 //tmp &= ~ME4000_AO_CTRL_BIT_STOP;
2406 //me4000_outl(tmp, ao_context->ctrl_reg);
2407
2408 return 0;
2409 }
2410
2411 static int me4000_ao_immediate_stop(struct me4000_ao_context *ao_context)
2412 {
2413 u32 tmp;
2414 wait_queue_head_t queue;
2415 unsigned long flags;
2416
2417 init_waitqueue_head(&queue);
2418
2419 CALL_PDEBUG("me4000_ao_immediate_stop() is executed\n");
2420
2421 spin_lock_irqsave(&ao_context->int_lock, flags);
2422 tmp = inl(ao_context->ctrl_reg);
2423 tmp |= ME4000_AO_CTRL_BIT_STOP | ME4000_AO_CTRL_BIT_IMMEDIATE_STOP;
2424 me4000_outl(tmp, ao_context->ctrl_reg);
2425 spin_unlock_irqrestore(&ao_context->int_lock, flags);
2426
2427 while (inl(ao_context->status_reg) & ME4000_AO_STATUS_BIT_FSM) {
2428 interruptible_sleep_on_timeout(&queue, 1);
2429 if (signal_pending(current)) {
2430 printk(KERN_ERR
2431 "me4000_ao_immediate_stop():Wait on state machine after stop interrupted\n");
2432 return -EINTR;
2433 }
2434 }
2435
2436 /* Clear the stop bits */
2437 //tmp &= ~(ME4000_AO_CTRL_BIT_STOP | ME4000_AO_CTRL_BIT_IMMEDIATE_STOP);
2438 //me4000_outl(tmp, ao_context->ctrl_reg);
2439
2440 return 0;
2441 }
2442
2443 static int me4000_ao_timer_set_divisor(u32 *arg,
2444 struct me4000_ao_context *ao_context)
2445 {
2446 u32 divisor;
2447 u32 tmp;
2448
2449 CALL_PDEBUG("me4000_ao_timer set_divisor() is executed\n");
2450
2451 if (get_user(divisor, arg))
2452 return -EFAULT;
2453
2454 /* Check if the state machine is stopped */
2455 tmp = me4000_inl(ao_context->status_reg);
2456 if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2457 printk(KERN_ERR
2458 "me4000_ao_timer_set_divisor():Can't set timer while DAC is running\n");
2459 return -EBUSY;
2460 }
2461
2462 PDEBUG("me4000_ao_timer set_divisor():Divisor from user = %d\n",
2463 divisor);
2464
2465 /* Check if the divisor is right. ME4000_AO_MIN_TICKS is the lowest */
2466 if (divisor < ME4000_AO_MIN_TICKS) {
2467 printk(KERN_ERR
2468 "ME4000:me4000_ao_timer set_divisor():Divisor to low\n");
2469 return -EINVAL;
2470 }
2471
2472 /* Fix bug in Firmware */
2473 divisor -= 2;
2474
2475 PDEBUG("me4000_ao_timer set_divisor():Divisor to HW = %d\n", divisor);
2476
2477 /* Write the divisor */
2478 me4000_outl(divisor, ao_context->timer_reg);
2479
2480 return 0;
2481 }
2482
2483 static int me4000_ao_ex_trig_set_edge(int *arg,
2484 struct me4000_ao_context *ao_context)
2485 {
2486 int mode;
2487 u32 tmp;
2488 unsigned long flags;
2489
2490 CALL_PDEBUG("me4000_ao_ex_trig_set_edge() is executed\n");
2491
2492 if (get_user(mode, arg))
2493 return -EFAULT;
2494
2495 /* Check if the state machine is stopped */
2496 tmp = me4000_inl(ao_context->status_reg);
2497 if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2498 printk(KERN_ERR
2499 "me4000_ao_ex_trig_set_edge():Can't set trigger while DAC is running\n");
2500 return -EBUSY;
2501 }
2502
2503 if (mode == ME4000_AO_TRIGGER_EXT_EDGE_RISING) {
2504 spin_lock_irqsave(&ao_context->int_lock, flags);
2505 tmp = me4000_inl(ao_context->ctrl_reg);
2506 tmp &=
2507 ~(ME4000_AO_CTRL_BIT_EX_TRIG_EDGE |
2508 ME4000_AO_CTRL_BIT_EX_TRIG_BOTH);
2509 me4000_outl(tmp, ao_context->ctrl_reg);
2510 spin_unlock_irqrestore(&ao_context->int_lock, flags);
2511 } else if (mode == ME4000_AO_TRIGGER_EXT_EDGE_FALLING) {
2512 spin_lock_irqsave(&ao_context->int_lock, flags);
2513 tmp = me4000_inl(ao_context->ctrl_reg);
2514 tmp &= ~ME4000_AO_CTRL_BIT_EX_TRIG_BOTH;
2515 tmp |= ME4000_AO_CTRL_BIT_EX_TRIG_EDGE;
2516 me4000_outl(tmp, ao_context->ctrl_reg);
2517 spin_unlock_irqrestore(&ao_context->int_lock, flags);
2518 } else if (mode == ME4000_AO_TRIGGER_EXT_EDGE_BOTH) {
2519 spin_lock_irqsave(&ao_context->int_lock, flags);
2520 tmp = me4000_inl(ao_context->ctrl_reg);
2521 tmp |=
2522 ME4000_AO_CTRL_BIT_EX_TRIG_EDGE |
2523 ME4000_AO_CTRL_BIT_EX_TRIG_BOTH;
2524 me4000_outl(tmp, ao_context->ctrl_reg);
2525 spin_unlock_irqrestore(&ao_context->int_lock, flags);
2526 } else {
2527 printk(KERN_ERR
2528 "me4000_ao_ex_trig_set_edge():Invalid trigger mode\n");
2529 return -EINVAL;
2530 }
2531
2532 return 0;
2533 }
2534
2535 static int me4000_ao_ex_trig_enable(struct me4000_ao_context *ao_context)
2536 {
2537 u32 tmp;
2538 unsigned long flags;
2539
2540 CALL_PDEBUG("me4000_ao_ex_trig_enable() is executed\n");
2541
2542 /* Check if the state machine is stopped */
2543 tmp = me4000_inl(ao_context->status_reg);
2544 if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2545 printk(KERN_ERR
2546 "me4000_ao_ex_trig_enable():Can't enable trigger while DAC is running\n");
2547 return -EBUSY;
2548 }
2549
2550 spin_lock_irqsave(&ao_context->int_lock, flags);
2551 tmp = me4000_inl(ao_context->ctrl_reg);
2552 tmp |= ME4000_AO_CTRL_BIT_ENABLE_EX_TRIG;
2553 me4000_outl(tmp, ao_context->ctrl_reg);
2554 spin_unlock_irqrestore(&ao_context->int_lock, flags);
2555
2556 return 0;
2557 }
2558
2559 static int me4000_ao_ex_trig_disable(struct me4000_ao_context *ao_context)
2560 {
2561 u32 tmp;
2562 unsigned long flags;
2563
2564 CALL_PDEBUG("me4000_ao_ex_trig_disable() is executed\n");
2565
2566 /* Check if the state machine is stopped */
2567 tmp = me4000_inl(ao_context->status_reg);
2568 if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2569 printk(KERN_ERR
2570 "me4000_ao_ex_trig_disable():Can't disable trigger while DAC is running\n");
2571 return -EBUSY;
2572 }
2573
2574 spin_lock_irqsave(&ao_context->int_lock, flags);
2575 tmp = me4000_inl(ao_context->ctrl_reg);
2576 tmp &= ~ME4000_AO_CTRL_BIT_ENABLE_EX_TRIG;
2577 me4000_outl(tmp, ao_context->ctrl_reg);
2578 spin_unlock_irqrestore(&ao_context->int_lock, flags);
2579
2580 return 0;
2581 }
2582
2583 static int me4000_ao_simultaneous_disable(struct me4000_ao_context *ao_context)
2584 {
2585 u32 tmp;
2586
2587 CALL_PDEBUG("me4000_ao_simultaneous_disable() is executed\n");
2588
2589 /* Check if the state machine is stopped */
2590 /* Be careful here because this function is called from
2591 me4000_ao_synchronous disable */
2592 tmp = me4000_inl(ao_context->status_reg);
2593 if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2594 printk(KERN_ERR
2595 "me4000_ao_simultaneous_disable():Can't disable while DAC is running\n");
2596 return -EBUSY;
2597 }
2598
2599 spin_lock(&ao_context->board_info->preload_lock);
2600 tmp = me4000_inl(ao_context->preload_reg);
2601 tmp &= ~(0x1 << ao_context->index); // Disable preload bit
2602 tmp &= ~(0x1 << (ao_context->index + 16)); // Disable hw simultaneous bit
2603 me4000_outl(tmp, ao_context->preload_reg);
2604 spin_unlock(&ao_context->board_info->preload_lock);
2605
2606 return 0;
2607 }
2608
2609 static int me4000_ao_simultaneous_ex_trig(struct me4000_ao_context *ao_context)
2610 {
2611 u32 tmp;
2612
2613 CALL_PDEBUG("me4000_ao_simultaneous_ex_trig() is executed\n");
2614
2615 spin_lock(&ao_context->board_info->preload_lock);
2616 tmp = me4000_inl(ao_context->preload_reg);
2617 tmp |= (0x1 << ao_context->index); // Enable preload bit
2618 tmp |= (0x1 << (ao_context->index + 16)); // Enable hw simultaneous bit
2619 me4000_outl(tmp, ao_context->preload_reg);
2620 spin_unlock(&ao_context->board_info->preload_lock);
2621
2622 return 0;
2623 }
2624
2625 static int me4000_ao_simultaneous_sw(struct me4000_ao_context *ao_context)
2626 {
2627 u32 tmp;
2628
2629 CALL_PDEBUG("me4000_ao_simultaneous_sw() is executed\n");
2630
2631 spin_lock(&ao_context->board_info->preload_lock);
2632 tmp = me4000_inl(ao_context->preload_reg);
2633 tmp |= (0x1 << ao_context->index); // Enable preload bit
2634 tmp &= ~(0x1 << (ao_context->index + 16)); // Disable hw simultaneous bit
2635 me4000_outl(tmp, ao_context->preload_reg);
2636 spin_unlock(&ao_context->board_info->preload_lock);
2637
2638 return 0;
2639 }
2640
2641 static int me4000_ao_preload(struct me4000_ao_context *ao_context)
2642 {
2643 CALL_PDEBUG("me4000_ao_preload() is executed\n");
2644 return me4000_ao_simultaneous_sw(ao_context);
2645 }
2646
2647 static int me4000_ao_preload_update(struct me4000_ao_context *ao_context)
2648 {
2649 u32 tmp;
2650 u32 ctrl;
2651 struct list_head *entry;
2652
2653 CALL_PDEBUG("me4000_ao_preload_update() is executed\n");
2654
2655 spin_lock(&ao_context->board_info->preload_lock);
2656 tmp = me4000_inl(ao_context->preload_reg);
2657 list_for_each(entry, &ao_context->board_info->ao_context_list) {
2658 /* The channels we update must be in the following state :
2659 - Mode A
2660 - Hardware trigger is disabled
2661 - Corresponding simultaneous bit is reset
2662 */
2663 ctrl = me4000_inl(ao_context->ctrl_reg);
2664 if (!
2665 (ctrl &
2666 (ME4000_AO_CTRL_BIT_MODE_0 | ME4000_AO_CTRL_BIT_MODE_1 |
2667 ME4000_AO_CTRL_BIT_ENABLE_EX_TRIG))) {
2668 if (!
2669 (tmp &
2670 (0x1 <<
2671 (((struct me4000_ao_context *)entry)->index
2672 + 16)))) {
2673 tmp &=
2674 ~(0x1 <<
2675 (((struct me4000_ao_context *)entry)->
2676 index));
2677 }
2678 }
2679 }
2680 me4000_outl(tmp, ao_context->preload_reg);
2681 spin_unlock(&ao_context->board_info->preload_lock);
2682
2683 return 0;
2684 }
2685
2686 static int me4000_ao_simultaneous_update(struct me4000_ao_channel_list *arg,
2687 struct me4000_ao_context *ao_context)
2688 {
2689 int err;
2690 int i;
2691 u32 tmp;
2692 struct me4000_ao_channel_list channels;
2693
2694 CALL_PDEBUG("me4000_ao_simultaneous_update() is executed\n");
2695
2696 /* Copy data from user */
2697 err = copy_from_user(&channels, arg,
2698 sizeof(struct me4000_ao_channel_list));
2699 if (err) {
2700 printk(KERN_ERR
2701 "ME4000:me4000_ao_simultaneous_update():Can't copy command\n");
2702 return -EFAULT;
2703 }
2704
2705 channels.list =
2706 kzalloc(sizeof(unsigned long) * channels.count, GFP_KERNEL);
2707 if (!channels.list) {
2708 printk(KERN_ERR
2709 "ME4000:me4000_ao_simultaneous_update():Can't get buffer\n");
2710 return -ENOMEM;
2711 }
2712
2713 /* Copy channel list from user */
2714 err =
2715 copy_from_user(channels.list, arg->list,
2716 sizeof(unsigned long) * channels.count);
2717 if (err) {
2718 printk(KERN_ERR
2719 "ME4000:me4000_ao_simultaneous_update():Can't copy list\n");
2720 kfree(channels.list);
2721 return -EFAULT;
2722 }
2723
2724 spin_lock(&ao_context->board_info->preload_lock);
2725 tmp = me4000_inl(ao_context->preload_reg);
2726 for (i = 0; i < channels.count; i++) {
2727 if (channels.list[i] >
2728 ao_context->board_info->board_p->ao.count) {
2729 spin_unlock(&ao_context->board_info->preload_lock);
2730 kfree(channels.list);
2731 printk(KERN_ERR
2732 "ME4000:me4000_ao_simultaneous_update():Invalid board number specified\n");
2733 return -EFAULT;
2734 }
2735 tmp &= ~(0x1 << channels.list[i]); // Clear the preload bit
2736 tmp &= ~(0x1 << (channels.list[i] + 16)); // Clear the hw simultaneous bit
2737 }
2738 me4000_outl(tmp, ao_context->preload_reg);
2739 spin_unlock(&ao_context->board_info->preload_lock);
2740 kfree(channels.list);
2741
2742 return 0;
2743 }
2744
2745 static int me4000_ao_synchronous_ex_trig(struct me4000_ao_context *ao_context)
2746 {
2747 u32 tmp;
2748 unsigned long flags;
2749
2750 CALL_PDEBUG("me4000_ao_synchronous_ex_trig() is executed\n");
2751
2752 /* Check if the state machine is stopped */
2753 tmp = me4000_inl(ao_context->status_reg);
2754 if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2755 printk(KERN_ERR
2756 "me4000_ao_synchronous_ex_trig(): DAC is running\n");
2757 return -EBUSY;
2758 }
2759
2760 spin_lock(&ao_context->board_info->preload_lock);
2761 tmp = me4000_inl(ao_context->preload_reg);
2762 tmp &= ~(0x1 << ao_context->index); // Disable synchronous sw bit
2763 tmp |= 0x1 << (ao_context->index + 16); // Enable synchronous hw bit
2764 me4000_outl(tmp, ao_context->preload_reg);
2765 spin_unlock(&ao_context->board_info->preload_lock);
2766
2767 /* Make runnable */
2768 spin_lock_irqsave(&ao_context->int_lock, flags);
2769 tmp = me4000_inl(ao_context->ctrl_reg);
2770 if (tmp & (ME4000_AO_CTRL_BIT_MODE_0 | ME4000_AO_CTRL_BIT_MODE_1)) {
2771 tmp &=
2772 ~(ME4000_AO_CTRL_BIT_STOP |
2773 ME4000_AO_CTRL_BIT_IMMEDIATE_STOP);
2774 me4000_outl(tmp, ao_context->ctrl_reg);
2775 }
2776 spin_unlock_irqrestore(&ao_context->int_lock, flags);
2777
2778 return 0;
2779 }
2780
2781 static int me4000_ao_synchronous_sw(struct me4000_ao_context *ao_context)
2782 {
2783 u32 tmp;
2784 unsigned long flags;
2785
2786 CALL_PDEBUG("me4000_ao_synchronous_sw() is executed\n");
2787
2788 /* Check if the state machine is stopped */
2789 tmp = me4000_inl(ao_context->status_reg);
2790 if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2791 printk(KERN_ERR "me4000_ao_synchronous_sw(): DAC is running\n");
2792 return -EBUSY;
2793 }
2794
2795 spin_lock(&ao_context->board_info->preload_lock);
2796 tmp = me4000_inl(ao_context->preload_reg);
2797 tmp |= 0x1 << ao_context->index; // Enable synchronous sw bit
2798 tmp &= ~(0x1 << (ao_context->index + 16)); // Disable synchronous hw bit
2799 me4000_outl(tmp, ao_context->preload_reg);
2800 spin_unlock(&ao_context->board_info->preload_lock);
2801
2802 /* Make runnable */
2803 spin_lock_irqsave(&ao_context->int_lock, flags);
2804 tmp = me4000_inl(ao_context->ctrl_reg);
2805 if (tmp & (ME4000_AO_CTRL_BIT_MODE_0 | ME4000_AO_CTRL_BIT_MODE_1)) {
2806 tmp &=
2807 ~(ME4000_AO_CTRL_BIT_STOP |
2808 ME4000_AO_CTRL_BIT_IMMEDIATE_STOP);
2809 me4000_outl(tmp, ao_context->ctrl_reg);
2810 }
2811 spin_unlock_irqrestore(&ao_context->int_lock, flags);
2812
2813 return 0;
2814 }
2815
2816 static int me4000_ao_synchronous_disable(struct me4000_ao_context *ao_context)
2817 {
2818 return me4000_ao_simultaneous_disable(ao_context);
2819 }
2820
2821 static int me4000_ao_get_free_buffer(unsigned long *arg,
2822 struct me4000_ao_context *ao_context)
2823 {
2824 unsigned long c;
2825 int err;
2826
2827 c = me4000_buf_space(ao_context->circ_buf, ME4000_AO_BUFFER_COUNT);
2828
2829 err = copy_to_user(arg, &c, sizeof(unsigned long));
2830 if (err) {
2831 printk(KERN_ERR
2832 "%s:Can't copy to user space\n", __func__);
2833 return -EFAULT;
2834 }
2835
2836 return 0;
2837 }
2838
2839 static int me4000_ao_ex_trig_timeout(unsigned long *arg,
2840 struct me4000_ao_context *ao_context)
2841 {
2842 u32 tmp;
2843 wait_queue_head_t queue;
2844 unsigned long ref;
2845 unsigned long timeout;
2846
2847 CALL_PDEBUG("me4000_ao_ex_trig_timeout() is executed\n");
2848
2849 if (get_user(timeout, arg)) {
2850 printk(KERN_ERR
2851 "me4000_ao_ex_trig_timeout():Cannot copy data from user\n");
2852 return -EFAULT;
2853 }
2854
2855 init_waitqueue_head(&queue);
2856
2857 tmp = inl(ao_context->ctrl_reg);
2858
2859 if ((tmp & ME4000_AO_CTRL_BIT_ENABLE_EX_TRIG)) {
2860 if (timeout) {
2861 ref = jiffies;
2862 while ((inl(ao_context->status_reg) &
2863 ME4000_AO_STATUS_BIT_FSM)) {
2864 interruptible_sleep_on_timeout(&queue, 1);
2865 if (signal_pending(current)) {
2866 printk(KERN_ERR
2867 "ME4000:me4000_ao_ex_trig_timeout():Wait on start of state machine interrupted\n");
2868 return -EINTR;
2869 }
2870 if (((jiffies - ref) > (timeout * HZ / USER_HZ))) { // 2.6 has diffrent definitions for HZ in user and kernel space
2871 printk(KERN_ERR
2872 "ME4000:me4000_ao_ex_trig_timeout():Timeout reached\n");
2873 return -EIO;
2874 }
2875 }
2876 } else {
2877 while ((inl(ao_context->status_reg) &
2878 ME4000_AO_STATUS_BIT_FSM)) {
2879 interruptible_sleep_on_timeout(&queue, 1);
2880 if (signal_pending(current)) {
2881 printk(KERN_ERR
2882 "ME4000:me4000_ao_ex_trig_timeout():Wait on start of state machine interrupted\n");
2883 return -EINTR;
2884 }
2885 }
2886 }
2887 } else {
2888 printk(KERN_ERR
2889 "ME4000:me4000_ao_ex_trig_timeout():External Trigger is not enabled\n");
2890 return -EINVAL;
2891 }
2892
2893 return 0;
2894 }
2895
2896 static int me4000_ao_enable_do(struct me4000_ao_context *ao_context)
2897 {
2898 u32 tmp;
2899 unsigned long flags;
2900
2901 CALL_PDEBUG("me4000_ao_enable_do() is executed\n");
2902
2903 /* Only available for analog output 3 */
2904 if (ao_context->index != 3) {
2905 printk(KERN_ERR
2906 "me4000_ao_enable_do():Only available for analog output 3\n");
2907 return -ENOTTY;
2908 }
2909
2910 /* Check if the state machine is stopped */
2911 tmp = me4000_inl(ao_context->status_reg);
2912 if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2913 printk(KERN_ERR "me4000_ao_enable_do(): DAC is running\n");
2914 return -EBUSY;
2915 }
2916
2917 /* Set the stop bit */
2918 spin_lock_irqsave(&ao_context->int_lock, flags);
2919 tmp = inl(ao_context->ctrl_reg);
2920 tmp |= ME4000_AO_CTRL_BIT_ENABLE_DO;
2921 me4000_outl(tmp, ao_context->ctrl_reg);
2922 spin_unlock_irqrestore(&ao_context->int_lock, flags);
2923
2924 return 0;
2925 }
2926
2927 static int me4000_ao_disable_do(struct me4000_ao_context *ao_context)
2928 {
2929 u32 tmp;
2930 unsigned long flags;
2931
2932 CALL_PDEBUG("me4000_ao_disable_do() is executed\n");
2933
2934 /* Only available for analog output 3 */
2935 if (ao_context->index != 3) {
2936 printk(KERN_ERR
2937 "me4000_ao_disable():Only available for analog output 3\n");
2938 return -ENOTTY;
2939 }
2940
2941 /* Check if the state machine is stopped */
2942 tmp = me4000_inl(ao_context->status_reg);
2943 if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2944 printk(KERN_ERR "me4000_ao_disable_do(): DAC is running\n");
2945 return -EBUSY;
2946 }
2947
2948 spin_lock_irqsave(&ao_context->int_lock, flags);
2949 tmp = inl(ao_context->ctrl_reg);
2950 tmp &= ~(ME4000_AO_CTRL_BIT_ENABLE_DO);
2951 me4000_outl(tmp, ao_context->ctrl_reg);
2952 spin_unlock_irqrestore(&ao_context->int_lock, flags);
2953
2954 return 0;
2955 }
2956
2957 static int me4000_ao_fsm_state(int *arg, struct me4000_ao_context *ao_context)
2958 {
2959 unsigned long tmp;
2960
2961 CALL_PDEBUG("me4000_ao_fsm_state() is executed\n");
2962
2963 tmp =
2964 (me4000_inl(ao_context->status_reg) & ME4000_AO_STATUS_BIT_FSM) ? 1
2965 : 0;
2966
2967 if (ao_context->pipe_flag) {
2968 printk(KERN_ERR "me4000_ao_fsm_state():Broken pipe detected\n");
2969 return -EPIPE;
2970 }
2971
2972 if (put_user(tmp, arg)) {
2973 printk(KERN_ERR "me4000_ao_fsm_state():Cannot copy to user\n");
2974 return -EFAULT;
2975 }
2976
2977 return 0;
2978 }
2979
2980 /*------------------------- Analog input stuff -------------------------------*/
2981
2982 static int me4000_ai_prepare(struct me4000_ai_context *ai_context)
2983 {
2984 wait_queue_head_t queue;
2985 int err;
2986
2987 CALL_PDEBUG("me4000_ai_prepare() is executed\n");
2988
2989 init_waitqueue_head(&queue);
2990
2991 /* Set the new mode and stop bits */
2992 me4000_outl(ai_context->
2993 mode | ME4000_AI_CTRL_BIT_STOP |
2994 ME4000_AI_CTRL_BIT_IMMEDIATE_STOP, ai_context->ctrl_reg);
2995
2996 /* Set the timer registers */
2997 ai_context->chan_timer = 66;
2998 ai_context->chan_pre_timer = 66;
2999 ai_context->scan_timer_low = 0;
3000 ai_context->scan_timer_high = 0;
3001
3002 me4000_outl(65, ai_context->chan_timer_reg);
3003 me4000_outl(65, ai_context->chan_pre_timer_reg);
3004 me4000_outl(0, ai_context->scan_timer_low_reg);
3005 me4000_outl(0, ai_context->scan_timer_high_reg);
3006 me4000_outl(0, ai_context->scan_pre_timer_low_reg);
3007 me4000_outl(0, ai_context->scan_pre_timer_high_reg);
3008
3009 ai_context->channel_list_count = 0;
3010
3011 if (ai_context->mode) {
3012 /* Request the interrupt line */
3013 err =
3014 request_irq(ai_context->irq, me4000_ai_isr,
3015 IRQF_DISABLED | IRQF_SHARED, ME4000_NAME,
3016 ai_context);
3017 if (err) {
3018 printk(KERN_ERR
3019 "ME4000:me4000_ai_prepare():Can't get interrupt line");
3020 return -ENODEV;
3021 }
3022
3023 /* Allocate circular buffer */
3024 ai_context->circ_buf.buf =
3025 kzalloc(ME4000_AI_BUFFER_SIZE, GFP_KERNEL);
3026 if (!ai_context->circ_buf.buf) {
3027 printk(KERN_ERR
3028 "ME4000:me4000_ai_prepare():Can't get circular buffer\n");
3029 free_irq(ai_context->irq, ai_context);
3030 return -ENOMEM;
3031 }
3032
3033 /* Clear the circular buffer */
3034 ai_context->circ_buf.head = 0;
3035 ai_context->circ_buf.tail = 0;
3036 }
3037
3038 return 0;
3039 }
3040
3041 static int me4000_ai_reset(struct me4000_ai_context *ai_context)
3042 {
3043 wait_queue_head_t queue;
3044 u32 tmp;
3045 unsigned long flags;
3046
3047 CALL_PDEBUG("me4000_ai_reset() is executed\n");
3048
3049 init_waitqueue_head(&queue);
3050
3051 /*
3052 * First stop conversion of the state machine before reconfigure.
3053 * If not stopped before configuring mode, it could
3054 * walk in a undefined state.
3055 */
3056 spin_lock_irqsave(&ai_context->int_lock, flags);
3057 tmp = me4000_inl(ai_context->ctrl_reg);
3058 tmp |= ME4000_AI_CTRL_BIT_IMMEDIATE_STOP;
3059 me4000_outl(tmp, ai_context->ctrl_reg);
3060 spin_unlock_irqrestore(&ai_context->int_lock, flags);
3061
3062 while (inl(ai_context->status_reg) & ME4000_AI_STATUS_BIT_FSM) {
3063 interruptible_sleep_on_timeout(&queue, 1);
3064 if (signal_pending(current)) {
3065 printk(KERN_ERR
3066 "me4000_ai_reset():Wait on state machine after stop interrupted\n");
3067 return -EINTR;
3068 }
3069 }
3070
3071 /* Clear the control register and set the stop bits */
3072 spin_lock_irqsave(&ai_context->int_lock, flags);
3073 tmp = me4000_inl(ai_context->ctrl_reg);
3074 me4000_outl(ME4000_AI_CTRL_BIT_IMMEDIATE_STOP | ME4000_AI_CTRL_BIT_STOP,
3075 ai_context->ctrl_reg);
3076 spin_unlock_irqrestore(&ai_context->int_lock, flags);
3077
3078 /* Reset timer registers */
3079 ai_context->chan_timer = 66;
3080 ai_context->chan_pre_timer = 66;
3081 ai_context->scan_timer_low = 0;
3082 ai_context->scan_timer_high = 0;
3083 ai_context->sample_counter = 0;
3084 ai_context->sample_counter_reload = 0;
3085
3086 me4000_outl(65, ai_context->chan_timer_reg);
3087 me4000_outl(65, ai_context->chan_pre_timer_reg);
3088 me4000_outl(0, ai_context->scan_timer_low_reg);
3089 me4000_outl(0, ai_context->scan_timer_high_reg);
3090 me4000_outl(0, ai_context->scan_pre_timer_low_reg);
3091 me4000_outl(0, ai_context->scan_pre_timer_high_reg);
3092 me4000_outl(0, ai_context->sample_counter_reg);
3093
3094 ai_context->channel_list_count = 0;
3095
3096 /* Clear the circular buffer */
3097 ai_context->circ_buf.head = 0;
3098 ai_context->circ_buf.tail = 0;
3099
3100 return 0;
3101 }
3102
3103 static int me4000_ai_ioctl_sing(struct inode *inode_p, struct file *file_p,
3104 unsigned int service, unsigned long arg)
3105 {
3106 struct me4000_ai_context *ai_context;
3107
3108 CALL_PDEBUG("me4000_ai_ioctl_sing() is executed\n");
3109
3110 ai_context = file_p->private_data;
3111
3112 if (_IOC_TYPE(service) != ME4000_MAGIC) {
3113 printk(KERN_ERR "me4000_ai_ioctl_sing():Wrong magic number\n");
3114 return -ENOTTY;
3115 }
3116 if (_IOC_NR(service) > ME4000_IOCTL_MAXNR) {
3117 printk(KERN_ERR
3118 "me4000_ai_ioctl_sing():Service number to high\n");
3119 return -ENOTTY;
3120 }
3121
3122 switch (service) {
3123 case ME4000_AI_SINGLE:
3124 return me4000_ai_single((struct me4000_ai_single *)arg,
3125 ai_context);
3126 case ME4000_AI_EX_TRIG_ENABLE:
3127 return me4000_ai_ex_trig_enable(ai_context);
3128 case ME4000_AI_EX_TRIG_DISABLE:
3129 return me4000_ai_ex_trig_disable(ai_context);
3130 case ME4000_AI_EX_TRIG_SETUP:
3131 return me4000_ai_ex_trig_setup((struct me4000_ai_trigger *)arg,
3132 ai_context);
3133 case ME4000_GET_USER_INFO:
3134 return me4000_get_user_info((struct me4000_user_info *)arg,
3135 ai_context->board_info);
3136 case ME4000_AI_OFFSET_ENABLE:
3137 return me4000_ai_offset_enable(ai_context);
3138 case ME4000_AI_OFFSET_DISABLE:
3139 return me4000_ai_offset_disable(ai_context);
3140 case ME4000_AI_FULLSCALE_ENABLE:
3141 return me4000_ai_fullscale_enable(ai_context);
3142 case ME4000_AI_FULLSCALE_DISABLE:
3143 return me4000_ai_fullscale_disable(ai_context);
3144 case ME4000_AI_EEPROM_READ:
3145 return me4000_eeprom_read((struct me4000_eeprom *)arg,
3146 ai_context);
3147 case ME4000_AI_EEPROM_WRITE:
3148 return me4000_eeprom_write((struct me4000_eeprom *)arg,
3149 ai_context);
3150 default:
3151 printk(KERN_ERR
3152 "me4000_ai_ioctl_sing():Invalid service number\n");
3153 return -ENOTTY;
3154 }
3155 return 0;
3156 }
3157
3158 static int me4000_ai_single(struct me4000_ai_single *arg,
3159 struct me4000_ai_context *ai_context)
3160 {
3161 struct me4000_ai_single cmd;
3162 int err;
3163 u32 tmp;
3164 wait_queue_head_t queue;
3165 unsigned long jiffy;
3166
3167 CALL_PDEBUG("me4000_ai_single() is executed\n");
3168
3169 init_waitqueue_head(&queue);
3170
3171 /* Copy data from user */
3172 err = copy_from_user(&cmd, arg, sizeof(struct me4000_ai_single));
3173 if (err) {
3174 printk(KERN_ERR
3175 "ME4000:me4000_ai_single():Can't copy from user space\n");
3176 return -EFAULT;
3177 }
3178
3179 /* Check range parameter */
3180 switch (cmd.range) {
3181 case ME4000_AI_LIST_RANGE_BIPOLAR_10:
3182 case ME4000_AI_LIST_RANGE_BIPOLAR_2_5:
3183 case ME4000_AI_LIST_RANGE_UNIPOLAR_10:
3184 case ME4000_AI_LIST_RANGE_UNIPOLAR_2_5:
3185 break;
3186 default:
3187 printk(KERN_ERR
3188 "ME4000:me4000_ai_single():Invalid range specified\n");
3189 return -EINVAL;
3190 }
3191
3192 /* Check mode and channel number */
3193 switch (cmd.mode) {
3194 case ME4000_AI_LIST_INPUT_SINGLE_ENDED:
3195 if (cmd.channel >= ai_context->board_info->board_p->ai.count) {
3196 printk(KERN_ERR
3197 "ME4000:me4000_ai_single():Analog input is not available\n");
3198 return -EINVAL;
3199 }
3200 break;
3201 case ME4000_AI_LIST_INPUT_DIFFERENTIAL:
3202 if (cmd.channel >=
3203 ai_context->board_info->board_p->ai.diff_count) {
3204 printk(KERN_ERR
3205 "ME4000:me4000_ai_single():Analog input is not available in differential mode\n");
3206 return -EINVAL;
3207 }
3208 break;
3209 default:
3210 printk(KERN_ERR
3211 "ME4000:me4000_ai_single():Invalid mode specified\n");
3212 return -EINVAL;
3213 }
3214
3215 /* Clear channel list, data fifo and both stop bits */
3216 tmp = me4000_inl(ai_context->ctrl_reg);
3217 tmp &=
3218 ~(ME4000_AI_CTRL_BIT_CHANNEL_FIFO | ME4000_AI_CTRL_BIT_DATA_FIFO |
3219 ME4000_AI_CTRL_BIT_STOP | ME4000_AI_CTRL_BIT_IMMEDIATE_STOP);
3220 me4000_outl(tmp, ai_context->ctrl_reg);
3221
3222 /* Enable channel list and data fifo */
3223 tmp |= ME4000_AI_CTRL_BIT_CHANNEL_FIFO | ME4000_AI_CTRL_BIT_DATA_FIFO;
3224 me4000_outl(tmp, ai_context->ctrl_reg);
3225
3226 /* Generate channel list entry */
3227 me4000_outl(cmd.channel | cmd.range | cmd.
3228 mode | ME4000_AI_LIST_LAST_ENTRY,
3229 ai_context->channel_list_reg);
3230
3231 /* Set the timer to maximum */
3232 me4000_outl(66, ai_context->chan_timer_reg);
3233 me4000_outl(66, ai_context->chan_pre_timer_reg);
3234
3235 if (tmp & ME4000_AI_CTRL_BIT_EX_TRIG) {
3236 jiffy = jiffies;
3237 while (!
3238 (me4000_inl(ai_context->status_reg) &
3239 ME4000_AI_STATUS_BIT_EF_DATA)) {
3240 interruptible_sleep_on_timeout(&queue, 1);
3241 if (signal_pending(current)) {
3242 printk(KERN_ERR
3243 "ME4000:me4000_ai_single():Wait on start of state machine interrupted\n");
3244 return -EINTR;
3245 }
3246 if (((jiffies - jiffy) > (cmd.timeout * HZ / USER_HZ)) && cmd.timeout) { // 2.6 has diffrent definitions for HZ in user and kernel space
3247 printk(KERN_ERR
3248 "ME4000:me4000_ai_single():Timeout reached\n");
3249 return -EIO;
3250 }
3251 }
3252 } else {
3253 /* Start conversion */
3254 me4000_inl(ai_context->start_reg);
3255
3256 /* Wait until ready */
3257 udelay(10);
3258 if (!
3259 (me4000_inl(ai_context->status_reg) &
3260 ME4000_AI_STATUS_BIT_EF_DATA)) {
3261 printk(KERN_ERR
3262 "ME4000:me4000_ai_single():Value not available after wait\n");
3263 return -EIO;
3264 }
3265 }
3266
3267 /* Read value from data fifo */
3268 cmd.value = me4000_inl(ai_context->data_reg) & 0xFFFF;
3269
3270 /* Copy result back to user */
3271 err = copy_to_user(arg, &cmd, sizeof(struct me4000_ai_single));
3272 if (err) {
3273 printk(KERN_ERR
3274 "ME4000:me4000_ai_single():Can't copy to user space\n");
3275 return -EFAULT;
3276 }
3277
3278 return 0;
3279 }
3280
3281 static int me4000_ai_ioctl_sw(struct inode *inode_p, struct file *file_p,
3282 unsigned int service, unsigned long arg)
3283 {
3284 struct me4000_ai_context *ai_context;
3285
3286 CALL_PDEBUG("me4000_ai_ioctl_sw() is executed\n");
3287
3288 ai_context = file_p->private_data;
3289
3290 if (_IOC_TYPE(service) != ME4000_MAGIC) {
3291 printk(KERN_ERR "me4000_ai_ioctl_sw():Wrong magic number\n");
3292 return -ENOTTY;
3293 }
3294 if (_IOC_NR(service) > ME4000_IOCTL_MAXNR) {
3295 printk(KERN_ERR
3296 "me4000_ai_ioctl_sw():Service number to high\n");
3297 return -ENOTTY;
3298 }
3299
3300 switch (service) {
3301 case ME4000_AI_SC_SETUP:
3302 return me4000_ai_sc_setup((struct me4000_ai_sc *)arg,
3303 ai_context);
3304 case ME4000_AI_CONFIG:
3305 return me4000_ai_config((struct me4000_ai_config *)arg,
3306 ai_context);
3307 case ME4000_AI_START:
3308 return me4000_ai_start(ai_context);
3309 case ME4000_AI_STOP:
3310 return me4000_ai_stop(ai_context);
3311 case ME4000_AI_IMMEDIATE_STOP:
3312 return me4000_ai_immediate_stop(ai_context);
3313 case ME4000_AI_FSM_STATE:
3314 return me4000_ai_fsm_state((int *)arg, ai_context);
3315 case ME4000_GET_USER_INFO:
3316 return me4000_get_user_info((struct me4000_user_info *)arg,
3317 ai_context->board_info);
3318 case ME4000_AI_EEPROM_READ:
3319 return me4000_eeprom_read((struct me4000_eeprom *)arg,
3320 ai_context);
3321 case ME4000_AI_EEPROM_WRITE:
3322 return me4000_eeprom_write((struct me4000_eeprom *)arg,
3323 ai_context);
3324 case ME4000_AI_GET_COUNT_BUFFER:
3325 return me4000_ai_get_count_buffer((unsigned long *)arg,
3326 ai_context);
3327 default:
3328 printk(KERN_ERR
3329 "%s:Invalid service number %d\n", __func__, service);
3330 return -ENOTTY;
3331 }
3332 return 0;
3333 }
3334
3335 static int me4000_ai_ioctl_ext(struct inode *inode_p, struct file *file_p,
3336 unsigned int service, unsigned long arg)
3337 {
3338 struct me4000_ai_context *ai_context;
3339
3340 CALL_PDEBUG("me4000_ai_ioctl_ext() is executed\n");
3341
3342 ai_context = file_p->private_data;
3343
3344 if (_IOC_TYPE(service) != ME4000_MAGIC) {
3345 printk(KERN_ERR "me4000_ai_ioctl_ext():Wrong magic number\n");
3346 return -ENOTTY;
3347 }
3348 if (_IOC_NR(service) > ME4000_IOCTL_MAXNR) {
3349 printk(KERN_ERR
3350 "me4000_ai_ioctl_ext():Service number to high\n");
3351 return -ENOTTY;
3352 }
3353
3354 switch (service) {
3355 case ME4000_AI_SC_SETUP:
3356 return me4000_ai_sc_setup((struct me4000_ai_sc *)arg,
3357 ai_context);
3358 case ME4000_AI_CONFIG:
3359 return me4000_ai_config((struct me4000_ai_config *)arg,
3360 ai_context);
3361 case ME4000_AI_START:
3362 return me4000_ai_start_ex((unsigned long *)arg, ai_context);
3363 case ME4000_AI_STOP:
3364 return me4000_ai_stop(ai_context);
3365 case ME4000_AI_IMMEDIATE_STOP:
3366 return me4000_ai_immediate_stop(ai_context);
3367 case ME4000_AI_EX_TRIG_ENABLE:
3368 return me4000_ai_ex_trig_enable(ai_context);
3369 case ME4000_AI_EX_TRIG_DISABLE:
3370 return me4000_ai_ex_trig_disable(ai_context);
3371 case ME4000_AI_EX_TRIG_SETUP:
3372 return me4000_ai_ex_trig_setup((struct me4000_ai_trigger *)arg,
3373 ai_context);
3374 case ME4000_AI_FSM_STATE:
3375 return me4000_ai_fsm_state((int *)arg, ai_context);
3376 case ME4000_GET_USER_INFO:
3377 return me4000_get_user_info((struct me4000_user_info *)arg,
3378 ai_context->board_info);
3379 case ME4000_AI_GET_COUNT_BUFFER:
3380 return me4000_ai_get_count_buffer((unsigned long *)arg,
3381 ai_context);
3382 default:
3383 printk(KERN_ERR
3384 "%s:Invalid service number %d\n", __func__ , service);
3385 return -ENOTTY;
3386 }
3387 return 0;
3388 }
3389
3390 static int me4000_ai_fasync(int fd, struct file *file_p, int mode)
3391 {
3392 struct me4000_ai_context *ai_context;
3393
3394 CALL_PDEBUG("me4000_ao_fasync_cont() is executed\n");
3395
3396 ai_context = file_p->private_data;
3397 return fasync_helper(fd, file_p, mode, &ai_context->fasync_p);
3398 }
3399
3400 static int me4000_ai_config(struct me4000_ai_config *arg,
3401 struct me4000_ai_context *ai_context)
3402 {
3403 struct me4000_ai_config cmd;
3404 u32 *list = NULL;
3405 u32 mode;
3406 int i;
3407 int err;
3408 wait_queue_head_t queue;
3409 u64 scan;
3410 u32 tmp;
3411
3412 CALL_PDEBUG("me4000_ai_config() is executed\n");
3413
3414 init_waitqueue_head(&queue);
3415
3416 /* Check if conversion is stopped */
3417 if (inl(ai_context->ctrl_reg) & ME4000_AI_STATUS_BIT_FSM) {
3418 printk(KERN_ERR
3419 "ME4000:me4000_ai_config():Conversion is not stopped\n");
3420 err = -EBUSY;
3421 goto AI_CONFIG_ERR;
3422 }
3423
3424 /* Copy data from user */
3425 err = copy_from_user(&cmd, arg, sizeof(struct me4000_ai_config));
3426 if (err) {
3427 printk(KERN_ERR
3428 "ME4000:me4000_ai_config():Can't copy from user space\n");
3429 err = -EFAULT;
3430 goto AI_CONFIG_ERR;
3431 }
3432
3433 PDEBUG
3434 ("me4000_ai_config():chan = %ld, pre_chan = %ld, scan_low = %ld, scan_high = %ld, count = %ld\n",
3435 cmd.timer.chan, cmd.timer.pre_chan, cmd.timer.scan_low,
3436 cmd.timer.scan_high, cmd.channel_list.count);
3437
3438 /* Check whether sample and hold is available for this board */
3439 if (cmd.sh) {
3440 if (!ai_context->board_info->board_p->ai.sh_count) {
3441 printk(KERN_ERR
3442 "ME4000:me4000_ai_config():Sample and Hold is not available for this board\n");
3443 err = -ENODEV;
3444 goto AI_CONFIG_ERR;
3445 }
3446 }
3447
3448 /* Check the channel list size */
3449 if (cmd.channel_list.count > ME4000_AI_CHANNEL_LIST_COUNT) {
3450 printk(KERN_ERR
3451 "me4000_ai_config():Channel list is to large\n");
3452 err = -EINVAL;
3453 goto AI_CONFIG_ERR;
3454 }
3455
3456 /* Copy channel list from user */
3457 list = kmalloc(sizeof(u32) * cmd.channel_list.count, GFP_KERNEL);
3458 if (!list) {
3459 printk(KERN_ERR
3460 "ME4000:me4000_ai_config():Can't get memory for channel list\n");
3461 err = -ENOMEM;
3462 goto AI_CONFIG_ERR;
3463 }
3464 err =
3465 copy_from_user(list, cmd.channel_list.list,
3466 sizeof(u32) * cmd.channel_list.count);
3467 if (err) {
3468 printk(KERN_ERR
3469 "ME4000:me4000_ai_config():Can't copy from user space\n");
3470 err = -EFAULT;
3471 goto AI_CONFIG_ERR;
3472 }
3473
3474 /* Check if last entry bit is set */
3475 if (!(list[cmd.channel_list.count - 1] & ME4000_AI_LIST_LAST_ENTRY)) {
3476 printk(KERN_WARNING
3477 "me4000_ai_config():Last entry bit is not set\n");
3478 list[cmd.channel_list.count - 1] |= ME4000_AI_LIST_LAST_ENTRY;
3479 }
3480
3481 /* Check whether mode is equal for all entries */
3482 mode = list[0] & 0x20;
3483 for (i = 0; i < cmd.channel_list.count; i++) {
3484 if ((list[i] & 0x20) != mode) {
3485 printk(KERN_ERR
3486 "ME4000:me4000_ai_config():Mode is not equal for all entries\n");
3487 err = -EINVAL;
3488 goto AI_CONFIG_ERR;
3489 }
3490 }
3491
3492 /* Check whether channels are available for this mode */
3493 if (mode == ME4000_AI_LIST_INPUT_SINGLE_ENDED) {
3494 for (i = 0; i < cmd.channel_list.count; i++) {
3495 if ((list[i] & 0x1F) >=
3496 ai_context->board_info->board_p->ai.count) {
3497 printk(KERN_ERR
3498 "ME4000:me4000_ai_config():Channel is not available for single ended\n");
3499 err = -EINVAL;
3500 goto AI_CONFIG_ERR;
3501 }
3502 }
3503 } else if (mode == ME4000_AI_LIST_INPUT_DIFFERENTIAL) {
3504 for (i = 0; i < cmd.channel_list.count; i++) {
3505 if ((list[i] & 0x1F) >=
3506 ai_context->board_info->board_p->ai.diff_count) {
3507 printk(KERN_ERR
3508 "ME4000:me4000_ai_config():Channel is not available for differential\n");
3509 err = -EINVAL;
3510 goto AI_CONFIG_ERR;
3511 }
3512 }
3513 }
3514
3515 /* Check if bipolar is set for all entries when in differential mode */
3516 if (mode == ME4000_AI_LIST_INPUT_DIFFERENTIAL) {
3517 for (i = 0; i < cmd.channel_list.count; i++) {
3518 if ((list[i] & 0xC0) != ME4000_AI_LIST_RANGE_BIPOLAR_10
3519 && (list[i] & 0xC0) !=
3520 ME4000_AI_LIST_RANGE_BIPOLAR_2_5) {
3521 printk(KERN_ERR
3522 "ME4000:me4000_ai_config():Bipolar is not selected in differential mode\n");
3523 err = -EINVAL;
3524 goto AI_CONFIG_ERR;
3525 }
3526 }
3527 }
3528
3529 if (ai_context->mode != ME4000_AI_ACQ_MODE_EXT_SINGLE_VALUE) {
3530 /* Check for minimum channel divisor */
3531 if (cmd.timer.chan < ME4000_AI_MIN_TICKS) {
3532 printk(KERN_ERR
3533 "ME4000:me4000_ai_config():Channel timer divisor is to low\n");
3534 err = -EINVAL;
3535 goto AI_CONFIG_ERR;
3536 }
3537
3538 /* Check if minimum channel divisor is adjusted when sample and hold is activated */
3539 if ((cmd.sh) && (cmd.timer.chan != ME4000_AI_MIN_TICKS)) {
3540 printk(KERN_ERR
3541 "ME4000:me4000_ai_config():Channel timer divisor must be at minimum when sample and hold is activated\n");
3542 err = -EINVAL;
3543 goto AI_CONFIG_ERR;
3544 }
3545
3546 /* Check for minimum channel pre divisor */
3547 if (cmd.timer.pre_chan < ME4000_AI_MIN_TICKS) {
3548 printk(KERN_ERR
3549 "ME4000:me4000_ai_config():Channel pre timer divisor is to low\n");
3550 err = -EINVAL;
3551 goto AI_CONFIG_ERR;
3552 }
3553
3554 /* Write the channel timers */
3555 me4000_outl(cmd.timer.chan - 1, ai_context->chan_timer_reg);
3556 me4000_outl(cmd.timer.pre_chan - 1,
3557 ai_context->chan_pre_timer_reg);
3558
3559 /* Save the timer values in the board context */
3560 ai_context->chan_timer = cmd.timer.chan;
3561 ai_context->chan_pre_timer = cmd.timer.pre_chan;
3562
3563 if (ai_context->mode != ME4000_AI_ACQ_MODE_EXT_SINGLE_CHANLIST) {
3564 /* Check for scan timer divisor */
3565 scan =
3566 (u64) cmd.timer.scan_low | ((u64) cmd.timer.
3567 scan_high << 32);
3568 if (scan != 0) {
3569 if (scan <
3570 cmd.channel_list.count * cmd.timer.chan +
3571 1) {
3572 printk(KERN_ERR
3573 "ME4000:me4000_ai_config():Scan timer divisor is to low\n");
3574 err = -EINVAL;
3575 goto AI_CONFIG_ERR;
3576 }
3577 }
3578
3579 /* Write the scan timers */
3580 if (scan != 0) {
3581 scan--;
3582 tmp = (u32) (scan & 0xFFFFFFFF);
3583 me4000_outl(tmp,
3584 ai_context->scan_timer_low_reg);
3585 tmp = (u32) ((scan >> 32) & 0xFFFFFFFF);
3586 me4000_outl(tmp,
3587 ai_context->scan_timer_high_reg);
3588
3589 scan =
3590 scan - (cmd.timer.chan - 1) +
3591 (cmd.timer.pre_chan - 1);
3592 tmp = (u32) (scan & 0xFFFFFFFF);
3593 me4000_outl(tmp,
3594 ai_context->scan_pre_timer_low_reg);
3595 tmp = (u32) ((scan >> 32) & 0xFFFFFFFF);
3596 me4000_outl(tmp,
3597 ai_context->
3598 scan_pre_timer_high_reg);
3599 } else {
3600 me4000_outl(0x0,
3601 ai_context->scan_timer_low_reg);
3602 me4000_outl(0x0,
3603 ai_context->scan_timer_high_reg);
3604
3605 me4000_outl(0x0,
3606 ai_context->scan_pre_timer_low_reg);
3607 me4000_outl(0x0,
3608 ai_context->
3609 scan_pre_timer_high_reg);
3610 }
3611
3612 ai_context->scan_timer_low = cmd.timer.scan_low;
3613 ai_context->scan_timer_high = cmd.timer.scan_high;
3614 }
3615 }
3616
3617 /* Clear the channel list */
3618 tmp = me4000_inl(ai_context->ctrl_reg);
3619 tmp &= ~ME4000_AI_CTRL_BIT_CHANNEL_FIFO;
3620 me4000_outl(tmp, ai_context->ctrl_reg);
3621 tmp |= ME4000_AI_CTRL_BIT_CHANNEL_FIFO;
3622 me4000_outl(tmp, ai_context->ctrl_reg);
3623
3624 /* Write the channel list */
3625 for (i = 0; i < cmd.channel_list.count; i++) {
3626 me4000_outl(list[i], ai_context->channel_list_reg);
3627 }
3628
3629 /* Setup sample and hold */
3630 if (cmd.sh) {
3631 tmp |= ME4000_AI_CTRL_BIT_SAMPLE_HOLD;
3632 me4000_outl(tmp, ai_context->ctrl_reg);
3633 } else {
3634 tmp &= ~ME4000_AI_CTRL_BIT_SAMPLE_HOLD;
3635 me4000_outl(tmp, ai_context->ctrl_reg);
3636 }
3637
3638 /* Save the channel list size in the board context */
3639 ai_context->channel_list_count = cmd.channel_list.count;
3640
3641 kfree(list);
3642
3643 return 0;
3644
3645 AI_CONFIG_ERR:
3646
3647 /* Reset the timers */
3648 ai_context->chan_timer = 66;
3649 ai_context->chan_pre_timer = 66;
3650 ai_context->scan_timer_low = 0;
3651 ai_context->scan_timer_high = 0;
3652
3653 me4000_outl(65, ai_context->chan_timer_reg);
3654 me4000_outl(65, ai_context->chan_pre_timer_reg);
3655 me4000_outl(0, ai_context->scan_timer_high_reg);
3656 me4000_outl(0, ai_context->scan_timer_low_reg);
3657 me4000_outl(0, ai_context->scan_pre_timer_high_reg);
3658 me4000_outl(0, ai_context->scan_pre_timer_low_reg);
3659
3660 ai_context->channel_list_count = 0;
3661
3662 tmp = me4000_inl(ai_context->ctrl_reg);
3663 tmp &=
3664 ~(ME4000_AI_CTRL_BIT_CHANNEL_FIFO | ME4000_AI_CTRL_BIT_SAMPLE_HOLD);
3665
3666 if (list)
3667 kfree(list);
3668
3669 return err;
3670
3671 }
3672
3673 static int ai_common_start(struct me4000_ai_context *ai_context)
3674 {
3675 u32 tmp;
3676 CALL_PDEBUG("ai_common_start() is executed\n");
3677
3678 tmp = me4000_inl(ai_context->ctrl_reg);
3679
3680 /* Check if conversion is stopped */
3681 if (tmp & ME4000_AI_STATUS_BIT_FSM) {
3682 printk(KERN_ERR
3683 "ME4000:ai_common_start():Conversion is not stopped\n");
3684 return -EBUSY;
3685 }
3686
3687 /* Clear data fifo, disable all interrupts, clear sample counter reload */
3688 tmp &= ~(ME4000_AI_CTRL_BIT_DATA_FIFO | ME4000_AI_CTRL_BIT_LE_IRQ |
3689 ME4000_AI_CTRL_BIT_HF_IRQ | ME4000_AI_CTRL_BIT_SC_IRQ |
3690 ME4000_AI_CTRL_BIT_SC_RELOAD);
3691
3692 me4000_outl(tmp, ai_context->ctrl_reg);
3693
3694 /* Clear circular buffer */
3695 ai_context->circ_buf.head = 0;
3696 ai_context->circ_buf.tail = 0;
3697
3698 /* Enable data fifo */
3699 tmp |= ME4000_AI_CTRL_BIT_DATA_FIFO;
3700
3701 /* Determine interrupt setup */
3702 if (ai_context->sample_counter && !ai_context->sample_counter_reload) {
3703 /* Enable Half Full Interrupt and Sample Counter Interrupt */
3704 tmp |= ME4000_AI_CTRL_BIT_SC_IRQ | ME4000_AI_CTRL_BIT_HF_IRQ;
3705 } else if (ai_context->sample_counter
3706 && ai_context->sample_counter_reload) {
3707 if (ai_context->sample_counter <= ME4000_AI_FIFO_COUNT / 2) {
3708 /* Enable only Sample Counter Interrupt */
3709 tmp |=
3710 ME4000_AI_CTRL_BIT_SC_IRQ |
3711 ME4000_AI_CTRL_BIT_SC_RELOAD;
3712 } else {
3713 /* Enable Half Full Interrupt and Sample Counter Interrupt */
3714 tmp |=
3715 ME4000_AI_CTRL_BIT_SC_IRQ |
3716 ME4000_AI_CTRL_BIT_HF_IRQ |
3717 ME4000_AI_CTRL_BIT_SC_RELOAD;
3718 }
3719 } else {
3720 /* Enable only Half Full Interrupt */
3721 tmp |= ME4000_AI_CTRL_BIT_HF_IRQ;
3722 }
3723
3724 /* Clear the stop bits */
3725 tmp &= ~(ME4000_AI_CTRL_BIT_STOP | ME4000_AI_CTRL_BIT_IMMEDIATE_STOP);
3726
3727 /* Write setup to hardware */
3728 me4000_outl(tmp, ai_context->ctrl_reg);
3729
3730 /* Write sample counter */
3731 me4000_outl(ai_context->sample_counter, ai_context->sample_counter_reg);
3732
3733 return 0;
3734 }
3735
3736 static int me4000_ai_start(struct me4000_ai_context *ai_context)
3737 {
3738 int err;
3739 CALL_PDEBUG("me4000_ai_start() is executed\n");
3740
3741 /* Prepare Hardware */
3742 err = ai_common_start(ai_context);
3743 if (err)
3744 return err;
3745
3746 /* Start conversion by dummy read */
3747 me4000_inl(ai_context->start_reg);
3748
3749 return 0;
3750 }
3751
3752 static int me4000_ai_start_ex(unsigned long *arg,
3753 struct me4000_ai_context *ai_context)
3754 {
3755 int err;
3756 wait_queue_head_t queue;
3757 unsigned long ref;
3758 unsigned long timeout;
3759
3760 CALL_PDEBUG("me4000_ai_start_ex() is executed\n");
3761
3762 if (get_user(timeout, arg)) {
3763 printk(KERN_ERR
3764 "me4000_ai_start_ex():Cannot copy data from user\n");
3765 return -EFAULT;
3766 }
3767
3768 init_waitqueue_head(&queue);
3769
3770 /* Prepare Hardware */
3771 err = ai_common_start(ai_context);
3772 if (err)
3773 return err;
3774
3775 if (timeout) {
3776 ref = jiffies;
3777 while (!
3778 (inl(ai_context->status_reg) & ME4000_AI_STATUS_BIT_FSM))
3779 {
3780 interruptible_sleep_on_timeout(&queue, 1);
3781 if (signal_pending(current)) {
3782 printk(KERN_ERR
3783 "ME4000:me4000_ai_start_ex():Wait on start of state machine interrupted\n");
3784 return -EINTR;
3785 }
3786 if (((jiffies - ref) > (timeout * HZ / USER_HZ))) { // 2.6 has diffrent definitions for HZ in user and kernel space
3787 printk(KERN_ERR
3788 "ME4000:me4000_ai_start_ex():Timeout reached\n");
3789 return -EIO;
3790 }
3791 }
3792 } else {
3793 while (!
3794 (inl(ai_context->status_reg) & ME4000_AI_STATUS_BIT_FSM))
3795 {
3796 interruptible_sleep_on_timeout(&queue, 1);
3797 if (signal_pending(current)) {
3798 printk(KERN_ERR
3799 "ME4000:me4000_ai_start_ex():Wait on start of state machine interrupted\n");
3800 return -EINTR;
3801 }
3802 }
3803 }
3804
3805 return 0;
3806 }
3807
3808 static int me4000_ai_stop(struct me4000_ai_context *ai_context)
3809 {
3810 wait_queue_head_t queue;
3811 u32 tmp;
3812 unsigned long flags;
3813
3814 CALL_PDEBUG("me4000_ai_stop() is executed\n");
3815
3816 init_waitqueue_head(&queue);
3817
3818 /* Disable irqs and clear data fifo */
3819 spin_lock_irqsave(&ai_context->int_lock, flags);
3820 tmp = me4000_inl(ai_context->ctrl_reg);
3821 tmp &=
3822 ~(ME4000_AI_CTRL_BIT_HF_IRQ | ME4000_AI_CTRL_BIT_SC_IRQ |
3823 ME4000_AI_CTRL_BIT_DATA_FIFO);
3824 /* Stop conversion of the state machine */
3825 tmp |= ME4000_AI_CTRL_BIT_STOP;
3826 me4000_outl(tmp, ai_context->ctrl_reg);
3827 spin_unlock_irqrestore(&ai_context->int_lock, flags);
3828
3829 /* Clear circular buffer */
3830 ai_context->circ_buf.head = 0;
3831 ai_context->circ_buf.tail = 0;
3832
3833 while (inl(ai_context->status_reg) & ME4000_AI_STATUS_BIT_FSM) {
3834 interruptible_sleep_on_timeout(&queue, 1);
3835 if (signal_pending(current)) {
3836 printk(KERN_ERR
3837 "ME4000:me4000_ai_stop():Wait on state machine after stop interrupted\n");
3838 return -EINTR;
3839 }
3840 }
3841
3842 return 0;
3843 }
3844
3845 static int me4000_ai_immediate_stop(struct me4000_ai_context *ai_context)
3846 {
3847 wait_queue_head_t queue;
3848 u32 tmp;
3849 unsigned long flags;
3850
3851 CALL_PDEBUG("me4000_ai_stop() is executed\n");
3852
3853 init_waitqueue_head(&queue);
3854
3855 /* Disable irqs and clear data fifo */
3856 spin_lock_irqsave(&ai_context->int_lock, flags);
3857 tmp = me4000_inl(ai_context->ctrl_reg);
3858 tmp &=
3859 ~(ME4000_AI_CTRL_BIT_HF_IRQ | ME4000_AI_CTRL_BIT_SC_IRQ |
3860 ME4000_AI_CTRL_BIT_DATA_FIFO);
3861 /* Stop conversion of the state machine */
3862 tmp |= ME4000_AI_CTRL_BIT_IMMEDIATE_STOP;
3863 me4000_outl(tmp, ai_context->ctrl_reg);
3864 spin_unlock_irqrestore(&ai_context->int_lock, flags);
3865
3866 /* Clear circular buffer */
3867 ai_context->circ_buf.head = 0;
3868 ai_context->circ_buf.tail = 0;
3869
3870 while (inl(ai_context->status_reg) & ME4000_AI_STATUS_BIT_FSM) {
3871 interruptible_sleep_on_timeout(&queue, 1);
3872 if (signal_pending(current)) {
3873 printk(KERN_ERR
3874 "ME4000:me4000_ai_stop():Wait on state machine after stop interrupted\n");
3875 return -EINTR;
3876 }
3877 }
3878
3879 return 0;
3880 }
3881
3882 static int me4000_ai_ex_trig_enable(struct me4000_ai_context *ai_context)
3883 {
3884 u32 tmp;
3885 unsigned long flags;
3886
3887 CALL_PDEBUG("me4000_ai_ex_trig_enable() is executed\n");
3888
3889 spin_lock_irqsave(&ai_context->int_lock, flags);
3890 tmp = me4000_inl(ai_context->ctrl_reg);
3891 tmp |= ME4000_AI_CTRL_BIT_EX_TRIG;
3892 me4000_outl(tmp, ai_context->ctrl_reg);
3893 spin_unlock_irqrestore(&ai_context->int_lock, flags);
3894
3895 return 0;
3896 }
3897
3898 static int me4000_ai_ex_trig_disable(struct me4000_ai_context *ai_context)
3899 {
3900 u32 tmp;
3901 unsigned long flags;
3902
3903 CALL_PDEBUG("me4000_ai_ex_trig_disable() is executed\n");
3904
3905 spin_lock_irqsave(&ai_context->int_lock, flags);
3906 tmp = me4000_inl(ai_context->ctrl_reg);
3907 tmp &= ~ME4000_AI_CTRL_BIT_EX_TRIG;
3908 me4000_outl(tmp, ai_context->ctrl_reg);
3909 spin_unlock_irqrestore(&ai_context->int_lock, flags);
3910
3911 return 0;
3912 }
3913
3914 static int me4000_ai_ex_trig_setup(struct me4000_ai_trigger *arg,
3915 struct me4000_ai_context *ai_context)
3916 {
3917 struct me4000_ai_trigger cmd;
3918 int err;
3919 u32 tmp;
3920 unsigned long flags;
3921
3922 CALL_PDEBUG("me4000_ai_ex_trig_setup() is executed\n");
3923
3924 /* Copy data from user */
3925 err = copy_from_user(&cmd, arg, sizeof(struct me4000_ai_trigger));
3926 if (err) {
3927 printk(KERN_ERR
3928 "ME4000:me4000_ai_ex_trig_setup():Can't copy from user space\n");
3929 return -EFAULT;
3930 }
3931
3932 spin_lock_irqsave(&ai_context->int_lock, flags);
3933 tmp = me4000_inl(ai_context->ctrl_reg);
3934
3935 if (cmd.mode == ME4000_AI_TRIGGER_EXT_DIGITAL) {
3936 tmp &= ~ME4000_AI_CTRL_BIT_EX_TRIG_ANALOG;
3937 } else if (cmd.mode == ME4000_AI_TRIGGER_EXT_ANALOG) {
3938 if (!ai_context->board_info->board_p->ai.ex_trig_analog) {
3939 printk(KERN_ERR
3940 "ME4000:me4000_ai_ex_trig_setup():No analog trigger available\n");
3941 return -EINVAL;
3942 }
3943 tmp |= ME4000_AI_CTRL_BIT_EX_TRIG_ANALOG;
3944 } else {
3945 spin_unlock_irqrestore(&ai_context->int_lock, flags);
3946 printk(KERN_ERR
3947 "ME4000:me4000_ai_ex_trig_setup():Invalid trigger mode specified\n");
3948 return -EINVAL;
3949 }
3950
3951 if (cmd.edge == ME4000_AI_TRIGGER_EXT_EDGE_RISING) {
3952 tmp &=
3953 ~(ME4000_AI_CTRL_BIT_EX_TRIG_BOTH |
3954 ME4000_AI_CTRL_BIT_EX_TRIG_FALLING);
3955 } else if (cmd.edge == ME4000_AI_TRIGGER_EXT_EDGE_FALLING) {
3956 tmp |= ME4000_AI_CTRL_BIT_EX_TRIG_FALLING;
3957 tmp &= ~ME4000_AI_CTRL_BIT_EX_TRIG_BOTH;
3958 } else if (cmd.edge == ME4000_AI_TRIGGER_EXT_EDGE_BOTH) {
3959 tmp |=
3960 ME4000_AI_CTRL_BIT_EX_TRIG_BOTH |
3961 ME4000_AI_CTRL_BIT_EX_TRIG_FALLING;
3962 } else {
3963 spin_unlock_irqrestore(&ai_context->int_lock, flags);
3964 printk(KERN_ERR
3965 "ME4000:me4000_ai_ex_trig_setup():Invalid trigger edge specified\n");
3966 return -EINVAL;
3967 }
3968
3969 me4000_outl(tmp, ai_context->ctrl_reg);
3970 spin_unlock_irqrestore(&ai_context->int_lock, flags);
3971 return 0;
3972 }
3973
3974 static int me4000_ai_sc_setup(struct me4000_ai_sc *arg,
3975 struct me4000_ai_context *ai_context)
3976 {
3977 struct me4000_ai_sc cmd;
3978 int err;
3979
3980 CALL_PDEBUG("me4000_ai_sc_setup() is executed\n");
3981
3982 /* Copy data from user */
3983 err = copy_from_user(&cmd, arg, sizeof(struct me4000_ai_sc));
3984 if (err) {
3985 printk(KERN_ERR
3986 "ME4000:me4000_ai_sc_setup():Can't copy from user space\n");
3987 return -EFAULT;
3988 }
3989
3990 ai_context->sample_counter = cmd.value;
3991 ai_context->sample_counter_reload = cmd.reload;
3992
3993 return 0;
3994 }
3995
3996 static ssize_t me4000_ai_read(struct file *filep, char *buff, size_t cnt,
3997 loff_t *offp)
3998 {
3999 struct me4000_ai_context *ai_context = filep->private_data;
4000 s16 *buffer = (s16 *) buff;
4001 size_t count = cnt / 2;
4002 unsigned long flags;
4003 int tmp;
4004 int c = 0;
4005 int k = 0;
4006 int ret = 0;
4007 wait_queue_t wait;
4008
4009 CALL_PDEBUG("me4000_ai_read() is executed\n");
4010
4011 init_waitqueue_entry(&wait, current);
4012
4013 /* Check count */
4014 if (count <= 0) {
4015 PDEBUG("me4000_ai_read():Count is 0\n");
4016 return 0;
4017 }
4018
4019 while (count > 0) {
4020 if (filep->f_flags & O_NONBLOCK) {
4021 c = me4000_values_to_end(ai_context->circ_buf,
4022 ME4000_AI_BUFFER_COUNT);
4023 if (!c) {
4024 PDEBUG
4025 ("me4000_ai_read():Returning from nonblocking read\n");
4026 break;
4027 }
4028 } else {
4029 /* Check if conversion is still running */
4030 if (!
4031 (me4000_inl(ai_context->status_reg) &
4032 ME4000_AI_STATUS_BIT_FSM)) {
4033 printk(KERN_ERR
4034 "ME4000:me4000_ai_read():Conversion interrupted\n");
4035 return -EPIPE;
4036 }
4037
4038 wait_event_interruptible(ai_context->wait_queue,
4039 (me4000_values_to_end
4040 (ai_context->circ_buf,
4041 ME4000_AI_BUFFER_COUNT)));
4042 if (signal_pending(current)) {
4043 printk(KERN_ERR
4044 "ME4000:me4000_ai_read():Wait on values interrupted from signal\n");
4045 return -EINTR;
4046 }
4047 }
4048
4049 /* Only read count values or as much as available */
4050 c = me4000_values_to_end(ai_context->circ_buf,
4051 ME4000_AI_BUFFER_COUNT);
4052 PDEBUG("me4000_ai_read():%d values to end\n", c);
4053 if (count < c)
4054 c = count;
4055
4056 PDEBUG("me4000_ai_read():Copy %d values to user space\n", c);
4057 k = 2 * c;
4058 k -= copy_to_user(buffer,
4059 ai_context->circ_buf.buf +
4060 ai_context->circ_buf.tail, k);
4061 c = k / 2;
4062 if (!c) {
4063 printk(KERN_ERR
4064 "ME4000:me4000_ai_read():Cannot copy new values to user\n");
4065 return -EFAULT;
4066 }
4067
4068 ai_context->circ_buf.tail =
4069 (ai_context->circ_buf.tail + c) & (ME4000_AI_BUFFER_COUNT -
4070 1);
4071 buffer += c;
4072 count -= c;
4073 ret += c;
4074
4075 spin_lock_irqsave(&ai_context->int_lock, flags);
4076 if (me4000_buf_space
4077 (ai_context->circ_buf, ME4000_AI_BUFFER_COUNT)) {
4078 tmp = me4000_inl(ai_context->ctrl_reg);
4079
4080 /* Determine interrupt setup */
4081 if (ai_context->sample_counter
4082 && !ai_context->sample_counter_reload) {
4083 /* Enable Half Full Interrupt and Sample Counter Interrupt */
4084 tmp |=
4085 ME4000_AI_CTRL_BIT_SC_IRQ |
4086 ME4000_AI_CTRL_BIT_HF_IRQ;
4087 } else if (ai_context->sample_counter
4088 && ai_context->sample_counter_reload) {
4089 if (ai_context->sample_counter <
4090 ME4000_AI_FIFO_COUNT / 2) {
4091 /* Enable only Sample Counter Interrupt */
4092 tmp |= ME4000_AI_CTRL_BIT_SC_IRQ;
4093 } else {
4094 /* Enable Half Full Interrupt and Sample Counter Interrupt */
4095 tmp |=
4096 ME4000_AI_CTRL_BIT_SC_IRQ |
4097 ME4000_AI_CTRL_BIT_HF_IRQ;
4098 }
4099 } else {
4100 /* Enable only Half Full Interrupt */
4101 tmp |= ME4000_AI_CTRL_BIT_HF_IRQ;
4102 }
4103
4104 me4000_outl(tmp, ai_context->ctrl_reg);
4105 }
4106 spin_unlock_irqrestore(&ai_context->int_lock, flags);
4107 }
4108
4109 /* Check if conversion is still running */
4110 if (!(me4000_inl(ai_context->status_reg) & ME4000_AI_STATUS_BIT_FSM)) {
4111 printk(KERN_ERR
4112 "ME4000:me4000_ai_read():Conversion not running after complete read\n");
4113 return -EPIPE;
4114 }
4115
4116 if (filep->f_flags & O_NONBLOCK) {
4117 return (k == 0) ? -EAGAIN : 2 * ret;
4118 }
4119
4120 CALL_PDEBUG("me4000_ai_read() is leaved\n");
4121 return ret * 2;
4122 }
4123
4124 static unsigned int me4000_ai_poll(struct file *file_p, poll_table *wait)
4125 {
4126 struct me4000_ai_context *ai_context;
4127 unsigned long mask = 0;
4128
4129 CALL_PDEBUG("me4000_ai_poll() is executed\n");
4130
4131 ai_context = file_p->private_data;
4132
4133 /* Register wait queue */
4134 poll_wait(file_p, &ai_context->wait_queue, wait);
4135
4136 /* Get available values */
4137 if (me4000_values_to_end(ai_context->circ_buf, ME4000_AI_BUFFER_COUNT))
4138 mask |= POLLIN | POLLRDNORM;
4139
4140 PDEBUG("me4000_ai_poll():Return mask %lX\n", mask);
4141
4142 return mask;
4143 }
4144
4145 static int me4000_ai_offset_enable(struct me4000_ai_context *ai_context)
4146 {
4147 unsigned long tmp;
4148
4149 CALL_PDEBUG("me4000_ai_offset_enable() is executed\n");
4150
4151 tmp = me4000_inl(ai_context->ctrl_reg);
4152 tmp |= ME4000_AI_CTRL_BIT_OFFSET;
4153 me4000_outl(tmp, ai_context->ctrl_reg);
4154
4155 return 0;
4156 }
4157
4158 static int me4000_ai_offset_disable(struct me4000_ai_context *ai_context)
4159 {
4160 unsigned long tmp;
4161
4162 CALL_PDEBUG("me4000_ai_offset_disable() is executed\n");
4163
4164 tmp = me4000_inl(ai_context->ctrl_reg);
4165 tmp &= ~ME4000_AI_CTRL_BIT_OFFSET;
4166 me4000_outl(tmp, ai_context->ctrl_reg);
4167
4168 return 0;
4169 }
4170
4171 static int me4000_ai_fullscale_enable(struct me4000_ai_context *ai_context)
4172 {
4173 unsigned long tmp;
4174
4175 CALL_PDEBUG("me4000_ai_fullscale_enable() is executed\n");
4176
4177 tmp = me4000_inl(ai_context->ctrl_reg);
4178 tmp |= ME4000_AI_CTRL_BIT_FULLSCALE;
4179 me4000_outl(tmp, ai_context->ctrl_reg);
4180
4181 return 0;
4182 }
4183
4184 static int me4000_ai_fullscale_disable(struct me4000_ai_context *ai_context)
4185 {
4186 unsigned long tmp;
4187
4188 CALL_PDEBUG("me4000_ai_fullscale_disable() is executed\n");
4189
4190 tmp = me4000_inl(ai_context->ctrl_reg);
4191 tmp &= ~ME4000_AI_CTRL_BIT_FULLSCALE;
4192 me4000_outl(tmp, ai_context->ctrl_reg);
4193
4194 return 0;
4195 }
4196
4197 static int me4000_ai_fsm_state(int *arg, struct me4000_ai_context *ai_context)
4198 {
4199 unsigned long tmp;
4200
4201 CALL_PDEBUG("me4000_ai_fsm_state() is executed\n");
4202
4203 tmp =
4204 (me4000_inl(ai_context->status_reg) & ME4000_AI_STATUS_BIT_FSM) ? 1
4205 : 0;
4206
4207 if (put_user(tmp, arg)) {
4208 printk(KERN_ERR "me4000_ai_fsm_state():Cannot copy to user\n");
4209 return -EFAULT;
4210 }
4211
4212 return 0;
4213 }
4214
4215 static int me4000_ai_get_count_buffer(unsigned long *arg,
4216 struct me4000_ai_context *ai_context)
4217 {
4218 unsigned long c;
4219 int err;
4220
4221 c = me4000_buf_count(ai_context->circ_buf, ME4000_AI_BUFFER_COUNT);
4222
4223 err = copy_to_user(arg, &c, sizeof(unsigned long));
4224 if (err) {
4225 printk(KERN_ERR
4226 "%s:Can't copy to user space\n", __func__);
4227 return -EFAULT;
4228 }
4229
4230 return 0;
4231 }
4232
4233 /*---------------------------------- EEPROM stuff ---------------------------*/
4234
4235 static int eeprom_write_cmd(struct me4000_ai_context *ai_context, unsigned long cmd,
4236 int length)
4237 {
4238 int i;
4239 unsigned long value;
4240
4241 CALL_PDEBUG("eeprom_write_cmd() is executed\n");
4242
4243 PDEBUG("eeprom_write_cmd():Write command 0x%08lX with length = %d\n",
4244 cmd, length);
4245
4246 /* Get the ICR register and clear the related bits */
4247 value = me4000_inl(ai_context->board_info->plx_regbase + PLX_ICR);
4248 value &= ~(PLX_ICR_MASK_EEPROM);
4249 me4000_outl(value, ai_context->board_info->plx_regbase + PLX_ICR);
4250
4251 /* Raise the chip select */
4252 value |= PLX_ICR_BIT_EEPROM_CHIP_SELECT;
4253 me4000_outl(value, ai_context->board_info->plx_regbase + PLX_ICR);
4254 udelay(EEPROM_DELAY);
4255
4256 for (i = 0; i < length; i++) {
4257 if (cmd & ((0x1 << (length - 1)) >> i)) {
4258 value |= PLX_ICR_BIT_EEPROM_WRITE;
4259 } else {
4260 value &= ~PLX_ICR_BIT_EEPROM_WRITE;
4261 }
4262
4263 /* Write to EEPROM */
4264 me4000_outl(value,
4265 ai_context->board_info->plx_regbase + PLX_ICR);
4266 udelay(EEPROM_DELAY);
4267
4268 /* Raising edge of the clock */
4269 value |= PLX_ICR_BIT_EEPROM_CLOCK_SET;
4270 me4000_outl(value,
4271 ai_context->board_info->plx_regbase + PLX_ICR);
4272 udelay(EEPROM_DELAY);
4273
4274 /* Falling edge of the clock */
4275 value &= ~PLX_ICR_BIT_EEPROM_CLOCK_SET;
4276 me4000_outl(value,
4277 ai_context->board_info->plx_regbase + PLX_ICR);
4278 udelay(EEPROM_DELAY);
4279 }
4280
4281 /* Clear the chip select */
4282 value &= ~PLX_ICR_BIT_EEPROM_CHIP_SELECT;
4283 me4000_outl(value, ai_context->board_info->plx_regbase + PLX_ICR);
4284 udelay(EEPROM_DELAY);
4285
4286 /* Wait until hardware is ready for sure */
4287 mdelay(10);
4288
4289 return 0;
4290 }
4291
4292 static unsigned short eeprom_read_cmd(struct me4000_ai_context *ai_context,
4293 unsigned long cmd, int length)
4294 {
4295 int i;
4296 unsigned long value;
4297 unsigned short id = 0;
4298
4299 CALL_PDEBUG("eeprom_read_cmd() is executed\n");
4300
4301 PDEBUG("eeprom_read_cmd():Read command 0x%08lX with length = %d\n", cmd,
4302 length);
4303
4304 /* Get the ICR register and clear the related bits */
4305 value = me4000_inl(ai_context->board_info->plx_regbase + PLX_ICR);
4306 value &= ~(PLX_ICR_MASK_EEPROM);
4307
4308 me4000_outl(value, ai_context->board_info->plx_regbase + PLX_ICR);
4309
4310 /* Raise the chip select */
4311 value |= PLX_ICR_BIT_EEPROM_CHIP_SELECT;
4312 me4000_outl(value, ai_context->board_info->plx_regbase + PLX_ICR);
4313 udelay(EEPROM_DELAY);
4314
4315 /* Write the read command to the eeprom */
4316 for (i = 0; i < length; i++) {
4317 if (cmd & ((0x1 << (length - 1)) >> i)) {
4318 value |= PLX_ICR_BIT_EEPROM_WRITE;
4319 } else {
4320 value &= ~PLX_ICR_BIT_EEPROM_WRITE;
4321 }
4322 me4000_outl(value,
4323 ai_context->board_info->plx_regbase + PLX_ICR);
4324 udelay(EEPROM_DELAY);
4325
4326 /* Raising edge of the clock */
4327 value |= PLX_ICR_BIT_EEPROM_CLOCK_SET;
4328 me4000_outl(value,
4329 ai_context->board_info->plx_regbase + PLX_ICR);
4330 udelay(EEPROM_DELAY);
4331
4332 /* Falling edge of the clock */
4333 value &= ~PLX_ICR_BIT_EEPROM_CLOCK_SET;
4334 me4000_outl(value,
4335 ai_context->board_info->plx_regbase + PLX_ICR);
4336 udelay(EEPROM_DELAY);
4337 }
4338
4339 /* Read the value from the eeprom */
4340 for (i = 0; i < 16; i++) {
4341 /* Raising edge of the clock */
4342 value |= PLX_ICR_BIT_EEPROM_CLOCK_SET;
4343 me4000_outl(value,
4344 ai_context->board_info->plx_regbase + PLX_ICR);
4345 udelay(EEPROM_DELAY);
4346
4347 if (me4000_inl(ai_context->board_info->plx_regbase + PLX_ICR) &
4348 PLX_ICR_BIT_EEPROM_READ) {
4349 id |= (0x8000 >> i);
4350 PDEBUG("eeprom_read_cmd():OR with 0x%04X\n",
4351 (0x8000 >> i));
4352 } else {
4353 PDEBUG("eeprom_read_cmd():Dont't OR\n");
4354 }
4355
4356 /* Falling edge of the clock */
4357 value &= ~PLX_ICR_BIT_EEPROM_CLOCK_SET;
4358 me4000_outl(value,
4359 ai_context->board_info->plx_regbase + PLX_ICR);
4360 udelay(EEPROM_DELAY);
4361 }
4362
4363 /* Clear the chip select */
4364 value &= ~PLX_ICR_BIT_EEPROM_CHIP_SELECT;
4365 me4000_outl(value, ai_context->board_info->plx_regbase + PLX_ICR);
4366 udelay(EEPROM_DELAY);
4367
4368 return id;
4369 }
4370
4371 static int me4000_eeprom_write(struct me4000_eeprom *arg,
4372 struct me4000_ai_context *ai_context)
4373 {
4374 int err;
4375 struct me4000_eeprom setup;
4376 unsigned long cmd;
4377 unsigned long date_high;
4378 unsigned long date_low;
4379
4380 CALL_PDEBUG("me4000_eeprom_write() is executed\n");
4381
4382 err = copy_from_user(&setup, arg, sizeof(setup));
4383 if (err) {
4384 printk(KERN_ERR
4385 "ME4000:me4000_eeprom_write():Cannot copy from user\n");
4386 return err;
4387 }
4388
4389 /* Enable writing */
4390 eeprom_write_cmd(ai_context, ME4000_EEPROM_CMD_WRITE_ENABLE,
4391 ME4000_EEPROM_CMD_LENGTH_WRITE_ENABLE);
4392
4393 /* Command for date */
4394 date_high = (setup.date & 0xFFFF0000) >> 16;
4395 date_low = (setup.date & 0x0000FFFF);
4396
4397 cmd =
4398 ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_DATE_HIGH <<
4399 ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4400 (unsigned
4401 long)
4402 date_high);
4403 err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4404 if (err)
4405 return err;
4406
4407 cmd =
4408 ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_DATE_LOW <<
4409 ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4410 (unsigned
4411 long)
4412 date_low);
4413 err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4414 if (err)
4415 return err;
4416
4417 /* Command for unipolar 10V offset */
4418 cmd =
4419 ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_1_UNI_OFFSET <<
4420 ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4421 (unsigned
4422 long)
4423 setup.
4424 uni_10_offset);
4425 err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4426 if (err)
4427 return err;
4428
4429 /* Command for unipolar 10V fullscale */
4430 cmd =
4431 ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_1_UNI_FULLSCALE <<
4432 ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4433 (unsigned
4434 long)
4435 setup.
4436 uni_10_fullscale);
4437 err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4438 if (err)
4439 return err;
4440
4441 /* Command for unipolar 2,5V offset */
4442 cmd =
4443 ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_4_UNI_OFFSET <<
4444 ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4445 (unsigned
4446 long)
4447 setup.
4448 uni_2_5_offset);
4449 err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4450 if (err)
4451 return err;
4452
4453 /* Command for unipolar 2,5V fullscale */
4454 cmd =
4455 ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_4_UNI_FULLSCALE <<
4456 ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4457 (unsigned
4458 long)
4459 setup.
4460 uni_2_5_fullscale);
4461 err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4462 if (err)
4463 return err;
4464
4465 /* Command for bipolar 10V offset */
4466 cmd =
4467 ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_1_BI_OFFSET <<
4468 ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4469 (unsigned
4470 long)
4471 setup.
4472 bi_10_offset);
4473 err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4474 if (err)
4475 return err;
4476
4477 /* Command for bipolar 10V fullscale */
4478 cmd =
4479 ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_1_BI_FULLSCALE <<
4480 ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4481 (unsigned
4482 long)
4483 setup.
4484 bi_10_fullscale);
4485 err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4486 if (err)
4487 return err;
4488
4489 /* Command for bipolar 2,5V offset */
4490 cmd =
4491 ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_4_BI_OFFSET <<
4492 ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4493 (unsigned
4494 long)
4495 setup.
4496 bi_2_5_offset);
4497 err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4498 if (err)
4499 return err;
4500
4501 /* Command for bipolar 2,5V fullscale */
4502 cmd =
4503 ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_4_BI_FULLSCALE <<
4504 ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4505 (unsigned
4506 long)
4507 setup.
4508 bi_2_5_fullscale);
4509 err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4510 if (err)
4511 return err;
4512
4513 /* Command for differential 10V offset */
4514 cmd =
4515 ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_1_DIFF_OFFSET <<
4516 ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4517 (unsigned
4518 long)
4519 setup.
4520 diff_10_offset);
4521 err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4522 if (err)
4523 return err;
4524
4525 /* Command for differential 10V fullscale */
4526 cmd =
4527 ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_1_DIFF_FULLSCALE
4528 << ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4529 (unsigned
4530 long)
4531 setup.
4532 diff_10_fullscale);
4533 err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4534 if (err)
4535 return err;
4536
4537 /* Command for differential 2,5V offset */
4538 cmd =
4539 ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_4_DIFF_OFFSET <<
4540 ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4541 (unsigned
4542 long)
4543 setup.
4544 diff_2_5_offset);
4545 err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4546 if (err)
4547 return err;
4548
4549 /* Command for differential 2,5V fullscale */
4550 cmd =
4551 ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_4_DIFF_FULLSCALE
4552 << ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4553 (unsigned
4554 long)
4555 setup.
4556 diff_2_5_fullscale);
4557 err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4558 if (err)
4559 return err;
4560
4561 /* Disable writing */
4562 eeprom_write_cmd(ai_context, ME4000_EEPROM_CMD_WRITE_DISABLE,
4563 ME4000_EEPROM_CMD_LENGTH_WRITE_DISABLE);
4564
4565 return 0;
4566 }
4567
4568 static int me4000_eeprom_read(struct me4000_eeprom *arg,
4569 struct me4000_ai_context *ai_context)
4570 {
4571 int err;
4572 unsigned long cmd;
4573 struct me4000_eeprom setup;
4574
4575 CALL_PDEBUG("me4000_eeprom_read() is executed\n");
4576
4577 /* Command for date */
4578 cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_DATE_HIGH;
4579 setup.date =
4580 eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4581 setup.date <<= 16;
4582 cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_DATE_LOW;
4583 setup.date |=
4584 eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4585
4586 /* Command for unipolar 10V offset */
4587 cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_1_UNI_OFFSET;
4588 setup.uni_10_offset =
4589 eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4590
4591 /* Command for unipolar 10V fullscale */
4592 cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_1_UNI_FULLSCALE;
4593 setup.uni_10_fullscale =
4594 eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4595
4596 /* Command for unipolar 2,5V offset */
4597 cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_4_UNI_OFFSET;
4598 setup.uni_2_5_offset =
4599 eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4600
4601 /* Command for unipolar 2,5V fullscale */
4602 cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_4_UNI_FULLSCALE;
4603 setup.uni_2_5_fullscale =
4604 eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4605
4606 /* Command for bipolar 10V offset */
4607 cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_1_BI_OFFSET;
4608 setup.bi_10_offset =
4609 eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4610
4611 /* Command for bipolar 10V fullscale */
4612 cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_1_BI_FULLSCALE;
4613 setup.bi_10_fullscale =
4614 eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4615
4616 /* Command for bipolar 2,5V offset */
4617 cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_4_BI_OFFSET;
4618 setup.bi_2_5_offset =
4619 eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4620
4621 /* Command for bipolar 2,5V fullscale */
4622 cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_4_BI_FULLSCALE;
4623 setup.bi_2_5_fullscale =
4624 eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4625
4626 /* Command for differntial 10V offset */
4627 cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_1_DIFF_OFFSET;
4628 setup.diff_10_offset =
4629 eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4630
4631 /* Command for differential 10V fullscale */
4632 cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_1_DIFF_FULLSCALE;
4633 setup.diff_10_fullscale =
4634 eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4635
4636 /* Command for differntial 2,5V offset */
4637 cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_4_DIFF_OFFSET;
4638 setup.diff_2_5_offset =
4639 eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4640
4641 /* Command for differential 2,5V fullscale */
4642 cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_4_DIFF_FULLSCALE;
4643 setup.diff_2_5_fullscale =
4644 eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4645
4646 err = copy_to_user(arg, &setup, sizeof(setup));
4647 if (err) {
4648 printk(KERN_ERR
4649 "ME4000:me4000_eeprom_read():Cannot copy to user\n");
4650 return err;
4651 }
4652
4653 return 0;
4654 }
4655
4656 /*------------------------------------ DIO stuff ----------------------------------------------*/
4657
4658 static int me4000_dio_ioctl(struct inode *inode_p, struct file *file_p,
4659 unsigned int service, unsigned long arg)
4660 {
4661 struct me4000_dio_context *dio_context;
4662
4663 CALL_PDEBUG("me4000_dio_ioctl() is executed\n");
4664
4665 dio_context = file_p->private_data;
4666
4667 if (_IOC_TYPE(service) != ME4000_MAGIC) {
4668 printk(KERN_ERR "me4000_dio_ioctl():Wrong magic number\n");
4669 return -ENOTTY;
4670 }
4671 if (_IOC_NR(service) > ME4000_IOCTL_MAXNR) {
4672 printk(KERN_ERR "me4000_dio_ioctl():Service number to high\n");
4673 return -ENOTTY;
4674 }
4675
4676 switch (service) {
4677 case ME4000_DIO_CONFIG:
4678 return me4000_dio_config((struct me4000_dio_config *)arg,
4679 dio_context);
4680 case ME4000_DIO_SET_BYTE:
4681 return me4000_dio_set_byte((struct me4000_dio_byte *)arg,
4682 dio_context);
4683 case ME4000_DIO_GET_BYTE:
4684 return me4000_dio_get_byte((struct me4000_dio_byte *)arg,
4685 dio_context);
4686 case ME4000_DIO_RESET:
4687 return me4000_dio_reset(dio_context);
4688 default:
4689 printk(KERN_ERR
4690 "ME4000:me4000_dio_ioctl():Invalid service number %d\n",
4691 service);
4692 return -ENOTTY;
4693 }
4694 return 0;
4695 }
4696
4697 static int me4000_dio_config(struct me4000_dio_config *arg,
4698 struct me4000_dio_context *dio_context)
4699 {
4700 struct me4000_dio_config cmd;
4701 u32 tmp;
4702 int err;
4703
4704 CALL_PDEBUG("me4000_dio_config() is executed\n");
4705
4706 /* Copy data from user */
4707 err = copy_from_user(&cmd, arg, sizeof(struct me4000_dio_config));
4708 if (err) {
4709 printk(KERN_ERR
4710 "ME4000:me4000_dio_config():Can't copy from user space\n");
4711 return -EFAULT;
4712 }
4713
4714 /* Check port parameter */
4715 if (cmd.port >= dio_context->dio_count) {
4716 printk(KERN_ERR
4717 "ME4000:me4000_dio_config():Port %d is not available\n",
4718 cmd.port);
4719 return -EINVAL;
4720 }
4721
4722 PDEBUG("me4000_dio_config(): port %d, mode %d, function %d\n", cmd.port,
4723 cmd.mode, cmd.function);
4724
4725 if (cmd.port == ME4000_DIO_PORT_A) {
4726 if (cmd.mode == ME4000_DIO_PORT_INPUT) {
4727 /* Check if opto isolated version */
4728 if (!(me4000_inl(dio_context->dir_reg) & 0x1)) {
4729 printk(KERN_ERR
4730 "ME4000:me4000_dio_config():Cannot set to input on opto isolated versions\n");
4731 return -EIO;
4732 }
4733
4734 tmp = me4000_inl(dio_context->ctrl_reg);
4735 tmp &=
4736 ~(ME4000_DIO_CTRL_BIT_MODE_0 |
4737 ME4000_DIO_CTRL_BIT_MODE_1);
4738 me4000_outl(tmp, dio_context->ctrl_reg);
4739 } else if (cmd.mode == ME4000_DIO_PORT_OUTPUT) {
4740 tmp = me4000_inl(dio_context->ctrl_reg);
4741 tmp &=
4742 ~(ME4000_DIO_CTRL_BIT_MODE_0 |
4743 ME4000_DIO_CTRL_BIT_MODE_1);
4744 tmp |= ME4000_DIO_CTRL_BIT_MODE_0;
4745 me4000_outl(tmp, dio_context->ctrl_reg);
4746 } else if (cmd.mode == ME4000_DIO_FIFO_LOW) {
4747 tmp = me4000_inl(dio_context->ctrl_reg);
4748 tmp &=
4749 ~(ME4000_DIO_CTRL_BIT_MODE_0 |
4750 ME4000_DIO_CTRL_BIT_MODE_1 |
4751 ME4000_DIO_CTRL_BIT_FIFO_HIGH_0);
4752 tmp |=
4753 ME4000_DIO_CTRL_BIT_MODE_0 |
4754 ME4000_DIO_CTRL_BIT_MODE_1;
4755 me4000_outl(tmp, dio_context->ctrl_reg);
4756 } else if (cmd.mode == ME4000_DIO_FIFO_HIGH) {
4757 tmp = me4000_inl(dio_context->ctrl_reg);
4758 tmp |=
4759 ME4000_DIO_CTRL_BIT_MODE_0 |
4760 ME4000_DIO_CTRL_BIT_MODE_1 |
4761 ME4000_DIO_CTRL_BIT_FIFO_HIGH_0;
4762 me4000_outl(tmp, dio_context->ctrl_reg);
4763 } else {
4764 printk(KERN_ERR
4765 "ME4000:me4000_dio_config():Mode %d is not available\n",
4766 cmd.mode);
4767 return -EINVAL;
4768 }
4769 } else if (cmd.port == ME4000_DIO_PORT_B) {
4770 if (cmd.mode == ME4000_DIO_PORT_INPUT) {
4771 /* Only do anything when TTL version is installed */
4772 if ((me4000_inl(dio_context->dir_reg) & 0x1)) {
4773 tmp = me4000_inl(dio_context->ctrl_reg);
4774 tmp &=
4775 ~(ME4000_DIO_CTRL_BIT_MODE_2 |
4776 ME4000_DIO_CTRL_BIT_MODE_3);
4777 me4000_outl(tmp, dio_context->ctrl_reg);
4778 }
4779 } else if (cmd.mode == ME4000_DIO_PORT_OUTPUT) {
4780 /* Check if opto isolated version */
4781 if (!(me4000_inl(dio_context->dir_reg) & 0x1)) {
4782 printk(KERN_ERR
4783 "ME4000:me4000_dio_config():Cannot set to output on opto isolated versions\n");
4784 return -EIO;
4785 }
4786
4787 tmp = me4000_inl(dio_context->ctrl_reg);
4788 tmp &=
4789 ~(ME4000_DIO_CTRL_BIT_MODE_2 |
4790 ME4000_DIO_CTRL_BIT_MODE_3);
4791 tmp |= ME4000_DIO_CTRL_BIT_MODE_2;
4792 me4000_outl(tmp, dio_context->ctrl_reg);
4793 } else if (cmd.mode == ME4000_DIO_FIFO_LOW) {
4794 /* Check if opto isolated version */
4795 if (!(me4000_inl(dio_context->dir_reg) & 0x1)) {
4796 printk(KERN_ERR
4797 "ME4000:me4000_dio_config():Cannot set to FIFO low output on opto isolated versions\n");
4798 return -EIO;
4799 }
4800
4801 tmp = me4000_inl(dio_context->ctrl_reg);
4802 tmp &=
4803 ~(ME4000_DIO_CTRL_BIT_MODE_2 |
4804 ME4000_DIO_CTRL_BIT_MODE_3 |
4805 ME4000_DIO_CTRL_BIT_FIFO_HIGH_1);
4806 tmp |=
4807 ME4000_DIO_CTRL_BIT_MODE_2 |
4808 ME4000_DIO_CTRL_BIT_MODE_3;
4809 me4000_outl(tmp, dio_context->ctrl_reg);
4810 } else if (cmd.mode == ME4000_DIO_FIFO_HIGH) {
4811 /* Check if opto isolated version */
4812 if (!(me4000_inl(dio_context->dir_reg) & 0x1)) {
4813 printk(KERN_ERR
4814 "ME4000:me4000_dio_config():Cannot set to FIFO high output on opto isolated versions\n");
4815 return -EIO;
4816 }
4817
4818 tmp = me4000_inl(dio_context->ctrl_reg);
4819 tmp |=
4820 ME4000_DIO_CTRL_BIT_MODE_2 |
4821 ME4000_DIO_CTRL_BIT_MODE_3 |
4822 ME4000_DIO_CTRL_BIT_FIFO_HIGH_1;
4823 me4000_outl(tmp, dio_context->ctrl_reg);
4824 } else {
4825 printk(KERN_ERR
4826 "ME4000:me4000_dio_config():Mode %d is not available\n",
4827 cmd.mode);
4828 return -EINVAL;
4829 }
4830 } else if (cmd.port == ME4000_DIO_PORT_C) {
4831 if (cmd.mode == ME4000_DIO_PORT_INPUT) {
4832 tmp = me4000_inl(dio_context->ctrl_reg);
4833 tmp &=
4834 ~(ME4000_DIO_CTRL_BIT_MODE_4 |
4835 ME4000_DIO_CTRL_BIT_MODE_5);
4836 me4000_outl(tmp, dio_context->ctrl_reg);
4837 } else if (cmd.mode == ME4000_DIO_PORT_OUTPUT) {
4838 tmp = me4000_inl(dio_context->ctrl_reg);
4839 tmp &=
4840 ~(ME4000_DIO_CTRL_BIT_MODE_4 |
4841 ME4000_DIO_CTRL_BIT_MODE_5);
4842 tmp |= ME4000_DIO_CTRL_BIT_MODE_4;
4843 me4000_outl(tmp, dio_context->ctrl_reg);
4844 } else if (cmd.mode == ME4000_DIO_FIFO_LOW) {
4845 tmp = me4000_inl(dio_context->ctrl_reg);
4846 tmp &=
4847 ~(ME4000_DIO_CTRL_BIT_MODE_4 |
4848 ME4000_DIO_CTRL_BIT_MODE_5 |
4849 ME4000_DIO_CTRL_BIT_FIFO_HIGH_2);
4850 tmp |=
4851 ME4000_DIO_CTRL_BIT_MODE_4 |
4852 ME4000_DIO_CTRL_BIT_MODE_5;
4853 me4000_outl(tmp, dio_context->ctrl_reg);
4854 } else if (cmd.mode == ME4000_DIO_FIFO_HIGH) {
4855 tmp = me4000_inl(dio_context->ctrl_reg);
4856 tmp |=
4857 ME4000_DIO_CTRL_BIT_MODE_4 |
4858 ME4000_DIO_CTRL_BIT_MODE_5 |
4859 ME4000_DIO_CTRL_BIT_FIFO_HIGH_2;
4860 me4000_outl(tmp, dio_context->ctrl_reg);
4861 } else {
4862 printk(KERN_ERR
4863 "ME4000:me4000_dio_config():Mode %d is not available\n",
4864 cmd.mode);
4865 return -EINVAL;
4866 }
4867 } else if (cmd.port == ME4000_DIO_PORT_D) {
4868 if (cmd.mode == ME4000_DIO_PORT_INPUT) {
4869 tmp = me4000_inl(dio_context->ctrl_reg);
4870 tmp &=
4871 ~(ME4000_DIO_CTRL_BIT_MODE_6 |
4872 ME4000_DIO_CTRL_BIT_MODE_7);
4873 me4000_outl(tmp, dio_context->ctrl_reg);
4874 } else if (cmd.mode == ME4000_DIO_PORT_OUTPUT) {
4875 tmp = me4000_inl(dio_context->ctrl_reg);
4876 tmp &=
4877 ~(ME4000_DIO_CTRL_BIT_MODE_6 |
4878 ME4000_DIO_CTRL_BIT_MODE_7);
4879 tmp |= ME4000_DIO_CTRL_BIT_MODE_6;
4880 me4000_outl(tmp, dio_context->ctrl_reg);
4881 } else if (cmd.mode == ME4000_DIO_FIFO_LOW) {
4882 tmp = me4000_inl(dio_context->ctrl_reg);
4883 tmp &=
4884 ~(ME4000_DIO_CTRL_BIT_MODE_6 |
4885 ME4000_DIO_CTRL_BIT_MODE_7 |
4886 ME4000_DIO_CTRL_BIT_FIFO_HIGH_3);
4887 tmp |=
4888 ME4000_DIO_CTRL_BIT_MODE_6 |
4889 ME4000_DIO_CTRL_BIT_MODE_7;
4890 me4000_outl(tmp, dio_context->ctrl_reg);
4891 } else if (cmd.mode == ME4000_DIO_FIFO_HIGH) {
4892 tmp = me4000_inl(dio_context->ctrl_reg);
4893 tmp |=
4894 ME4000_DIO_CTRL_BIT_MODE_6 |
4895 ME4000_DIO_CTRL_BIT_MODE_7 |
4896 ME4000_DIO_CTRL_BIT_FIFO_HIGH_3;
4897 me4000_outl(tmp, dio_context->ctrl_reg);
4898 } else {
4899 printk(KERN_ERR
4900 "ME4000:me4000_dio_config():Mode %d is not available\n",
4901 cmd.mode);
4902 return -EINVAL;
4903 }
4904 } else {
4905 printk(KERN_ERR
4906 "ME4000:me4000_dio_config():Port %d is not available\n",
4907 cmd.port);
4908 return -EINVAL;
4909 }
4910
4911 PDEBUG("me4000_dio_config(): port %d, mode %d, function %d\n", cmd.port,
4912 cmd.mode, cmd.function);
4913
4914 if ((cmd.mode == ME4000_DIO_FIFO_HIGH)
4915 || (cmd.mode == ME4000_DIO_FIFO_LOW)) {
4916 tmp = me4000_inl(dio_context->ctrl_reg);
4917 tmp &=
4918 ~(ME4000_DIO_CTRL_BIT_FUNCTION_0 |
4919 ME4000_DIO_CTRL_BIT_FUNCTION_1);
4920 if (cmd.function == ME4000_DIO_FUNCTION_PATTERN) {
4921 me4000_outl(tmp, dio_context->ctrl_reg);
4922 } else if (cmd.function == ME4000_DIO_FUNCTION_DEMUX) {
4923 tmp |= ME4000_DIO_CTRL_BIT_FUNCTION_0;
4924 me4000_outl(tmp, dio_context->ctrl_reg);
4925 } else if (cmd.function == ME4000_DIO_FUNCTION_MUX) {
4926 tmp |= ME4000_DIO_CTRL_BIT_FUNCTION_1;
4927 me4000_outl(tmp, dio_context->ctrl_reg);
4928 } else {
4929 printk(KERN_ERR
4930 "ME4000:me4000_dio_config():Invalid port function specified\n");
4931 return -EINVAL;
4932 }
4933 }
4934
4935 return 0;
4936 }
4937
4938 static int me4000_dio_set_byte(struct me4000_dio_byte *arg,
4939 struct me4000_dio_context *dio_context)
4940 {
4941 struct me4000_dio_byte cmd;
4942 int err;
4943
4944 CALL_PDEBUG("me4000_dio_set_byte() is executed\n");
4945
4946 /* Copy data from user */
4947 err = copy_from_user(&cmd, arg, sizeof(struct me4000_dio_byte));
4948 if (err) {
4949 printk(KERN_ERR
4950 "ME4000:me4000_dio_set_byte():Can't copy from user space\n");
4951 return -EFAULT;
4952 }
4953
4954 /* Check port parameter */
4955 if (cmd.port >= dio_context->dio_count) {
4956 printk(KERN_ERR
4957 "ME4000:me4000_dio_set_byte():Port %d is not available\n",
4958 cmd.port);
4959 return -EINVAL;
4960 }
4961
4962 if (cmd.port == ME4000_DIO_PORT_A) {
4963 if ((me4000_inl(dio_context->ctrl_reg) & 0x3) != 0x1) {
4964 printk(KERN_ERR
4965 "ME4000:me4000_dio_set_byte():Port %d is not in output mode\n",
4966 cmd.port);
4967 return -EIO;
4968 }
4969 me4000_outl(cmd.byte, dio_context->port_0_reg);
4970 } else if (cmd.port == ME4000_DIO_PORT_B) {
4971 if ((me4000_inl(dio_context->ctrl_reg) & 0xC) != 0x4) {
4972 printk(KERN_ERR
4973 "ME4000:me4000_dio_set_byte():Port %d is not in output mode\n",
4974 cmd.port);
4975 return -EIO;
4976 }
4977 me4000_outl(cmd.byte, dio_context->port_1_reg);
4978 } else if (cmd.port == ME4000_DIO_PORT_C) {
4979 if ((me4000_inl(dio_context->ctrl_reg) & 0x30) != 0x10) {
4980 printk(KERN_ERR
4981 "ME4000:me4000_dio_set_byte():Port %d is not in output mode\n",
4982 cmd.port);
4983 return -EIO;
4984 }
4985 me4000_outl(cmd.byte, dio_context->port_2_reg);
4986 } else if (cmd.port == ME4000_DIO_PORT_D) {
4987 if ((me4000_inl(dio_context->ctrl_reg) & 0xC0) != 0x40) {
4988 printk(KERN_ERR
4989 "ME4000:me4000_dio_set_byte():Port %d is not in output mode\n",
4990 cmd.port);
4991 return -EIO;
4992 }
4993 me4000_outl(cmd.byte, dio_context->port_3_reg);
4994 } else {
4995 printk(KERN_ERR
4996 "ME4000:me4000_dio_set_byte():Port %d is not available\n",
4997 cmd.port);
4998 return -EINVAL;
4999 }
5000
5001 return 0;
5002 }
5003
5004 static int me4000_dio_get_byte(struct me4000_dio_byte *arg,
5005 struct me4000_dio_context *dio_context)
5006 {
5007 struct me4000_dio_byte cmd;
5008 int err;
5009
5010 CALL_PDEBUG("me4000_dio_get_byte() is executed\n");
5011
5012 /* Copy data from user */
5013 err = copy_from_user(&cmd, arg, sizeof(struct me4000_dio_byte));
5014 if (err) {
5015 printk(KERN_ERR
5016 "ME4000:me4000_dio_get_byte():Can't copy from user space\n");
5017 return -EFAULT;
5018 }
5019
5020 /* Check port parameter */
5021 if (cmd.port >= dio_context->dio_count) {
5022 printk(KERN_ERR
5023 "ME4000:me4000_dio_get_byte():Port %d is not available\n",
5024 cmd.port);
5025 return -EINVAL;
5026 }
5027
5028 if (cmd.port == ME4000_DIO_PORT_A) {
5029 cmd.byte = me4000_inl(dio_context->port_0_reg) & 0xFF;
5030 } else if (cmd.port == ME4000_DIO_PORT_B) {
5031 cmd.byte = me4000_inl(dio_context->port_1_reg) & 0xFF;
5032 } else if (cmd.port == ME4000_DIO_PORT_C) {
5033 cmd.byte = me4000_inl(dio_context->port_2_reg) & 0xFF;
5034 } else if (cmd.port == ME4000_DIO_PORT_D) {
5035 cmd.byte = me4000_inl(dio_context->port_3_reg) & 0xFF;
5036 } else {
5037 printk(KERN_ERR
5038 "ME4000:me4000_dio_get_byte():Port %d is not available\n",
5039 cmd.port);
5040 return -EINVAL;
5041 }
5042
5043 /* Copy result back to user */
5044 err = copy_to_user(arg, &cmd, sizeof(struct me4000_dio_byte));
5045 if (err) {
5046 printk(KERN_ERR
5047 "ME4000:me4000_dio_get_byte():Can't copy to user space\n");
5048 return -EFAULT;
5049 }
5050
5051 return 0;
5052 }
5053
5054 static int me4000_dio_reset(struct me4000_dio_context *dio_context)
5055 {
5056 CALL_PDEBUG("me4000_dio_reset() is executed\n");
5057
5058 /* Clear the control register */
5059 me4000_outl(0, dio_context->ctrl_reg);
5060
5061 /* Check for opto isolated version */
5062 if (!(me4000_inl(dio_context->dir_reg) & 0x1)) {
5063 me4000_outl(0x1, dio_context->ctrl_reg);
5064 me4000_outl(0x0, dio_context->port_0_reg);
5065 }
5066
5067 return 0;
5068 }
5069
5070 /*------------------------------------ COUNTER STUFF ------------------------------------*/
5071
5072 static int me4000_cnt_ioctl(struct inode *inode_p, struct file *file_p,
5073 unsigned int service, unsigned long arg)
5074 {
5075 struct me4000_cnt_context *cnt_context;
5076
5077 CALL_PDEBUG("me4000_cnt_ioctl() is executed\n");
5078
5079 cnt_context = file_p->private_data;
5080
5081 if (_IOC_TYPE(service) != ME4000_MAGIC) {
5082 printk(KERN_ERR "me4000_dio_ioctl():Wrong magic number\n");
5083 return -ENOTTY;
5084 }
5085 if (_IOC_NR(service) > ME4000_IOCTL_MAXNR) {
5086 printk(KERN_ERR "me4000_dio_ioctl():Service number to high\n");
5087 return -ENOTTY;
5088 }
5089
5090 switch (service) {
5091 case ME4000_CNT_READ:
5092 return me4000_cnt_read((struct me4000_cnt *)arg, cnt_context);
5093 case ME4000_CNT_WRITE:
5094 return me4000_cnt_write((struct me4000_cnt *)arg, cnt_context);
5095 case ME4000_CNT_CONFIG:
5096 return me4000_cnt_config((struct me4000_cnt_config *)arg,
5097 cnt_context);
5098 case ME4000_CNT_RESET:
5099 return me4000_cnt_reset(cnt_context);
5100 default:
5101 printk(KERN_ERR
5102 "ME4000:me4000_dio_ioctl():Invalid service number %d\n",
5103 service);
5104 return -ENOTTY;
5105 }
5106 return 0;
5107 }
5108
5109 static int me4000_cnt_config(struct me4000_cnt_config *arg,
5110 struct me4000_cnt_context *cnt_context)
5111 {
5112 struct me4000_cnt_config cmd;
5113 u8 counter;
5114 u8 mode;
5115 int err;
5116
5117 CALL_PDEBUG("me4000_cnt_config() is executed\n");
5118
5119 /* Copy data from user */
5120 err = copy_from_user(&cmd, arg, sizeof(struct me4000_cnt_config));
5121 if (err) {
5122 printk(KERN_ERR
5123 "ME4000:me4000_cnt_config():Can't copy from user space\n");
5124 return -EFAULT;
5125 }
5126
5127 /* Check counter parameter */
5128 switch (cmd.counter) {
5129 case ME4000_CNT_COUNTER_0:
5130 counter = ME4000_CNT_CTRL_BIT_COUNTER_0;
5131 break;
5132 case ME4000_CNT_COUNTER_1:
5133 counter = ME4000_CNT_CTRL_BIT_COUNTER_1;
5134 break;
5135 case ME4000_CNT_COUNTER_2:
5136 counter = ME4000_CNT_CTRL_BIT_COUNTER_2;
5137 break;
5138 default:
5139 printk(KERN_ERR
5140 "ME4000:me4000_cnt_config():Counter %d is not available\n",
5141 cmd.counter);
5142 return -EINVAL;
5143 }
5144
5145 /* Check mode parameter */
5146 switch (cmd.mode) {
5147 case ME4000_CNT_MODE_0:
5148 mode = ME4000_CNT_CTRL_BIT_MODE_0;
5149 break;
5150 case ME4000_CNT_MODE_1:
5151 mode = ME4000_CNT_CTRL_BIT_MODE_1;
5152 break;
5153 case ME4000_CNT_MODE_2:
5154 mode = ME4000_CNT_CTRL_BIT_MODE_2;
5155 break;
5156 case ME4000_CNT_MODE_3:
5157 mode = ME4000_CNT_CTRL_BIT_MODE_3;
5158 break;
5159 case ME4000_CNT_MODE_4:
5160 mode = ME4000_CNT_CTRL_BIT_MODE_4;
5161 break;
5162 case ME4000_CNT_MODE_5:
5163 mode = ME4000_CNT_CTRL_BIT_MODE_5;
5164 break;
5165 default:
5166 printk(KERN_ERR
5167 "ME4000:me4000_cnt_config():Mode %d is not available\n",
5168 cmd.mode);
5169 return -EINVAL;
5170 }
5171
5172 /* Write the control word */
5173 me4000_outb((counter | mode | 0x30), cnt_context->ctrl_reg);
5174
5175 return 0;
5176 }
5177
5178 static int me4000_cnt_read(struct me4000_cnt *arg,
5179 struct me4000_cnt_context *cnt_context)
5180 {
5181 struct me4000_cnt cmd;
5182 u8 tmp;
5183 int err;
5184
5185 CALL_PDEBUG("me4000_cnt_read() is executed\n");
5186
5187 /* Copy data from user */
5188 err = copy_from_user(&cmd, arg, sizeof(struct me4000_cnt));
5189 if (err) {
5190 printk(KERN_ERR
5191 "ME4000:me4000_cnt_read():Can't copy from user space\n");
5192 return -EFAULT;
5193 }
5194
5195 /* Read counter */
5196 switch (cmd.counter) {
5197 case ME4000_CNT_COUNTER_0:
5198 tmp = me4000_inb(cnt_context->counter_0_reg);
5199 cmd.value = tmp;
5200 tmp = me4000_inb(cnt_context->counter_0_reg);
5201 cmd.value |= ((u16) tmp) << 8;
5202 break;
5203 case ME4000_CNT_COUNTER_1:
5204 tmp = me4000_inb(cnt_context->counter_1_reg);
5205 cmd.value = tmp;
5206 tmp = me4000_inb(cnt_context->counter_1_reg);
5207 cmd.value |= ((u16) tmp) << 8;
5208 break;
5209 case ME4000_CNT_COUNTER_2:
5210 tmp = me4000_inb(cnt_context->counter_2_reg);
5211 cmd.value = tmp;
5212 tmp = me4000_inb(cnt_context->counter_2_reg);
5213 cmd.value |= ((u16) tmp) << 8;
5214 break;
5215 default:
5216 printk(KERN_ERR
5217 "ME4000:me4000_cnt_read():Counter %d is not available\n",
5218 cmd.counter);
5219 return -EINVAL;
5220 }
5221
5222 /* Copy result back to user */
5223 err = copy_to_user(arg, &cmd, sizeof(struct me4000_cnt));
5224 if (err) {
5225 printk(KERN_ERR
5226 "ME4000:me4000_cnt_read():Can't copy to user space\n");
5227 return -EFAULT;
5228 }
5229
5230 return 0;
5231 }
5232
5233 static int me4000_cnt_write(struct me4000_cnt *arg,
5234 struct me4000_cnt_context *cnt_context)
5235 {
5236 struct me4000_cnt cmd;
5237 u8 tmp;
5238 int err;
5239
5240 CALL_PDEBUG("me4000_cnt_write() is executed\n");
5241
5242 /* Copy data from user */
5243 err = copy_from_user(&cmd, arg, sizeof(struct me4000_cnt));
5244 if (err) {
5245 printk(KERN_ERR
5246 "ME4000:me4000_cnt_write():Can't copy from user space\n");
5247 return -EFAULT;
5248 }
5249
5250 /* Write counter */
5251 switch (cmd.counter) {
5252 case ME4000_CNT_COUNTER_0:
5253 tmp = cmd.value & 0xFF;
5254 me4000_outb(tmp, cnt_context->counter_0_reg);
5255 tmp = (cmd.value >> 8) & 0xFF;
5256 me4000_outb(tmp, cnt_context->counter_0_reg);
5257 break;
5258 case ME4000_CNT_COUNTER_1:
5259 tmp = cmd.value & 0xFF;
5260 me4000_outb(tmp, cnt_context->counter_1_reg);
5261 tmp = (cmd.value >> 8) & 0xFF;
5262 me4000_outb(tmp, cnt_context->counter_1_reg);
5263 break;
5264 case ME4000_CNT_COUNTER_2:
5265 tmp = cmd.value & 0xFF;
5266 me4000_outb(tmp, cnt_context->counter_2_reg);
5267 tmp = (cmd.value >> 8) & 0xFF;
5268 me4000_outb(tmp, cnt_context->counter_2_reg);
5269 break;
5270 default:
5271 printk(KERN_ERR
5272 "ME4000:me4000_cnt_write():Counter %d is not available\n",
5273 cmd.counter);
5274 return -EINVAL;
5275 }
5276
5277 return 0;
5278 }
5279
5280 static int me4000_cnt_reset(struct me4000_cnt_context *cnt_context)
5281 {
5282 CALL_PDEBUG("me4000_cnt_reset() is executed\n");
5283
5284 /* Set the mode and value for counter 0 */
5285 me4000_outb(0x30, cnt_context->ctrl_reg);
5286 me4000_outb(0x00, cnt_context->counter_0_reg);
5287 me4000_outb(0x00, cnt_context->counter_0_reg);
5288
5289 /* Set the mode and value for counter 1 */
5290 me4000_outb(0x70, cnt_context->ctrl_reg);
5291 me4000_outb(0x00, cnt_context->counter_1_reg);
5292 me4000_outb(0x00, cnt_context->counter_1_reg);
5293
5294 /* Set the mode and value for counter 2 */
5295 me4000_outb(0xB0, cnt_context->ctrl_reg);
5296 me4000_outb(0x00, cnt_context->counter_2_reg);
5297 me4000_outb(0x00, cnt_context->counter_2_reg);
5298
5299 return 0;
5300 }
5301
5302 /*------------------------------------ External Interrupt stuff ------------------------------------*/
5303
5304 static int me4000_ext_int_ioctl(struct inode *inode_p, struct file *file_p,
5305 unsigned int service, unsigned long arg)
5306 {
5307 struct me4000_ext_int_context *ext_int_context;
5308
5309 CALL_PDEBUG("me4000_ext_int_ioctl() is executed\n");
5310
5311 ext_int_context = file_p->private_data;
5312
5313 if (_IOC_TYPE(service) != ME4000_MAGIC) {
5314 printk(KERN_ERR "me4000_ext_int_ioctl():Wrong magic number\n");
5315 return -ENOTTY;
5316 }
5317 if (_IOC_NR(service) > ME4000_IOCTL_MAXNR) {
5318 printk(KERN_ERR
5319 "me4000_ext_int_ioctl():Service number to high\n");
5320 return -ENOTTY;
5321 }
5322
5323 switch (service) {
5324 case ME4000_EXT_INT_ENABLE:
5325 return me4000_ext_int_enable(ext_int_context);
5326 case ME4000_EXT_INT_DISABLE:
5327 return me4000_ext_int_disable(ext_int_context);
5328 case ME4000_EXT_INT_COUNT:
5329 return me4000_ext_int_count((unsigned long *)arg,
5330 ext_int_context);
5331 default:
5332 printk(KERN_ERR
5333 "ME4000:me4000_ext_int_ioctl():Invalid service number %d\n",
5334 service);
5335 return -ENOTTY;
5336 }
5337 return 0;
5338 }
5339
5340 static int me4000_ext_int_enable(struct me4000_ext_int_context *ext_int_context)
5341 {
5342 unsigned long tmp;
5343
5344 CALL_PDEBUG("me4000_ext_int_enable() is executed\n");
5345
5346 tmp = me4000_inl(ext_int_context->ctrl_reg);
5347 tmp |= ME4000_AI_CTRL_BIT_EX_IRQ;
5348 me4000_outl(tmp, ext_int_context->ctrl_reg);
5349
5350 return 0;
5351 }
5352
5353 static int me4000_ext_int_disable(struct me4000_ext_int_context *ext_int_context)
5354 {
5355 unsigned long tmp;
5356
5357 CALL_PDEBUG("me4000_ext_int_disable() is executed\n");
5358
5359 tmp = me4000_inl(ext_int_context->ctrl_reg);
5360 tmp &= ~ME4000_AI_CTRL_BIT_EX_IRQ;
5361 me4000_outl(tmp, ext_int_context->ctrl_reg);
5362
5363 return 0;
5364 }
5365
5366 static int me4000_ext_int_count(unsigned long *arg,
5367 struct me4000_ext_int_context *ext_int_context)
5368 {
5369
5370 CALL_PDEBUG("me4000_ext_int_count() is executed\n");
5371
5372 put_user(ext_int_context->int_count, arg);
5373 return 0;
5374 }
5375
5376 /*------------------------------------ General stuff ------------------------------------*/
5377
5378 static int me4000_get_user_info(struct me4000_user_info *arg,
5379 struct me4000_info *board_info)
5380 {
5381 struct me4000_user_info user_info;
5382
5383 CALL_PDEBUG("me4000_get_user_info() is executed\n");
5384
5385 user_info.board_count = board_info->board_count;
5386 user_info.plx_regbase = board_info->plx_regbase;
5387 user_info.plx_regbase_size = board_info->plx_regbase_size;
5388 user_info.me4000_regbase = board_info->me4000_regbase;
5389 user_info.me4000_regbase_size = board_info->me4000_regbase_size;
5390 user_info.serial_no = board_info->serial_no;
5391 user_info.hw_revision = board_info->hw_revision;
5392 user_info.vendor_id = board_info->vendor_id;
5393 user_info.device_id = board_info->device_id;
5394 user_info.pci_bus_no = board_info->pci_bus_no;
5395 user_info.pci_dev_no = board_info->pci_dev_no;
5396 user_info.pci_func_no = board_info->pci_func_no;
5397 user_info.irq = board_info->irq;
5398 user_info.irq_count = board_info->irq_count;
5399 user_info.driver_version = ME4000_DRIVER_VERSION;
5400 user_info.ao_count = board_info->board_p->ao.count;
5401 user_info.ao_fifo_count = board_info->board_p->ao.fifo_count;
5402
5403 user_info.ai_count = board_info->board_p->ai.count;
5404 user_info.ai_sh_count = board_info->board_p->ai.sh_count;
5405 user_info.ai_ex_trig_analog = board_info->board_p->ai.ex_trig_analog;
5406
5407 user_info.dio_count = board_info->board_p->dio.count;
5408
5409 user_info.cnt_count = board_info->board_p->cnt.count;
5410
5411 if (copy_to_user(arg, &user_info, sizeof(struct me4000_user_info)))
5412 return -EFAULT;
5413
5414 return 0;
5415 }
5416
5417 /*------------------------------------ ISR STUFF ------------------------------------*/
5418
5419 static int me4000_ext_int_fasync(int fd, struct file *file_ptr, int mode)
5420 {
5421 int result = 0;
5422 struct me4000_ext_int_context *ext_int_context;
5423
5424 CALL_PDEBUG("me4000_ext_int_fasync() is executed\n");
5425
5426 ext_int_context = file_ptr->private_data;
5427
5428 result =
5429 fasync_helper(fd, file_ptr, mode, &ext_int_context->fasync_ptr);
5430
5431 CALL_PDEBUG("me4000_ext_int_fasync() is leaved\n");
5432 return result;
5433 }
5434
5435 static irqreturn_t me4000_ao_isr(int irq, void *dev_id)
5436 {
5437 u32 tmp;
5438 u32 value;
5439 struct me4000_ao_context *ao_context;
5440 int i;
5441 int c = 0;
5442 int c1 = 0;
5443 //unsigned long before;
5444 //unsigned long after;
5445
5446 ISR_PDEBUG("me4000_ao_isr() is executed\n");
5447
5448 ao_context = dev_id;
5449
5450 /* Check if irq number is right */
5451 if (irq != ao_context->irq) {
5452 ISR_PDEBUG("me4000_ao_isr():incorrect interrupt num: %d\n",
5453 irq);
5454 return IRQ_NONE;
5455 }
5456
5457 /* Check if this DAC rised an interrupt */
5458 if (!
5459 ((0x1 << (ao_context->index + 3)) &
5460 me4000_inl(ao_context->irq_status_reg))) {
5461 ISR_PDEBUG("me4000_ao_isr():Not this DAC\n");
5462 return IRQ_NONE;
5463 }
5464
5465 /* Read status register to find out what happened */
5466 tmp = me4000_inl(ao_context->status_reg);
5467
5468 if (!(tmp & ME4000_AO_STATUS_BIT_EF) && (tmp & ME4000_AO_STATUS_BIT_HF)
5469 && (tmp & ME4000_AO_STATUS_BIT_HF)) {
5470 c = ME4000_AO_FIFO_COUNT;
5471 ISR_PDEBUG("me4000_ao_isr():Fifo empty\n");
5472 } else if ((tmp & ME4000_AO_STATUS_BIT_EF)
5473 && (tmp & ME4000_AO_STATUS_BIT_HF)
5474 && (tmp & ME4000_AO_STATUS_BIT_HF)) {
5475 c = ME4000_AO_FIFO_COUNT / 2;
5476 ISR_PDEBUG("me4000_ao_isr():Fifo under half full\n");
5477 } else {
5478 c = 0;
5479 ISR_PDEBUG("me4000_ao_isr():Fifo full\n");
5480 }
5481
5482 ISR_PDEBUG("me4000_ao_isr():Try to write 0x%04X values\n", c);
5483
5484 while (1) {
5485 c1 = me4000_values_to_end(ao_context->circ_buf,
5486 ME4000_AO_BUFFER_COUNT);
5487 ISR_PDEBUG("me4000_ao_isr():Values to end = %d\n", c1);
5488 if (c1 > c)
5489 c1 = c;
5490
5491 if (c1 <= 0) {
5492 ISR_PDEBUG
5493 ("me4000_ao_isr():Work done or buffer empty\n");
5494 break;
5495 }
5496 //rdtscl(before);
5497 if (((ao_context->fifo_reg & 0xFF) == ME4000_AO_01_FIFO_REG) ||
5498 ((ao_context->fifo_reg & 0xFF) == ME4000_AO_03_FIFO_REG)) {
5499 for (i = 0; i < c1; i++) {
5500 value =
5501 ((u32)
5502 (*
5503 (ao_context->circ_buf.buf +
5504 ao_context->circ_buf.tail + i))) << 16;
5505 outl(value, ao_context->fifo_reg);
5506 }
5507 } else
5508 outsw(ao_context->fifo_reg,
5509 ao_context->circ_buf.buf +
5510 ao_context->circ_buf.tail, c1);
5511
5512 //rdtscl(after);
5513 //printk(KERN_ERR"ME4000:me4000_ao_isr():Time lapse = %lu\n", after - before);
5514
5515 ao_context->circ_buf.tail =
5516 (ao_context->circ_buf.tail + c1) & (ME4000_AO_BUFFER_COUNT -
5517 1);
5518 ISR_PDEBUG("me4000_ao_isr():%d values wrote to port 0x%04X\n",
5519 c1, ao_context->fifo_reg);
5520 c -= c1;
5521 }
5522
5523 /* If there are no values left in the buffer, disable interrupts */
5524 spin_lock(&ao_context->int_lock);
5525 if (!me4000_buf_count(ao_context->circ_buf, ME4000_AO_BUFFER_COUNT)) {
5526 ISR_PDEBUG
5527 ("me4000_ao_isr():Disable Interrupt because no values left in buffer\n");
5528 tmp = me4000_inl(ao_context->ctrl_reg);
5529 tmp &= ~ME4000_AO_CTRL_BIT_ENABLE_IRQ;
5530 me4000_outl(tmp, ao_context->ctrl_reg);
5531 }
5532 spin_unlock(&ao_context->int_lock);
5533
5534 /* Reset the interrupt */
5535 spin_lock(&ao_context->int_lock);
5536 tmp = me4000_inl(ao_context->ctrl_reg);
5537 tmp |= ME4000_AO_CTRL_BIT_RESET_IRQ;
5538 me4000_outl(tmp, ao_context->ctrl_reg);
5539 tmp &= ~ME4000_AO_CTRL_BIT_RESET_IRQ;
5540 me4000_outl(tmp, ao_context->ctrl_reg);
5541
5542 /* If state machine is stopped, flow was interrupted */
5543 if (!(me4000_inl(ao_context->status_reg) & ME4000_AO_STATUS_BIT_FSM)) {
5544 printk(KERN_ERR "ME4000:me4000_ao_isr():Broken pipe\n");
5545 ao_context->pipe_flag = 1; // Set flag in order to inform write routine
5546 tmp &= ~ME4000_AO_CTRL_BIT_ENABLE_IRQ; // Disable interrupt
5547 }
5548 me4000_outl(tmp, ao_context->ctrl_reg);
5549 spin_unlock(&ao_context->int_lock);
5550
5551 /* Wake up waiting process */
5552 wake_up_interruptible(&(ao_context->wait_queue));
5553
5554 /* Count the interrupt */
5555 ao_context->board_info->irq_count++;
5556
5557 return IRQ_HANDLED;
5558 }
5559
5560 static irqreturn_t me4000_ai_isr(int irq, void *dev_id)
5561 {
5562 u32 tmp;
5563 struct me4000_ai_context *ai_context;
5564 int i;
5565 int c = 0;
5566 int c1 = 0;
5567 #ifdef ME4000_ISR_DEBUG
5568 unsigned long before;
5569 unsigned long after;
5570 #endif
5571
5572 ISR_PDEBUG("me4000_ai_isr() is executed\n");
5573
5574 #ifdef ME4000_ISR_DEBUG
5575 rdtscl(before);
5576 #endif
5577
5578 ai_context = dev_id;
5579
5580 /* Check if irq number is right */
5581 if (irq != ai_context->irq) {
5582 ISR_PDEBUG("me4000_ai_isr():incorrect interrupt num: %d\n",
5583 irq);
5584 return IRQ_NONE;
5585 }
5586
5587 if (me4000_inl(ai_context->irq_status_reg) &
5588 ME4000_IRQ_STATUS_BIT_AI_HF) {
5589 ISR_PDEBUG
5590 ("me4000_ai_isr():Fifo half full interrupt occured\n");
5591
5592 /* Read status register to find out what happened */
5593 tmp = me4000_inl(ai_context->ctrl_reg);
5594
5595 if (!(tmp & ME4000_AI_STATUS_BIT_FF_DATA) &&
5596 !(tmp & ME4000_AI_STATUS_BIT_HF_DATA)
5597 && (tmp & ME4000_AI_STATUS_BIT_EF_DATA)) {
5598 ISR_PDEBUG("me4000_ai_isr():Fifo full\n");
5599 c = ME4000_AI_FIFO_COUNT;
5600
5601 /* FIFO overflow, so stop conversion and disable all interrupts */
5602 spin_lock(&ai_context->int_lock);
5603 tmp = me4000_inl(ai_context->ctrl_reg);
5604 tmp |= ME4000_AI_CTRL_BIT_IMMEDIATE_STOP;
5605 tmp &=
5606 ~(ME4000_AI_CTRL_BIT_HF_IRQ |
5607 ME4000_AI_CTRL_BIT_SC_IRQ);
5608 outl(tmp, ai_context->ctrl_reg);
5609 spin_unlock(&ai_context->int_lock);
5610 } else if ((tmp & ME4000_AI_STATUS_BIT_FF_DATA) &&
5611 !(tmp & ME4000_AI_STATUS_BIT_HF_DATA)
5612 && (tmp & ME4000_AI_STATUS_BIT_EF_DATA)) {
5613 ISR_PDEBUG("me4000_ai_isr():Fifo half full\n");
5614 c = ME4000_AI_FIFO_COUNT / 2;
5615 } else {
5616 c = 0;
5617 ISR_PDEBUG
5618 ("me4000_ai_isr():Can't determine state of fifo\n");
5619 }
5620
5621 ISR_PDEBUG("me4000_ai_isr():Try to read %d values\n", c);
5622
5623 while (1) {
5624 c1 = me4000_space_to_end(ai_context->circ_buf,
5625 ME4000_AI_BUFFER_COUNT);
5626 ISR_PDEBUG("me4000_ai_isr():Space to end = %d\n", c1);
5627 if (c1 > c)
5628 c1 = c;
5629
5630 if (c1 <= 0) {
5631 ISR_PDEBUG
5632 ("me4000_ai_isr():Work done or buffer full\n");
5633 break;
5634 }
5635
5636 insw(ai_context->data_reg,
5637 ai_context->circ_buf.buf +
5638 ai_context->circ_buf.head, c1);
5639 ai_context->circ_buf.head =
5640 (ai_context->circ_buf.head +
5641 c1) & (ME4000_AI_BUFFER_COUNT - 1);
5642 c -= c1;
5643 }
5644
5645 /* Work is done, so reset the interrupt */
5646 ISR_PDEBUG
5647 ("me4000_ai_isr():reset interrupt fifo half full interrupt\n");
5648 spin_lock(&ai_context->int_lock);
5649 tmp = me4000_inl(ai_context->ctrl_reg);
5650 tmp |= ME4000_AI_CTRL_BIT_HF_IRQ_RESET;
5651 me4000_outl(tmp, ai_context->ctrl_reg);
5652 tmp &= ~ME4000_AI_CTRL_BIT_HF_IRQ_RESET;
5653 me4000_outl(tmp, ai_context->ctrl_reg);
5654 spin_unlock(&ai_context->int_lock);
5655 }
5656
5657 if (me4000_inl(ai_context->irq_status_reg) & ME4000_IRQ_STATUS_BIT_SC) {
5658 ISR_PDEBUG
5659 ("me4000_ai_isr():Sample counter interrupt occured\n");
5660
5661 if (!ai_context->sample_counter_reload) {
5662 ISR_PDEBUG
5663 ("me4000_ai_isr():Single data block available\n");
5664
5665 /* Poll data until fifo empty */
5666 for (i = 0;
5667 (i < ME4000_AI_FIFO_COUNT / 2)
5668 && (inl(ai_context->ctrl_reg) &
5669 ME4000_AI_STATUS_BIT_EF_DATA); i++) {
5670 if (me4000_space_to_end
5671 (ai_context->circ_buf,
5672 ME4000_AI_BUFFER_COUNT)) {
5673 *(ai_context->circ_buf.buf +
5674 ai_context->circ_buf.head) =
5675 inw(ai_context->data_reg);
5676 ai_context->circ_buf.head =
5677 (ai_context->circ_buf.head +
5678 1) & (ME4000_AI_BUFFER_COUNT - 1);
5679 } else
5680 break;
5681 }
5682 ISR_PDEBUG("me4000_ai_isr():%d values read\n", i);
5683 } else {
5684 if (ai_context->sample_counter <=
5685 ME4000_AI_FIFO_COUNT / 2) {
5686 ISR_PDEBUG
5687 ("me4000_ai_isr():Interrupt from adjustable half full threshold\n");
5688
5689 /* Read status register to find out what happened */
5690 tmp = me4000_inl(ai_context->ctrl_reg);
5691
5692 if (!(tmp & ME4000_AI_STATUS_BIT_FF_DATA) &&
5693 !(tmp & ME4000_AI_STATUS_BIT_HF_DATA)
5694 && (tmp & ME4000_AI_STATUS_BIT_EF_DATA)) {
5695 ISR_PDEBUG
5696 ("me4000_ai_isr():Fifo full\n");
5697 c = ME4000_AI_FIFO_COUNT;
5698
5699 /* FIFO overflow, so stop conversion */
5700 spin_lock(&ai_context->int_lock);
5701 tmp = me4000_inl(ai_context->ctrl_reg);
5702 tmp |=
5703 ME4000_AI_CTRL_BIT_IMMEDIATE_STOP;
5704 outl(tmp, ai_context->ctrl_reg);
5705 spin_unlock(&ai_context->int_lock);
5706 } else if ((tmp & ME4000_AI_STATUS_BIT_FF_DATA)
5707 && !(tmp &
5708 ME4000_AI_STATUS_BIT_HF_DATA)
5709 && (tmp &
5710 ME4000_AI_STATUS_BIT_EF_DATA)) {
5711 ISR_PDEBUG
5712 ("me4000_ai_isr():Fifo half full\n");
5713 c = ME4000_AI_FIFO_COUNT / 2;
5714 } else {
5715 c = ai_context->sample_counter;
5716 ISR_PDEBUG
5717 ("me4000_ai_isr():Sample count values\n");
5718 }
5719
5720 ISR_PDEBUG
5721 ("me4000_ai_isr():Try to read %d values\n",
5722 c);
5723
5724 while (1) {
5725 c1 = me4000_space_to_end(ai_context->
5726 circ_buf,
5727 ME4000_AI_BUFFER_COUNT);
5728 ISR_PDEBUG
5729 ("me4000_ai_isr():Space to end = %d\n",
5730 c1);
5731 if (c1 > c)
5732 c1 = c;
5733
5734 if (c1 <= 0) {
5735 ISR_PDEBUG
5736 ("me4000_ai_isr():Work done or buffer full\n");
5737 break;
5738 }
5739
5740 insw(ai_context->data_reg,
5741 ai_context->circ_buf.buf +
5742 ai_context->circ_buf.head, c1);
5743 ai_context->circ_buf.head =
5744 (ai_context->circ_buf.head +
5745 c1) & (ME4000_AI_BUFFER_COUNT - 1);
5746 c -= c1;
5747 }
5748 } else {
5749 ISR_PDEBUG
5750 ("me4000_ai_isr():Multiple data block available\n");
5751
5752 /* Read status register to find out what happened */
5753 tmp = me4000_inl(ai_context->ctrl_reg);
5754
5755 if (!(tmp & ME4000_AI_STATUS_BIT_FF_DATA) &&
5756 !(tmp & ME4000_AI_STATUS_BIT_HF_DATA)
5757 && (tmp & ME4000_AI_STATUS_BIT_EF_DATA)) {
5758 ISR_PDEBUG
5759 ("me4000_ai_isr():Fifo full\n");
5760 c = ME4000_AI_FIFO_COUNT;
5761
5762 /* FIFO overflow, so stop conversion */
5763 spin_lock(&ai_context->int_lock);
5764 tmp = me4000_inl(ai_context->ctrl_reg);
5765 tmp |=
5766 ME4000_AI_CTRL_BIT_IMMEDIATE_STOP;
5767 outl(tmp, ai_context->ctrl_reg);
5768 spin_unlock(&ai_context->int_lock);
5769
5770 while (1) {
5771 c1 = me4000_space_to_end
5772 (ai_context->circ_buf,
5773 ME4000_AI_BUFFER_COUNT);
5774 ISR_PDEBUG
5775 ("me4000_ai_isr():Space to end = %d\n",
5776 c1);
5777 if (c1 > c)
5778 c1 = c;
5779
5780 if (c1 <= 0) {
5781 ISR_PDEBUG
5782 ("me4000_ai_isr():Work done or buffer full\n");
5783 break;
5784 }
5785
5786 insw(ai_context->data_reg,
5787 ai_context->circ_buf.buf +
5788 ai_context->circ_buf.head,
5789 c1);
5790 ai_context->circ_buf.head =
5791 (ai_context->circ_buf.head +
5792 c1) &
5793 (ME4000_AI_BUFFER_COUNT -
5794 1);
5795 c -= c1;
5796 }
5797 } else if ((tmp & ME4000_AI_STATUS_BIT_FF_DATA)
5798 && !(tmp &
5799 ME4000_AI_STATUS_BIT_HF_DATA)
5800 && (tmp &
5801 ME4000_AI_STATUS_BIT_EF_DATA)) {
5802 ISR_PDEBUG
5803 ("me4000_ai_isr():Fifo half full\n");
5804 c = ME4000_AI_FIFO_COUNT / 2;
5805
5806 while (1) {
5807 c1 = me4000_space_to_end
5808 (ai_context->circ_buf,
5809 ME4000_AI_BUFFER_COUNT);
5810 ISR_PDEBUG
5811 ("me4000_ai_isr():Space to end = %d\n",
5812 c1);
5813 if (c1 > c)
5814 c1 = c;
5815
5816 if (c1 <= 0) {
5817 ISR_PDEBUG
5818 ("me4000_ai_isr():Work done or buffer full\n");
5819 break;
5820 }
5821
5822 insw(ai_context->data_reg,
5823 ai_context->circ_buf.buf +
5824 ai_context->circ_buf.head,
5825 c1);
5826 ai_context->circ_buf.head =
5827 (ai_context->circ_buf.head +
5828 c1) &
5829 (ME4000_AI_BUFFER_COUNT -
5830 1);
5831 c -= c1;
5832 }
5833 } else {
5834 /* Poll data until fifo empty */
5835 for (i = 0;
5836 (i < ME4000_AI_FIFO_COUNT / 2)
5837 && (inl(ai_context->ctrl_reg) &
5838 ME4000_AI_STATUS_BIT_EF_DATA);
5839 i++) {
5840 if (me4000_space_to_end
5841 (ai_context->circ_buf,
5842 ME4000_AI_BUFFER_COUNT)) {
5843 *(ai_context->circ_buf.
5844 buf +
5845 ai_context->circ_buf.
5846 head) =
5847 inw(ai_context->data_reg);
5848 ai_context->circ_buf.
5849 head =
5850 (ai_context->
5851 circ_buf.head +
5852 1) &
5853 (ME4000_AI_BUFFER_COUNT
5854 - 1);
5855 } else
5856 break;
5857 }
5858 ISR_PDEBUG
5859 ("me4000_ai_isr():%d values read\n",
5860 i);
5861 }
5862 }
5863 }
5864
5865 /* Work is done, so reset the interrupt */
5866 ISR_PDEBUG
5867 ("me4000_ai_isr():reset interrupt from sample counter\n");
5868 spin_lock(&ai_context->int_lock);
5869 tmp = me4000_inl(ai_context->ctrl_reg);
5870 tmp |= ME4000_AI_CTRL_BIT_SC_IRQ_RESET;
5871 me4000_outl(tmp, ai_context->ctrl_reg);
5872 tmp &= ~ME4000_AI_CTRL_BIT_SC_IRQ_RESET;
5873 me4000_outl(tmp, ai_context->ctrl_reg);
5874 spin_unlock(&ai_context->int_lock);
5875 }
5876
5877 /* Values are now available, so wake up waiting process */
5878 if (me4000_buf_count(ai_context->circ_buf, ME4000_AI_BUFFER_COUNT)) {
5879 ISR_PDEBUG("me4000_ai_isr():Wake up waiting process\n");
5880 wake_up_interruptible(&(ai_context->wait_queue));
5881 }
5882
5883 /* If there is no space left in the buffer, disable interrupts */
5884 spin_lock(&ai_context->int_lock);
5885 if (!me4000_buf_space(ai_context->circ_buf, ME4000_AI_BUFFER_COUNT)) {
5886 ISR_PDEBUG
5887 ("me4000_ai_isr():Disable Interrupt because no space left in buffer\n");
5888 tmp = me4000_inl(ai_context->ctrl_reg);
5889 tmp &=
5890 ~(ME4000_AI_CTRL_BIT_SC_IRQ | ME4000_AI_CTRL_BIT_HF_IRQ |
5891 ME4000_AI_CTRL_BIT_LE_IRQ);
5892 me4000_outl(tmp, ai_context->ctrl_reg);
5893 }
5894 spin_unlock(&ai_context->int_lock);
5895
5896 #ifdef ME4000_ISR_DEBUG
5897 rdtscl(after);
5898 printk(KERN_ERR "ME4000:me4000_ai_isr():Time lapse = %lu\n",
5899 after - before);
5900 #endif
5901
5902 return IRQ_HANDLED;
5903 }
5904
5905 static irqreturn_t me4000_ext_int_isr(int irq, void *dev_id)
5906 {
5907 struct me4000_ext_int_context *ext_int_context;
5908 unsigned long tmp;
5909
5910 ISR_PDEBUG("me4000_ext_int_isr() is executed\n");
5911
5912 ext_int_context = dev_id;
5913
5914 /* Check if irq number is right */
5915 if (irq != ext_int_context->irq) {
5916 ISR_PDEBUG("me4000_ext_int_isr():incorrect interrupt num: %d\n",
5917 irq);
5918 return IRQ_NONE;
5919 }
5920
5921 if (me4000_inl(ext_int_context->irq_status_reg) &
5922 ME4000_IRQ_STATUS_BIT_EX) {
5923 ISR_PDEBUG("me4000_ext_int_isr():External interrupt occured\n");
5924 tmp = me4000_inl(ext_int_context->ctrl_reg);
5925 tmp |= ME4000_AI_CTRL_BIT_EX_IRQ_RESET;
5926 me4000_outl(tmp, ext_int_context->ctrl_reg);
5927 tmp &= ~ME4000_AI_CTRL_BIT_EX_IRQ_RESET;
5928 me4000_outl(tmp, ext_int_context->ctrl_reg);
5929
5930 ext_int_context->int_count++;
5931
5932 if (ext_int_context->fasync_ptr) {
5933 ISR_PDEBUG
5934 ("me2600_ext_int_isr():Send signal to process\n");
5935 kill_fasync(&ext_int_context->fasync_ptr, SIGIO,
5936 POLL_IN);
5937 }
5938 }
5939
5940 return IRQ_HANDLED;
5941 }
5942
5943 static void __exit me4000_module_exit(void)
5944 {
5945 struct me4000_info *board_info;
5946
5947 CALL_PDEBUG("cleanup_module() is executed\n");
5948
5949 unregister_chrdev(me4000_ext_int_major_driver_no, ME4000_EXT_INT_NAME);
5950
5951 unregister_chrdev(me4000_cnt_major_driver_no, ME4000_CNT_NAME);
5952
5953 unregister_chrdev(me4000_dio_major_driver_no, ME4000_DIO_NAME);
5954
5955 unregister_chrdev(me4000_ai_major_driver_no, ME4000_AI_NAME);
5956
5957 unregister_chrdev(me4000_ao_major_driver_no, ME4000_AO_NAME);
5958
5959 remove_proc_entry("me4000", NULL);
5960
5961 pci_unregister_driver(&me4000_driver);
5962
5963 /* Reset the boards */
5964 list_for_each_entry(board_info, &me4000_board_info_list, list) {
5965 me4000_reset_board(board_info);
5966 }
5967
5968 clear_board_info_list();
5969 }
5970
5971 module_exit(me4000_module_exit);
5972
5973 static int me4000_read_procmem(char *buf, char **start, off_t offset, int count,
5974 int *eof, void *data)
5975 {
5976 int len = 0;
5977 int limit = count - 1000;
5978 struct me4000_info *board_info;
5979
5980 len += sprintf(buf + len, "\nME4000 DRIVER VERSION %X.%X.%X\n\n",
5981 (ME4000_DRIVER_VERSION & 0xFF0000) >> 16,
5982 (ME4000_DRIVER_VERSION & 0xFF00) >> 8,
5983 (ME4000_DRIVER_VERSION & 0xFF));
5984
5985 /* Search for the board context */
5986 list_for_each_entry(board_info, &me4000_board_info_list, list) {
5987 len +=
5988 sprintf(buf + len, "Board number %d:\n",
5989 board_info->board_count);
5990 len += sprintf(buf + len, "---------------\n");
5991 len +=
5992 sprintf(buf + len, "PLX base register = 0x%lX\n",
5993 board_info->plx_regbase);
5994 len +=
5995 sprintf(buf + len, "PLX base register size = 0x%X\n",
5996 (unsigned int)board_info->plx_regbase_size);
5997 len +=
5998 sprintf(buf + len, "ME4000 base register = 0x%X\n",
5999 (unsigned int)board_info->me4000_regbase);
6000 len +=
6001 sprintf(buf + len, "ME4000 base register size = 0x%X\n",
6002 (unsigned int)board_info->me4000_regbase_size);
6003 len +=
6004 sprintf(buf + len, "Serial number = 0x%X\n",
6005 board_info->serial_no);
6006 len +=
6007 sprintf(buf + len, "Hardware revision = 0x%X\n",
6008 board_info->hw_revision);
6009 len +=
6010 sprintf(buf + len, "Vendor id = 0x%X\n",
6011 board_info->vendor_id);
6012 len +=
6013 sprintf(buf + len, "Device id = 0x%X\n",
6014 board_info->device_id);
6015 len +=
6016 sprintf(buf + len, "PCI bus number = %d\n",
6017 board_info->pci_bus_no);
6018 len +=
6019 sprintf(buf + len, "PCI device number = %d\n",
6020 board_info->pci_dev_no);
6021 len +=
6022 sprintf(buf + len, "PCI function number = %d\n",
6023 board_info->pci_func_no);
6024 len += sprintf(buf + len, "IRQ = %u\n", board_info->irq);
6025 len +=
6026 sprintf(buf + len,
6027 "Count of interrupts since module was loaded = %d\n",
6028 board_info->irq_count);
6029
6030 len +=
6031 sprintf(buf + len, "Count of analog outputs = %d\n",
6032 board_info->board_p->ao.count);
6033 len +=
6034 sprintf(buf + len, "Count of analog output fifos = %d\n",
6035 board_info->board_p->ao.fifo_count);
6036
6037 len +=
6038 sprintf(buf + len, "Count of analog inputs = %d\n",
6039 board_info->board_p->ai.count);
6040 len +=
6041 sprintf(buf + len,
6042 "Count of sample and hold devices for analog input = %d\n",
6043 board_info->board_p->ai.sh_count);
6044 len +=
6045 sprintf(buf + len,
6046 "Analog external trigger available for analog input = %d\n",
6047 board_info->board_p->ai.ex_trig_analog);
6048
6049 len +=
6050 sprintf(buf + len, "Count of digital ports = %d\n",
6051 board_info->board_p->dio.count);
6052
6053 len +=
6054 sprintf(buf + len, "Count of counter devices = %d\n",
6055 board_info->board_p->cnt.count);
6056 len +=
6057 sprintf(buf + len, "AI control register = 0x%08X\n",
6058 inl(board_info->me4000_regbase +
6059 ME4000_AI_CTRL_REG));
6060
6061 len += sprintf(buf + len, "AO 0 control register = 0x%08X\n",
6062 inl(board_info->me4000_regbase +
6063 ME4000_AO_00_CTRL_REG));
6064 len +=
6065 sprintf(buf + len, "AO 0 status register = 0x%08X\n",
6066 inl(board_info->me4000_regbase +
6067 ME4000_AO_00_STATUS_REG));
6068 len +=
6069 sprintf(buf + len, "AO 1 control register = 0x%08X\n",
6070 inl(board_info->me4000_regbase +
6071 ME4000_AO_01_CTRL_REG));
6072 len +=
6073 sprintf(buf + len, "AO 1 status register = 0x%08X\n",
6074 inl(board_info->me4000_regbase +
6075 ME4000_AO_01_STATUS_REG));
6076 len +=
6077 sprintf(buf + len, "AO 2 control register = 0x%08X\n",
6078 inl(board_info->me4000_regbase +
6079 ME4000_AO_02_CTRL_REG));
6080 len +=
6081 sprintf(buf + len, "AO 2 status register = 0x%08X\n",
6082 inl(board_info->me4000_regbase +
6083 ME4000_AO_02_STATUS_REG));
6084 len +=
6085 sprintf(buf + len, "AO 3 control register = 0x%08X\n",
6086 inl(board_info->me4000_regbase +
6087 ME4000_AO_03_CTRL_REG));
6088 len +=
6089 sprintf(buf + len, "AO 3 status register = 0x%08X\n",
6090 inl(board_info->me4000_regbase +
6091 ME4000_AO_03_STATUS_REG));
6092 if (len >= limit)
6093 break;
6094 }
6095
6096 *eof = 1;
6097 return len;
6098 }
Support for the Chinese Samsung S3C2440 based development boards