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fs/inode.c: properly init address_space->writeback_index
[linux-2.6/mini2440.git] / drivers / net / fs_enet / mac-fec.c
blob0a7d1c5c652479e1f032764360dd4b8b320e5d02
1 /*
2 * Freescale Ethernet controllers
3 *
4 * Copyright (c) 2005 Intracom S.A.
5 * by Pantelis Antoniou <panto@intracom.gr>
6 *
7 * 2005 (c) MontaVista Software, Inc.
8 * Vitaly Bordug <vbordug@ru.mvista.com>
9 *
10 * This file is licensed under the terms of the GNU General Public License
11 * version 2. This program is licensed "as is" without any warranty of any
12 * kind, whether express or implied.
13 */
14
15 #include <linux/module.h>
16 #include <linux/kernel.h>
17 #include <linux/types.h>
18 #include <linux/string.h>
19 #include <linux/ptrace.h>
20 #include <linux/errno.h>
21 #include <linux/ioport.h>
22 #include <linux/slab.h>
23 #include <linux/interrupt.h>
24 #include <linux/init.h>
25 #include <linux/delay.h>
26 #include <linux/netdevice.h>
27 #include <linux/etherdevice.h>
28 #include <linux/skbuff.h>
29 #include <linux/spinlock.h>
30 #include <linux/mii.h>
31 #include <linux/ethtool.h>
32 #include <linux/bitops.h>
33 #include <linux/fs.h>
34 #include <linux/platform_device.h>
35 #include <linux/of_device.h>
36
37 #include <asm/irq.h>
38 #include <asm/uaccess.h>
39
40 #ifdef CONFIG_8xx
41 #include <asm/8xx_immap.h>
42 #include <asm/pgtable.h>
43 #include <asm/mpc8xx.h>
44 #include <asm/cpm1.h>
45 #endif
46
47 #include "fs_enet.h"
48 #include "fec.h"
49
50 /*************************************************/
51
52 #if defined(CONFIG_CPM1)
53 /* for a CPM1 __raw_xxx's are sufficient */
54 #define __fs_out32(addr, x) __raw_writel(x, addr)
55 #define __fs_out16(addr, x) __raw_writew(x, addr)
56 #define __fs_in32(addr) __raw_readl(addr)
57 #define __fs_in16(addr) __raw_readw(addr)
58 #else
59 /* for others play it safe */
60 #define __fs_out32(addr, x) out_be32(addr, x)
61 #define __fs_out16(addr, x) out_be16(addr, x)
62 #define __fs_in32(addr) in_be32(addr)
63 #define __fs_in16(addr) in_be16(addr)
64 #endif
65
66 /* write */
67 #define FW(_fecp, _reg, _v) __fs_out32(&(_fecp)->fec_ ## _reg, (_v))
68
69 /* read */
70 #define FR(_fecp, _reg) __fs_in32(&(_fecp)->fec_ ## _reg)
71
72 /* set bits */
73 #define FS(_fecp, _reg, _v) FW(_fecp, _reg, FR(_fecp, _reg) | (_v))
74
75 /* clear bits */
76 #define FC(_fecp, _reg, _v) FW(_fecp, _reg, FR(_fecp, _reg) & ~(_v))
77
78 /*
79 * Delay to wait for FEC reset command to complete (in us)
80 */
81 #define FEC_RESET_DELAY 50
82
83 static int whack_reset(fec_t __iomem *fecp)
84 {
85 int i;
86
87 FW(fecp, ecntrl, FEC_ECNTRL_PINMUX | FEC_ECNTRL_RESET);
88 for (i = 0; i < FEC_RESET_DELAY; i++) {
89 if ((FR(fecp, ecntrl) & FEC_ECNTRL_RESET) == 0)
90 return 0; /* OK */
91 udelay(1);
92 }
93
94 return -1;
95 }
96
97 static int do_pd_setup(struct fs_enet_private *fep)
98 {
99 struct of_device *ofdev = to_of_device(fep->dev);
100
101 fep->interrupt = of_irq_to_resource(ofdev->node, 0, NULL);
102 if (fep->interrupt == NO_IRQ)
103 return -EINVAL;
104
105 fep->fec.fecp = of_iomap(ofdev->node, 0);
106 if (!fep->fcc.fccp)
107 return -EINVAL;
108
109 return 0;
110 }
111
112 #define FEC_NAPI_RX_EVENT_MSK (FEC_ENET_RXF | FEC_ENET_RXB)
113 #define FEC_RX_EVENT (FEC_ENET_RXF)
114 #define FEC_TX_EVENT (FEC_ENET_TXF)
115 #define FEC_ERR_EVENT_MSK (FEC_ENET_HBERR | FEC_ENET_BABR | \
116 FEC_ENET_BABT | FEC_ENET_EBERR)
117
118 static int setup_data(struct net_device *dev)
119 {
120 struct fs_enet_private *fep = netdev_priv(dev);
121
122 if (do_pd_setup(fep) != 0)
123 return -EINVAL;
124
125 fep->fec.hthi = 0;
126 fep->fec.htlo = 0;
127
128 fep->ev_napi_rx = FEC_NAPI_RX_EVENT_MSK;
129 fep->ev_rx = FEC_RX_EVENT;
130 fep->ev_tx = FEC_TX_EVENT;
131 fep->ev_err = FEC_ERR_EVENT_MSK;
132
133 return 0;
134 }
135
136 static int allocate_bd(struct net_device *dev)
137 {
138 struct fs_enet_private *fep = netdev_priv(dev);
139 const struct fs_platform_info *fpi = fep->fpi;
140
141 fep->ring_base = (void __force __iomem *)dma_alloc_coherent(fep->dev,
142 (fpi->tx_ring + fpi->rx_ring) *
143 sizeof(cbd_t), &fep->ring_mem_addr,
144 GFP_KERNEL);
145 if (fep->ring_base == NULL)
146 return -ENOMEM;
147
148 return 0;
149 }
150
151 static void free_bd(struct net_device *dev)
152 {
153 struct fs_enet_private *fep = netdev_priv(dev);
154 const struct fs_platform_info *fpi = fep->fpi;
155
156 if(fep->ring_base)
157 dma_free_coherent(fep->dev, (fpi->tx_ring + fpi->rx_ring)
158 * sizeof(cbd_t),
159 (void __force *)fep->ring_base,
160 fep->ring_mem_addr);
161 }
162
163 static void cleanup_data(struct net_device *dev)
164 {
165 /* nothing */
166 }
167
168 static void set_promiscuous_mode(struct net_device *dev)
169 {
170 struct fs_enet_private *fep = netdev_priv(dev);
171 fec_t __iomem *fecp = fep->fec.fecp;
172
173 FS(fecp, r_cntrl, FEC_RCNTRL_PROM);
174 }
175
176 static void set_multicast_start(struct net_device *dev)
177 {
178 struct fs_enet_private *fep = netdev_priv(dev);
179
180 fep->fec.hthi = 0;
181 fep->fec.htlo = 0;
182 }
183
184 static void set_multicast_one(struct net_device *dev, const u8 *mac)
185 {
186 struct fs_enet_private *fep = netdev_priv(dev);
187 int temp, hash_index, i, j;
188 u32 crc, csrVal;
189 u8 byte, msb;
190
191 crc = 0xffffffff;
192 for (i = 0; i < 6; i++) {
193 byte = mac[i];
194 for (j = 0; j < 8; j++) {
195 msb = crc >> 31;
196 crc <<= 1;
197 if (msb ^ (byte & 0x1))
198 crc ^= FEC_CRC_POLY;
199 byte >>= 1;
200 }
201 }
202
203 temp = (crc & 0x3f) >> 1;
204 hash_index = ((temp & 0x01) << 4) |
205 ((temp & 0x02) << 2) |
206 ((temp & 0x04)) |
207 ((temp & 0x08) >> 2) |
208 ((temp & 0x10) >> 4);
209 csrVal = 1 << hash_index;
210 if (crc & 1)
211 fep->fec.hthi |= csrVal;
212 else
213 fep->fec.htlo |= csrVal;
214 }
215
216 static void set_multicast_finish(struct net_device *dev)
217 {
218 struct fs_enet_private *fep = netdev_priv(dev);
219 fec_t __iomem *fecp = fep->fec.fecp;
220
221 /* if all multi or too many multicasts; just enable all */
222 if ((dev->flags & IFF_ALLMULTI) != 0 ||
223 dev->mc_count > FEC_MAX_MULTICAST_ADDRS) {
224 fep->fec.hthi = 0xffffffffU;
225 fep->fec.htlo = 0xffffffffU;
226 }
227
228 FC(fecp, r_cntrl, FEC_RCNTRL_PROM);
229 FW(fecp, hash_table_high, fep->fec.hthi);
230 FW(fecp, hash_table_low, fep->fec.htlo);
231 }
232
233 static void set_multicast_list(struct net_device *dev)
234 {
235 struct dev_mc_list *pmc;
236
237 if ((dev->flags & IFF_PROMISC) == 0) {
238 set_multicast_start(dev);
239 for (pmc = dev->mc_list; pmc != NULL; pmc = pmc->next)
240 set_multicast_one(dev, pmc->dmi_addr);
241 set_multicast_finish(dev);
242 } else
243 set_promiscuous_mode(dev);
244 }
245
246 static void restart(struct net_device *dev)
247 {
248 #ifdef CONFIG_DUET
249 immap_t *immap = fs_enet_immap;
250 u32 cptr;
251 #endif
252 struct fs_enet_private *fep = netdev_priv(dev);
253 fec_t __iomem *fecp = fep->fec.fecp;
254 const struct fs_platform_info *fpi = fep->fpi;
255 dma_addr_t rx_bd_base_phys, tx_bd_base_phys;
256 int r;
257 u32 addrhi, addrlo;
258
259 struct mii_bus* mii = fep->phydev->bus;
260 struct fec_info* fec_inf = mii->priv;
261
262 r = whack_reset(fep->fec.fecp);
263 if (r != 0)
264 printk(KERN_ERR DRV_MODULE_NAME
265 ": %s FEC Reset FAILED!\n", dev->name);
266 /*
267 * Set station address.
268 */
269 addrhi = ((u32) dev->dev_addr[0] << 24) |
270 ((u32) dev->dev_addr[1] << 16) |
271 ((u32) dev->dev_addr[2] << 8) |
272 (u32) dev->dev_addr[3];
273 addrlo = ((u32) dev->dev_addr[4] << 24) |
274 ((u32) dev->dev_addr[5] << 16);
275 FW(fecp, addr_low, addrhi);
276 FW(fecp, addr_high, addrlo);
277
278 /*
279 * Reset all multicast.
280 */
281 FW(fecp, hash_table_high, fep->fec.hthi);
282 FW(fecp, hash_table_low, fep->fec.htlo);
283
284 /*
285 * Set maximum receive buffer size.
286 */
287 FW(fecp, r_buff_size, PKT_MAXBLR_SIZE);
288 FW(fecp, r_hash, PKT_MAXBUF_SIZE);
289
290 /* get physical address */
291 rx_bd_base_phys = fep->ring_mem_addr;
292 tx_bd_base_phys = rx_bd_base_phys + sizeof(cbd_t) * fpi->rx_ring;
293
294 /*
295 * Set receive and transmit descriptor base.
296 */
297 FW(fecp, r_des_start, rx_bd_base_phys);
298 FW(fecp, x_des_start, tx_bd_base_phys);
299
300 fs_init_bds(dev);
301
302 /*
303 * Enable big endian and don't care about SDMA FC.
304 */
305 FW(fecp, fun_code, 0x78000000);
306
307 /*
308 * Set MII speed.
309 */
310 FW(fecp, mii_speed, fec_inf->mii_speed);
311
312 /*
313 * Clear any outstanding interrupt.
314 */
315 FW(fecp, ievent, 0xffc0);
316 #ifndef CONFIG_PPC_MERGE
317 FW(fecp, ivec, (fep->interrupt / 2) << 29);
318 #else
319 FW(fecp, ivec, (virq_to_hw(fep->interrupt) / 2) << 29);
320 #endif
321
322 /*
323 * adjust to speed (only for DUET & RMII)
324 */
325 #ifdef CONFIG_DUET
326 if (fpi->use_rmii) {
327 cptr = in_be32(&immap->im_cpm.cp_cptr);
328 switch (fs_get_fec_index(fpi->fs_no)) {
329 case 0:
330 cptr |= 0x100;
331 if (fep->speed == 10)
332 cptr |= 0x0000010;
333 else if (fep->speed == 100)
334 cptr &= ~0x0000010;
335 break;
336 case 1:
337 cptr |= 0x80;
338 if (fep->speed == 10)
339 cptr |= 0x0000008;
340 else if (fep->speed == 100)
341 cptr &= ~0x0000008;
342 break;
343 default:
344 BUG(); /* should never happen */
345 break;
346 }
347 out_be32(&immap->im_cpm.cp_cptr, cptr);
348 }
349 #endif
350
351
352 FW(fecp, r_cntrl, FEC_RCNTRL_MII_MODE); /* MII enable */
353 /*
354 * adjust to duplex mode
355 */
356 if (fep->phydev->duplex) {
357 FC(fecp, r_cntrl, FEC_RCNTRL_DRT);
358 FS(fecp, x_cntrl, FEC_TCNTRL_FDEN); /* FD enable */
359 } else {
360 FS(fecp, r_cntrl, FEC_RCNTRL_DRT);
361 FC(fecp, x_cntrl, FEC_TCNTRL_FDEN); /* FD disable */
362 }
363
364 /*
365 * Enable interrupts we wish to service.
366 */
367 FW(fecp, imask, FEC_ENET_TXF | FEC_ENET_TXB |
368 FEC_ENET_RXF | FEC_ENET_RXB);
369
370 /*
371 * And last, enable the transmit and receive processing.
372 */
373 FW(fecp, ecntrl, FEC_ECNTRL_PINMUX | FEC_ECNTRL_ETHER_EN);
374 FW(fecp, r_des_active, 0x01000000);
375 }
376
377 static void stop(struct net_device *dev)
378 {
379 struct fs_enet_private *fep = netdev_priv(dev);
380 const struct fs_platform_info *fpi = fep->fpi;
381 fec_t __iomem *fecp = fep->fec.fecp;
382
383 struct fec_info* feci= fep->phydev->bus->priv;
384
385 int i;
386
387 if ((FR(fecp, ecntrl) & FEC_ECNTRL_ETHER_EN) == 0)
388 return; /* already down */
389
390 FW(fecp, x_cntrl, 0x01); /* Graceful transmit stop */
391 for (i = 0; ((FR(fecp, ievent) & 0x10000000) == 0) &&
392 i < FEC_RESET_DELAY; i++)
393 udelay(1);
394
395 if (i == FEC_RESET_DELAY)
396 printk(KERN_WARNING DRV_MODULE_NAME
397 ": %s FEC timeout on graceful transmit stop\n",
398 dev->name);
399 /*
400 * Disable FEC. Let only MII interrupts.
401 */
402 FW(fecp, imask, 0);
403 FC(fecp, ecntrl, FEC_ECNTRL_ETHER_EN);
404
405 fs_cleanup_bds(dev);
406
407 /* shut down FEC1? that's where the mii bus is */
408 if (fpi->has_phy) {
409 FS(fecp, r_cntrl, FEC_RCNTRL_MII_MODE); /* MII enable */
410 FS(fecp, ecntrl, FEC_ECNTRL_PINMUX | FEC_ECNTRL_ETHER_EN);
411 FW(fecp, ievent, FEC_ENET_MII);
412 FW(fecp, mii_speed, feci->mii_speed);
413 }
414 }
415
416 static void pre_request_irq(struct net_device *dev, int irq)
417 {
418 #ifndef CONFIG_PPC_MERGE
419 immap_t *immap = fs_enet_immap;
420 u32 siel;
421
422 /* SIU interrupt */
423 if (irq >= SIU_IRQ0 && irq < SIU_LEVEL7) {
424
425 siel = in_be32(&immap->im_siu_conf.sc_siel);
426 if ((irq & 1) == 0)
427 siel |= (0x80000000 >> irq);
428 else
429 siel &= ~(0x80000000 >> (irq & ~1));
430 out_be32(&immap->im_siu_conf.sc_siel, siel);
431 }
432 #endif
433 }
434
435 static void post_free_irq(struct net_device *dev, int irq)
436 {
437 /* nothing */
438 }
439
440 static void napi_clear_rx_event(struct net_device *dev)
441 {
442 struct fs_enet_private *fep = netdev_priv(dev);
443 fec_t __iomem *fecp = fep->fec.fecp;
444
445 FW(fecp, ievent, FEC_NAPI_RX_EVENT_MSK);
446 }
447
448 static void napi_enable_rx(struct net_device *dev)
449 {
450 struct fs_enet_private *fep = netdev_priv(dev);
451 fec_t __iomem *fecp = fep->fec.fecp;
452
453 FS(fecp, imask, FEC_NAPI_RX_EVENT_MSK);
454 }
455
456 static void napi_disable_rx(struct net_device *dev)
457 {
458 struct fs_enet_private *fep = netdev_priv(dev);
459 fec_t __iomem *fecp = fep->fec.fecp;
460
461 FC(fecp, imask, FEC_NAPI_RX_EVENT_MSK);
462 }
463
464 static void rx_bd_done(struct net_device *dev)
465 {
466 struct fs_enet_private *fep = netdev_priv(dev);
467 fec_t __iomem *fecp = fep->fec.fecp;
468
469 FW(fecp, r_des_active, 0x01000000);
470 }
471
472 static void tx_kickstart(struct net_device *dev)
473 {
474 struct fs_enet_private *fep = netdev_priv(dev);
475 fec_t __iomem *fecp = fep->fec.fecp;
476
477 FW(fecp, x_des_active, 0x01000000);
478 }
479
480 static u32 get_int_events(struct net_device *dev)
481 {
482 struct fs_enet_private *fep = netdev_priv(dev);
483 fec_t __iomem *fecp = fep->fec.fecp;
484
485 return FR(fecp, ievent) & FR(fecp, imask);
486 }
487
488 static void clear_int_events(struct net_device *dev, u32 int_events)
489 {
490 struct fs_enet_private *fep = netdev_priv(dev);
491 fec_t __iomem *fecp = fep->fec.fecp;
492
493 FW(fecp, ievent, int_events);
494 }
495
496 static void ev_error(struct net_device *dev, u32 int_events)
497 {
498 printk(KERN_WARNING DRV_MODULE_NAME
499 ": %s FEC ERROR(s) 0x%x\n", dev->name, int_events);
500 }
501
502 static int get_regs(struct net_device *dev, void *p, int *sizep)
503 {
504 struct fs_enet_private *fep = netdev_priv(dev);
505
506 if (*sizep < sizeof(fec_t))
507 return -EINVAL;
508
509 memcpy_fromio(p, fep->fec.fecp, sizeof(fec_t));
510
511 return 0;
512 }
513
514 static int get_regs_len(struct net_device *dev)
515 {
516 return sizeof(fec_t);
517 }
518
519 static void tx_restart(struct net_device *dev)
520 {
521 /* nothing */
522 }
523
524 /*************************************************************************/
525
526 const struct fs_ops fs_fec_ops = {
527 .setup_data = setup_data,
528 .cleanup_data = cleanup_data,
529 .set_multicast_list = set_multicast_list,
530 .restart = restart,
531 .stop = stop,
532 .pre_request_irq = pre_request_irq,
533 .post_free_irq = post_free_irq,
534 .napi_clear_rx_event = napi_clear_rx_event,
535 .napi_enable_rx = napi_enable_rx,
536 .napi_disable_rx = napi_disable_rx,
537 .rx_bd_done = rx_bd_done,
538 .tx_kickstart = tx_kickstart,
539 .get_int_events = get_int_events,
540 .clear_int_events = clear_int_events,
541 .ev_error = ev_error,
542 .get_regs = get_regs,
543 .get_regs_len = get_regs_len,
544 .tx_restart = tx_restart,
545 .allocate_bd = allocate_bd,
546 .free_bd = free_bd,
547 };
548
Support for the Chinese Samsung S3C2440 based development boards