drivers/spi/spi_s3c24xx.c

   1 /* linux/drivers/spi/spi_s3c24xx.c
   2  *
   3  * Copyright (c) 2006 Ben Dooks
   4  * Copyright (c) 2006 Simtec Electronics
   5  *      Ben Dooks <ben@simtec.co.uk>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  *
  11 */
  12
  13 #include <linux/init.h>
  14 #include <linux/spinlock.h>
  15 #include <linux/workqueue.h>
  16 #include <linux/interrupt.h>
  17 #include <linux/delay.h>
  18 #include <linux/errno.h>
  19 #include <linux/err.h>
  20 #include <linux/clk.h>
  21 #include <linux/platform_device.h>
  22 #include <linux/gpio.h>
  23
  24 #include <linux/spi/spi.h>
  25 #include <linux/spi/spi_bitbang.h>
  26
  27 #include <asm/io.h>
  28 #include <asm/dma.h>
  29 #include <mach/hardware.h>
  30
  31 #include <plat/regs-spi.h>
  32 #include <mach/spi.h>
  33
  34 struct s3c24xx_spi {
  35         /* bitbang has to be first */
  36         struct spi_bitbang       bitbang;
  37         struct completion        done;
  38
  39         void __iomem            *regs;
  40         int                      irq;
  41         int                      len;
  42         int                      count;
  43
  44         void                    (*set_cs)(struct s3c2410_spi_info *spi,
  45                                           int cs, int pol);
  46
  47         /* data buffers */
  48         const unsigned char     *tx;
  49         unsigned char           *rx;
  50
  51         struct clk              *clk;
  52         struct resource         *ioarea;
  53         struct spi_master       *master;
  54         struct spi_device       *curdev;
  55         struct device           *dev;
  56         struct s3c2410_spi_info *pdata;
  57 };
  58
  59 #define SPCON_DEFAULT (S3C2410_SPCON_MSTR | S3C2410_SPCON_SMOD_INT)
  60 #define SPPIN_DEFAULT (S3C2410_SPPIN_KEEP)
  61
  62 static inline struct s3c24xx_spi *to_hw(struct spi_device *sdev)
  63 {
  64         return spi_master_get_devdata(sdev->master);
  65 }
  66
  67 static void s3c24xx_spi_gpiocs(struct s3c2410_spi_info *spi, int cs, int pol)
  68 {
  69         gpio_set_value(spi->pin_cs, pol);
  70 }
  71
  72 static void s3c24xx_spi_chipsel(struct spi_device *spi, int value)
  73 {
  74         struct s3c24xx_spi *hw = to_hw(spi);
  75         unsigned int cspol = spi->mode & SPI_CS_HIGH ? 1 : 0;
  76         unsigned int spcon;
  77
  78         switch (value) {
  79         case BITBANG_CS_INACTIVE:
  80                 hw->set_cs(hw->pdata, spi->chip_select, cspol^1);
  81                 break;
  82
  83         case BITBANG_CS_ACTIVE:
  84                 spcon = readb(hw->regs + S3C2410_SPCON);
  85
  86                 if (spi->mode & SPI_CPHA)
  87                         spcon |= S3C2410_SPCON_CPHA_FMTB;
  88                 else
  89                         spcon &= ~S3C2410_SPCON_CPHA_FMTB;
  90
  91                 if (spi->mode & SPI_CPOL)
  92                         spcon |= S3C2410_SPCON_CPOL_HIGH;
  93                 else
  94                         spcon &= ~S3C2410_SPCON_CPOL_HIGH;
  95
  96                 spcon |= S3C2410_SPCON_ENSCK;
  97
  98                 /* write new configration */
  99
 100                 writeb(spcon, hw->regs + S3C2410_SPCON);
 101                 hw->set_cs(hw->pdata, spi->chip_select, cspol);
 102
 103                 break;
 104         }
 105 }
 106
 107 static int s3c24xx_spi_setupxfer(struct spi_device *spi,
 108                                  struct spi_transfer *t)
 109 {
 110         struct s3c24xx_spi *hw = to_hw(spi);
 111         unsigned int bpw;
 112         unsigned int hz;
 113         unsigned int div;
 114
 115         bpw = t ? t->bits_per_word : spi->bits_per_word;
 116         hz  = t ? t->speed_hz : spi->max_speed_hz;
 117
 118         if (bpw != 8) {
 119                 dev_err(&spi->dev, "invalid bits-per-word (%d)\n", bpw);
 120                 return -EINVAL;
 121         }
 122
 123         div = clk_get_rate(hw->clk) / hz;
 124
 125         /* is clk = pclk / (2 * (pre+1)), or is it
 126          *    clk = (pclk * 2) / ( pre + 1) */
 127
 128         div /= 2;
 129
 130         if (div > 0)
 131                 div -= 1;
 132
 133         if (div > 255)
 134                 div = 255;
 135
 136         dev_dbg(&spi->dev, "setting pre-scaler to %d (hz %d)\n", div, hz);
 137         writeb(div, hw->regs + S3C2410_SPPRE);
 138
 139         spin_lock(&hw->bitbang.lock);
 140         if (!hw->bitbang.busy) {
 141                 hw->bitbang.chipselect(spi, BITBANG_CS_INACTIVE);
 142                 /* need to ndelay for 0.5 clocktick ? */
 143         }
 144         spin_unlock(&hw->bitbang.lock);
 145
 146         return 0;
 147 }
 148
 149 /* the spi->mode bits understood by this driver: */
 150 #define MODEBITS (SPI_CPOL | SPI_CPHA | SPI_CS_HIGH)
 151
 152 static int s3c24xx_spi_setup(struct spi_device *spi)
 153 {
 154         int ret;
 155
 156         if (spi->mode & ~MODEBITS) {
 157                 dev_dbg(&spi->dev, "setup: unsupported mode bits %x\n",
 158                         spi->mode & ~MODEBITS);
 159                 return -EINVAL;
 160         }
 161
 162         ret = s3c24xx_spi_setupxfer(spi, NULL);
 163         if (ret < 0) {
 164                 dev_err(&spi->dev, "setupxfer returned %d\n", ret);
 165                 return ret;
 166         }
 167
 168         return 0;
 169 }
 170
 171 static inline unsigned int hw_txbyte(struct s3c24xx_spi *hw, int count)
 172 {
 173         return hw->tx ? hw->tx[count] : 0;
 174 }
 175
 176 static int s3c24xx_spi_txrx(struct spi_device *spi, struct spi_transfer *t)
 177 {
 178         struct s3c24xx_spi *hw = to_hw(spi);
 179
 180         dev_dbg(&spi->dev, "txrx: tx %p, rx %p, len %d\n",
 181                 t->tx_buf, t->rx_buf, t->len);
 182
 183         hw->tx = t->tx_buf;
 184         hw->rx = t->rx_buf;
 185         hw->len = t->len;
 186         hw->count = 0;
 187
 188         init_completion(&hw->done);
 189
 190         /* send the first byte */
 191         writeb(hw_txbyte(hw, 0), hw->regs + S3C2410_SPTDAT);
 192
 193         wait_for_completion(&hw->done);
 194
 195         return hw->count;
 196 }
 197
 198 static irqreturn_t s3c24xx_spi_irq(int irq, void *dev)
 199 {
 200         struct s3c24xx_spi *hw = dev;
 201         unsigned int spsta = readb(hw->regs + S3C2410_SPSTA);
 202         unsigned int count = hw->count;
 203
 204         if (spsta & S3C2410_SPSTA_DCOL) {
 205                 dev_dbg(hw->dev, "data-collision\n");
 206                 complete(&hw->done);
 207                 goto irq_done;
 208         }
 209
 210         if (!(spsta & S3C2410_SPSTA_READY)) {
 211                 dev_dbg(hw->dev, "spi not ready for tx?\n");
 212                 complete(&hw->done);
 213                 goto irq_done;
 214         }
 215
 216         hw->count++;
 217
 218         if (hw->rx)
 219                 hw->rx[count] = readb(hw->regs + S3C2410_SPRDAT);
 220
 221         count++;
 222
 223         if (count < hw->len)
 224                 writeb(hw_txbyte(hw, count), hw->regs + S3C2410_SPTDAT);
 225         else
 226                 complete(&hw->done);
 227
 228  irq_done:
 229         return IRQ_HANDLED;
 230 }
 231
 232 static void s3c24xx_spi_initialsetup(struct s3c24xx_spi *hw)
 233 {
 234         /* for the moment, permanently enable the clock */
 235
 236         clk_enable(hw->clk);
 237
 238         /* program defaults into the registers */
 239
 240         writeb(0xff, hw->regs + S3C2410_SPPRE);
 241         writeb(SPPIN_DEFAULT, hw->regs + S3C2410_SPPIN);
 242         writeb(SPCON_DEFAULT, hw->regs + S3C2410_SPCON);
 243
 244         if (hw->pdata) {
 245                 if (hw->set_cs == s3c24xx_spi_gpiocs)
 246                         gpio_direction_output(hw->pdata->pin_cs, 1);
 247
 248                 if (hw->pdata->gpio_setup)
 249                         hw->pdata->gpio_setup(hw->pdata, 1);
 250         }
 251 }
 252
 253 static int __init s3c24xx_spi_probe(struct platform_device *pdev)
 254 {
 255         struct s3c2410_spi_info *pdata;
 256         struct s3c24xx_spi *hw;
 257         struct spi_master *master;
 258         struct resource *res;
 259         int err = 0;
 260
 261         master = spi_alloc_master(&pdev->dev, sizeof(struct s3c24xx_spi));
 262         if (master == NULL) {
 263                 dev_err(&pdev->dev, "No memory for spi_master\n");
 264                 err = -ENOMEM;
 265                 goto err_nomem;
 266         }
 267
 268         hw = spi_master_get_devdata(master);
 269         memset(hw, 0, sizeof(struct s3c24xx_spi));
 270
 271         hw->master = spi_master_get(master);
 272         hw->pdata = pdata = pdev->dev.platform_data;
 273         hw->dev = &pdev->dev;
 274
 275         if (pdata == NULL) {
 276                 dev_err(&pdev->dev, "No platform data supplied\n");
 277                 err = -ENOENT;
 278                 goto err_no_pdata;
 279         }
 280
 281         platform_set_drvdata(pdev, hw);
 282         init_completion(&hw->done);
 283
 284         /* setup the master state. */
 285
 286         master->num_chipselect = hw->pdata->num_cs;
 287         master->bus_num = pdata->bus_num;
 288
 289         /* setup the state for the bitbang driver */
 290
 291         hw->bitbang.master         = hw->master;
 292         hw->bitbang.setup_transfer = s3c24xx_spi_setupxfer;
 293         hw->bitbang.chipselect     = s3c24xx_spi_chipsel;
 294         hw->bitbang.txrx_bufs      = s3c24xx_spi_txrx;
 295         hw->bitbang.master->setup  = s3c24xx_spi_setup;
 296
 297         dev_dbg(hw->dev, "bitbang at %p\n", &hw->bitbang);
 298
 299         /* find and map our resources */
 300
 301         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 302         if (res == NULL) {
 303                 dev_err(&pdev->dev, "Cannot get IORESOURCE_MEM\n");
 304                 err = -ENOENT;
 305                 goto err_no_iores;
 306         }
 307
 308         hw->ioarea = request_mem_region(res->start, (res->end - res->start)+1,
 309                                         pdev->name);
 310
 311         if (hw->ioarea == NULL) {
 312                 dev_err(&pdev->dev, "Cannot reserve region\n");
 313                 err = -ENXIO;
 314                 goto err_no_iores;
 315         }
 316
 317         hw->regs = ioremap(res->start, (res->end - res->start)+1);
 318         if (hw->regs == NULL) {
 319                 dev_err(&pdev->dev, "Cannot map IO\n");
 320                 err = -ENXIO;
 321                 goto err_no_iomap;
 322         }
 323
 324         hw->irq = platform_get_irq(pdev, 0);
 325         if (hw->irq < 0) {
 326                 dev_err(&pdev->dev, "No IRQ specified\n");
 327                 err = -ENOENT;
 328                 goto err_no_irq;
 329         }
 330
 331         err = request_irq(hw->irq, s3c24xx_spi_irq, 0, pdev->name, hw);
 332         if (err) {
 333                 dev_err(&pdev->dev, "Cannot claim IRQ\n");
 334                 goto err_no_irq;
 335         }
 336
 337         hw->clk = clk_get(&pdev->dev, "spi");
 338         if (IS_ERR(hw->clk)) {
 339                 dev_err(&pdev->dev, "No clock for device\n");
 340                 err = PTR_ERR(hw->clk);
 341                 goto err_no_clk;
 342         }
 343
 344         /* setup any gpio we can */
 345
 346         if (!pdata->set_cs) {
 347                 if (pdata->pin_cs < 0) {
 348                         dev_err(&pdev->dev, "No chipselect pin\n");
 349                         goto err_register;
 350                 }
 351
 352                 err = gpio_request(pdata->pin_cs, dev_name(&pdev->dev));
 353                 if (err) {
 354                         dev_err(&pdev->dev, "Failed to get gpio for cs\n");
 355                         goto err_register;
 356                 }
 357
 358                 hw->set_cs = s3c24xx_spi_gpiocs;
 359                 gpio_direction_output(pdata->pin_cs, 1);
 360         } else
 361                 hw->set_cs = pdata->set_cs;
 362
 363         s3c24xx_spi_initialsetup(hw);
 364
 365         /* register our spi controller */
 366
 367         err = spi_bitbang_start(&hw->bitbang);
 368         if (err) {
 369                 dev_err(&pdev->dev, "Failed to register SPI master\n");
 370                 goto err_register;
 371         }
 372
 373         return 0;
 374
 375  err_register:
 376         if (hw->set_cs == s3c24xx_spi_gpiocs)
 377                 gpio_free(pdata->pin_cs);
 378
 379         clk_disable(hw->clk);
 380         clk_put(hw->clk);
 381
 382  err_no_clk:
 383         free_irq(hw->irq, hw);
 384
 385  err_no_irq:
 386         iounmap(hw->regs);
 387
 388  err_no_iomap:
 389         release_resource(hw->ioarea);
 390         kfree(hw->ioarea);
 391
 392  err_no_iores:
 393  err_no_pdata:
 394         spi_master_put(hw->master);;
 395
 396  err_nomem:
 397         return err;
 398 }
 399
 400 static int __exit s3c24xx_spi_remove(struct platform_device *dev)
 401 {
 402         struct s3c24xx_spi *hw = platform_get_drvdata(dev);
 403
 404         platform_set_drvdata(dev, NULL);
 405
 406         spi_unregister_master(hw->master);
 407
 408         clk_disable(hw->clk);
 409         clk_put(hw->clk);
 410
 411         free_irq(hw->irq, hw);
 412         iounmap(hw->regs);
 413
 414         if (hw->set_cs == s3c24xx_spi_gpiocs)
 415                 gpio_free(hw->pdata->pin_cs);
 416
 417         release_resource(hw->ioarea);
 418         kfree(hw->ioarea);
 419
 420         spi_master_put(hw->master);
 421         return 0;
 422 }
 423
 424
 425 #ifdef CONFIG_PM
 426
 427 static int s3c24xx_spi_suspend(struct platform_device *pdev, pm_message_t msg)
 428 {
 429         struct s3c24xx_spi *hw = platform_get_drvdata(pdev);
 430
 431         if (hw->pdata && hw->pdata->gpio_setup)
 432                 hw->pdata->gpio_setup(hw->pdata, 0);
 433
 434         clk_disable(hw->clk);
 435         return 0;
 436 }
 437
 438 static int s3c24xx_spi_resume(struct platform_device *pdev)
 439 {
 440         struct s3c24xx_spi *hw = platform_get_drvdata(pdev);
 441
 442         s3c24xx_spi_initialsetup(hw);
 443         return 0;
 444 }
 445
 446 #else
 447 #define s3c24xx_spi_suspend NULL
 448 #define s3c24xx_spi_resume  NULL
 449 #endif
 450
 451 MODULE_ALIAS("platform:s3c2410-spi");
 452 static struct platform_driver s3c24xx_spi_driver = {
 453         .remove         = __exit_p(s3c24xx_spi_remove),
 454         .suspend        = s3c24xx_spi_suspend,
 455         .resume         = s3c24xx_spi_resume,
 456         .driver         = {
 457                 .name   = "s3c2410-spi",
 458                 .owner  = THIS_MODULE,
 459         },
 460 };
 461
 462 static int __init s3c24xx_spi_init(void)
 463 {
 464         return platform_driver_probe(&s3c24xx_spi_driver, s3c24xx_spi_probe);
 465 }
 466
 467 static void __exit s3c24xx_spi_exit(void)
 468 {
 469         platform_driver_unregister(&s3c24xx_spi_driver);
 470 }
 471
 472 module_init(s3c24xx_spi_init);
 473 module_exit(s3c24xx_spi_exit);
 474
 475 MODULE_DESCRIPTION("S3C24XX SPI Driver");
 476 MODULE_AUTHOR("Ben Dooks, <ben@simtec.co.uk>");
 477 MODULE_LICENSE("GPL");