2 * Davicom DM9000 Fast Ethernet driver for Linux.
3 * Copyright (C) 1997 Sten Wang
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * (C) Copyright 1997-1998 DAVICOM Semiconductor,Inc. All Rights Reserved.
17 * Additional updates, Copyright:
18 * Ben Dooks <ben@simtec.co.uk>
19 * Sascha Hauer <s.hauer@pengutronix.de>
22 #include <linux/module.h>
23 #include <linux/ioport.h>
24 #include <linux/netdevice.h>
25 #include <linux/etherdevice.h>
26 #include <linux/init.h>
27 #include <linux/skbuff.h>
28 #include <linux/spinlock.h>
29 #include <linux/crc32.h>
30 #include <linux/mii.h>
31 #include <linux/ethtool.h>
32 #include <linux/dm9000.h>
33 #include <linux/delay.h>
34 #include <linux/platform_device.h>
35 #include <linux/irq.h>
37 #include <asm/delay.h>
43 /* Board/System/Debug information/definition ---------------- */
45 #define DM9000_PHY 0x40 /* PHY address 0x01 */
47 #define CARDNAME "dm9000"
48 #define PFX CARDNAME ": "
49 #define DRV_VERSION "1.30"
51 #ifdef CONFIG_BLACKFIN
58 #define DEFAULT_TRIGGER IRQF_TRIGGER_HIGH
60 #define DEFAULT_TRIGGER (0)
64 * Transmit timeout, default 5 seconds.
66 static int watchdog
= 5000;
67 module_param(watchdog
, int, 0400);
68 MODULE_PARM_DESC(watchdog
, "transmit timeout in milliseconds");
70 /* DM9000 register address locking.
72 * The DM9000 uses an address register to control where data written
73 * to the data register goes. This means that the address register
74 * must be preserved over interrupts or similar calls.
76 * During interrupt and other critical calls, a spinlock is used to
77 * protect the system, but the calls themselves save the address
78 * in the address register in case they are interrupting another
79 * access to the device.
81 * For general accesses a lock is provided so that calls which are
82 * allowed to sleep are serialised so that the address register does
83 * not need to be saved. This lock also serves to serialise access
84 * to the EEPROM and PHY access registers which are shared between
88 /* Structure/enum declaration ------------------------------- */
89 typedef struct board_info
{
91 void __iomem
*io_addr
; /* Register I/O base address */
92 void __iomem
*io_data
; /* Data I/O address */
99 u8 io_mode
; /* 0:word, 2:byte */
102 unsigned int in_suspend
:1;
106 void (*inblk
)(void __iomem
*port
, void *data
, int length
);
107 void (*outblk
)(void __iomem
*port
, void *data
, int length
);
108 void (*dumpblk
)(void __iomem
*port
, int length
);
110 struct device
*dev
; /* parent device */
112 struct resource
*addr_res
; /* resources found */
113 struct resource
*data_res
;
114 struct resource
*addr_req
; /* resources requested */
115 struct resource
*data_req
;
116 struct resource
*irq_res
;
118 struct mutex addr_lock
; /* phy and eeprom access lock */
120 struct delayed_work phy_poll
;
121 struct net_device
*ndev
;
125 struct mii_if_info mii
;
131 #define dm9000_dbg(db, lev, msg...) do { \
132 if ((lev) < CONFIG_DM9000_DEBUGLEVEL && \
133 (lev) < db->debug_level) { \
134 dev_dbg(db->dev, msg); \
138 static inline board_info_t
*to_dm9000_board(struct net_device
*dev
)
143 /* function declaration ------------------------------------- */
144 static int dm9000_probe(struct platform_device
*);
145 static int dm9000_open(struct net_device
*);
146 static int dm9000_start_xmit(struct sk_buff
*, struct net_device
*);
147 static int dm9000_stop(struct net_device
*);
148 static int dm9000_ioctl(struct net_device
*dev
, struct ifreq
*req
, int cmd
);
150 static void dm9000_init_dm9000(struct net_device
*);
152 static irqreturn_t
dm9000_interrupt(int, void *);
154 static int dm9000_phy_read(struct net_device
*dev
, int phyaddr_unsused
, int reg
);
155 static void dm9000_phy_write(struct net_device
*dev
, int phyaddr_unused
, int reg
,
158 static void dm9000_read_eeprom(board_info_t
*, int addr
, u8
*to
);
159 static void dm9000_write_eeprom(board_info_t
*, int addr
, u8
*dp
);
160 static void dm9000_rx(struct net_device
*);
161 static void dm9000_hash_table(struct net_device
*);
163 /* DM9000 network board routine ---------------------------- */
166 dm9000_reset(board_info_t
* db
)
168 dev_dbg(db
->dev
, "resetting device\n");
171 writeb(DM9000_NCR
, db
->io_addr
);
173 writeb(NCR_RST
, db
->io_data
);
178 * Read a byte from I/O port
181 ior(board_info_t
* db
, int reg
)
183 writeb(reg
, db
->io_addr
);
184 return readb(db
->io_data
);
188 * Write a byte to I/O port
192 iow(board_info_t
* db
, int reg
, int value
)
194 writeb(reg
, db
->io_addr
);
195 writeb(value
, db
->io_data
);
198 /* routines for sending block to chip */
200 static void dm9000_outblk_8bit(void __iomem
*reg
, void *data
, int count
)
202 writesb(reg
, data
, count
);
205 static void dm9000_outblk_16bit(void __iomem
*reg
, void *data
, int count
)
207 writesw(reg
, data
, (count
+1) >> 1);
210 static void dm9000_outblk_32bit(void __iomem
*reg
, void *data
, int count
)
212 writesl(reg
, data
, (count
+3) >> 2);
215 /* input block from chip to memory */
217 static void dm9000_inblk_8bit(void __iomem
*reg
, void *data
, int count
)
219 readsb(reg
, data
, count
);
223 static void dm9000_inblk_16bit(void __iomem
*reg
, void *data
, int count
)
225 readsw(reg
, data
, (count
+1) >> 1);
228 static void dm9000_inblk_32bit(void __iomem
*reg
, void *data
, int count
)
230 readsl(reg
, data
, (count
+3) >> 2);
233 /* dump block from chip to null */
235 static void dm9000_dumpblk_8bit(void __iomem
*reg
, int count
)
240 for (i
= 0; i
< count
; i
++)
244 static void dm9000_dumpblk_16bit(void __iomem
*reg
, int count
)
249 count
= (count
+ 1) >> 1;
251 for (i
= 0; i
< count
; i
++)
255 static void dm9000_dumpblk_32bit(void __iomem
*reg
, int count
)
260 count
= (count
+ 3) >> 2;
262 for (i
= 0; i
< count
; i
++)
268 * select the specified set of io routines to use with the
272 static void dm9000_set_io(struct board_info
*db
, int byte_width
)
274 /* use the size of the data resource to work out what IO
275 * routines we want to use
278 switch (byte_width
) {
280 db
->dumpblk
= dm9000_dumpblk_8bit
;
281 db
->outblk
= dm9000_outblk_8bit
;
282 db
->inblk
= dm9000_inblk_8bit
;
287 dev_dbg(db
->dev
, ": 3 byte IO, falling back to 16bit\n");
289 db
->dumpblk
= dm9000_dumpblk_16bit
;
290 db
->outblk
= dm9000_outblk_16bit
;
291 db
->inblk
= dm9000_inblk_16bit
;
296 db
->dumpblk
= dm9000_dumpblk_32bit
;
297 db
->outblk
= dm9000_outblk_32bit
;
298 db
->inblk
= dm9000_inblk_32bit
;
303 static void dm9000_schedule_poll(board_info_t
*db
)
305 schedule_delayed_work(&db
->phy_poll
, HZ
* 2);
308 /* Our watchdog timed out. Called by the networking layer */
309 static void dm9000_timeout(struct net_device
*dev
)
311 board_info_t
*db
= (board_info_t
*) dev
->priv
;
315 /* Save previous register address */
316 reg_save
= readb(db
->io_addr
);
317 spin_lock_irqsave(&db
->lock
,flags
);
319 netif_stop_queue(dev
);
321 dm9000_init_dm9000(dev
);
322 /* We can accept TX packets again */
323 dev
->trans_start
= jiffies
;
324 netif_wake_queue(dev
);
326 /* Restore previous register address */
327 writeb(reg_save
, db
->io_addr
);
328 spin_unlock_irqrestore(&db
->lock
,flags
);
331 #ifdef CONFIG_NET_POLL_CONTROLLER
335 static void dm9000_poll_controller(struct net_device
*dev
)
337 disable_irq(dev
->irq
);
338 dm9000_interrupt(dev
->irq
,dev
);
339 enable_irq(dev
->irq
);
343 static int dm9000_ioctl(struct net_device
*dev
, struct ifreq
*req
, int cmd
)
345 board_info_t
*dm
= to_dm9000_board(dev
);
347 if (!netif_running(dev
))
350 return generic_mii_ioctl(&dm
->mii
, if_mii(req
), cmd
, NULL
);
355 static void dm9000_get_drvinfo(struct net_device
*dev
,
356 struct ethtool_drvinfo
*info
)
358 board_info_t
*dm
= to_dm9000_board(dev
);
360 strcpy(info
->driver
, CARDNAME
);
361 strcpy(info
->version
, DRV_VERSION
);
362 strcpy(info
->bus_info
, to_platform_device(dm
->dev
)->name
);
365 static u32
dm9000_get_msglevel(struct net_device
*dev
)
367 board_info_t
*dm
= to_dm9000_board(dev
);
369 return dm
->msg_enable
;
372 static void dm9000_set_msglevel(struct net_device
*dev
, u32 value
)
374 board_info_t
*dm
= to_dm9000_board(dev
);
376 dm
->msg_enable
= value
;
379 static int dm9000_get_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
381 board_info_t
*dm
= to_dm9000_board(dev
);
383 mii_ethtool_gset(&dm
->mii
, cmd
);
387 static int dm9000_set_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
389 board_info_t
*dm
= to_dm9000_board(dev
);
391 return mii_ethtool_sset(&dm
->mii
, cmd
);
394 static int dm9000_nway_reset(struct net_device
*dev
)
396 board_info_t
*dm
= to_dm9000_board(dev
);
397 return mii_nway_restart(&dm
->mii
);
400 static u32
dm9000_get_link(struct net_device
*dev
)
402 board_info_t
*dm
= to_dm9000_board(dev
);
403 return mii_link_ok(&dm
->mii
);
406 #define DM_EEPROM_MAGIC (0x444D394B)
408 static int dm9000_get_eeprom_len(struct net_device
*dev
)
413 static int dm9000_get_eeprom(struct net_device
*dev
,
414 struct ethtool_eeprom
*ee
, u8
*data
)
416 board_info_t
*dm
= to_dm9000_board(dev
);
417 int offset
= ee
->offset
;
421 /* EEPROM access is aligned to two bytes */
423 if ((len
& 1) != 0 || (offset
& 1) != 0)
426 if (dm
->flags
& DM9000_PLATF_NO_EEPROM
)
429 ee
->magic
= DM_EEPROM_MAGIC
;
431 for (i
= 0; i
< len
; i
+= 2)
432 dm9000_read_eeprom(dm
, (offset
+ i
) / 2, data
+ i
);
437 static int dm9000_set_eeprom(struct net_device
*dev
,
438 struct ethtool_eeprom
*ee
, u8
*data
)
440 board_info_t
*dm
= to_dm9000_board(dev
);
441 int offset
= ee
->offset
;
445 /* EEPROM access is aligned to two bytes */
447 if ((len
& 1) != 0 || (offset
& 1) != 0)
450 if (dm
->flags
& DM9000_PLATF_NO_EEPROM
)
453 if (ee
->magic
!= DM_EEPROM_MAGIC
)
456 for (i
= 0; i
< len
; i
+= 2)
457 dm9000_write_eeprom(dm
, (offset
+ i
) / 2, data
+ i
);
462 static const struct ethtool_ops dm9000_ethtool_ops
= {
463 .get_drvinfo
= dm9000_get_drvinfo
,
464 .get_settings
= dm9000_get_settings
,
465 .set_settings
= dm9000_set_settings
,
466 .get_msglevel
= dm9000_get_msglevel
,
467 .set_msglevel
= dm9000_set_msglevel
,
468 .nway_reset
= dm9000_nway_reset
,
469 .get_link
= dm9000_get_link
,
470 .get_eeprom_len
= dm9000_get_eeprom_len
,
471 .get_eeprom
= dm9000_get_eeprom
,
472 .set_eeprom
= dm9000_set_eeprom
,
476 dm9000_poll_work(struct work_struct
*w
)
478 struct delayed_work
*dw
= container_of(w
, struct delayed_work
, work
);
479 board_info_t
*db
= container_of(dw
, board_info_t
, phy_poll
);
481 mii_check_media(&db
->mii
, netif_msg_link(db
), 0);
483 if (netif_running(db
->ndev
))
484 dm9000_schedule_poll(db
);
487 /* dm9000_release_board
489 * release a board, and any mapped resources
493 dm9000_release_board(struct platform_device
*pdev
, struct board_info
*db
)
495 if (db
->data_res
== NULL
) {
496 if (db
->addr_res
!= NULL
)
497 release_mem_region((unsigned long)db
->io_addr
, 4);
501 /* unmap our resources */
503 iounmap(db
->io_addr
);
504 iounmap(db
->io_data
);
506 /* release the resources */
508 if (db
->data_req
!= NULL
) {
509 release_resource(db
->data_req
);
513 if (db
->addr_req
!= NULL
) {
514 release_resource(db
->addr_req
);
519 #define res_size(_r) (((_r)->end - (_r)->start) + 1)
522 * Search DM9000 board, allocate space and register it
525 dm9000_probe(struct platform_device
*pdev
)
527 struct dm9000_plat_data
*pdata
= pdev
->dev
.platform_data
;
528 struct board_info
*db
; /* Point a board information structure */
529 struct net_device
*ndev
;
530 const unsigned char *mac_src
;
537 /* Init network device */
538 ndev
= alloc_etherdev(sizeof (struct board_info
));
540 dev_err(&pdev
->dev
, "could not allocate device.\n");
544 SET_NETDEV_DEV(ndev
, &pdev
->dev
);
546 dev_dbg(&pdev
->dev
, "dm9000_probe()\n");
548 /* setup board info structure */
549 db
= (struct board_info
*) ndev
->priv
;
550 memset(db
, 0, sizeof (*db
));
552 db
->dev
= &pdev
->dev
;
555 spin_lock_init(&db
->lock
);
556 mutex_init(&db
->addr_lock
);
558 INIT_DELAYED_WORK(&db
->phy_poll
, dm9000_poll_work
);
561 if (pdev
->num_resources
< 2) {
564 } else if (pdev
->num_resources
== 2) {
565 base
= pdev
->resource
[0].start
;
567 if (!request_mem_region(base
, 4, ndev
->name
)) {
572 ndev
->base_addr
= base
;
573 ndev
->irq
= pdev
->resource
[1].start
;
574 db
->io_addr
= (void __iomem
*)base
;
575 db
->io_data
= (void __iomem
*)(base
+ 4);
577 /* ensure at least we have a default set of IO routines */
578 dm9000_set_io(db
, 2);
581 db
->addr_res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
582 db
->data_res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 1);
583 db
->irq_res
= platform_get_resource(pdev
, IORESOURCE_IRQ
, 0);
585 if (db
->addr_res
== NULL
|| db
->data_res
== NULL
||
586 db
->irq_res
== NULL
) {
587 dev_err(db
->dev
, "insufficient resources\n");
592 i
= res_size(db
->addr_res
);
593 db
->addr_req
= request_mem_region(db
->addr_res
->start
, i
,
596 if (db
->addr_req
== NULL
) {
597 dev_err(db
->dev
, "cannot claim address reg area\n");
602 db
->io_addr
= ioremap(db
->addr_res
->start
, i
);
604 if (db
->io_addr
== NULL
) {
605 dev_err(db
->dev
, "failed to ioremap address reg\n");
610 iosize
= res_size(db
->data_res
);
611 db
->data_req
= request_mem_region(db
->data_res
->start
, iosize
,
614 if (db
->data_req
== NULL
) {
615 dev_err(db
->dev
, "cannot claim data reg area\n");
620 db
->io_data
= ioremap(db
->data_res
->start
, iosize
);
622 if (db
->io_data
== NULL
) {
623 dev_err(db
->dev
,"failed to ioremap data reg\n");
628 /* fill in parameters for net-dev structure */
630 ndev
->base_addr
= (unsigned long)db
->io_addr
;
631 ndev
->irq
= db
->irq_res
->start
;
633 /* ensure at least we have a default set of IO routines */
634 dm9000_set_io(db
, iosize
);
637 /* check to see if anything is being over-ridden */
639 /* check to see if the driver wants to over-ride the
640 * default IO width */
642 if (pdata
->flags
& DM9000_PLATF_8BITONLY
)
643 dm9000_set_io(db
, 1);
645 if (pdata
->flags
& DM9000_PLATF_16BITONLY
)
646 dm9000_set_io(db
, 2);
648 if (pdata
->flags
& DM9000_PLATF_32BITONLY
)
649 dm9000_set_io(db
, 4);
651 /* check to see if there are any IO routine
654 if (pdata
->inblk
!= NULL
)
655 db
->inblk
= pdata
->inblk
;
657 if (pdata
->outblk
!= NULL
)
658 db
->outblk
= pdata
->outblk
;
660 if (pdata
->dumpblk
!= NULL
)
661 db
->dumpblk
= pdata
->dumpblk
;
663 db
->flags
= pdata
->flags
;
668 /* try two times, DM9000 sometimes gets the first read wrong */
669 for (i
= 0; i
< 8; i
++) {
670 id_val
= ior(db
, DM9000_VIDL
);
671 id_val
|= (u32
)ior(db
, DM9000_VIDH
) << 8;
672 id_val
|= (u32
)ior(db
, DM9000_PIDL
) << 16;
673 id_val
|= (u32
)ior(db
, DM9000_PIDH
) << 24;
675 if (id_val
== DM9000_ID
)
677 dev_err(db
->dev
, "read wrong id 0x%08x\n", id_val
);
680 if (id_val
!= DM9000_ID
) {
681 dev_err(db
->dev
, "wrong id: 0x%08x\n", id_val
);
686 /* from this point we assume that we have found a DM9000 */
688 /* driver system function */
691 ndev
->open
= &dm9000_open
;
692 ndev
->hard_start_xmit
= &dm9000_start_xmit
;
693 ndev
->tx_timeout
= &dm9000_timeout
;
694 ndev
->watchdog_timeo
= msecs_to_jiffies(watchdog
);
695 ndev
->stop
= &dm9000_stop
;
696 ndev
->set_multicast_list
= &dm9000_hash_table
;
697 ndev
->ethtool_ops
= &dm9000_ethtool_ops
;
698 ndev
->do_ioctl
= &dm9000_ioctl
;
700 #ifdef CONFIG_NET_POLL_CONTROLLER
701 ndev
->poll_controller
= &dm9000_poll_controller
;
704 db
->msg_enable
= NETIF_MSG_LINK
;
705 db
->mii
.phy_id_mask
= 0x1f;
706 db
->mii
.reg_num_mask
= 0x1f;
707 db
->mii
.force_media
= 0;
708 db
->mii
.full_duplex
= 0;
710 db
->mii
.mdio_read
= dm9000_phy_read
;
711 db
->mii
.mdio_write
= dm9000_phy_write
;
715 /* try reading the node address from the attached EEPROM */
716 for (i
= 0; i
< 6; i
+= 2)
717 dm9000_read_eeprom(db
, i
/ 2, ndev
->dev_addr
+i
);
719 if (!is_valid_ether_addr(ndev
->dev_addr
)) {
720 /* try reading from mac */
723 for (i
= 0; i
< 6; i
++)
724 ndev
->dev_addr
[i
] = ior(db
, i
+DM9000_PAR
);
727 if (!is_valid_ether_addr(ndev
->dev_addr
))
728 dev_warn(db
->dev
, "%s: Invalid ethernet MAC address. Please "
729 "set using ifconfig\n", ndev
->name
);
731 platform_set_drvdata(pdev
, ndev
);
732 ret
= register_netdev(ndev
);
735 DECLARE_MAC_BUF(mac
);
736 printk("%s: dm9000 at %p,%p IRQ %d MAC: %s (%s)\n",
737 ndev
->name
, db
->io_addr
, db
->io_data
, ndev
->irq
,
738 print_mac(mac
, ndev
->dev_addr
), mac_src
);
743 dev_err(db
->dev
, "not found (%d).\n", ret
);
745 dm9000_release_board(pdev
, db
);
752 * Open the interface.
753 * The interface is opened whenever "ifconfig" actives it.
756 dm9000_open(struct net_device
*dev
)
758 board_info_t
*db
= (board_info_t
*) dev
->priv
;
759 unsigned long irqflags
= db
->irq_res
->flags
& IRQF_TRIGGER_MASK
;
761 if (netif_msg_ifup(db
))
762 dev_dbg(db
->dev
, "enabling %s\n", dev
->name
);
764 /* If there is no IRQ type specified, default to something that
765 * may work, and tell the user that this is a problem */
767 if (irqflags
== IRQF_TRIGGER_NONE
) {
768 dev_warn(db
->dev
, "WARNING: no IRQ resource flags set.\n");
769 irqflags
= DEFAULT_TRIGGER
;
772 irqflags
|= IRQF_SHARED
;
774 if (request_irq(dev
->irq
, &dm9000_interrupt
, irqflags
, dev
->name
, dev
))
777 /* Initialize DM9000 board */
779 dm9000_init_dm9000(dev
);
781 /* Init driver variable */
784 mii_check_media(&db
->mii
, netif_msg_link(db
), 1);
785 netif_start_queue(dev
);
787 dm9000_schedule_poll(db
);
793 * Initilize dm9000 board
796 dm9000_init_dm9000(struct net_device
*dev
)
798 board_info_t
*db
= (board_info_t
*) dev
->priv
;
800 dm9000_dbg(db
, 1, "entering %s\n", __func__
);
803 db
->io_mode
= ior(db
, DM9000_ISR
) >> 6; /* ISR bit7:6 keeps I/O mode */
805 /* GPIO0 on pre-activate PHY */
806 iow(db
, DM9000_GPR
, 0); /* REG_1F bit0 activate phyxcer */
807 iow(db
, DM9000_GPCR
, GPCR_GEP_CNTL
); /* Let GPIO0 output */
808 iow(db
, DM9000_GPR
, 0); /* Enable PHY */
810 if (db
->flags
& DM9000_PLATF_EXT_PHY
)
811 iow(db
, DM9000_NCR
, NCR_EXT_PHY
);
813 /* Program operating register */
814 iow(db
, DM9000_TCR
, 0); /* TX Polling clear */
815 iow(db
, DM9000_BPTR
, 0x3f); /* Less 3Kb, 200us */
816 iow(db
, DM9000_FCR
, 0xff); /* Flow Control */
817 iow(db
, DM9000_SMCR
, 0); /* Special Mode */
818 /* clear TX status */
819 iow(db
, DM9000_NSR
, NSR_WAKEST
| NSR_TX2END
| NSR_TX1END
);
820 iow(db
, DM9000_ISR
, ISR_CLR_STATUS
); /* Clear interrupt status */
822 /* Set address filter table */
823 dm9000_hash_table(dev
);
825 /* Enable TX/RX interrupt mask */
826 iow(db
, DM9000_IMR
, IMR_PAR
| IMR_PTM
| IMR_PRM
);
828 /* Init Driver variable */
830 db
->queue_pkt_len
= 0;
831 dev
->trans_start
= 0;
835 * Hardware start transmission.
836 * Send a packet to media from the upper layer.
839 dm9000_start_xmit(struct sk_buff
*skb
, struct net_device
*dev
)
842 board_info_t
*db
= (board_info_t
*) dev
->priv
;
844 dm9000_dbg(db
, 3, "%s:\n", __func__
);
846 if (db
->tx_pkt_cnt
> 1)
849 spin_lock_irqsave(&db
->lock
, flags
);
851 /* Move data to DM9000 TX RAM */
852 writeb(DM9000_MWCMD
, db
->io_addr
);
854 (db
->outblk
)(db
->io_data
, skb
->data
, skb
->len
);
855 dev
->stats
.tx_bytes
+= skb
->len
;
858 /* TX control: First packet immediately send, second packet queue */
859 if (db
->tx_pkt_cnt
== 1) {
860 /* Set TX length to DM9000 */
861 iow(db
, DM9000_TXPLL
, skb
->len
);
862 iow(db
, DM9000_TXPLH
, skb
->len
>> 8);
864 /* Issue TX polling command */
865 iow(db
, DM9000_TCR
, TCR_TXREQ
); /* Cleared after TX complete */
867 dev
->trans_start
= jiffies
; /* save the time stamp */
870 db
->queue_pkt_len
= skb
->len
;
871 netif_stop_queue(dev
);
874 spin_unlock_irqrestore(&db
->lock
, flags
);
883 dm9000_shutdown(struct net_device
*dev
)
885 board_info_t
*db
= (board_info_t
*) dev
->priv
;
888 dm9000_phy_write(dev
, 0, MII_BMCR
, BMCR_RESET
); /* PHY RESET */
889 iow(db
, DM9000_GPR
, 0x01); /* Power-Down PHY */
890 iow(db
, DM9000_IMR
, IMR_PAR
); /* Disable all interrupt */
891 iow(db
, DM9000_RCR
, 0x00); /* Disable RX */
895 * Stop the interface.
896 * The interface is stopped when it is brought.
899 dm9000_stop(struct net_device
*ndev
)
901 board_info_t
*db
= (board_info_t
*) ndev
->priv
;
903 if (netif_msg_ifdown(db
))
904 dev_dbg(db
->dev
, "shutting down %s\n", ndev
->name
);
906 cancel_delayed_work(&db
->phy_poll
);
908 netif_stop_queue(ndev
);
909 netif_carrier_off(ndev
);
912 free_irq(ndev
->irq
, ndev
);
914 dm9000_shutdown(ndev
);
920 * DM9000 interrupt handler
921 * receive the packet to upper layer, free the transmitted packet
925 dm9000_tx_done(struct net_device
*dev
, board_info_t
* db
)
927 int tx_status
= ior(db
, DM9000_NSR
); /* Got TX status */
929 if (tx_status
& (NSR_TX2END
| NSR_TX1END
)) {
930 /* One packet sent complete */
932 dev
->stats
.tx_packets
++;
934 if (netif_msg_tx_done(db
))
935 dev_dbg(db
->dev
, "tx done, NSR %02x\n", tx_status
);
937 /* Queue packet check & send */
938 if (db
->tx_pkt_cnt
> 0) {
939 iow(db
, DM9000_TXPLL
, db
->queue_pkt_len
);
940 iow(db
, DM9000_TXPLH
, db
->queue_pkt_len
>> 8);
941 iow(db
, DM9000_TCR
, TCR_TXREQ
);
942 dev
->trans_start
= jiffies
;
944 netif_wake_queue(dev
);
949 dm9000_interrupt(int irq
, void *dev_id
)
951 struct net_device
*dev
= dev_id
;
952 board_info_t
*db
= (board_info_t
*) dev
->priv
;
956 dm9000_dbg(db
, 3, "entering %s\n", __func__
);
958 /* A real interrupt coming */
960 spin_lock(&db
->lock
);
962 /* Save previous register address */
963 reg_save
= readb(db
->io_addr
);
965 /* Disable all interrupts */
966 iow(db
, DM9000_IMR
, IMR_PAR
);
968 /* Got DM9000 interrupt status */
969 int_status
= ior(db
, DM9000_ISR
); /* Got ISR */
970 iow(db
, DM9000_ISR
, int_status
); /* Clear ISR status */
972 if (netif_msg_intr(db
))
973 dev_dbg(db
->dev
, "interrupt status %02x\n", int_status
);
975 /* Received the coming packet */
976 if (int_status
& ISR_PRS
)
979 /* Trnasmit Interrupt check */
980 if (int_status
& ISR_PTS
)
981 dm9000_tx_done(dev
, db
);
983 /* Re-enable interrupt mask */
984 iow(db
, DM9000_IMR
, IMR_PAR
| IMR_PTM
| IMR_PRM
);
986 /* Restore previous register address */
987 writeb(reg_save
, db
->io_addr
);
989 spin_unlock(&db
->lock
);
994 struct dm9000_rxhdr
{
998 } __attribute__((__packed__
));
1001 * Received a packet and pass to upper layer
1004 dm9000_rx(struct net_device
*dev
)
1006 board_info_t
*db
= (board_info_t
*) dev
->priv
;
1007 struct dm9000_rxhdr rxhdr
;
1008 struct sk_buff
*skb
;
1013 /* Check packet ready or not */
1015 ior(db
, DM9000_MRCMDX
); /* Dummy read */
1017 /* Get most updated data */
1018 rxbyte
= readb(db
->io_data
);
1020 /* Status check: this byte must be 0 or 1 */
1021 if (rxbyte
> DM9000_PKT_RDY
) {
1022 dev_warn(db
->dev
, "status check fail: %d\n", rxbyte
);
1023 iow(db
, DM9000_RCR
, 0x00); /* Stop Device */
1024 iow(db
, DM9000_ISR
, IMR_PAR
); /* Stop INT request */
1028 if (rxbyte
!= DM9000_PKT_RDY
)
1031 /* A packet ready now & Get status/length */
1033 writeb(DM9000_MRCMD
, db
->io_addr
);
1035 (db
->inblk
)(db
->io_data
, &rxhdr
, sizeof(rxhdr
));
1037 RxLen
= le16_to_cpu(rxhdr
.RxLen
);
1039 if (netif_msg_rx_status(db
))
1040 dev_dbg(db
->dev
, "RX: status %02x, length %04x\n",
1041 rxhdr
.RxStatus
, RxLen
);
1043 /* Packet Status check */
1046 if (netif_msg_rx_err(db
))
1047 dev_dbg(db
->dev
, "RX: Bad Packet (runt)\n");
1050 if (RxLen
> DM9000_PKT_MAX
) {
1051 dev_dbg(db
->dev
, "RST: RX Len:%x\n", RxLen
);
1054 if (rxhdr
.RxStatus
& 0xbf) {
1056 if (rxhdr
.RxStatus
& 0x01) {
1057 if (netif_msg_rx_err(db
))
1058 dev_dbg(db
->dev
, "fifo error\n");
1059 dev
->stats
.rx_fifo_errors
++;
1061 if (rxhdr
.RxStatus
& 0x02) {
1062 if (netif_msg_rx_err(db
))
1063 dev_dbg(db
->dev
, "crc error\n");
1064 dev
->stats
.rx_crc_errors
++;
1066 if (rxhdr
.RxStatus
& 0x80) {
1067 if (netif_msg_rx_err(db
))
1068 dev_dbg(db
->dev
, "length error\n");
1069 dev
->stats
.rx_length_errors
++;
1073 /* Move data from DM9000 */
1075 && ((skb
= dev_alloc_skb(RxLen
+ 4)) != NULL
)) {
1076 skb_reserve(skb
, 2);
1077 rdptr
= (u8
*) skb_put(skb
, RxLen
- 4);
1079 /* Read received packet from RX SRAM */
1081 (db
->inblk
)(db
->io_data
, rdptr
, RxLen
);
1082 dev
->stats
.rx_bytes
+= RxLen
;
1084 /* Pass to upper layer */
1085 skb
->protocol
= eth_type_trans(skb
, dev
);
1087 dev
->stats
.rx_packets
++;
1090 /* need to dump the packet's data */
1092 (db
->dumpblk
)(db
->io_data
, RxLen
);
1094 } while (rxbyte
== DM9000_PKT_RDY
);
1098 dm9000_read_locked(board_info_t
*db
, int reg
)
1100 unsigned long flags
;
1103 spin_lock_irqsave(&db
->lock
, flags
);
1105 spin_unlock_irqrestore(&db
->lock
, flags
);
1110 static int dm9000_wait_eeprom(board_info_t
*db
)
1112 unsigned int status
;
1113 int timeout
= 8; /* wait max 8msec */
1115 /* The DM9000 data sheets say we should be able to
1116 * poll the ERRE bit in EPCR to wait for the EEPROM
1117 * operation. From testing several chips, this bit
1118 * does not seem to work.
1120 * We attempt to use the bit, but fall back to the
1121 * timeout (which is why we do not return an error
1122 * on expiry) to say that the EEPROM operation has
1127 status
= dm9000_read_locked(db
, DM9000_EPCR
);
1129 if ((status
& EPCR_ERRE
) == 0)
1132 if (timeout
-- < 0) {
1133 dev_dbg(db
->dev
, "timeout waiting EEPROM\n");
1142 * Read a word data from EEPROM
1145 dm9000_read_eeprom(board_info_t
*db
, int offset
, u8
*to
)
1147 unsigned long flags
;
1149 if (db
->flags
& DM9000_PLATF_NO_EEPROM
) {
1155 mutex_lock(&db
->addr_lock
);
1157 spin_lock_irqsave(&db
->lock
, flags
);
1159 iow(db
, DM9000_EPAR
, offset
);
1160 iow(db
, DM9000_EPCR
, EPCR_ERPRR
);
1162 spin_unlock_irqrestore(&db
->lock
, flags
);
1164 dm9000_wait_eeprom(db
);
1166 /* delay for at-least 150uS */
1169 spin_lock_irqsave(&db
->lock
, flags
);
1171 iow(db
, DM9000_EPCR
, 0x0);
1173 to
[0] = ior(db
, DM9000_EPDRL
);
1174 to
[1] = ior(db
, DM9000_EPDRH
);
1176 spin_unlock_irqrestore(&db
->lock
, flags
);
1178 mutex_unlock(&db
->addr_lock
);
1182 * Write a word data to SROM
1185 dm9000_write_eeprom(board_info_t
*db
, int offset
, u8
*data
)
1187 unsigned long flags
;
1189 if (db
->flags
& DM9000_PLATF_NO_EEPROM
)
1192 mutex_lock(&db
->addr_lock
);
1194 spin_lock_irqsave(&db
->lock
, flags
);
1195 iow(db
, DM9000_EPAR
, offset
);
1196 iow(db
, DM9000_EPDRH
, data
[1]);
1197 iow(db
, DM9000_EPDRL
, data
[0]);
1198 iow(db
, DM9000_EPCR
, EPCR_WEP
| EPCR_ERPRW
);
1199 spin_unlock_irqrestore(&db
->lock
, flags
);
1201 dm9000_wait_eeprom(db
);
1203 mdelay(1); /* wait at least 150uS to clear */
1205 spin_lock_irqsave(&db
->lock
, flags
);
1206 iow(db
, DM9000_EPCR
, 0);
1207 spin_unlock_irqrestore(&db
->lock
, flags
);
1209 mutex_unlock(&db
->addr_lock
);
1213 * Set DM9000 multicast address
1216 dm9000_hash_table(struct net_device
*dev
)
1218 board_info_t
*db
= (board_info_t
*) dev
->priv
;
1219 struct dev_mc_list
*mcptr
= dev
->mc_list
;
1220 int mc_cnt
= dev
->mc_count
;
1224 u8 rcr
= RCR_DIS_LONG
| RCR_DIS_CRC
| RCR_RXEN
;
1225 unsigned long flags
;
1227 dm9000_dbg(db
, 1, "entering %s\n", __func__
);
1229 spin_lock_irqsave(&db
->lock
, flags
);
1231 for (i
= 0, oft
= DM9000_PAR
; i
< 6; i
++, oft
++)
1232 iow(db
, oft
, dev
->dev_addr
[i
]);
1234 /* Clear Hash Table */
1235 for (i
= 0; i
< 4; i
++)
1236 hash_table
[i
] = 0x0;
1238 /* broadcast address */
1239 hash_table
[3] = 0x8000;
1241 if (dev
->flags
& IFF_PROMISC
)
1244 if (dev
->flags
& IFF_ALLMULTI
)
1247 /* the multicast address in Hash Table : 64 bits */
1248 for (i
= 0; i
< mc_cnt
; i
++, mcptr
= mcptr
->next
) {
1249 hash_val
= ether_crc_le(6, mcptr
->dmi_addr
) & 0x3f;
1250 hash_table
[hash_val
/ 16] |= (u16
) 1 << (hash_val
% 16);
1253 /* Write the hash table to MAC MD table */
1254 for (i
= 0, oft
= DM9000_MAR
; i
< 4; i
++) {
1255 iow(db
, oft
++, hash_table
[i
]);
1256 iow(db
, oft
++, hash_table
[i
] >> 8);
1259 iow(db
, DM9000_RCR
, rcr
);
1260 spin_unlock_irqrestore(&db
->lock
, flags
);
1265 * Sleep, either by using msleep() or if we are suspending, then
1266 * use mdelay() to sleep.
1268 static void dm9000_msleep(board_info_t
*db
, unsigned int ms
)
1277 * Read a word from phyxcer
1280 dm9000_phy_read(struct net_device
*dev
, int phy_reg_unused
, int reg
)
1282 board_info_t
*db
= (board_info_t
*) dev
->priv
;
1283 unsigned long flags
;
1284 unsigned int reg_save
;
1287 mutex_lock(&db
->addr_lock
);
1289 spin_lock_irqsave(&db
->lock
,flags
);
1291 /* Save previous register address */
1292 reg_save
= readb(db
->io_addr
);
1294 /* Fill the phyxcer register into REG_0C */
1295 iow(db
, DM9000_EPAR
, DM9000_PHY
| reg
);
1297 iow(db
, DM9000_EPCR
, 0xc); /* Issue phyxcer read command */
1299 writeb(reg_save
, db
->io_addr
);
1300 spin_unlock_irqrestore(&db
->lock
,flags
);
1302 dm9000_msleep(db
, 1); /* Wait read complete */
1304 spin_lock_irqsave(&db
->lock
,flags
);
1305 reg_save
= readb(db
->io_addr
);
1307 iow(db
, DM9000_EPCR
, 0x0); /* Clear phyxcer read command */
1309 /* The read data keeps on REG_0D & REG_0E */
1310 ret
= (ior(db
, DM9000_EPDRH
) << 8) | ior(db
, DM9000_EPDRL
);
1312 /* restore the previous address */
1313 writeb(reg_save
, db
->io_addr
);
1314 spin_unlock_irqrestore(&db
->lock
,flags
);
1316 mutex_unlock(&db
->addr_lock
);
1318 dm9000_dbg(db
, 5, "phy_read[%02x] -> %04x\n", reg
, ret
);
1323 * Write a word to phyxcer
1326 dm9000_phy_write(struct net_device
*dev
, int phyaddr_unused
, int reg
, int value
)
1328 board_info_t
*db
= (board_info_t
*) dev
->priv
;
1329 unsigned long flags
;
1330 unsigned long reg_save
;
1332 dm9000_dbg(db
, 5, "phy_write[%02x] = %04x\n", reg
, value
);
1333 mutex_lock(&db
->addr_lock
);
1335 spin_lock_irqsave(&db
->lock
,flags
);
1337 /* Save previous register address */
1338 reg_save
= readb(db
->io_addr
);
1340 /* Fill the phyxcer register into REG_0C */
1341 iow(db
, DM9000_EPAR
, DM9000_PHY
| reg
);
1343 /* Fill the written data into REG_0D & REG_0E */
1344 iow(db
, DM9000_EPDRL
, value
);
1345 iow(db
, DM9000_EPDRH
, value
>> 8);
1347 iow(db
, DM9000_EPCR
, 0xa); /* Issue phyxcer write command */
1349 writeb(reg_save
, db
->io_addr
);
1350 spin_unlock_irqrestore(&db
->lock
, flags
);
1352 dm9000_msleep(db
, 1); /* Wait write complete */
1354 spin_lock_irqsave(&db
->lock
,flags
);
1355 reg_save
= readb(db
->io_addr
);
1357 iow(db
, DM9000_EPCR
, 0x0); /* Clear phyxcer write command */
1359 /* restore the previous address */
1360 writeb(reg_save
, db
->io_addr
);
1362 spin_unlock_irqrestore(&db
->lock
, flags
);
1363 mutex_unlock(&db
->addr_lock
);
1367 dm9000_drv_suspend(struct platform_device
*dev
, pm_message_t state
)
1369 struct net_device
*ndev
= platform_get_drvdata(dev
);
1373 db
= (board_info_t
*) ndev
->priv
;
1376 if (netif_running(ndev
)) {
1377 netif_device_detach(ndev
);
1378 dm9000_shutdown(ndev
);
1385 dm9000_drv_resume(struct platform_device
*dev
)
1387 struct net_device
*ndev
= platform_get_drvdata(dev
);
1388 board_info_t
*db
= (board_info_t
*) ndev
->priv
;
1392 if (netif_running(ndev
)) {
1394 dm9000_init_dm9000(ndev
);
1396 netif_device_attach(ndev
);
1404 static int __devexit
1405 dm9000_drv_remove(struct platform_device
*pdev
)
1407 struct net_device
*ndev
= platform_get_drvdata(pdev
);
1409 platform_set_drvdata(pdev
, NULL
);
1411 unregister_netdev(ndev
);
1412 dm9000_release_board(pdev
, (board_info_t
*) ndev
->priv
);
1413 free_netdev(ndev
); /* free device structure */
1415 dev_dbg(&pdev
->dev
, "released and freed device\n");
1419 static struct platform_driver dm9000_driver
= {
1422 .owner
= THIS_MODULE
,
1424 .probe
= dm9000_probe
,
1425 .remove
= __devexit_p(dm9000_drv_remove
),
1426 .suspend
= dm9000_drv_suspend
,
1427 .resume
= dm9000_drv_resume
,
1433 printk(KERN_INFO
"%s Ethernet Driver, V%s\n", CARDNAME
, DRV_VERSION
);
1435 return platform_driver_register(&dm9000_driver
); /* search board and register */
1439 dm9000_cleanup(void)
1441 platform_driver_unregister(&dm9000_driver
);
1444 module_init(dm9000_init
);
1445 module_exit(dm9000_cleanup
);
1447 MODULE_AUTHOR("Sascha Hauer, Ben Dooks");
1448 MODULE_DESCRIPTION("Davicom DM9000 network driver");
1449 MODULE_LICENSE("GPL");
1450 MODULE_ALIAS("platform:dm9000");