2 * Generic Generic NCR5380 driver defines
4 * Copyright 1993, Drew Eckhardt
6 * (Unix and Linux consulting and custom programming)
10 * NCR53C400 extensions (c) 1994,1995,1996, Kevin Lentin
11 * K.Lentin@cs.monash.edu.au
15 * For more information, please consult
18 * SCSI Protocol Controller
21 * NCR Microelectronics
22 * 1635 Aeroplaza Drive
23 * Colorado Springs, CO 80916
29 * $Log: generic_NCR5380.h,v $
32 #ifndef GENERIC_NCR5380_H
33 #define GENERIC_NCR5380_H
36 #define GENERIC_NCR5380_PUBLIC_RELEASE 1
40 #define NCR5380_BIOSPARAM generic_NCR5380_biosparam
42 #define NCR5380_BIOSPARAM NULL
46 static int generic_NCR5380_abort(Scsi_Cmnd
*);
47 static int generic_NCR5380_detect(struct scsi_host_template
*);
48 static int generic_NCR5380_release_resources(struct Scsi_Host
*);
49 static int generic_NCR5380_queue_command(Scsi_Cmnd
*, void (*done
)(Scsi_Cmnd
*));
50 static int generic_NCR5380_bus_reset(Scsi_Cmnd
*);
51 static const char* generic_NCR5380_info(struct Scsi_Host
*);
63 #define __STRVAL(x) #x
64 #define STRVAL(x) __STRVAL(x)
66 #ifndef CONFIG_SCSI_G_NCR5380_MEM
68 #define NCR5380_map_config port
69 #define NCR5380_map_type int
70 #define NCR5380_map_name port
71 #define NCR5380_instance_name io_port
72 #define NCR53C400_register_offset 0
73 #define NCR53C400_address_adjust 8
76 #define NCR5380_region_size 16
78 #define NCR5380_region_size 8
81 #define NCR5380_read(reg) (inb(NCR5380_map_name + (reg)))
82 #define NCR5380_write(reg, value) (outb((value), (NCR5380_map_name + (reg))))
84 #define NCR5380_implementation_fields \
85 NCR5380_map_type NCR5380_map_name
87 #define NCR5380_local_declare() \
88 register NCR5380_implementation_fields
90 #define NCR5380_setup(instance) \
91 NCR5380_map_name = (NCR5380_map_type)((instance)->NCR5380_instance_name)
94 /* therefore CONFIG_SCSI_G_NCR5380_MEM */
96 #define NCR5380_map_config memory
97 #define NCR5380_map_type unsigned long
98 #define NCR5380_map_name base
99 #define NCR5380_instance_name base
100 #define NCR53C400_register_offset 0x108
101 #define NCR53C400_address_adjust 0
102 #define NCR53C400_mem_base 0x3880
103 #define NCR53C400_host_buffer 0x3900
104 #define NCR5380_region_size 0x3a00
106 #define NCR5380_read(reg) readb(iomem + NCR53C400_mem_base + (reg))
107 #define NCR5380_write(reg, value) writeb(value, iomem + NCR53C400_mem_base + (reg))
109 #define NCR5380_implementation_fields \
110 NCR5380_map_type NCR5380_map_name; \
113 #define NCR5380_local_declare() \
114 register void __iomem *iomem
116 #define NCR5380_setup(instance) \
117 iomem = (((struct NCR5380_hostdata *)(instance)->hostdata).iomem)
121 #define NCR5380_intr generic_NCR5380_intr
122 #define NCR5380_queue_command generic_NCR5380_queue_command
123 #define NCR5380_abort generic_NCR5380_abort
124 #define NCR5380_bus_reset generic_NCR5380_bus_reset
125 #define NCR5380_pread generic_NCR5380_pread
126 #define NCR5380_pwrite generic_NCR5380_pwrite
127 #define NCR5380_proc_info notyet_generic_proc_info
129 #define BOARD_NCR5380 0
130 #define BOARD_NCR53C400 1
131 #define BOARD_NCR53C400A 2
132 #define BOARD_DTC3181E 3
134 #endif /* else def HOSTS_C */
135 #endif /* ndef ASM */
136 #endif /* GENERIC_NCR5380_H */