libata: hardreset on SERR_INTERNAL
[linux-2.6/mini2440.git] / drivers / ata / pata_cmd640.c
blobab9468d16edbc534541f736968f1eded6958d877
1 /*
2 * pata_cmd640.c - CMD640 PCI PATA for new ATA layer
3 * (C) 2007 Red Hat Inc
4 * Alan Cox <alan@redhat.com>
6 * Based upon
7 * linux/drivers/ide/pci/cmd640.c Version 1.02 Sep 01, 1996
9 * Copyright (C) 1995-1996 Linus Torvalds & authors (see driver)
11 * This drives only the PCI version of the controller. If you have a
12 * VLB one then we have enough docs to support it but you can write
13 * your own code.
16 #include <linux/kernel.h>
17 #include <linux/module.h>
18 #include <linux/pci.h>
19 #include <linux/init.h>
20 #include <linux/blkdev.h>
21 #include <linux/delay.h>
22 #include <scsi/scsi_host.h>
23 #include <linux/libata.h>
25 #define DRV_NAME "pata_cmd640"
26 #define DRV_VERSION "0.0.5"
28 struct cmd640_reg {
29 int last;
30 u8 reg58[ATA_MAX_DEVICES];
33 enum {
34 CFR = 0x50,
35 CNTRL = 0x51,
36 CMDTIM = 0x52,
37 ARTIM0 = 0x53,
38 DRWTIM0 = 0x54,
39 ARTIM23 = 0x57,
40 DRWTIM23 = 0x58,
41 BRST = 0x59
44 /**
45 * cmd640_set_piomode - set initial PIO mode data
46 * @ap: ATA port
47 * @adev: ATA device
49 * Called to do the PIO mode setup.
52 static void cmd640_set_piomode(struct ata_port *ap, struct ata_device *adev)
54 struct cmd640_reg *timing = ap->private_data;
55 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
56 struct ata_timing t;
57 const unsigned long T = 1000000 / 33;
58 const u8 setup_data[] = { 0x40, 0x40, 0x40, 0x80, 0x00 };
59 u8 reg;
60 int arttim = ARTIM0 + 2 * adev->devno;
61 struct ata_device *pair = ata_dev_pair(adev);
63 if (ata_timing_compute(adev, adev->pio_mode, &t, T, 0) < 0) {
64 printk(KERN_ERR DRV_NAME ": mode computation failed.\n");
65 return;
68 /* The second channel has shared timings and the setup timing is
69 messy to switch to merge it for worst case */
70 if (ap->port_no && pair) {
71 struct ata_timing p;
72 ata_timing_compute(pair, pair->pio_mode, &p, T, 1);
73 ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP);
76 /* Make the timings fit */
77 if (t.recover > 16) {
78 t.active += t.recover - 16;
79 t.recover = 16;
81 if (t.active > 16)
82 t.active = 16;
84 /* Now convert the clocks into values we can actually stuff into
85 the chip */
87 if (t.recover > 1)
88 t.recover--; /* 640B only */
89 else
90 t.recover = 15;
92 if (t.setup > 4)
93 t.setup = 0xC0;
94 else
95 t.setup = setup_data[t.setup];
97 if (ap->port_no == 0) {
98 t.active &= 0x0F; /* 0 = 16 */
100 /* Load setup timing */
101 pci_read_config_byte(pdev, arttim, &reg);
102 reg &= 0x3F;
103 reg |= t.setup;
104 pci_write_config_byte(pdev, arttim, reg);
106 /* Load active/recovery */
107 pci_write_config_byte(pdev, arttim + 1, (t.active << 4) | t.recover);
108 } else {
109 /* Save the shared timings for channel, they will be loaded
110 by qc_issue_prot. Reloading the setup time is expensive
111 so we keep a merged one loaded */
112 pci_read_config_byte(pdev, ARTIM23, &reg);
113 reg &= 0x3F;
114 reg |= t.setup;
115 pci_write_config_byte(pdev, ARTIM23, reg);
116 timing->reg58[adev->devno] = (t.active << 4) | t.recover;
122 * cmd640_qc_issue_prot - command preparation hook
123 * @qc: Command to be issued
125 * Channel 1 has shared timings. We must reprogram the
126 * clock each drive 2/3 switch we do.
129 static unsigned int cmd640_qc_issue_prot(struct ata_queued_cmd *qc)
131 struct ata_port *ap = qc->ap;
132 struct ata_device *adev = qc->dev;
133 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
134 struct cmd640_reg *timing = ap->private_data;
136 if (ap->port_no != 0 && adev->devno != timing->last) {
137 pci_write_config_byte(pdev, DRWTIM23, timing->reg58[adev->devno]);
138 timing->last = adev->devno;
140 return ata_qc_issue_prot(qc);
144 * cmd640_port_start - port setup
145 * @ap: ATA port being set up
147 * The CMD640 needs to maintain private data structures so we
148 * allocate space here.
151 static int cmd640_port_start(struct ata_port *ap)
153 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
154 struct cmd640_reg *timing;
156 int ret = ata_port_start(ap);
157 if (ret < 0)
158 return ret;
160 timing = devm_kzalloc(&pdev->dev, sizeof(struct cmd640_reg), GFP_KERNEL);
161 if (timing == NULL)
162 return -ENOMEM;
163 timing->last = -1; /* Force a load */
164 ap->private_data = timing;
165 return ret;
168 static struct scsi_host_template cmd640_sht = {
169 .module = THIS_MODULE,
170 .name = DRV_NAME,
171 .ioctl = ata_scsi_ioctl,
172 .queuecommand = ata_scsi_queuecmd,
173 .can_queue = ATA_DEF_QUEUE,
174 .this_id = ATA_SHT_THIS_ID,
175 .sg_tablesize = LIBATA_MAX_PRD,
176 .cmd_per_lun = ATA_SHT_CMD_PER_LUN,
177 .emulated = ATA_SHT_EMULATED,
178 .use_clustering = ATA_SHT_USE_CLUSTERING,
179 .proc_name = DRV_NAME,
180 .dma_boundary = ATA_DMA_BOUNDARY,
181 .slave_configure = ata_scsi_slave_config,
182 .slave_destroy = ata_scsi_slave_destroy,
183 .bios_param = ata_std_bios_param,
184 .resume = ata_scsi_device_resume,
185 .suspend = ata_scsi_device_suspend,
188 static struct ata_port_operations cmd640_port_ops = {
189 .port_disable = ata_port_disable,
190 .set_piomode = cmd640_set_piomode,
191 .mode_filter = ata_pci_default_filter,
192 .tf_load = ata_tf_load,
193 .tf_read = ata_tf_read,
194 .check_status = ata_check_status,
195 .exec_command = ata_exec_command,
196 .dev_select = ata_std_dev_select,
198 .freeze = ata_bmdma_freeze,
199 .thaw = ata_bmdma_thaw,
200 .error_handler = ata_bmdma_error_handler,
201 .post_internal_cmd = ata_bmdma_post_internal_cmd,
202 .cable_detect = ata_cable_40wire,
204 .bmdma_setup = ata_bmdma_setup,
205 .bmdma_start = ata_bmdma_start,
206 .bmdma_stop = ata_bmdma_stop,
207 .bmdma_status = ata_bmdma_status,
209 .qc_prep = ata_qc_prep,
210 .qc_issue = cmd640_qc_issue_prot,
212 /* In theory this is not needed once we kill the prefetcher */
213 .data_xfer = ata_data_xfer_noirq,
215 .irq_handler = ata_interrupt,
216 .irq_clear = ata_bmdma_irq_clear,
217 .irq_on = ata_irq_on,
218 .irq_ack = ata_irq_ack,
220 .port_start = cmd640_port_start,
223 static void cmd640_hardware_init(struct pci_dev *pdev)
225 u8 r;
226 u8 ctrl;
228 /* CMD640 detected, commiserations */
229 pci_write_config_byte(pdev, 0x5B, 0x00);
230 /* Get version info */
231 pci_read_config_byte(pdev, CFR, &r);
232 /* PIO0 command cycles */
233 pci_write_config_byte(pdev, CMDTIM, 0);
234 /* 512 byte bursts (sector) */
235 pci_write_config_byte(pdev, BRST, 0x40);
237 * A reporter a long time ago
238 * Had problems with the data fifo
239 * So don't run the risk
240 * Of putting crap on the disk
241 * For its better just to go slow
243 /* Do channel 0 */
244 pci_read_config_byte(pdev, CNTRL, &ctrl);
245 pci_write_config_byte(pdev, CNTRL, ctrl | 0xC0);
246 /* Ditto for channel 1 */
247 pci_read_config_byte(pdev, ARTIM23, &ctrl);
248 ctrl |= 0x0C;
249 pci_write_config_byte(pdev, ARTIM23, ctrl);
252 static int cmd640_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
254 static struct ata_port_info info = {
255 .sht = &cmd640_sht,
256 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
257 .pio_mask = 0x1f,
258 .port_ops = &cmd640_port_ops
261 static struct ata_port_info *port_info[2] = { &info, &info };
263 cmd640_hardware_init(pdev);
264 return ata_pci_init_one(pdev, port_info, 2);
267 static int cmd640_reinit_one(struct pci_dev *pdev)
269 cmd640_hardware_init(pdev);
270 return ata_pci_device_resume(pdev);
273 static const struct pci_device_id cmd640[] = {
274 { PCI_VDEVICE(CMD, 0x640), 0 },
275 { },
278 static struct pci_driver cmd640_pci_driver = {
279 .name = DRV_NAME,
280 .id_table = cmd640,
281 .probe = cmd640_init_one,
282 .remove = ata_pci_remove_one,
283 .suspend = ata_pci_device_suspend,
284 .resume = cmd640_reinit_one,
287 static int __init cmd640_init(void)
289 return pci_register_driver(&cmd640_pci_driver);
292 static void __exit cmd640_exit(void)
294 pci_unregister_driver(&cmd640_pci_driver);
297 MODULE_AUTHOR("Alan Cox");
298 MODULE_DESCRIPTION("low-level driver for CMD640 PATA controllers");
299 MODULE_LICENSE("GPL");
300 MODULE_DEVICE_TABLE(pci, cmd640);
301 MODULE_VERSION(DRV_VERSION);
303 module_init(cmd640_init);
304 module_exit(cmd640_exit);