2 * Dynamic DMA mapping support.
5 #include <linux/types.h>
7 #include <linux/string.h>
9 #include <linux/module.h>
10 #include <linux/dmar.h>
11 #include <linux/bootmem.h>
12 #include <asm/proto.h>
15 #include <asm/calgary.h>
17 int iommu_merge __read_mostly
= 0;
19 dma_addr_t bad_dma_address __read_mostly
;
20 EXPORT_SYMBOL(bad_dma_address
);
22 /* This tells the BIO block layer to assume merging. Default to off
23 because we cannot guarantee merging later. */
24 int iommu_bio_merge __read_mostly
= 0;
25 EXPORT_SYMBOL(iommu_bio_merge
);
27 static int iommu_sac_force __read_mostly
= 0;
29 int no_iommu __read_mostly
;
30 #ifdef CONFIG_IOMMU_DEBUG
31 int panic_on_overflow __read_mostly
= 1;
32 int force_iommu __read_mostly
= 1;
34 int panic_on_overflow __read_mostly
= 0;
35 int force_iommu __read_mostly
= 0;
38 /* Set this to 1 if there is a HW IOMMU in the system */
39 int iommu_detected __read_mostly
= 0;
41 /* Dummy device used for NULL arguments (normally ISA). Better would
42 be probably a smaller DMA mask, but this is bug-to-bug compatible
44 struct device fallback_dev
= {
45 .bus_id
= "fallback device",
46 .coherent_dma_mask
= DMA_32BIT_MASK
,
47 .dma_mask
= &fallback_dev
.coherent_dma_mask
,
50 /* Allocate DMA memory on node near device */
51 noinline
static void *
52 dma_alloc_pages(struct device
*dev
, gfp_t gfp
, unsigned order
)
57 node
= dev_to_node(dev
);
59 page
= alloc_pages_node(node
, gfp
, order
);
60 return page
? page_address(page
) : NULL
;
64 * Allocate memory for a coherent mapping.
67 dma_alloc_coherent(struct device
*dev
, size_t size
, dma_addr_t
*dma_handle
,
71 unsigned long dma_mask
= 0;
76 dma_mask
= dev
->coherent_dma_mask
;
78 dma_mask
= DMA_32BIT_MASK
;
80 /* Device not DMA able */
81 if (dev
->dma_mask
== NULL
)
84 /* Don't invoke OOM killer */
87 /* Kludge to make it bug-to-bug compatible with i386. i386
88 uses the normal dma_mask for alloc_coherent. */
89 dma_mask
&= *dev
->dma_mask
;
91 /* Why <=? Even when the mask is smaller than 4GB it is often
92 larger than 16MB and in this case we have a chance of
93 finding fitting memory in the next higher zone first. If
94 not retry with true GFP_DMA. -AK */
95 if (dma_mask
<= DMA_32BIT_MASK
)
99 memory
= dma_alloc_pages(dev
, gfp
, get_order(size
));
105 bus
= virt_to_bus(memory
);
106 high
= (bus
+ size
) >= dma_mask
;
108 if (force_iommu
&& !(gfp
& GFP_DMA
))
111 free_pages((unsigned long)memory
,
114 /* Don't use the 16MB ZONE_DMA unless absolutely
115 needed. It's better to use remapping first. */
116 if (dma_mask
< DMA_32BIT_MASK
&& !(gfp
& GFP_DMA
)) {
117 gfp
= (gfp
& ~GFP_DMA32
) | GFP_DMA
;
121 /* Let low level make its own zone decisions */
122 gfp
&= ~(GFP_DMA32
|GFP_DMA
);
124 if (dma_ops
->alloc_coherent
)
125 return dma_ops
->alloc_coherent(dev
, size
,
130 memset(memory
, 0, size
);
132 *dma_handle
= virt_to_bus(memory
);
137 if (dma_ops
->alloc_coherent
) {
138 free_pages((unsigned long)memory
, get_order(size
));
139 gfp
&= ~(GFP_DMA
|GFP_DMA32
);
140 return dma_ops
->alloc_coherent(dev
, size
, dma_handle
, gfp
);
143 if (dma_ops
->map_simple
) {
144 *dma_handle
= dma_ops
->map_simple(dev
, memory
,
146 PCI_DMA_BIDIRECTIONAL
);
147 if (*dma_handle
!= bad_dma_address
)
151 if (panic_on_overflow
)
152 panic("dma_alloc_coherent: IOMMU overflow by %lu bytes\n",size
);
153 free_pages((unsigned long)memory
, get_order(size
));
156 EXPORT_SYMBOL(dma_alloc_coherent
);
159 * Unmap coherent memory.
160 * The caller must ensure that the device has finished accessing the mapping.
162 void dma_free_coherent(struct device
*dev
, size_t size
,
163 void *vaddr
, dma_addr_t bus
)
165 WARN_ON(irqs_disabled()); /* for portability */
166 if (dma_ops
->unmap_single
)
167 dma_ops
->unmap_single(dev
, bus
, size
, 0);
168 free_pages((unsigned long)vaddr
, get_order(size
));
170 EXPORT_SYMBOL(dma_free_coherent
);
172 static int forbid_dac __read_mostly
;
174 int dma_supported(struct device
*dev
, u64 mask
)
177 if (mask
> 0xffffffff && forbid_dac
> 0) {
181 printk(KERN_INFO
"PCI: Disallowing DAC for device %s\n", dev
->bus_id
);
186 if (dma_ops
->dma_supported
)
187 return dma_ops
->dma_supported(dev
, mask
);
189 /* Copied from i386. Doesn't make much sense, because it will
190 only work for pci_alloc_coherent.
191 The caller just has to use GFP_DMA in this case. */
192 if (mask
< DMA_24BIT_MASK
)
195 /* Tell the device to use SAC when IOMMU force is on. This
196 allows the driver to use cheaper accesses in some cases.
198 Problem with this is that if we overflow the IOMMU area and
199 return DAC as fallback address the device may not handle it
202 As a special case some controllers have a 39bit address
203 mode that is as efficient as 32bit (aic79xx). Don't force
204 SAC for these. Assume all masks <= 40 bits are of this
205 type. Normally this doesn't make any difference, but gives
206 more gentle handling of IOMMU overflow. */
207 if (iommu_sac_force
&& (mask
>= DMA_40BIT_MASK
)) {
208 printk(KERN_INFO
"%s: Force SAC with mask %Lx\n", dev
->bus_id
,mask
);
214 EXPORT_SYMBOL(dma_supported
);
216 int dma_set_mask(struct device
*dev
, u64 mask
)
218 if (!dev
->dma_mask
|| !dma_supported(dev
, mask
))
220 *dev
->dma_mask
= mask
;
223 EXPORT_SYMBOL(dma_set_mask
);
226 * See <Documentation/x86_64/boot-options.txt> for the iommu kernel parameter
229 static __init
int iommu_setup(char *p
)
237 if (!strncmp(p
, "off", 3))
239 /* gart_parse_options has more force support */
240 if (!strncmp(p
, "force", 5))
242 if (!strncmp(p
, "noforce", 7)) {
247 if (!strncmp(p
, "biomerge", 8)) {
248 iommu_bio_merge
= 4096;
252 if (!strncmp(p
, "panic", 5))
253 panic_on_overflow
= 1;
254 if (!strncmp(p
, "nopanic", 7))
255 panic_on_overflow
= 0;
256 if (!strncmp(p
, "merge", 5)) {
260 if (!strncmp(p
, "nomerge", 7))
262 if (!strncmp(p
, "forcesac", 8))
264 if (!strncmp(p
, "allowdac", 8))
266 if (!strncmp(p
, "nodac", 5))
269 #ifdef CONFIG_SWIOTLB
270 if (!strncmp(p
, "soft", 4))
274 #ifdef CONFIG_GART_IOMMU
275 gart_parse_options(p
);
278 #ifdef CONFIG_CALGARY_IOMMU
279 if (!strncmp(p
, "calgary", 7))
281 #endif /* CONFIG_CALGARY_IOMMU */
283 p
+= strcspn(p
, ",");
289 early_param("iommu", iommu_setup
);
291 static __initdata
void *dma32_bootmem_ptr
;
292 static unsigned long dma32_bootmem_size __initdata
= (128ULL<<20);
294 static int __init
parse_dma32_size_opt(char *p
)
298 dma32_bootmem_size
= memparse(p
, &p
);
301 early_param("dma32_size", parse_dma32_size_opt
);
303 void __init
dma32_reserve_bootmem(void)
305 unsigned long size
, align
;
306 if (end_pfn
<= MAX_DMA32_PFN
)
310 size
= round_up(dma32_bootmem_size
, align
);
311 dma32_bootmem_ptr
= __alloc_bootmem_nopanic(size
, align
,
312 __pa(MAX_DMA_ADDRESS
));
313 if (dma32_bootmem_ptr
)
314 dma32_bootmem_size
= size
;
316 dma32_bootmem_size
= 0;
318 static void __init
dma32_free_bootmem(void)
322 if (end_pfn
<= MAX_DMA32_PFN
)
325 if (!dma32_bootmem_ptr
)
328 for_each_online_node(node
)
329 free_bootmem_node(NODE_DATA(node
), __pa(dma32_bootmem_ptr
),
332 dma32_bootmem_ptr
= NULL
;
333 dma32_bootmem_size
= 0;
336 void __init
pci_iommu_alloc(void)
338 /* free the range so iommu could get some range less than 4G */
339 dma32_free_bootmem();
341 * The order of these functions is important for
342 * fall-back/fail-over reasons
344 #ifdef CONFIG_GART_IOMMU
345 gart_iommu_hole_init();
348 #ifdef CONFIG_CALGARY_IOMMU
352 detect_intel_iommu();
354 #ifdef CONFIG_SWIOTLB
359 static int __init
pci_iommu_init(void)
361 #ifdef CONFIG_CALGARY_IOMMU
362 calgary_iommu_init();
367 #ifdef CONFIG_GART_IOMMU
375 void pci_iommu_shutdown(void)
377 gart_iommu_shutdown();
381 /* Many VIA bridges seem to corrupt data for DAC. Disable it here */
383 static __devinit
void via_no_dac(struct pci_dev
*dev
)
385 if ((dev
->class >> 8) == PCI_CLASS_BRIDGE_PCI
&& forbid_dac
== 0) {
386 printk(KERN_INFO
"PCI: VIA PCI bridge detected. Disabling DAC.\n");
390 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA
, PCI_ANY_ID
, via_no_dac
);
392 /* Must execute after PCI subsystem */
393 fs_initcall(pci_iommu_init
);