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PCI: handle SR-IOV Virtual Function Migration
[linux-2.6/mini2440.git] / drivers / char / mxser.c
blob402c9f217f83a3853f62b5a09401ab8ab0d8f3a3
1 /*
2 * mxser.c -- MOXA Smartio/Industio family multiport serial driver.
3 *
4 * Copyright (C) 1999-2006 Moxa Technologies (support@moxa.com).
5 * Copyright (C) 2006-2008 Jiri Slaby <jirislaby@gmail.com>
6 *
7 * This code is loosely based on the 1.8 moxa driver which is based on
8 * Linux serial driver, written by Linus Torvalds, Theodore T'so and
9 * others.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox
17 * <alan@lxorguk.ukuu.org.uk>. The original 1.8 code is available on
18 * www.moxa.com.
19 * - Fixed x86_64 cleanness
20 */
21
22 #include <linux/module.h>
23 #include <linux/errno.h>
24 #include <linux/signal.h>
25 #include <linux/sched.h>
26 #include <linux/timer.h>
27 #include <linux/interrupt.h>
28 #include <linux/tty.h>
29 #include <linux/tty_flip.h>
30 #include <linux/serial.h>
31 #include <linux/serial_reg.h>
32 #include <linux/major.h>
33 #include <linux/string.h>
34 #include <linux/fcntl.h>
35 #include <linux/ptrace.h>
36 #include <linux/gfp.h>
37 #include <linux/ioport.h>
38 #include <linux/mm.h>
39 #include <linux/delay.h>
40 #include <linux/pci.h>
41 #include <linux/bitops.h>
42
43 #include <asm/system.h>
44 #include <asm/io.h>
45 #include <asm/irq.h>
46 #include <asm/uaccess.h>
47
48 #include "mxser.h"
49
50 #define MXSER_VERSION "2.0.4" /* 1.12 */
51 #define MXSERMAJOR 174
52
53 #define MXSER_BOARDS 4 /* Max. boards */
54 #define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */
55 #define MXSER_PORTS (MXSER_BOARDS * MXSER_PORTS_PER_BOARD)
56 #define MXSER_ISR_PASS_LIMIT 100
57
58 /*CheckIsMoxaMust return value*/
59 #define MOXA_OTHER_UART 0x00
60 #define MOXA_MUST_MU150_HWID 0x01
61 #define MOXA_MUST_MU860_HWID 0x02
62
63 #define WAKEUP_CHARS 256
64
65 #define UART_MCR_AFE 0x20
66 #define UART_LSR_SPECIAL 0x1E
67
68 #define PCI_DEVICE_ID_POS104UL 0x1044
69 #define PCI_DEVICE_ID_CB108 0x1080
70 #define PCI_DEVICE_ID_CP102UF 0x1023
71 #define PCI_DEVICE_ID_CB114 0x1142
72 #define PCI_DEVICE_ID_CP114UL 0x1143
73 #define PCI_DEVICE_ID_CB134I 0x1341
74 #define PCI_DEVICE_ID_CP138U 0x1380
75
76
77 #define C168_ASIC_ID 1
78 #define C104_ASIC_ID 2
79 #define C102_ASIC_ID 0xB
80 #define CI132_ASIC_ID 4
81 #define CI134_ASIC_ID 3
82 #define CI104J_ASIC_ID 5
83
84 #define MXSER_HIGHBAUD 1
85 #define MXSER_HAS2 2
86
87 /* This is only for PCI */
88 static const struct {
89 int type;
90 int tx_fifo;
91 int rx_fifo;
92 int xmit_fifo_size;
93 int rx_high_water;
94 int rx_trigger;
95 int rx_low_water;
96 long max_baud;
97 } Gpci_uart_info[] = {
98 {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L},
99 {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L},
100 {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L}
101 };
102 #define UART_INFO_NUM ARRAY_SIZE(Gpci_uart_info)
103
104 struct mxser_cardinfo {
105 char *name;
106 unsigned int nports;
107 unsigned int flags;
108 };
109
110 static const struct mxser_cardinfo mxser_cards[] = {
111 /* 0*/ { "C168 series", 8, },
112 { "C104 series", 4, },
113 { "CI-104J series", 4, },
114 { "C168H/PCI series", 8, },
115 { "C104H/PCI series", 4, },
116 /* 5*/ { "C102 series", 4, MXSER_HAS2 }, /* C102-ISA */
117 { "CI-132 series", 4, MXSER_HAS2 },
118 { "CI-134 series", 4, },
119 { "CP-132 series", 2, },
120 { "CP-114 series", 4, },
121 /*10*/ { "CT-114 series", 4, },
122 { "CP-102 series", 2, MXSER_HIGHBAUD },
123 { "CP-104U series", 4, },
124 { "CP-168U series", 8, },
125 { "CP-132U series", 2, },
126 /*15*/ { "CP-134U series", 4, },
127 { "CP-104JU series", 4, },
128 { "Moxa UC7000 Serial", 8, }, /* RC7000 */
129 { "CP-118U series", 8, },
130 { "CP-102UL series", 2, },
131 /*20*/ { "CP-102U series", 2, },
132 { "CP-118EL series", 8, },
133 { "CP-168EL series", 8, },
134 { "CP-104EL series", 4, },
135 { "CB-108 series", 8, },
136 /*25*/ { "CB-114 series", 4, },
137 { "CB-134I series", 4, },
138 { "CP-138U series", 8, },
139 { "POS-104UL series", 4, },
140 { "CP-114UL series", 4, },
141 /*30*/ { "CP-102UF series", 2, }
142 };
143
144 /* driver_data correspond to the lines in the structure above
145 see also ISA probe function before you change something */
146 static struct pci_device_id mxser_pcibrds[] = {
147 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C168), .driver_data = 3 },
148 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C104), .driver_data = 4 },
149 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132), .driver_data = 8 },
150 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP114), .driver_data = 9 },
151 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CT114), .driver_data = 10 },
152 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102), .driver_data = 11 },
153 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104U), .driver_data = 12 },
154 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168U), .driver_data = 13 },
155 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132U), .driver_data = 14 },
156 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP134U), .driver_data = 15 },
157 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104JU),.driver_data = 16 },
158 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_RC7000), .driver_data = 17 },
159 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118U), .driver_data = 18 },
160 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102UL),.driver_data = 19 },
161 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102U), .driver_data = 20 },
162 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118EL),.driver_data = 21 },
163 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168EL),.driver_data = 22 },
164 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104EL),.driver_data = 23 },
165 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB108), .driver_data = 24 },
166 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB114), .driver_data = 25 },
167 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB134I), .driver_data = 26 },
168 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP138U), .driver_data = 27 },
169 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_POS104UL), .driver_data = 28 },
170 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP114UL), .driver_data = 29 },
171 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP102UF), .driver_data = 30 },
172 { }
173 };
174 MODULE_DEVICE_TABLE(pci, mxser_pcibrds);
175
176 static unsigned long ioaddr[MXSER_BOARDS];
177 static int ttymajor = MXSERMAJOR;
178
179 /* Variables for insmod */
180
181 MODULE_AUTHOR("Casper Yang");
182 MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver");
183 module_param_array(ioaddr, ulong, NULL, 0);
184 MODULE_PARM_DESC(ioaddr, "ISA io addresses to look for a moxa board");
185 module_param(ttymajor, int, 0);
186 MODULE_LICENSE("GPL");
187
188 struct mxser_log {
189 int tick;
190 unsigned long rxcnt[MXSER_PORTS];
191 unsigned long txcnt[MXSER_PORTS];
192 };
193
194 struct mxser_mon {
195 unsigned long rxcnt;
196 unsigned long txcnt;
197 unsigned long up_rxcnt;
198 unsigned long up_txcnt;
199 int modem_status;
200 unsigned char hold_reason;
201 };
202
203 struct mxser_mon_ext {
204 unsigned long rx_cnt[32];
205 unsigned long tx_cnt[32];
206 unsigned long up_rxcnt[32];
207 unsigned long up_txcnt[32];
208 int modem_status[32];
209
210 long baudrate[32];
211 int databits[32];
212 int stopbits[32];
213 int parity[32];
214 int flowctrl[32];
215 int fifo[32];
216 int iftype[32];
217 };
218
219 struct mxser_board;
220
221 struct mxser_port {
222 struct tty_port port;
223 struct mxser_board *board;
224
225 unsigned long ioaddr;
226 unsigned long opmode_ioaddr;
227 int max_baud;
228
229 int rx_high_water;
230 int rx_trigger; /* Rx fifo trigger level */
231 int rx_low_water;
232 int baud_base; /* max. speed */
233 int type; /* UART type */
234
235 int x_char; /* xon/xoff character */
236 int IER; /* Interrupt Enable Register */
237 int MCR; /* Modem control register */
238
239 unsigned char stop_rx;
240 unsigned char ldisc_stop_rx;
241
242 int custom_divisor;
243 unsigned char err_shadow;
244
245 struct async_icount icount; /* kernel counters for 4 input interrupts */
246 int timeout;
247
248 int read_status_mask;
249 int ignore_status_mask;
250 int xmit_fifo_size;
251 int xmit_head;
252 int xmit_tail;
253 int xmit_cnt;
254
255 struct ktermios normal_termios;
256
257 struct mxser_mon mon_data;
258
259 spinlock_t slock;
260 wait_queue_head_t delta_msr_wait;
261 };
262
263 struct mxser_board {
264 unsigned int idx;
265 int irq;
266 const struct mxser_cardinfo *info;
267 unsigned long vector;
268 unsigned long vector_mask;
269
270 int chip_flag;
271 int uart_type;
272
273 struct mxser_port ports[MXSER_PORTS_PER_BOARD];
274 };
275
276 struct mxser_mstatus {
277 tcflag_t cflag;
278 int cts;
279 int dsr;
280 int ri;
281 int dcd;
282 };
283
284 static struct mxser_board mxser_boards[MXSER_BOARDS];
285 static struct tty_driver *mxvar_sdriver;
286 static struct mxser_log mxvar_log;
287 static int mxser_set_baud_method[MXSER_PORTS + 1];
288
289 static void mxser_enable_must_enchance_mode(unsigned long baseio)
290 {
291 u8 oldlcr;
292 u8 efr;
293
294 oldlcr = inb(baseio + UART_LCR);
295 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
296
297 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
298 efr |= MOXA_MUST_EFR_EFRB_ENABLE;
299
300 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
301 outb(oldlcr, baseio + UART_LCR);
302 }
303
304 static void mxser_disable_must_enchance_mode(unsigned long baseio)
305 {
306 u8 oldlcr;
307 u8 efr;
308
309 oldlcr = inb(baseio + UART_LCR);
310 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
311
312 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
313 efr &= ~MOXA_MUST_EFR_EFRB_ENABLE;
314
315 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
316 outb(oldlcr, baseio + UART_LCR);
317 }
318
319 static void mxser_set_must_xon1_value(unsigned long baseio, u8 value)
320 {
321 u8 oldlcr;
322 u8 efr;
323
324 oldlcr = inb(baseio + UART_LCR);
325 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
326
327 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
328 efr &= ~MOXA_MUST_EFR_BANK_MASK;
329 efr |= MOXA_MUST_EFR_BANK0;
330
331 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
332 outb(value, baseio + MOXA_MUST_XON1_REGISTER);
333 outb(oldlcr, baseio + UART_LCR);
334 }
335
336 static void mxser_set_must_xoff1_value(unsigned long baseio, u8 value)
337 {
338 u8 oldlcr;
339 u8 efr;
340
341 oldlcr = inb(baseio + UART_LCR);
342 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
343
344 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
345 efr &= ~MOXA_MUST_EFR_BANK_MASK;
346 efr |= MOXA_MUST_EFR_BANK0;
347
348 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
349 outb(value, baseio + MOXA_MUST_XOFF1_REGISTER);
350 outb(oldlcr, baseio + UART_LCR);
351 }
352
353 static void mxser_set_must_fifo_value(struct mxser_port *info)
354 {
355 u8 oldlcr;
356 u8 efr;
357
358 oldlcr = inb(info->ioaddr + UART_LCR);
359 outb(MOXA_MUST_ENTER_ENCHANCE, info->ioaddr + UART_LCR);
360
361 efr = inb(info->ioaddr + MOXA_MUST_EFR_REGISTER);
362 efr &= ~MOXA_MUST_EFR_BANK_MASK;
363 efr |= MOXA_MUST_EFR_BANK1;
364
365 outb(efr, info->ioaddr + MOXA_MUST_EFR_REGISTER);
366 outb((u8)info->rx_high_water, info->ioaddr + MOXA_MUST_RBRTH_REGISTER);
367 outb((u8)info->rx_trigger, info->ioaddr + MOXA_MUST_RBRTI_REGISTER);
368 outb((u8)info->rx_low_water, info->ioaddr + MOXA_MUST_RBRTL_REGISTER);
369 outb(oldlcr, info->ioaddr + UART_LCR);
370 }
371
372 static void mxser_set_must_enum_value(unsigned long baseio, u8 value)
373 {
374 u8 oldlcr;
375 u8 efr;
376
377 oldlcr = inb(baseio + UART_LCR);
378 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
379
380 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
381 efr &= ~MOXA_MUST_EFR_BANK_MASK;
382 efr |= MOXA_MUST_EFR_BANK2;
383
384 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
385 outb(value, baseio + MOXA_MUST_ENUM_REGISTER);
386 outb(oldlcr, baseio + UART_LCR);
387 }
388
389 static void mxser_get_must_hardware_id(unsigned long baseio, u8 *pId)
390 {
391 u8 oldlcr;
392 u8 efr;
393
394 oldlcr = inb(baseio + UART_LCR);
395 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
396
397 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
398 efr &= ~MOXA_MUST_EFR_BANK_MASK;
399 efr |= MOXA_MUST_EFR_BANK2;
400
401 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
402 *pId = inb(baseio + MOXA_MUST_HWID_REGISTER);
403 outb(oldlcr, baseio + UART_LCR);
404 }
405
406 static void SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(unsigned long baseio)
407 {
408 u8 oldlcr;
409 u8 efr;
410
411 oldlcr = inb(baseio + UART_LCR);
412 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
413
414 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
415 efr &= ~MOXA_MUST_EFR_SF_MASK;
416
417 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
418 outb(oldlcr, baseio + UART_LCR);
419 }
420
421 static void mxser_enable_must_tx_software_flow_control(unsigned long baseio)
422 {
423 u8 oldlcr;
424 u8 efr;
425
426 oldlcr = inb(baseio + UART_LCR);
427 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
428
429 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
430 efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
431 efr |= MOXA_MUST_EFR_SF_TX1;
432
433 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
434 outb(oldlcr, baseio + UART_LCR);
435 }
436
437 static void mxser_disable_must_tx_software_flow_control(unsigned long baseio)
438 {
439 u8 oldlcr;
440 u8 efr;
441
442 oldlcr = inb(baseio + UART_LCR);
443 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
444
445 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
446 efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
447
448 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
449 outb(oldlcr, baseio + UART_LCR);
450 }
451
452 static void mxser_enable_must_rx_software_flow_control(unsigned long baseio)
453 {
454 u8 oldlcr;
455 u8 efr;
456
457 oldlcr = inb(baseio + UART_LCR);
458 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
459
460 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
461 efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
462 efr |= MOXA_MUST_EFR_SF_RX1;
463
464 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
465 outb(oldlcr, baseio + UART_LCR);
466 }
467
468 static void mxser_disable_must_rx_software_flow_control(unsigned long baseio)
469 {
470 u8 oldlcr;
471 u8 efr;
472
473 oldlcr = inb(baseio + UART_LCR);
474 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
475
476 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
477 efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
478
479 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
480 outb(oldlcr, baseio + UART_LCR);
481 }
482
483 #ifdef CONFIG_PCI
484 static int __devinit CheckIsMoxaMust(unsigned long io)
485 {
486 u8 oldmcr, hwid;
487 int i;
488
489 outb(0, io + UART_LCR);
490 mxser_disable_must_enchance_mode(io);
491 oldmcr = inb(io + UART_MCR);
492 outb(0, io + UART_MCR);
493 mxser_set_must_xon1_value(io, 0x11);
494 if ((hwid = inb(io + UART_MCR)) != 0) {
495 outb(oldmcr, io + UART_MCR);
496 return MOXA_OTHER_UART;
497 }
498
499 mxser_get_must_hardware_id(io, &hwid);
500 for (i = 1; i < UART_INFO_NUM; i++) { /* 0 = OTHER_UART */
501 if (hwid == Gpci_uart_info[i].type)
502 return (int)hwid;
503 }
504 return MOXA_OTHER_UART;
505 }
506 #endif
507
508 static void process_txrx_fifo(struct mxser_port *info)
509 {
510 int i;
511
512 if ((info->type == PORT_16450) || (info->type == PORT_8250)) {
513 info->rx_trigger = 1;
514 info->rx_high_water = 1;
515 info->rx_low_water = 1;
516 info->xmit_fifo_size = 1;
517 } else
518 for (i = 0; i < UART_INFO_NUM; i++)
519 if (info->board->chip_flag == Gpci_uart_info[i].type) {
520 info->rx_trigger = Gpci_uart_info[i].rx_trigger;
521 info->rx_low_water = Gpci_uart_info[i].rx_low_water;
522 info->rx_high_water = Gpci_uart_info[i].rx_high_water;
523 info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size;
524 break;
525 }
526 }
527
528 static unsigned char mxser_get_msr(int baseaddr, int mode, int port)
529 {
530 static unsigned char mxser_msr[MXSER_PORTS + 1];
531 unsigned char status = 0;
532
533 status = inb(baseaddr + UART_MSR);
534
535 mxser_msr[port] &= 0x0F;
536 mxser_msr[port] |= status;
537 status = mxser_msr[port];
538 if (mode)
539 mxser_msr[port] = 0;
540
541 return status;
542 }
543
544 static int mxser_carrier_raised(struct tty_port *port)
545 {
546 struct mxser_port *mp = container_of(port, struct mxser_port, port);
547 return (inb(mp->ioaddr + UART_MSR) & UART_MSR_DCD)?1:0;
548 }
549
550 static void mxser_raise_dtr_rts(struct tty_port *port)
551 {
552 struct mxser_port *mp = container_of(port, struct mxser_port, port);
553 unsigned long flags;
554
555 spin_lock_irqsave(&mp->slock, flags);
556 outb(inb(mp->ioaddr + UART_MCR) |
557 UART_MCR_DTR | UART_MCR_RTS, mp->ioaddr + UART_MCR);
558 spin_unlock_irqrestore(&mp->slock, flags);
559 }
560
561 static int mxser_set_baud(struct tty_struct *tty, long newspd)
562 {
563 struct mxser_port *info = tty->driver_data;
564 int quot = 0, baud;
565 unsigned char cval;
566
567 if (!info->ioaddr)
568 return -1;
569
570 if (newspd > info->max_baud)
571 return -1;
572
573 if (newspd == 134) {
574 quot = 2 * info->baud_base / 269;
575 tty_encode_baud_rate(tty, 134, 134);
576 } else if (newspd) {
577 quot = info->baud_base / newspd;
578 if (quot == 0)
579 quot = 1;
580 baud = info->baud_base/quot;
581 tty_encode_baud_rate(tty, baud, baud);
582 } else {
583 quot = 0;
584 }
585
586 info->timeout = ((info->xmit_fifo_size * HZ * 10 * quot) / info->baud_base);
587 info->timeout += HZ / 50; /* Add .02 seconds of slop */
588
589 if (quot) {
590 info->MCR |= UART_MCR_DTR;
591 outb(info->MCR, info->ioaddr + UART_MCR);
592 } else {
593 info->MCR &= ~UART_MCR_DTR;
594 outb(info->MCR, info->ioaddr + UART_MCR);
595 return 0;
596 }
597
598 cval = inb(info->ioaddr + UART_LCR);
599
600 outb(cval | UART_LCR_DLAB, info->ioaddr + UART_LCR); /* set DLAB */
601
602 outb(quot & 0xff, info->ioaddr + UART_DLL); /* LS of divisor */
603 outb(quot >> 8, info->ioaddr + UART_DLM); /* MS of divisor */
604 outb(cval, info->ioaddr + UART_LCR); /* reset DLAB */
605
606 #ifdef BOTHER
607 if (C_BAUD(tty) == BOTHER) {
608 quot = info->baud_base % newspd;
609 quot *= 8;
610 if (quot % newspd > newspd / 2) {
611 quot /= newspd;
612 quot++;
613 } else
614 quot /= newspd;
615
616 mxser_set_must_enum_value(info->ioaddr, quot);
617 } else
618 #endif
619 mxser_set_must_enum_value(info->ioaddr, 0);
620
621 return 0;
622 }
623
624 /*
625 * This routine is called to set the UART divisor registers to match
626 * the specified baud rate for a serial port.
627 */
628 static int mxser_change_speed(struct tty_struct *tty,
629 struct ktermios *old_termios)
630 {
631 struct mxser_port *info = tty->driver_data;
632 unsigned cflag, cval, fcr;
633 int ret = 0;
634 unsigned char status;
635
636 cflag = tty->termios->c_cflag;
637 if (!info->ioaddr)
638 return ret;
639
640 if (mxser_set_baud_method[tty->index] == 0)
641 mxser_set_baud(tty, tty_get_baud_rate(tty));
642
643 /* byte size and parity */
644 switch (cflag & CSIZE) {
645 case CS5:
646 cval = 0x00;
647 break;
648 case CS6:
649 cval = 0x01;
650 break;
651 case CS7:
652 cval = 0x02;
653 break;
654 case CS8:
655 cval = 0x03;
656 break;
657 default:
658 cval = 0x00;
659 break; /* too keep GCC shut... */
660 }
661 if (cflag & CSTOPB)
662 cval |= 0x04;
663 if (cflag & PARENB)
664 cval |= UART_LCR_PARITY;
665 if (!(cflag & PARODD))
666 cval |= UART_LCR_EPAR;
667 if (cflag & CMSPAR)
668 cval |= UART_LCR_SPAR;
669
670 if ((info->type == PORT_8250) || (info->type == PORT_16450)) {
671 if (info->board->chip_flag) {
672 fcr = UART_FCR_ENABLE_FIFO;
673 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
674 mxser_set_must_fifo_value(info);
675 } else
676 fcr = 0;
677 } else {
678 fcr = UART_FCR_ENABLE_FIFO;
679 if (info->board->chip_flag) {
680 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
681 mxser_set_must_fifo_value(info);
682 } else {
683 switch (info->rx_trigger) {
684 case 1:
685 fcr |= UART_FCR_TRIGGER_1;
686 break;
687 case 4:
688 fcr |= UART_FCR_TRIGGER_4;
689 break;
690 case 8:
691 fcr |= UART_FCR_TRIGGER_8;
692 break;
693 default:
694 fcr |= UART_FCR_TRIGGER_14;
695 break;
696 }
697 }
698 }
699
700 /* CTS flow control flag and modem status interrupts */
701 info->IER &= ~UART_IER_MSI;
702 info->MCR &= ~UART_MCR_AFE;
703 if (cflag & CRTSCTS) {
704 info->port.flags |= ASYNC_CTS_FLOW;
705 info->IER |= UART_IER_MSI;
706 if ((info->type == PORT_16550A) || (info->board->chip_flag)) {
707 info->MCR |= UART_MCR_AFE;
708 } else {
709 status = inb(info->ioaddr + UART_MSR);
710 if (tty->hw_stopped) {
711 if (status & UART_MSR_CTS) {
712 tty->hw_stopped = 0;
713 if (info->type != PORT_16550A &&
714 !info->board->chip_flag) {
715 outb(info->IER & ~UART_IER_THRI,
716 info->ioaddr +
717 UART_IER);
718 info->IER |= UART_IER_THRI;
719 outb(info->IER, info->ioaddr +
720 UART_IER);
721 }
722 tty_wakeup(tty);
723 }
724 } else {
725 if (!(status & UART_MSR_CTS)) {
726 tty->hw_stopped = 1;
727 if ((info->type != PORT_16550A) &&
728 (!info->board->chip_flag)) {
729 info->IER &= ~UART_IER_THRI;
730 outb(info->IER, info->ioaddr +
731 UART_IER);
732 }
733 }
734 }
735 }
736 } else {
737 info->port.flags &= ~ASYNC_CTS_FLOW;
738 }
739 outb(info->MCR, info->ioaddr + UART_MCR);
740 if (cflag & CLOCAL) {
741 info->port.flags &= ~ASYNC_CHECK_CD;
742 } else {
743 info->port.flags |= ASYNC_CHECK_CD;
744 info->IER |= UART_IER_MSI;
745 }
746 outb(info->IER, info->ioaddr + UART_IER);
747
748 /*
749 * Set up parity check flag
750 */
751 info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
752 if (I_INPCK(tty))
753 info->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
754 if (I_BRKINT(tty) || I_PARMRK(tty))
755 info->read_status_mask |= UART_LSR_BI;
756
757 info->ignore_status_mask = 0;
758
759 if (I_IGNBRK(tty)) {
760 info->ignore_status_mask |= UART_LSR_BI;
761 info->read_status_mask |= UART_LSR_BI;
762 /*
763 * If we're ignore parity and break indicators, ignore
764 * overruns too. (For real raw support).
765 */
766 if (I_IGNPAR(tty)) {
767 info->ignore_status_mask |=
768 UART_LSR_OE |
769 UART_LSR_PE |
770 UART_LSR_FE;
771 info->read_status_mask |=
772 UART_LSR_OE |
773 UART_LSR_PE |
774 UART_LSR_FE;
775 }
776 }
777 if (info->board->chip_flag) {
778 mxser_set_must_xon1_value(info->ioaddr, START_CHAR(tty));
779 mxser_set_must_xoff1_value(info->ioaddr, STOP_CHAR(tty));
780 if (I_IXON(tty)) {
781 mxser_enable_must_rx_software_flow_control(
782 info->ioaddr);
783 } else {
784 mxser_disable_must_rx_software_flow_control(
785 info->ioaddr);
786 }
787 if (I_IXOFF(tty)) {
788 mxser_enable_must_tx_software_flow_control(
789 info->ioaddr);
790 } else {
791 mxser_disable_must_tx_software_flow_control(
792 info->ioaddr);
793 }
794 }
795
796
797 outb(fcr, info->ioaddr + UART_FCR); /* set fcr */
798 outb(cval, info->ioaddr + UART_LCR);
799
800 return ret;
801 }
802
803 static void mxser_check_modem_status(struct tty_struct *tty,
804 struct mxser_port *port, int status)
805 {
806 /* update input line counters */
807 if (status & UART_MSR_TERI)
808 port->icount.rng++;
809 if (status & UART_MSR_DDSR)
810 port->icount.dsr++;
811 if (status & UART_MSR_DDCD)
812 port->icount.dcd++;
813 if (status & UART_MSR_DCTS)
814 port->icount.cts++;
815 port->mon_data.modem_status = status;
816 wake_up_interruptible(&port->delta_msr_wait);
817
818 if ((port->port.flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
819 if (status & UART_MSR_DCD)
820 wake_up_interruptible(&port->port.open_wait);
821 }
822
823 tty = tty_port_tty_get(&port->port);
824 if (port->port.flags & ASYNC_CTS_FLOW) {
825 if (tty->hw_stopped) {
826 if (status & UART_MSR_CTS) {
827 tty->hw_stopped = 0;
828
829 if ((port->type != PORT_16550A) &&
830 (!port->board->chip_flag)) {
831 outb(port->IER & ~UART_IER_THRI,
832 port->ioaddr + UART_IER);
833 port->IER |= UART_IER_THRI;
834 outb(port->IER, port->ioaddr +
835 UART_IER);
836 }
837 tty_wakeup(tty);
838 }
839 } else {
840 if (!(status & UART_MSR_CTS)) {
841 tty->hw_stopped = 1;
842 if (port->type != PORT_16550A &&
843 !port->board->chip_flag) {
844 port->IER &= ~UART_IER_THRI;
845 outb(port->IER, port->ioaddr +
846 UART_IER);
847 }
848 }
849 }
850 }
851 }
852
853 static int mxser_startup(struct tty_struct *tty)
854 {
855 struct mxser_port *info = tty->driver_data;
856 unsigned long page;
857 unsigned long flags;
858
859 page = __get_free_page(GFP_KERNEL);
860 if (!page)
861 return -ENOMEM;
862
863 spin_lock_irqsave(&info->slock, flags);
864
865 if (info->port.flags & ASYNC_INITIALIZED) {
866 free_page(page);
867 spin_unlock_irqrestore(&info->slock, flags);
868 return 0;
869 }
870
871 if (!info->ioaddr || !info->type) {
872 set_bit(TTY_IO_ERROR, &tty->flags);
873 free_page(page);
874 spin_unlock_irqrestore(&info->slock, flags);
875 return 0;
876 }
877 if (info->port.xmit_buf)
878 free_page(page);
879 else
880 info->port.xmit_buf = (unsigned char *) page;
881
882 /*
883 * Clear the FIFO buffers and disable them
884 * (they will be reenabled in mxser_change_speed())
885 */
886 if (info->board->chip_flag)
887 outb((UART_FCR_CLEAR_RCVR |
888 UART_FCR_CLEAR_XMIT |
889 MOXA_MUST_FCR_GDA_MODE_ENABLE), info->ioaddr + UART_FCR);
890 else
891 outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
892 info->ioaddr + UART_FCR);
893
894 /*
895 * At this point there's no way the LSR could still be 0xFF;
896 * if it is, then bail out, because there's likely no UART
897 * here.
898 */
899 if (inb(info->ioaddr + UART_LSR) == 0xff) {
900 spin_unlock_irqrestore(&info->slock, flags);
901 if (capable(CAP_SYS_ADMIN)) {
902 if (tty)
903 set_bit(TTY_IO_ERROR, &tty->flags);
904 return 0;
905 } else
906 return -ENODEV;
907 }
908
909 /*
910 * Clear the interrupt registers.
911 */
912 (void) inb(info->ioaddr + UART_LSR);
913 (void) inb(info->ioaddr + UART_RX);
914 (void) inb(info->ioaddr + UART_IIR);
915 (void) inb(info->ioaddr + UART_MSR);
916
917 /*
918 * Now, initialize the UART
919 */
920 outb(UART_LCR_WLEN8, info->ioaddr + UART_LCR); /* reset DLAB */
921 info->MCR = UART_MCR_DTR | UART_MCR_RTS;
922 outb(info->MCR, info->ioaddr + UART_MCR);
923
924 /*
925 * Finally, enable interrupts
926 */
927 info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
928
929 if (info->board->chip_flag)
930 info->IER |= MOXA_MUST_IER_EGDAI;
931 outb(info->IER, info->ioaddr + UART_IER); /* enable interrupts */
932
933 /*
934 * And clear the interrupt registers again for luck.
935 */
936 (void) inb(info->ioaddr + UART_LSR);
937 (void) inb(info->ioaddr + UART_RX);
938 (void) inb(info->ioaddr + UART_IIR);
939 (void) inb(info->ioaddr + UART_MSR);
940
941 clear_bit(TTY_IO_ERROR, &tty->flags);
942 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
943
944 /*
945 * and set the speed of the serial port
946 */
947 mxser_change_speed(tty, NULL);
948 info->port.flags |= ASYNC_INITIALIZED;
949 spin_unlock_irqrestore(&info->slock, flags);
950
951 return 0;
952 }
953
954 /*
955 * This routine will shutdown a serial port; interrupts maybe disabled, and
956 * DTR is dropped if the hangup on close termio flag is on.
957 */
958 static void mxser_shutdown(struct tty_struct *tty)
959 {
960 struct mxser_port *info = tty->driver_data;
961 unsigned long flags;
962
963 if (!(info->port.flags & ASYNC_INITIALIZED))
964 return;
965
966 spin_lock_irqsave(&info->slock, flags);
967
968 /*
969 * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
970 * here so the queue might never be waken up
971 */
972 wake_up_interruptible(&info->delta_msr_wait);
973
974 /*
975 * Free the IRQ, if necessary
976 */
977 if (info->port.xmit_buf) {
978 free_page((unsigned long) info->port.xmit_buf);
979 info->port.xmit_buf = NULL;
980 }
981
982 info->IER = 0;
983 outb(0x00, info->ioaddr + UART_IER);
984
985 if (tty->termios->c_cflag & HUPCL)
986 info->MCR &= ~(UART_MCR_DTR | UART_MCR_RTS);
987 outb(info->MCR, info->ioaddr + UART_MCR);
988
989 /* clear Rx/Tx FIFO's */
990 if (info->board->chip_flag)
991 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT |
992 MOXA_MUST_FCR_GDA_MODE_ENABLE,
993 info->ioaddr + UART_FCR);
994 else
995 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT,
996 info->ioaddr + UART_FCR);
997
998 /* read data port to reset things */
999 (void) inb(info->ioaddr + UART_RX);
1000
1001 set_bit(TTY_IO_ERROR, &tty->flags);
1002
1003 info->port.flags &= ~ASYNC_INITIALIZED;
1004
1005 if (info->board->chip_flag)
1006 SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->ioaddr);
1007
1008 spin_unlock_irqrestore(&info->slock, flags);
1009 }
1010
1011 /*
1012 * This routine is called whenever a serial port is opened. It
1013 * enables interrupts for a serial port, linking in its async structure into
1014 * the IRQ chain. It also performs the serial-specific
1015 * initialization for the tty structure.
1016 */
1017 static int mxser_open(struct tty_struct *tty, struct file *filp)
1018 {
1019 struct mxser_port *info;
1020 unsigned long flags;
1021 int retval, line;
1022
1023 line = tty->index;
1024 if (line == MXSER_PORTS)
1025 return 0;
1026 if (line < 0 || line > MXSER_PORTS)
1027 return -ENODEV;
1028 info = &mxser_boards[line / MXSER_PORTS_PER_BOARD].ports[line % MXSER_PORTS_PER_BOARD];
1029 if (!info->ioaddr)
1030 return -ENODEV;
1031
1032 tty->driver_data = info;
1033 tty_port_tty_set(&info->port, tty);
1034 /*
1035 * Start up serial port
1036 */
1037 spin_lock_irqsave(&info->port.lock, flags);
1038 info->port.count++;
1039 spin_unlock_irqrestore(&info->port.lock, flags);
1040 retval = mxser_startup(tty);
1041 if (retval)
1042 return retval;
1043
1044 retval = tty_port_block_til_ready(&info->port, tty, filp);
1045 if (retval)
1046 return retval;
1047
1048 /* unmark here for very high baud rate (ex. 921600 bps) used */
1049 tty->low_latency = 1;
1050 return 0;
1051 }
1052
1053 static void mxser_flush_buffer(struct tty_struct *tty)
1054 {
1055 struct mxser_port *info = tty->driver_data;
1056 char fcr;
1057 unsigned long flags;
1058
1059
1060 spin_lock_irqsave(&info->slock, flags);
1061 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
1062
1063 fcr = inb(info->ioaddr + UART_FCR);
1064 outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
1065 info->ioaddr + UART_FCR);
1066 outb(fcr, info->ioaddr + UART_FCR);
1067
1068 spin_unlock_irqrestore(&info->slock, flags);
1069
1070 tty_wakeup(tty);
1071 }
1072
1073
1074 /*
1075 * This routine is called when the serial port gets closed. First, we
1076 * wait for the last remaining data to be sent. Then, we unlink its
1077 * async structure from the interrupt chain if necessary, and we free
1078 * that IRQ if nothing is left in the chain.
1079 */
1080 static void mxser_close(struct tty_struct *tty, struct file *filp)
1081 {
1082 struct mxser_port *info = tty->driver_data;
1083 struct tty_port *port = &info->port;
1084
1085 unsigned long timeout;
1086
1087 if (tty->index == MXSER_PORTS)
1088 return;
1089 if (!info)
1090 return;
1091
1092 if (tty_port_close_start(port, tty, filp) == 0)
1093 return;
1094
1095 /*
1096 * Save the termios structure, since this port may have
1097 * separate termios for callout and dialin.
1098 *
1099 * FIXME: Can this go ?
1100 */
1101 if (info->port.flags & ASYNC_NORMAL_ACTIVE)
1102 info->normal_termios = *tty->termios;
1103 /*
1104 * At this point we stop accepting input. To do this, we
1105 * disable the receive line status interrupts, and tell the
1106 * interrupt driver to stop checking the data ready bit in the
1107 * line status register.
1108 */
1109 info->IER &= ~UART_IER_RLSI;
1110 if (info->board->chip_flag)
1111 info->IER &= ~MOXA_MUST_RECV_ISR;
1112
1113 if (info->port.flags & ASYNC_INITIALIZED) {
1114 outb(info->IER, info->ioaddr + UART_IER);
1115 /*
1116 * Before we drop DTR, make sure the UART transmitter
1117 * has completely drained; this is especially
1118 * important if there is a transmit FIFO!
1119 */
1120 timeout = jiffies + HZ;
1121 while (!(inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT)) {
1122 schedule_timeout_interruptible(5);
1123 if (time_after(jiffies, timeout))
1124 break;
1125 }
1126 }
1127 mxser_shutdown(tty);
1128 mxser_flush_buffer(tty);
1129
1130 /* Right now the tty_port set is done outside of the close_end helper
1131 as we don't yet have everyone using refcounts */
1132 tty_port_close_end(port, tty);
1133 tty_port_tty_set(port, NULL);
1134 }
1135
1136 static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count)
1137 {
1138 int c, total = 0;
1139 struct mxser_port *info = tty->driver_data;
1140 unsigned long flags;
1141
1142 if (!info->port.xmit_buf)
1143 return 0;
1144
1145 while (1) {
1146 c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
1147 SERIAL_XMIT_SIZE - info->xmit_head));
1148 if (c <= 0)
1149 break;
1150
1151 memcpy(info->port.xmit_buf + info->xmit_head, buf, c);
1152 spin_lock_irqsave(&info->slock, flags);
1153 info->xmit_head = (info->xmit_head + c) &
1154 (SERIAL_XMIT_SIZE - 1);
1155 info->xmit_cnt += c;
1156 spin_unlock_irqrestore(&info->slock, flags);
1157
1158 buf += c;
1159 count -= c;
1160 total += c;
1161 }
1162
1163 if (info->xmit_cnt && !tty->stopped) {
1164 if (!tty->hw_stopped ||
1165 (info->type == PORT_16550A) ||
1166 (info->board->chip_flag)) {
1167 spin_lock_irqsave(&info->slock, flags);
1168 outb(info->IER & ~UART_IER_THRI, info->ioaddr +
1169 UART_IER);
1170 info->IER |= UART_IER_THRI;
1171 outb(info->IER, info->ioaddr + UART_IER);
1172 spin_unlock_irqrestore(&info->slock, flags);
1173 }
1174 }
1175 return total;
1176 }
1177
1178 static int mxser_put_char(struct tty_struct *tty, unsigned char ch)
1179 {
1180 struct mxser_port *info = tty->driver_data;
1181 unsigned long flags;
1182
1183 if (!info->port.xmit_buf)
1184 return 0;
1185
1186 if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1)
1187 return 0;
1188
1189 spin_lock_irqsave(&info->slock, flags);
1190 info->port.xmit_buf[info->xmit_head++] = ch;
1191 info->xmit_head &= SERIAL_XMIT_SIZE - 1;
1192 info->xmit_cnt++;
1193 spin_unlock_irqrestore(&info->slock, flags);
1194 if (!tty->stopped) {
1195 if (!tty->hw_stopped ||
1196 (info->type == PORT_16550A) ||
1197 info->board->chip_flag) {
1198 spin_lock_irqsave(&info->slock, flags);
1199 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1200 info->IER |= UART_IER_THRI;
1201 outb(info->IER, info->ioaddr + UART_IER);
1202 spin_unlock_irqrestore(&info->slock, flags);
1203 }
1204 }
1205 return 1;
1206 }
1207
1208
1209 static void mxser_flush_chars(struct tty_struct *tty)
1210 {
1211 struct mxser_port *info = tty->driver_data;
1212 unsigned long flags;
1213
1214 if (info->xmit_cnt <= 0 || tty->stopped || !info->port.xmit_buf ||
1215 (tty->hw_stopped && info->type != PORT_16550A &&
1216 !info->board->chip_flag))
1217 return;
1218
1219 spin_lock_irqsave(&info->slock, flags);
1220
1221 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1222 info->IER |= UART_IER_THRI;
1223 outb(info->IER, info->ioaddr + UART_IER);
1224
1225 spin_unlock_irqrestore(&info->slock, flags);
1226 }
1227
1228 static int mxser_write_room(struct tty_struct *tty)
1229 {
1230 struct mxser_port *info = tty->driver_data;
1231 int ret;
1232
1233 ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1;
1234 return ret < 0 ? 0 : ret;
1235 }
1236
1237 static int mxser_chars_in_buffer(struct tty_struct *tty)
1238 {
1239 struct mxser_port *info = tty->driver_data;
1240 return info->xmit_cnt;
1241 }
1242
1243 /*
1244 * ------------------------------------------------------------
1245 * friends of mxser_ioctl()
1246 * ------------------------------------------------------------
1247 */
1248 static int mxser_get_serial_info(struct tty_struct *tty,
1249 struct serial_struct __user *retinfo)
1250 {
1251 struct mxser_port *info = tty->driver_data;
1252 struct serial_struct tmp = {
1253 .type = info->type,
1254 .line = tty->index,
1255 .port = info->ioaddr,
1256 .irq = info->board->irq,
1257 .flags = info->port.flags,
1258 .baud_base = info->baud_base,
1259 .close_delay = info->port.close_delay,
1260 .closing_wait = info->port.closing_wait,
1261 .custom_divisor = info->custom_divisor,
1262 .hub6 = 0
1263 };
1264 if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
1265 return -EFAULT;
1266 return 0;
1267 }
1268
1269 static int mxser_set_serial_info(struct tty_struct *tty,
1270 struct serial_struct __user *new_info)
1271 {
1272 struct mxser_port *info = tty->driver_data;
1273 struct serial_struct new_serial;
1274 speed_t baud;
1275 unsigned long sl_flags;
1276 unsigned int flags;
1277 int retval = 0;
1278
1279 if (!new_info || !info->ioaddr)
1280 return -ENODEV;
1281 if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
1282 return -EFAULT;
1283
1284 if (new_serial.irq != info->board->irq ||
1285 new_serial.port != info->ioaddr)
1286 return -EINVAL;
1287
1288 flags = info->port.flags & ASYNC_SPD_MASK;
1289
1290 if (!capable(CAP_SYS_ADMIN)) {
1291 if ((new_serial.baud_base != info->baud_base) ||
1292 (new_serial.close_delay != info->port.close_delay) ||
1293 ((new_serial.flags & ~ASYNC_USR_MASK) != (info->port.flags & ~ASYNC_USR_MASK)))
1294 return -EPERM;
1295 info->port.flags = ((info->port.flags & ~ASYNC_USR_MASK) |
1296 (new_serial.flags & ASYNC_USR_MASK));
1297 } else {
1298 /*
1299 * OK, past this point, all the error checking has been done.
1300 * At this point, we start making changes.....
1301 */
1302 info->port.flags = ((info->port.flags & ~ASYNC_FLAGS) |
1303 (new_serial.flags & ASYNC_FLAGS));
1304 info->port.close_delay = new_serial.close_delay * HZ / 100;
1305 info->port.closing_wait = new_serial.closing_wait * HZ / 100;
1306 tty->low_latency = (info->port.flags & ASYNC_LOW_LATENCY)
1307 ? 1 : 0;
1308 if ((info->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST &&
1309 (new_serial.baud_base != info->baud_base ||
1310 new_serial.custom_divisor !=
1311 info->custom_divisor)) {
1312 baud = new_serial.baud_base / new_serial.custom_divisor;
1313 tty_encode_baud_rate(tty, baud, baud);
1314 }
1315 }
1316
1317 info->type = new_serial.type;
1318
1319 process_txrx_fifo(info);
1320
1321 if (info->port.flags & ASYNC_INITIALIZED) {
1322 if (flags != (info->port.flags & ASYNC_SPD_MASK)) {
1323 spin_lock_irqsave(&info->slock, sl_flags);
1324 mxser_change_speed(tty, NULL);
1325 spin_unlock_irqrestore(&info->slock, sl_flags);
1326 }
1327 } else
1328 retval = mxser_startup(tty);
1329
1330 return retval;
1331 }
1332
1333 /*
1334 * mxser_get_lsr_info - get line status register info
1335 *
1336 * Purpose: Let user call ioctl() to get info when the UART physically
1337 * is emptied. On bus types like RS485, the transmitter must
1338 * release the bus after transmitting. This must be done when
1339 * the transmit shift register is empty, not be done when the
1340 * transmit holding register is empty. This functionality
1341 * allows an RS485 driver to be written in user space.
1342 */
1343 static int mxser_get_lsr_info(struct mxser_port *info,
1344 unsigned int __user *value)
1345 {
1346 unsigned char status;
1347 unsigned int result;
1348 unsigned long flags;
1349
1350 spin_lock_irqsave(&info->slock, flags);
1351 status = inb(info->ioaddr + UART_LSR);
1352 spin_unlock_irqrestore(&info->slock, flags);
1353 result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
1354 return put_user(result, value);
1355 }
1356
1357 static int mxser_tiocmget(struct tty_struct *tty, struct file *file)
1358 {
1359 struct mxser_port *info = tty->driver_data;
1360 unsigned char control, status;
1361 unsigned long flags;
1362
1363
1364 if (tty->index == MXSER_PORTS)
1365 return -ENOIOCTLCMD;
1366 if (test_bit(TTY_IO_ERROR, &tty->flags))
1367 return -EIO;
1368
1369 control = info->MCR;
1370
1371 spin_lock_irqsave(&info->slock, flags);
1372 status = inb(info->ioaddr + UART_MSR);
1373 if (status & UART_MSR_ANY_DELTA)
1374 mxser_check_modem_status(tty, info, status);
1375 spin_unlock_irqrestore(&info->slock, flags);
1376 return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) |
1377 ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) |
1378 ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) |
1379 ((status & UART_MSR_RI) ? TIOCM_RNG : 0) |
1380 ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) |
1381 ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
1382 }
1383
1384 static int mxser_tiocmset(struct tty_struct *tty, struct file *file,
1385 unsigned int set, unsigned int clear)
1386 {
1387 struct mxser_port *info = tty->driver_data;
1388 unsigned long flags;
1389
1390
1391 if (tty->index == MXSER_PORTS)
1392 return -ENOIOCTLCMD;
1393 if (test_bit(TTY_IO_ERROR, &tty->flags))
1394 return -EIO;
1395
1396 spin_lock_irqsave(&info->slock, flags);
1397
1398 if (set & TIOCM_RTS)
1399 info->MCR |= UART_MCR_RTS;
1400 if (set & TIOCM_DTR)
1401 info->MCR |= UART_MCR_DTR;
1402
1403 if (clear & TIOCM_RTS)
1404 info->MCR &= ~UART_MCR_RTS;
1405 if (clear & TIOCM_DTR)
1406 info->MCR &= ~UART_MCR_DTR;
1407
1408 outb(info->MCR, info->ioaddr + UART_MCR);
1409 spin_unlock_irqrestore(&info->slock, flags);
1410 return 0;
1411 }
1412
1413 static int __init mxser_program_mode(int port)
1414 {
1415 int id, i, j, n;
1416
1417 outb(0, port);
1418 outb(0, port);
1419 outb(0, port);
1420 (void)inb(port);
1421 (void)inb(port);
1422 outb(0, port);
1423 (void)inb(port);
1424
1425 id = inb(port + 1) & 0x1F;
1426 if ((id != C168_ASIC_ID) &&
1427 (id != C104_ASIC_ID) &&
1428 (id != C102_ASIC_ID) &&
1429 (id != CI132_ASIC_ID) &&
1430 (id != CI134_ASIC_ID) &&
1431 (id != CI104J_ASIC_ID))
1432 return -1;
1433 for (i = 0, j = 0; i < 4; i++) {
1434 n = inb(port + 2);
1435 if (n == 'M') {
1436 j = 1;
1437 } else if ((j == 1) && (n == 1)) {
1438 j = 2;
1439 break;
1440 } else
1441 j = 0;
1442 }
1443 if (j != 2)
1444 id = -2;
1445 return id;
1446 }
1447
1448 static void __init mxser_normal_mode(int port)
1449 {
1450 int i, n;
1451
1452 outb(0xA5, port + 1);
1453 outb(0x80, port + 3);
1454 outb(12, port + 0); /* 9600 bps */
1455 outb(0, port + 1);
1456 outb(0x03, port + 3); /* 8 data bits */
1457 outb(0x13, port + 4); /* loop back mode */
1458 for (i = 0; i < 16; i++) {
1459 n = inb(port + 5);
1460 if ((n & 0x61) == 0x60)
1461 break;
1462 if ((n & 1) == 1)
1463 (void)inb(port);
1464 }
1465 outb(0x00, port + 4);
1466 }
1467
1468 #define CHIP_SK 0x01 /* Serial Data Clock in Eprom */
1469 #define CHIP_DO 0x02 /* Serial Data Output in Eprom */
1470 #define CHIP_CS 0x04 /* Serial Chip Select in Eprom */
1471 #define CHIP_DI 0x08 /* Serial Data Input in Eprom */
1472 #define EN_CCMD 0x000 /* Chip's command register */
1473 #define EN0_RSARLO 0x008 /* Remote start address reg 0 */
1474 #define EN0_RSARHI 0x009 /* Remote start address reg 1 */
1475 #define EN0_RCNTLO 0x00A /* Remote byte count reg WR */
1476 #define EN0_RCNTHI 0x00B /* Remote byte count reg WR */
1477 #define EN0_DCFG 0x00E /* Data configuration reg WR */
1478 #define EN0_PORT 0x010 /* Rcv missed frame error counter RD */
1479 #define ENC_PAGE0 0x000 /* Select page 0 of chip registers */
1480 #define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */
1481 static int __init mxser_read_register(int port, unsigned short *regs)
1482 {
1483 int i, k, value, id;
1484 unsigned int j;
1485
1486 id = mxser_program_mode(port);
1487 if (id < 0)
1488 return id;
1489 for (i = 0; i < 14; i++) {
1490 k = (i & 0x3F) | 0x180;
1491 for (j = 0x100; j > 0; j >>= 1) {
1492 outb(CHIP_CS, port);
1493 if (k & j) {
1494 outb(CHIP_CS | CHIP_DO, port);
1495 outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */
1496 } else {
1497 outb(CHIP_CS, port);
1498 outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */
1499 }
1500 }
1501 (void)inb(port);
1502 value = 0;
1503 for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) {
1504 outb(CHIP_CS, port);
1505 outb(CHIP_CS | CHIP_SK, port);
1506 if (inb(port) & CHIP_DI)
1507 value |= j;
1508 }
1509 regs[i] = value;
1510 outb(0, port);
1511 }
1512 mxser_normal_mode(port);
1513 return id;
1514 }
1515
1516 static int mxser_ioctl_special(unsigned int cmd, void __user *argp)
1517 {
1518 struct mxser_port *port;
1519 struct tty_struct *tty;
1520 int result, status;
1521 unsigned int i, j;
1522 int ret = 0;
1523
1524 switch (cmd) {
1525 case MOXA_GET_MAJOR:
1526 if (printk_ratelimit())
1527 printk(KERN_WARNING "mxser: '%s' uses deprecated ioctl "
1528 "%x (GET_MAJOR), fix your userspace\n",
1529 current->comm, cmd);
1530 return put_user(ttymajor, (int __user *)argp);
1531
1532 case MOXA_CHKPORTENABLE:
1533 result = 0;
1534 lock_kernel();
1535 for (i = 0; i < MXSER_BOARDS; i++)
1536 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++)
1537 if (mxser_boards[i].ports[j].ioaddr)
1538 result |= (1 << i);
1539 unlock_kernel();
1540 return put_user(result, (unsigned long __user *)argp);
1541 case MOXA_GETDATACOUNT:
1542 lock_kernel();
1543 if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log)))
1544 ret = -EFAULT;
1545 unlock_kernel();
1546 return ret;
1547 case MOXA_GETMSTATUS: {
1548 struct mxser_mstatus ms, __user *msu = argp;
1549 lock_kernel();
1550 for (i = 0; i < MXSER_BOARDS; i++)
1551 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) {
1552 port = &mxser_boards[i].ports[j];
1553 memset(&ms, 0, sizeof(ms));
1554
1555 if (!port->ioaddr)
1556 goto copy;
1557
1558 tty = tty_port_tty_get(&port->port);
1559
1560 if (!tty || !tty->termios)
1561 ms.cflag = port->normal_termios.c_cflag;
1562 else
1563 ms.cflag = tty->termios->c_cflag;
1564 tty_kref_put(tty);
1565 status = inb(port->ioaddr + UART_MSR);
1566 if (status & UART_MSR_DCD)
1567 ms.dcd = 1;
1568 if (status & UART_MSR_DSR)
1569 ms.dsr = 1;
1570 if (status & UART_MSR_CTS)
1571 ms.cts = 1;
1572 copy:
1573 if (copy_to_user(msu, &ms, sizeof(ms))) {
1574 unlock_kernel();
1575 return -EFAULT;
1576 }
1577 msu++;
1578 }
1579 unlock_kernel();
1580 return 0;
1581 }
1582 case MOXA_ASPP_MON_EXT: {
1583 struct mxser_mon_ext *me; /* it's 2k, stack unfriendly */
1584 unsigned int cflag, iflag, p;
1585 u8 opmode;
1586
1587 me = kzalloc(sizeof(*me), GFP_KERNEL);
1588 if (!me)
1589 return -ENOMEM;
1590
1591 lock_kernel();
1592 for (i = 0, p = 0; i < MXSER_BOARDS; i++) {
1593 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++, p++) {
1594 if (p >= ARRAY_SIZE(me->rx_cnt)) {
1595 i = MXSER_BOARDS;
1596 break;
1597 }
1598 port = &mxser_boards[i].ports[j];
1599 if (!port->ioaddr)
1600 continue;
1601
1602 status = mxser_get_msr(port->ioaddr, 0, p);
1603
1604 if (status & UART_MSR_TERI)
1605 port->icount.rng++;
1606 if (status & UART_MSR_DDSR)
1607 port->icount.dsr++;
1608 if (status & UART_MSR_DDCD)
1609 port->icount.dcd++;
1610 if (status & UART_MSR_DCTS)
1611 port->icount.cts++;
1612
1613 port->mon_data.modem_status = status;
1614 me->rx_cnt[p] = port->mon_data.rxcnt;
1615 me->tx_cnt[p] = port->mon_data.txcnt;
1616 me->up_rxcnt[p] = port->mon_data.up_rxcnt;
1617 me->up_txcnt[p] = port->mon_data.up_txcnt;
1618 me->modem_status[p] =
1619 port->mon_data.modem_status;
1620 tty = tty_port_tty_get(&port->port);
1621
1622 if (!tty || !tty->termios) {
1623 cflag = port->normal_termios.c_cflag;
1624 iflag = port->normal_termios.c_iflag;
1625 me->baudrate[p] = tty_termios_baud_rate(&port->normal_termios);
1626 } else {
1627 cflag = tty->termios->c_cflag;
1628 iflag = tty->termios->c_iflag;
1629 me->baudrate[p] = tty_get_baud_rate(tty);
1630 }
1631 tty_kref_put(tty);
1632
1633 me->databits[p] = cflag & CSIZE;
1634 me->stopbits[p] = cflag & CSTOPB;
1635 me->parity[p] = cflag & (PARENB | PARODD |
1636 CMSPAR);
1637
1638 if (cflag & CRTSCTS)
1639 me->flowctrl[p] |= 0x03;
1640
1641 if (iflag & (IXON | IXOFF))
1642 me->flowctrl[p] |= 0x0C;
1643
1644 if (port->type == PORT_16550A)
1645 me->fifo[p] = 1;
1646
1647 opmode = inb(port->opmode_ioaddr) >>
1648 ((p % 4) * 2);
1649 opmode &= OP_MODE_MASK;
1650 me->iftype[p] = opmode;
1651 }
1652 }
1653 unlock_kernel();
1654 if (copy_to_user(argp, me, sizeof(*me)))
1655 ret = -EFAULT;
1656 kfree(me);
1657 return ret;
1658 }
1659 default:
1660 return -ENOIOCTLCMD;
1661 }
1662 return 0;
1663 }
1664
1665 static int mxser_cflags_changed(struct mxser_port *info, unsigned long arg,
1666 struct async_icount *cprev)
1667 {
1668 struct async_icount cnow;
1669 unsigned long flags;
1670 int ret;
1671
1672 spin_lock_irqsave(&info->slock, flags);
1673 cnow = info->icount; /* atomic copy */
1674 spin_unlock_irqrestore(&info->slock, flags);
1675
1676 ret = ((arg & TIOCM_RNG) && (cnow.rng != cprev->rng)) ||
1677 ((arg & TIOCM_DSR) && (cnow.dsr != cprev->dsr)) ||
1678 ((arg & TIOCM_CD) && (cnow.dcd != cprev->dcd)) ||
1679 ((arg & TIOCM_CTS) && (cnow.cts != cprev->cts));
1680
1681 *cprev = cnow;
1682
1683 return ret;
1684 }
1685
1686 static int mxser_ioctl(struct tty_struct *tty, struct file *file,
1687 unsigned int cmd, unsigned long arg)
1688 {
1689 struct mxser_port *info = tty->driver_data;
1690 struct async_icount cnow;
1691 unsigned long flags;
1692 void __user *argp = (void __user *)arg;
1693 int retval;
1694
1695 if (tty->index == MXSER_PORTS)
1696 return mxser_ioctl_special(cmd, argp);
1697
1698 if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) {
1699 int p;
1700 unsigned long opmode;
1701 static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f };
1702 int shiftbit;
1703 unsigned char val, mask;
1704
1705 p = tty->index % 4;
1706 if (cmd == MOXA_SET_OP_MODE) {
1707 if (get_user(opmode, (int __user *) argp))
1708 return -EFAULT;
1709 if (opmode != RS232_MODE &&
1710 opmode != RS485_2WIRE_MODE &&
1711 opmode != RS422_MODE &&
1712 opmode != RS485_4WIRE_MODE)
1713 return -EFAULT;
1714 lock_kernel();
1715 mask = ModeMask[p];
1716 shiftbit = p * 2;
1717 val = inb(info->opmode_ioaddr);
1718 val &= mask;
1719 val |= (opmode << shiftbit);
1720 outb(val, info->opmode_ioaddr);
1721 unlock_kernel();
1722 } else {
1723 lock_kernel();
1724 shiftbit = p * 2;
1725 opmode = inb(info->opmode_ioaddr) >> shiftbit;
1726 opmode &= OP_MODE_MASK;
1727 unlock_kernel();
1728 if (put_user(opmode, (int __user *)argp))
1729 return -EFAULT;
1730 }
1731 return 0;
1732 }
1733
1734 if (cmd != TIOCGSERIAL && cmd != TIOCMIWAIT && cmd != TIOCGICOUNT &&
1735 test_bit(TTY_IO_ERROR, &tty->flags))
1736 return -EIO;
1737
1738 switch (cmd) {
1739 case TIOCGSERIAL:
1740 lock_kernel();
1741 retval = mxser_get_serial_info(tty, argp);
1742 unlock_kernel();
1743 return retval;
1744 case TIOCSSERIAL:
1745 lock_kernel();
1746 retval = mxser_set_serial_info(tty, argp);
1747 unlock_kernel();
1748 return retval;
1749 case TIOCSERGETLSR: /* Get line status register */
1750 return mxser_get_lsr_info(info, argp);
1751 /*
1752 * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
1753 * - mask passed in arg for lines of interest
1754 * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
1755 * Caller should use TIOCGICOUNT to see which one it was
1756 */
1757 case TIOCMIWAIT:
1758 spin_lock_irqsave(&info->slock, flags);
1759 cnow = info->icount; /* note the counters on entry */
1760 spin_unlock_irqrestore(&info->slock, flags);
1761
1762 return wait_event_interruptible(info->delta_msr_wait,
1763 mxser_cflags_changed(info, arg, &cnow));
1764 /*
1765 * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
1766 * Return: write counters to the user passed counter struct
1767 * NB: both 1->0 and 0->1 transitions are counted except for
1768 * RI where only 0->1 is counted.
1769 */
1770 case TIOCGICOUNT: {
1771 struct serial_icounter_struct icnt = { 0 };
1772 spin_lock_irqsave(&info->slock, flags);
1773 cnow = info->icount;
1774 spin_unlock_irqrestore(&info->slock, flags);
1775
1776 icnt.frame = cnow.frame;
1777 icnt.brk = cnow.brk;
1778 icnt.overrun = cnow.overrun;
1779 icnt.buf_overrun = cnow.buf_overrun;
1780 icnt.parity = cnow.parity;
1781 icnt.rx = cnow.rx;
1782 icnt.tx = cnow.tx;
1783 icnt.cts = cnow.cts;
1784 icnt.dsr = cnow.dsr;
1785 icnt.rng = cnow.rng;
1786 icnt.dcd = cnow.dcd;
1787
1788 return copy_to_user(argp, &icnt, sizeof(icnt)) ? -EFAULT : 0;
1789 }
1790 case MOXA_HighSpeedOn:
1791 return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp);
1792 case MOXA_SDS_RSTICOUNTER:
1793 lock_kernel();
1794 info->mon_data.rxcnt = 0;
1795 info->mon_data.txcnt = 0;
1796 unlock_kernel();
1797 return 0;
1798
1799 case MOXA_ASPP_OQUEUE:{
1800 int len, lsr;
1801
1802 lock_kernel();
1803 len = mxser_chars_in_buffer(tty);
1804 lsr = inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT;
1805 len += (lsr ? 0 : 1);
1806 unlock_kernel();
1807
1808 return put_user(len, (int __user *)argp);
1809 }
1810 case MOXA_ASPP_MON: {
1811 int mcr, status;
1812
1813 lock_kernel();
1814 status = mxser_get_msr(info->ioaddr, 1, tty->index);
1815 mxser_check_modem_status(tty, info, status);
1816
1817 mcr = inb(info->ioaddr + UART_MCR);
1818 if (mcr & MOXA_MUST_MCR_XON_FLAG)
1819 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD;
1820 else
1821 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD;
1822
1823 if (mcr & MOXA_MUST_MCR_TX_XON)
1824 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT;
1825 else
1826 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT;
1827
1828 if (tty->hw_stopped)
1829 info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD;
1830 else
1831 info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD;
1832 unlock_kernel();
1833 if (copy_to_user(argp, &info->mon_data,
1834 sizeof(struct mxser_mon)))
1835 return -EFAULT;
1836
1837 return 0;
1838 }
1839 case MOXA_ASPP_LSTATUS: {
1840 if (put_user(info->err_shadow, (unsigned char __user *)argp))
1841 return -EFAULT;
1842
1843 info->err_shadow = 0;
1844 return 0;
1845 }
1846 case MOXA_SET_BAUD_METHOD: {
1847 int method;
1848
1849 if (get_user(method, (int __user *)argp))
1850 return -EFAULT;
1851 mxser_set_baud_method[tty->index] = method;
1852 return put_user(method, (int __user *)argp);
1853 }
1854 default:
1855 return -ENOIOCTLCMD;
1856 }
1857 return 0;
1858 }
1859
1860 static void mxser_stoprx(struct tty_struct *tty)
1861 {
1862 struct mxser_port *info = tty->driver_data;
1863
1864 info->ldisc_stop_rx = 1;
1865 if (I_IXOFF(tty)) {
1866 if (info->board->chip_flag) {
1867 info->IER &= ~MOXA_MUST_RECV_ISR;
1868 outb(info->IER, info->ioaddr + UART_IER);
1869 } else {
1870 info->x_char = STOP_CHAR(tty);
1871 outb(0, info->ioaddr + UART_IER);
1872 info->IER |= UART_IER_THRI;
1873 outb(info->IER, info->ioaddr + UART_IER);
1874 }
1875 }
1876
1877 if (tty->termios->c_cflag & CRTSCTS) {
1878 info->MCR &= ~UART_MCR_RTS;
1879 outb(info->MCR, info->ioaddr + UART_MCR);
1880 }
1881 }
1882
1883 /*
1884 * This routine is called by the upper-layer tty layer to signal that
1885 * incoming characters should be throttled.
1886 */
1887 static void mxser_throttle(struct tty_struct *tty)
1888 {
1889 mxser_stoprx(tty);
1890 }
1891
1892 static void mxser_unthrottle(struct tty_struct *tty)
1893 {
1894 struct mxser_port *info = tty->driver_data;
1895
1896 /* startrx */
1897 info->ldisc_stop_rx = 0;
1898 if (I_IXOFF(tty)) {
1899 if (info->x_char)
1900 info->x_char = 0;
1901 else {
1902 if (info->board->chip_flag) {
1903 info->IER |= MOXA_MUST_RECV_ISR;
1904 outb(info->IER, info->ioaddr + UART_IER);
1905 } else {
1906 info->x_char = START_CHAR(tty);
1907 outb(0, info->ioaddr + UART_IER);
1908 info->IER |= UART_IER_THRI;
1909 outb(info->IER, info->ioaddr + UART_IER);
1910 }
1911 }
1912 }
1913
1914 if (tty->termios->c_cflag & CRTSCTS) {
1915 info->MCR |= UART_MCR_RTS;
1916 outb(info->MCR, info->ioaddr + UART_MCR);
1917 }
1918 }
1919
1920 /*
1921 * mxser_stop() and mxser_start()
1922 *
1923 * This routines are called before setting or resetting tty->stopped.
1924 * They enable or disable transmitter interrupts, as necessary.
1925 */
1926 static void mxser_stop(struct tty_struct *tty)
1927 {
1928 struct mxser_port *info = tty->driver_data;
1929 unsigned long flags;
1930
1931 spin_lock_irqsave(&info->slock, flags);
1932 if (info->IER & UART_IER_THRI) {
1933 info->IER &= ~UART_IER_THRI;
1934 outb(info->IER, info->ioaddr + UART_IER);
1935 }
1936 spin_unlock_irqrestore(&info->slock, flags);
1937 }
1938
1939 static void mxser_start(struct tty_struct *tty)
1940 {
1941 struct mxser_port *info = tty->driver_data;
1942 unsigned long flags;
1943
1944 spin_lock_irqsave(&info->slock, flags);
1945 if (info->xmit_cnt && info->port.xmit_buf) {
1946 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1947 info->IER |= UART_IER_THRI;
1948 outb(info->IER, info->ioaddr + UART_IER);
1949 }
1950 spin_unlock_irqrestore(&info->slock, flags);
1951 }
1952
1953 static void mxser_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
1954 {
1955 struct mxser_port *info = tty->driver_data;
1956 unsigned long flags;
1957
1958 spin_lock_irqsave(&info->slock, flags);
1959 mxser_change_speed(tty, old_termios);
1960 spin_unlock_irqrestore(&info->slock, flags);
1961
1962 if ((old_termios->c_cflag & CRTSCTS) &&
1963 !(tty->termios->c_cflag & CRTSCTS)) {
1964 tty->hw_stopped = 0;
1965 mxser_start(tty);
1966 }
1967
1968 /* Handle sw stopped */
1969 if ((old_termios->c_iflag & IXON) &&
1970 !(tty->termios->c_iflag & IXON)) {
1971 tty->stopped = 0;
1972
1973 if (info->board->chip_flag) {
1974 spin_lock_irqsave(&info->slock, flags);
1975 mxser_disable_must_rx_software_flow_control(
1976 info->ioaddr);
1977 spin_unlock_irqrestore(&info->slock, flags);
1978 }
1979
1980 mxser_start(tty);
1981 }
1982 }
1983
1984 /*
1985 * mxser_wait_until_sent() --- wait until the transmitter is empty
1986 */
1987 static void mxser_wait_until_sent(struct tty_struct *tty, int timeout)
1988 {
1989 struct mxser_port *info = tty->driver_data;
1990 unsigned long orig_jiffies, char_time;
1991 int lsr;
1992
1993 if (info->type == PORT_UNKNOWN)
1994 return;
1995
1996 if (info->xmit_fifo_size == 0)
1997 return; /* Just in case.... */
1998
1999 orig_jiffies = jiffies;
2000 /*
2001 * Set the check interval to be 1/5 of the estimated time to
2002 * send a single character, and make it at least 1. The check
2003 * interval should also be less than the timeout.
2004 *
2005 * Note: we have to use pretty tight timings here to satisfy
2006 * the NIST-PCTS.
2007 */
2008 char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size;
2009 char_time = char_time / 5;
2010 if (char_time == 0)
2011 char_time = 1;
2012 if (timeout && timeout < char_time)
2013 char_time = timeout;
2014 /*
2015 * If the transmitter hasn't cleared in twice the approximate
2016 * amount of time to send the entire FIFO, it probably won't
2017 * ever clear. This assumes the UART isn't doing flow
2018 * control, which is currently the case. Hence, if it ever
2019 * takes longer than info->timeout, this is probably due to a
2020 * UART bug of some kind. So, we clamp the timeout parameter at
2021 * 2*info->timeout.
2022 */
2023 if (!timeout || timeout > 2 * info->timeout)
2024 timeout = 2 * info->timeout;
2025 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
2026 printk(KERN_DEBUG "In rs_wait_until_sent(%d) check=%lu...",
2027 timeout, char_time);
2028 printk("jiff=%lu...", jiffies);
2029 #endif
2030 lock_kernel();
2031 while (!((lsr = inb(info->ioaddr + UART_LSR)) & UART_LSR_TEMT)) {
2032 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
2033 printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
2034 #endif
2035 schedule_timeout_interruptible(char_time);
2036 if (signal_pending(current))
2037 break;
2038 if (timeout && time_after(jiffies, orig_jiffies + timeout))
2039 break;
2040 }
2041 set_current_state(TASK_RUNNING);
2042 unlock_kernel();
2043
2044 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
2045 printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
2046 #endif
2047 }
2048
2049 /*
2050 * This routine is called by tty_hangup() when a hangup is signaled.
2051 */
2052 static void mxser_hangup(struct tty_struct *tty)
2053 {
2054 struct mxser_port *info = tty->driver_data;
2055
2056 mxser_flush_buffer(tty);
2057 mxser_shutdown(tty);
2058 tty_port_hangup(&info->port);
2059 }
2060
2061 /*
2062 * mxser_rs_break() --- routine which turns the break handling on or off
2063 */
2064 static int mxser_rs_break(struct tty_struct *tty, int break_state)
2065 {
2066 struct mxser_port *info = tty->driver_data;
2067 unsigned long flags;
2068
2069 spin_lock_irqsave(&info->slock, flags);
2070 if (break_state == -1)
2071 outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC,
2072 info->ioaddr + UART_LCR);
2073 else
2074 outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC,
2075 info->ioaddr + UART_LCR);
2076 spin_unlock_irqrestore(&info->slock, flags);
2077 return 0;
2078 }
2079
2080 static void mxser_receive_chars(struct tty_struct *tty,
2081 struct mxser_port *port, int *status)
2082 {
2083 unsigned char ch, gdl;
2084 int ignored = 0;
2085 int cnt = 0;
2086 int recv_room;
2087 int max = 256;
2088
2089 recv_room = tty->receive_room;
2090 if (recv_room == 0 && !port->ldisc_stop_rx)
2091 mxser_stoprx(tty);
2092 if (port->board->chip_flag != MOXA_OTHER_UART) {
2093
2094 if (*status & UART_LSR_SPECIAL)
2095 goto intr_old;
2096 if (port->board->chip_flag == MOXA_MUST_MU860_HWID &&
2097 (*status & MOXA_MUST_LSR_RERR))
2098 goto intr_old;
2099 if (*status & MOXA_MUST_LSR_RERR)
2100 goto intr_old;
2101
2102 gdl = inb(port->ioaddr + MOXA_MUST_GDL_REGISTER);
2103
2104 if (port->board->chip_flag == MOXA_MUST_MU150_HWID)
2105 gdl &= MOXA_MUST_GDL_MASK;
2106 if (gdl >= recv_room) {
2107 if (!port->ldisc_stop_rx)
2108 mxser_stoprx(tty);
2109 }
2110 while (gdl--) {
2111 ch = inb(port->ioaddr + UART_RX);
2112 tty_insert_flip_char(tty, ch, 0);
2113 cnt++;
2114 }
2115 goto end_intr;
2116 }
2117 intr_old:
2118
2119 do {
2120 if (max-- < 0)
2121 break;
2122
2123 ch = inb(port->ioaddr + UART_RX);
2124 if (port->board->chip_flag && (*status & UART_LSR_OE))
2125 outb(0x23, port->ioaddr + UART_FCR);
2126 *status &= port->read_status_mask;
2127 if (*status & port->ignore_status_mask) {
2128 if (++ignored > 100)
2129 break;
2130 } else {
2131 char flag = 0;
2132 if (*status & UART_LSR_SPECIAL) {
2133 if (*status & UART_LSR_BI) {
2134 flag = TTY_BREAK;
2135 port->icount.brk++;
2136
2137 if (port->port.flags & ASYNC_SAK)
2138 do_SAK(tty);
2139 } else if (*status & UART_LSR_PE) {
2140 flag = TTY_PARITY;
2141 port->icount.parity++;
2142 } else if (*status & UART_LSR_FE) {
2143 flag = TTY_FRAME;
2144 port->icount.frame++;
2145 } else if (*status & UART_LSR_OE) {
2146 flag = TTY_OVERRUN;
2147 port->icount.overrun++;
2148 } else
2149 flag = TTY_BREAK;
2150 }
2151 tty_insert_flip_char(tty, ch, flag);
2152 cnt++;
2153 if (cnt >= recv_room) {
2154 if (!port->ldisc_stop_rx)
2155 mxser_stoprx(tty);
2156 break;
2157 }
2158
2159 }
2160
2161 if (port->board->chip_flag)
2162 break;
2163
2164 *status = inb(port->ioaddr + UART_LSR);
2165 } while (*status & UART_LSR_DR);
2166
2167 end_intr:
2168 mxvar_log.rxcnt[tty->index] += cnt;
2169 port->mon_data.rxcnt += cnt;
2170 port->mon_data.up_rxcnt += cnt;
2171
2172 /*
2173 * We are called from an interrupt context with &port->slock
2174 * being held. Drop it temporarily in order to prevent
2175 * recursive locking.
2176 */
2177 spin_unlock(&port->slock);
2178 tty_flip_buffer_push(tty);
2179 spin_lock(&port->slock);
2180 }
2181
2182 static void mxser_transmit_chars(struct tty_struct *tty, struct mxser_port *port)
2183 {
2184 int count, cnt;
2185
2186 if (port->x_char) {
2187 outb(port->x_char, port->ioaddr + UART_TX);
2188 port->x_char = 0;
2189 mxvar_log.txcnt[tty->index]++;
2190 port->mon_data.txcnt++;
2191 port->mon_data.up_txcnt++;
2192 port->icount.tx++;
2193 return;
2194 }
2195
2196 if (port->port.xmit_buf == NULL)
2197 return;
2198
2199 if (port->xmit_cnt <= 0 || tty->stopped ||
2200 (tty->hw_stopped &&
2201 (port->type != PORT_16550A) &&
2202 (!port->board->chip_flag))) {
2203 port->IER &= ~UART_IER_THRI;
2204 outb(port->IER, port->ioaddr + UART_IER);
2205 return;
2206 }
2207
2208 cnt = port->xmit_cnt;
2209 count = port->xmit_fifo_size;
2210 do {
2211 outb(port->port.xmit_buf[port->xmit_tail++],
2212 port->ioaddr + UART_TX);
2213 port->xmit_tail = port->xmit_tail & (SERIAL_XMIT_SIZE - 1);
2214 if (--port->xmit_cnt <= 0)
2215 break;
2216 } while (--count > 0);
2217 mxvar_log.txcnt[tty->index] += (cnt - port->xmit_cnt);
2218
2219 port->mon_data.txcnt += (cnt - port->xmit_cnt);
2220 port->mon_data.up_txcnt += (cnt - port->xmit_cnt);
2221 port->icount.tx += (cnt - port->xmit_cnt);
2222
2223 if (port->xmit_cnt < WAKEUP_CHARS && tty)
2224 tty_wakeup(tty);
2225
2226 if (port->xmit_cnt <= 0) {
2227 port->IER &= ~UART_IER_THRI;
2228 outb(port->IER, port->ioaddr + UART_IER);
2229 }
2230 }
2231
2232 /*
2233 * This is the serial driver's generic interrupt routine
2234 */
2235 static irqreturn_t mxser_interrupt(int irq, void *dev_id)
2236 {
2237 int status, iir, i;
2238 struct mxser_board *brd = NULL;
2239 struct mxser_port *port;
2240 int max, irqbits, bits, msr;
2241 unsigned int int_cnt, pass_counter = 0;
2242 int handled = IRQ_NONE;
2243 struct tty_struct *tty;
2244
2245 for (i = 0; i < MXSER_BOARDS; i++)
2246 if (dev_id == &mxser_boards[i]) {
2247 brd = dev_id;
2248 break;
2249 }
2250
2251 if (i == MXSER_BOARDS)
2252 goto irq_stop;
2253 if (brd == NULL)
2254 goto irq_stop;
2255 max = brd->info->nports;
2256 while (pass_counter++ < MXSER_ISR_PASS_LIMIT) {
2257 irqbits = inb(brd->vector) & brd->vector_mask;
2258 if (irqbits == brd->vector_mask)
2259 break;
2260
2261 handled = IRQ_HANDLED;
2262 for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) {
2263 if (irqbits == brd->vector_mask)
2264 break;
2265 if (bits & irqbits)
2266 continue;
2267 port = &brd->ports[i];
2268
2269 int_cnt = 0;
2270 spin_lock(&port->slock);
2271 do {
2272 iir = inb(port->ioaddr + UART_IIR);
2273 if (iir & UART_IIR_NO_INT)
2274 break;
2275 iir &= MOXA_MUST_IIR_MASK;
2276 tty = tty_port_tty_get(&port->port);
2277 if (!tty ||
2278 (port->port.flags & ASYNC_CLOSING) ||
2279 !(port->port.flags &
2280 ASYNC_INITIALIZED)) {
2281 status = inb(port->ioaddr + UART_LSR);
2282 outb(0x27, port->ioaddr + UART_FCR);
2283 inb(port->ioaddr + UART_MSR);
2284 tty_kref_put(tty);
2285 break;
2286 }
2287
2288 status = inb(port->ioaddr + UART_LSR);
2289
2290 if (status & UART_LSR_PE)
2291 port->err_shadow |= NPPI_NOTIFY_PARITY;
2292 if (status & UART_LSR_FE)
2293 port->err_shadow |= NPPI_NOTIFY_FRAMING;
2294 if (status & UART_LSR_OE)
2295 port->err_shadow |=
2296 NPPI_NOTIFY_HW_OVERRUN;
2297 if (status & UART_LSR_BI)
2298 port->err_shadow |= NPPI_NOTIFY_BREAK;
2299
2300 if (port->board->chip_flag) {
2301 if (iir == MOXA_MUST_IIR_GDA ||
2302 iir == MOXA_MUST_IIR_RDA ||
2303 iir == MOXA_MUST_IIR_RTO ||
2304 iir == MOXA_MUST_IIR_LSR)
2305 mxser_receive_chars(tty, port,
2306 &status);
2307
2308 } else {
2309 status &= port->read_status_mask;
2310 if (status & UART_LSR_DR)
2311 mxser_receive_chars(tty, port,
2312 &status);
2313 }
2314 msr = inb(port->ioaddr + UART_MSR);
2315 if (msr & UART_MSR_ANY_DELTA)
2316 mxser_check_modem_status(tty, port, msr);
2317
2318 if (port->board->chip_flag) {
2319 if (iir == 0x02 && (status &
2320 UART_LSR_THRE))
2321 mxser_transmit_chars(tty, port);
2322 } else {
2323 if (status & UART_LSR_THRE)
2324 mxser_transmit_chars(tty, port);
2325 }
2326 tty_kref_put(tty);
2327 } while (int_cnt++ < MXSER_ISR_PASS_LIMIT);
2328 spin_unlock(&port->slock);
2329 }
2330 }
2331
2332 irq_stop:
2333 return handled;
2334 }
2335
2336 static const struct tty_operations mxser_ops = {
2337 .open = mxser_open,
2338 .close = mxser_close,
2339 .write = mxser_write,
2340 .put_char = mxser_put_char,
2341 .flush_chars = mxser_flush_chars,
2342 .write_room = mxser_write_room,
2343 .chars_in_buffer = mxser_chars_in_buffer,
2344 .flush_buffer = mxser_flush_buffer,
2345 .ioctl = mxser_ioctl,
2346 .throttle = mxser_throttle,
2347 .unthrottle = mxser_unthrottle,
2348 .set_termios = mxser_set_termios,
2349 .stop = mxser_stop,
2350 .start = mxser_start,
2351 .hangup = mxser_hangup,
2352 .break_ctl = mxser_rs_break,
2353 .wait_until_sent = mxser_wait_until_sent,
2354 .tiocmget = mxser_tiocmget,
2355 .tiocmset = mxser_tiocmset,
2356 };
2357
2358 struct tty_port_operations mxser_port_ops = {
2359 .carrier_raised = mxser_carrier_raised,
2360 .raise_dtr_rts = mxser_raise_dtr_rts,
2361 };
2362
2363 /*
2364 * The MOXA Smartio/Industio serial driver boot-time initialization code!
2365 */
2366
2367 static void mxser_release_res(struct mxser_board *brd, struct pci_dev *pdev,
2368 unsigned int irq)
2369 {
2370 if (irq)
2371 free_irq(brd->irq, brd);
2372 if (pdev != NULL) { /* PCI */
2373 #ifdef CONFIG_PCI
2374 pci_release_region(pdev, 2);
2375 pci_release_region(pdev, 3);
2376 #endif
2377 } else {
2378 release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
2379 release_region(brd->vector, 1);
2380 }
2381 }
2382
2383 static int __devinit mxser_initbrd(struct mxser_board *brd,
2384 struct pci_dev *pdev)
2385 {
2386 struct mxser_port *info;
2387 unsigned int i;
2388 int retval;
2389
2390 printk(KERN_INFO "mxser: max. baud rate = %d bps\n",
2391 brd->ports[0].max_baud);
2392
2393 for (i = 0; i < brd->info->nports; i++) {
2394 info = &brd->ports[i];
2395 tty_port_init(&info->port);
2396 info->port.ops = &mxser_port_ops;
2397 info->board = brd;
2398 info->stop_rx = 0;
2399 info->ldisc_stop_rx = 0;
2400
2401 /* Enhance mode enabled here */
2402 if (brd->chip_flag != MOXA_OTHER_UART)
2403 mxser_enable_must_enchance_mode(info->ioaddr);
2404
2405 info->port.flags = ASYNC_SHARE_IRQ;
2406 info->type = brd->uart_type;
2407
2408 process_txrx_fifo(info);
2409
2410 info->custom_divisor = info->baud_base * 16;
2411 info->port.close_delay = 5 * HZ / 10;
2412 info->port.closing_wait = 30 * HZ;
2413 info->normal_termios = mxvar_sdriver->init_termios;
2414 init_waitqueue_head(&info->delta_msr_wait);
2415 memset(&info->mon_data, 0, sizeof(struct mxser_mon));
2416 info->err_shadow = 0;
2417 spin_lock_init(&info->slock);
2418
2419 /* before set INT ISR, disable all int */
2420 outb(inb(info->ioaddr + UART_IER) & 0xf0,
2421 info->ioaddr + UART_IER);
2422 }
2423
2424 retval = request_irq(brd->irq, mxser_interrupt, IRQF_SHARED, "mxser",
2425 brd);
2426 if (retval) {
2427 printk(KERN_ERR "Board %s: Request irq failed, IRQ (%d) may "
2428 "conflict with another device.\n",
2429 brd->info->name, brd->irq);
2430 /* We hold resources, we need to release them. */
2431 mxser_release_res(brd, pdev, 0);
2432 }
2433 return retval;
2434 }
2435
2436 static int __init mxser_get_ISA_conf(int cap, struct mxser_board *brd)
2437 {
2438 int id, i, bits;
2439 unsigned short regs[16], irq;
2440 unsigned char scratch, scratch2;
2441
2442 brd->chip_flag = MOXA_OTHER_UART;
2443
2444 id = mxser_read_register(cap, regs);
2445 switch (id) {
2446 case C168_ASIC_ID:
2447 brd->info = &mxser_cards[0];
2448 break;
2449 case C104_ASIC_ID:
2450 brd->info = &mxser_cards[1];
2451 break;
2452 case CI104J_ASIC_ID:
2453 brd->info = &mxser_cards[2];
2454 break;
2455 case C102_ASIC_ID:
2456 brd->info = &mxser_cards[5];
2457 break;
2458 case CI132_ASIC_ID:
2459 brd->info = &mxser_cards[6];
2460 break;
2461 case CI134_ASIC_ID:
2462 brd->info = &mxser_cards[7];
2463 break;
2464 default:
2465 return 0;
2466 }
2467
2468 irq = 0;
2469 /* some ISA cards have 2 ports, but we want to see them as 4-port (why?)
2470 Flag-hack checks if configuration should be read as 2-port here. */
2471 if (brd->info->nports == 2 || (brd->info->flags & MXSER_HAS2)) {
2472 irq = regs[9] & 0xF000;
2473 irq = irq | (irq >> 4);
2474 if (irq != (regs[9] & 0xFF00))
2475 goto err_irqconflict;
2476 } else if (brd->info->nports == 4) {
2477 irq = regs[9] & 0xF000;
2478 irq = irq | (irq >> 4);
2479 irq = irq | (irq >> 8);
2480 if (irq != regs[9])
2481 goto err_irqconflict;
2482 } else if (brd->info->nports == 8) {
2483 irq = regs[9] & 0xF000;
2484 irq = irq | (irq >> 4);
2485 irq = irq | (irq >> 8);
2486 if ((irq != regs[9]) || (irq != regs[10]))
2487 goto err_irqconflict;
2488 }
2489
2490 if (!irq) {
2491 printk(KERN_ERR "mxser: interrupt number unset\n");
2492 return -EIO;
2493 }
2494 brd->irq = ((int)(irq & 0xF000) >> 12);
2495 for (i = 0; i < 8; i++)
2496 brd->ports[i].ioaddr = (int) regs[i + 1] & 0xFFF8;
2497 if ((regs[12] & 0x80) == 0) {
2498 printk(KERN_ERR "mxser: invalid interrupt vector\n");
2499 return -EIO;
2500 }
2501 brd->vector = (int)regs[11]; /* interrupt vector */
2502 if (id == 1)
2503 brd->vector_mask = 0x00FF;
2504 else
2505 brd->vector_mask = 0x000F;
2506 for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) {
2507 if (regs[12] & bits) {
2508 brd->ports[i].baud_base = 921600;
2509 brd->ports[i].max_baud = 921600;
2510 } else {
2511 brd->ports[i].baud_base = 115200;
2512 brd->ports[i].max_baud = 115200;
2513 }
2514 }
2515 scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB);
2516 outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR);
2517 outb(0, cap + UART_EFR); /* EFR is the same as FCR */
2518 outb(scratch2, cap + UART_LCR);
2519 outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR);
2520 scratch = inb(cap + UART_IIR);
2521
2522 if (scratch & 0xC0)
2523 brd->uart_type = PORT_16550A;
2524 else
2525 brd->uart_type = PORT_16450;
2526 if (!request_region(brd->ports[0].ioaddr, 8 * brd->info->nports,
2527 "mxser(IO)")) {
2528 printk(KERN_ERR "mxser: can't request ports I/O region: "
2529 "0x%.8lx-0x%.8lx\n",
2530 brd->ports[0].ioaddr, brd->ports[0].ioaddr +
2531 8 * brd->info->nports - 1);
2532 return -EIO;
2533 }
2534 if (!request_region(brd->vector, 1, "mxser(vector)")) {
2535 release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
2536 printk(KERN_ERR "mxser: can't request interrupt vector region: "
2537 "0x%.8lx-0x%.8lx\n",
2538 brd->ports[0].ioaddr, brd->ports[0].ioaddr +
2539 8 * brd->info->nports - 1);
2540 return -EIO;
2541 }
2542 return brd->info->nports;
2543
2544 err_irqconflict:
2545 printk(KERN_ERR "mxser: invalid interrupt number\n");
2546 return -EIO;
2547 }
2548
2549 static int __devinit mxser_probe(struct pci_dev *pdev,
2550 const struct pci_device_id *ent)
2551 {
2552 #ifdef CONFIG_PCI
2553 struct mxser_board *brd;
2554 unsigned int i, j;
2555 unsigned long ioaddress;
2556 int retval = -EINVAL;
2557
2558 for (i = 0; i < MXSER_BOARDS; i++)
2559 if (mxser_boards[i].info == NULL)
2560 break;
2561
2562 if (i >= MXSER_BOARDS) {
2563 dev_err(&pdev->dev, "too many boards found (maximum %d), board "
2564 "not configured\n", MXSER_BOARDS);
2565 goto err;
2566 }
2567
2568 brd = &mxser_boards[i];
2569 brd->idx = i * MXSER_PORTS_PER_BOARD;
2570 dev_info(&pdev->dev, "found MOXA %s board (BusNo=%d, DevNo=%d)\n",
2571 mxser_cards[ent->driver_data].name,
2572 pdev->bus->number, PCI_SLOT(pdev->devfn));
2573
2574 retval = pci_enable_device(pdev);
2575 if (retval) {
2576 dev_err(&pdev->dev, "PCI enable failed\n");
2577 goto err;
2578 }
2579
2580 /* io address */
2581 ioaddress = pci_resource_start(pdev, 2);
2582 retval = pci_request_region(pdev, 2, "mxser(IO)");
2583 if (retval)
2584 goto err;
2585
2586 brd->info = &mxser_cards[ent->driver_data];
2587 for (i = 0; i < brd->info->nports; i++)
2588 brd->ports[i].ioaddr = ioaddress + 8 * i;
2589
2590 /* vector */
2591 ioaddress = pci_resource_start(pdev, 3);
2592 retval = pci_request_region(pdev, 3, "mxser(vector)");
2593 if (retval)
2594 goto err_relio;
2595 brd->vector = ioaddress;
2596
2597 /* irq */
2598 brd->irq = pdev->irq;
2599
2600 brd->chip_flag = CheckIsMoxaMust(brd->ports[0].ioaddr);
2601 brd->uart_type = PORT_16550A;
2602 brd->vector_mask = 0;
2603
2604 for (i = 0; i < brd->info->nports; i++) {
2605 for (j = 0; j < UART_INFO_NUM; j++) {
2606 if (Gpci_uart_info[j].type == brd->chip_flag) {
2607 brd->ports[i].max_baud =
2608 Gpci_uart_info[j].max_baud;
2609
2610 /* exception....CP-102 */
2611 if (brd->info->flags & MXSER_HIGHBAUD)
2612 brd->ports[i].max_baud = 921600;
2613 break;
2614 }
2615 }
2616 }
2617
2618 if (brd->chip_flag == MOXA_MUST_MU860_HWID) {
2619 for (i = 0; i < brd->info->nports; i++) {
2620 if (i < 4)
2621 brd->ports[i].opmode_ioaddr = ioaddress + 4;
2622 else
2623 brd->ports[i].opmode_ioaddr = ioaddress + 0x0c;
2624 }
2625 outb(0, ioaddress + 4); /* default set to RS232 mode */
2626 outb(0, ioaddress + 0x0c); /* default set to RS232 mode */
2627 }
2628
2629 for (i = 0; i < brd->info->nports; i++) {
2630 brd->vector_mask |= (1 << i);
2631 brd->ports[i].baud_base = 921600;
2632 }
2633
2634 /* mxser_initbrd will hook ISR. */
2635 retval = mxser_initbrd(brd, pdev);
2636 if (retval)
2637 goto err_null;
2638
2639 for (i = 0; i < brd->info->nports; i++)
2640 tty_register_device(mxvar_sdriver, brd->idx + i, &pdev->dev);
2641
2642 pci_set_drvdata(pdev, brd);
2643
2644 return 0;
2645 err_relio:
2646 pci_release_region(pdev, 2);
2647 err_null:
2648 brd->info = NULL;
2649 err:
2650 return retval;
2651 #else
2652 return -ENODEV;
2653 #endif
2654 }
2655
2656 static void __devexit mxser_remove(struct pci_dev *pdev)
2657 {
2658 struct mxser_board *brd = pci_get_drvdata(pdev);
2659 unsigned int i;
2660
2661 for (i = 0; i < brd->info->nports; i++)
2662 tty_unregister_device(mxvar_sdriver, brd->idx + i);
2663
2664 mxser_release_res(brd, pdev, 1);
2665 brd->info = NULL;
2666 }
2667
2668 static struct pci_driver mxser_driver = {
2669 .name = "mxser",
2670 .id_table = mxser_pcibrds,
2671 .probe = mxser_probe,
2672 .remove = __devexit_p(mxser_remove)
2673 };
2674
2675 static int __init mxser_module_init(void)
2676 {
2677 struct mxser_board *brd;
2678 unsigned int b, i, m;
2679 int retval;
2680
2681 mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1);
2682 if (!mxvar_sdriver)
2683 return -ENOMEM;
2684
2685 printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n",
2686 MXSER_VERSION);
2687
2688 /* Initialize the tty_driver structure */
2689 mxvar_sdriver->owner = THIS_MODULE;
2690 mxvar_sdriver->magic = TTY_DRIVER_MAGIC;
2691 mxvar_sdriver->name = "ttyMI";
2692 mxvar_sdriver->major = ttymajor;
2693 mxvar_sdriver->minor_start = 0;
2694 mxvar_sdriver->num = MXSER_PORTS + 1;
2695 mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL;
2696 mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL;
2697 mxvar_sdriver->init_termios = tty_std_termios;
2698 mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL;
2699 mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW|TTY_DRIVER_DYNAMIC_DEV;
2700 tty_set_operations(mxvar_sdriver, &mxser_ops);
2701
2702 retval = tty_register_driver(mxvar_sdriver);
2703 if (retval) {
2704 printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family "
2705 "tty driver !\n");
2706 goto err_put;
2707 }
2708
2709 /* Start finding ISA boards here */
2710 for (m = 0, b = 0; b < MXSER_BOARDS; b++) {
2711 if (!ioaddr[b])
2712 continue;
2713
2714 brd = &mxser_boards[m];
2715 retval = mxser_get_ISA_conf(!ioaddr[b], brd);
2716 if (retval <= 0) {
2717 brd->info = NULL;
2718 continue;
2719 }
2720
2721 printk(KERN_INFO "mxser: found MOXA %s board (CAP=0x%lx)\n",
2722 brd->info->name, ioaddr[b]);
2723
2724 /* mxser_initbrd will hook ISR. */
2725 if (mxser_initbrd(brd, NULL) < 0) {
2726 brd->info = NULL;
2727 continue;
2728 }
2729
2730 brd->idx = m * MXSER_PORTS_PER_BOARD;
2731 for (i = 0; i < brd->info->nports; i++)
2732 tty_register_device(mxvar_sdriver, brd->idx + i, NULL);
2733
2734 m++;
2735 }
2736
2737 retval = pci_register_driver(&mxser_driver);
2738 if (retval) {
2739 printk(KERN_ERR "mxser: can't register pci driver\n");
2740 if (!m) {
2741 retval = -ENODEV;
2742 goto err_unr;
2743 } /* else: we have some ISA cards under control */
2744 }
2745
2746 return 0;
2747 err_unr:
2748 tty_unregister_driver(mxvar_sdriver);
2749 err_put:
2750 put_tty_driver(mxvar_sdriver);
2751 return retval;
2752 }
2753
2754 static void __exit mxser_module_exit(void)
2755 {
2756 unsigned int i, j;
2757
2758 pci_unregister_driver(&mxser_driver);
2759
2760 for (i = 0; i < MXSER_BOARDS; i++) /* ISA remains */
2761 if (mxser_boards[i].info != NULL)
2762 for (j = 0; j < mxser_boards[i].info->nports; j++)
2763 tty_unregister_device(mxvar_sdriver,
2764 mxser_boards[i].idx + j);
2765 tty_unregister_driver(mxvar_sdriver);
2766 put_tty_driver(mxvar_sdriver);
2767
2768 for (i = 0; i < MXSER_BOARDS; i++)
2769 if (mxser_boards[i].info != NULL)
2770 mxser_release_res(&mxser_boards[i], NULL, 1);
2771 }
2772
2773 module_init(mxser_module_init);
2774 module_exit(mxser_module_exit);
Support for the Chinese Samsung S3C2440 based development boards