drivers/scsi/bnx2i/bnx2i.h

   1 /* bnx2i.h: Broadcom NetXtreme II iSCSI driver.
   2  *
   3  * Copyright (c) 2006 - 2009 Broadcom Corporation
   4  * Copyright (c) 2007, 2008 Red Hat, Inc.  All rights reserved.
   5  * Copyright (c) 2007, 2008 Mike Christie
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation.
  10  *
  11  * Written by: Anil Veerabhadrappa (anilgv@broadcom.com)
  12  */
  13
  14 #ifndef _BNX2I_H_
  15 #define _BNX2I_H_
  16
  17 #include <linux/module.h>
  18 #include <linux/moduleparam.h>
  19
  20 #include <linux/errno.h>
  21 #include <linux/pci.h>
  22 #include <linux/spinlock.h>
  23 #include <linux/interrupt.h>
  24 #include <linux/sched.h>
  25 #include <linux/in.h>
  26 #include <linux/kfifo.h>
  27 #include <linux/netdevice.h>
  28 #include <linux/completion.h>
  29
  30 #include <scsi/scsi_cmnd.h>
  31 #include <scsi/scsi_device.h>
  32 #include <scsi/scsi_eh.h>
  33 #include <scsi/scsi_host.h>
  34 #include <scsi/scsi.h>
  35 #include <scsi/iscsi_proto.h>
  36 #include <scsi/libiscsi.h>
  37 #include <scsi/scsi_transport_iscsi.h>
  38
  39 #include "../../net/cnic_if.h"
  40 #include "57xx_iscsi_hsi.h"
  41 #include "57xx_iscsi_constants.h"
  42
  43 #define BNX2_ISCSI_DRIVER_NAME          "bnx2i"
  44
  45 #define BNX2I_MAX_ADAPTERS              8
  46
  47 #define ISCSI_MAX_CONNS_PER_HBA         128
  48 #define ISCSI_MAX_SESS_PER_HBA          ISCSI_MAX_CONNS_PER_HBA
  49 #define ISCSI_MAX_CMDS_PER_SESS         128
  50
  51 /* Total active commands across all connections supported by devices */
  52 #define ISCSI_MAX_CMDS_PER_HBA_5708     (28 * (ISCSI_MAX_CMDS_PER_SESS - 1))
  53 #define ISCSI_MAX_CMDS_PER_HBA_5709     (128 * (ISCSI_MAX_CMDS_PER_SESS - 1))
  54 #define ISCSI_MAX_CMDS_PER_HBA_57710    (256 * (ISCSI_MAX_CMDS_PER_SESS - 1))
  55
  56 #define ISCSI_MAX_BDS_PER_CMD           32
  57
  58 #define MAX_PAGES_PER_CTRL_STRUCT_POOL  8
  59 #define BNX2I_RESERVED_SLOW_PATH_CMD_SLOTS      4
  60
  61 /* 5706/08 hardware has limit on maximum buffer size per BD it can handle */
  62 #define MAX_BD_LENGTH                   65535
  63 #define BD_SPLIT_SIZE                   32768
  64
  65 /* min, max & default values for SQ/RQ/CQ size, configurable via' modparam */
  66 #define BNX2I_SQ_WQES_MIN               16
  67 #define BNX2I_570X_SQ_WQES_MAX          128
  68 #define BNX2I_5770X_SQ_WQES_MAX         512
  69 #define BNX2I_570X_SQ_WQES_DEFAULT      128
  70 #define BNX2I_5770X_SQ_WQES_DEFAULT     256
  71
  72 #define BNX2I_570X_CQ_WQES_MAX          128
  73 #define BNX2I_5770X_CQ_WQES_MAX         512
  74
  75 #define BNX2I_RQ_WQES_MIN               16
  76 #define BNX2I_RQ_WQES_MAX               32
  77 #define BNX2I_RQ_WQES_DEFAULT           16
  78
  79 /* CCELLs per conn */
  80 #define BNX2I_CCELLS_MIN                16
  81 #define BNX2I_CCELLS_MAX                96
  82 #define BNX2I_CCELLS_DEFAULT            64
  83
  84 #define ITT_INVALID_SIGNATURE           0xFFFF
  85
  86 #define ISCSI_CMD_CLEANUP_TIMEOUT       100
  87
  88 #define BNX2I_CONN_CTX_BUF_SIZE         16384
  89
  90 #define BNX2I_SQ_WQE_SIZE               64
  91 #define BNX2I_RQ_WQE_SIZE               256
  92 #define BNX2I_CQE_SIZE                  64
  93
  94 #define MB_KERNEL_CTX_SHIFT             8
  95 #define MB_KERNEL_CTX_SIZE              (1 << MB_KERNEL_CTX_SHIFT)
  96
  97 #define CTX_SHIFT                       7
  98 #define GET_CID_NUM(cid_addr)           ((cid_addr) >> CTX_SHIFT)
  99
 100 #define CTX_OFFSET                      0x10000
 101 #define MAX_CID_CNT                     0x4000
 102
 103 /* 5709 context registers */
 104 #define BNX2_MQ_CONFIG2                 0x00003d00
 105 #define BNX2_MQ_CONFIG2_CONT_SZ         (0x7L<<4)
 106 #define BNX2_MQ_CONFIG2_FIRST_L4L5      (0x1fL<<8)
 107
 108 /* 57710's BAR2 is mapped to doorbell registers */
 109 #define BNX2X_DOORBELL_PCI_BAR          2
 110 #define BNX2X_MAX_CQS                   8
 111
 112 #define CNIC_ARM_CQE                    1
 113 #define CNIC_DISARM_CQE                 0
 114
 115 #define REG_RD(__hba, offset)                           \
 116                 readl(__hba->regview + offset)
 117 #define REG_WR(__hba, offset, val)                      \
 118                 writel(val, __hba->regview + offset)
 119
 120
 121 /**
 122  * struct generic_pdu_resc - login pdu resource structure
 123  *
 124  * @req_buf:            driver buffer used to stage payload associated with
 125  *                      the login request
 126  * @req_dma_addr:       dma address for iscsi login request payload buffer
 127  * @req_buf_size:       actual login request payload length
 128  * @req_wr_ptr:         pointer into login request buffer when next data is
 129  *                      to be written
 130  * @resp_hdr:           iscsi header where iscsi login response header is to
 131  *                      be recreated
 132  * @resp_buf:           buffer to stage login response payload
 133  * @resp_dma_addr:      login response payload buffer dma address
 134  * @resp_buf_size:      login response paylod length
 135  * @resp_wr_ptr:        pointer into login response buffer when next data is
 136  *                      to be written
 137  * @req_bd_tbl:         iscsi login request payload BD table
 138  * @req_bd_dma:         login request BD table dma address
 139  * @resp_bd_tbl:        iscsi login response payload BD table
 140  * @resp_bd_dma:        login request BD table dma address
 141  *
 142  * following structure defines buffer info for generic pdus such as iSCSI Login,
 143  *      Logout and NOP
 144  */
 145 struct generic_pdu_resc {
 146         char *req_buf;
 147         dma_addr_t req_dma_addr;
 148         u32 req_buf_size;
 149         char *req_wr_ptr;
 150         struct iscsi_hdr resp_hdr;
 151         char *resp_buf;
 152         dma_addr_t resp_dma_addr;
 153         u32 resp_buf_size;
 154         char *resp_wr_ptr;
 155         char *req_bd_tbl;
 156         dma_addr_t req_bd_dma;
 157         char *resp_bd_tbl;
 158         dma_addr_t resp_bd_dma;
 159 };
 160
 161
 162 /**
 163  * struct bd_resc_page - tracks DMA'able memory allocated for BD tables
 164  *
 165  * @link:               list head to link elements
 166  * @max_ptrs:           maximun pointers that can be stored in this page
 167  * @num_valid:          number of pointer valid in this page
 168  * @page:               base addess for page pointer array
 169  *
 170  * structure to track DMA'able memory allocated for command BD tables
 171  */
 172 struct bd_resc_page {
 173         struct list_head link;
 174         u32 max_ptrs;
 175         u32 num_valid;
 176         void *page[1];
 177 };
 178
 179
 180 /**
 181  * struct io_bdt - I/O buffer destricptor table
 182  *
 183  * @bd_tbl:             BD table's virtual address
 184  * @bd_tbl_dma:         BD table's dma address
 185  * @bd_valid:           num valid BD entries
 186  *
 187  * IO BD table
 188  */
 189 struct io_bdt {
 190         struct iscsi_bd *bd_tbl;
 191         dma_addr_t bd_tbl_dma;
 192         u16 bd_valid;
 193 };
 194
 195
 196 /**
 197  * bnx2i_cmd - iscsi command structure
 198  *
 199  * @scsi_cmd:           SCSI-ML task pointer corresponding to this iscsi cmd
 200  * @sg:                 SG list
 201  * @io_tbl:             buffer descriptor (BD) table
 202  * @bd_tbl_dma:         buffer descriptor (BD) table's dma address
 203  */
 204 struct bnx2i_cmd {
 205         struct iscsi_hdr hdr;
 206         struct bnx2i_conn *conn;
 207         struct scsi_cmnd *scsi_cmd;
 208         struct scatterlist *sg;
 209         struct io_bdt io_tbl;
 210         dma_addr_t bd_tbl_dma;
 211         struct bnx2i_cmd_request req;
 212 };
 213
 214
 215 /**
 216  * struct bnx2i_conn - iscsi connection structure
 217  *
 218  * @cls_conn:              pointer to iscsi cls conn
 219  * @hba:                   adapter structure pointer
 220  * @iscsi_conn_cid:        iscsi conn id
 221  * @fw_cid:                firmware iscsi context id
 222  * @ep:                    endpoint structure pointer
 223  * @gen_pdu:               login/nopout/logout pdu resources
 224  * @violation_notified:    bit mask used to track iscsi error/warning messages
 225  *                         already printed out
 226  *
 227  * iSCSI connection structure
 228  */
 229 struct bnx2i_conn {
 230         struct iscsi_cls_conn *cls_conn;
 231         struct bnx2i_hba *hba;
 232         struct completion cmd_cleanup_cmpl;
 233         int is_bound;
 234
 235         u32 iscsi_conn_cid;
 236 #define BNX2I_CID_RESERVED      0x5AFF
 237         u32 fw_cid;
 238
 239         struct timer_list poll_timer;
 240         /*
 241          * Queue Pair (QP) related structure elements.
 242          */
 243         struct bnx2i_endpoint *ep;
 244
 245         /*
 246          * Buffer for login negotiation process
 247          */
 248         struct generic_pdu_resc gen_pdu;
 249         u64 violation_notified;
 250 };
 251
 252
 253
 254 /**
 255  * struct iscsi_cid_queue - Per adapter iscsi cid queue
 256  *
 257  * @cid_que_base:           queue base memory
 258  * @cid_que:                queue memory pointer
 259  * @cid_q_prod_idx:         produce index
 260  * @cid_q_cons_idx:         consumer index
 261  * @cid_q_max_idx:          max index. used to detect wrap around condition
 262  * @cid_free_cnt:           queue size
 263  * @conn_cid_tbl:           iscsi cid to conn structure mapping table
 264  *
 265  * Per adapter iSCSI CID Queue
 266  */
 267 struct iscsi_cid_queue {
 268         void *cid_que_base;
 269         u32 *cid_que;
 270         u32 cid_q_prod_idx;
 271         u32 cid_q_cons_idx;
 272         u32 cid_q_max_idx;
 273         u32 cid_free_cnt;
 274         struct bnx2i_conn **conn_cid_tbl;
 275 };
 276
 277 /**
 278  * struct bnx2i_hba - bnx2i adapter structure
 279  *
 280  * @link:                  list head to link elements
 281  * @cnic:                  pointer to cnic device
 282  * @pcidev:                pointer to pci dev
 283  * @netdev:                pointer to netdev structure
 284  * @regview:               mapped PCI register space
 285  * @age:                   age, incremented by every recovery
 286  * @cnic_dev_type:         cnic device type, 5706/5708/5709/57710
 287  * @mail_queue_access:     mailbox queue access mode, applicable to 5709 only
 288  * @reg_with_cnic:         indicates whether the device is register with CNIC
 289  * @adapter_state:         adapter state, UP, GOING_DOWN, LINK_DOWN
 290  * @mtu_supported:         Ethernet MTU supported
 291  * @shost:                 scsi host pointer
 292  * @max_sqes:              SQ size
 293  * @max_rqes:              RQ size
 294  * @max_cqes:              CQ size
 295  * @num_ccell:             number of command cells per connection
 296  * @ofld_conns_active:     active connection list
 297  * @max_active_conns:      max offload connections supported by this device
 298  * @cid_que:               iscsi cid queue
 299  * @ep_rdwr_lock:          read / write lock to synchronize various ep lists
 300  * @ep_ofld_list:          connection list for pending offload completion
 301  * @ep_destroy_list:       connection list for pending offload completion
 302  * @mp_bd_tbl:             BD table to be used with middle path requests
 303  * @mp_bd_dma:             DMA address of 'mp_bd_tbl' memory buffer
 304  * @dummy_buffer:          Dummy buffer to be used with zero length scsicmd reqs
 305  * @dummy_buf_dma:         DMA address of 'dummy_buffer' memory buffer
 306  * @lock:                  lock to synchonize access to hba structure
 307  * @pci_did:               PCI device ID
 308  * @pci_vid:               PCI vendor ID
 309  * @pci_sdid:              PCI subsystem device ID
 310  * @pci_svid:              PCI subsystem vendor ID
 311  * @pci_func:              PCI function number in system pci tree
 312  * @pci_devno:             PCI device number in system pci tree
 313  * @num_wqe_sent:          statistic counter, total wqe's sent
 314  * @num_cqe_rcvd:          statistic counter, total cqe's received
 315  * @num_intr_claimed:      statistic counter, total interrupts claimed
 316  * @link_changed_count:    statistic counter, num of link change notifications
 317  *                         received
 318  * @ipaddr_changed_count:  statistic counter, num times IP address changed while
 319  *                         at least one connection is offloaded
 320  * @num_sess_opened:       statistic counter, total num sessions opened
 321  * @num_conn_opened:       statistic counter, total num conns opened on this hba
 322  * @ctx_ccell_tasks:       captures number of ccells and tasks supported by
 323  *                         currently offloaded connection, used to decode
 324  *                         context memory
 325  *
 326  * Adapter Data Structure
 327  */
 328 struct bnx2i_hba {
 329         struct list_head link;
 330         struct cnic_dev *cnic;
 331         struct pci_dev *pcidev;
 332         struct net_device *netdev;
 333         void __iomem *regview;
 334
 335         u32 age;
 336         unsigned long cnic_dev_type;
 337                 #define BNX2I_NX2_DEV_5706              0x0
 338                 #define BNX2I_NX2_DEV_5708              0x1
 339                 #define BNX2I_NX2_DEV_5709              0x2
 340                 #define BNX2I_NX2_DEV_57710             0x3
 341         u32 mail_queue_access;
 342                 #define BNX2I_MQ_KERNEL_MODE            0x0
 343                 #define BNX2I_MQ_KERNEL_BYPASS_MODE     0x1
 344                 #define BNX2I_MQ_BIN_MODE               0x2
 345         unsigned long  reg_with_cnic;
 346                 #define BNX2I_CNIC_REGISTERED           1
 347
 348         unsigned long  adapter_state;
 349                 #define ADAPTER_STATE_UP                0
 350                 #define ADAPTER_STATE_GOING_DOWN        1
 351                 #define ADAPTER_STATE_LINK_DOWN         2
 352                 #define ADAPTER_STATE_INIT_FAILED       31
 353         unsigned int mtu_supported;
 354                 #define BNX2I_MAX_MTU_SUPPORTED         1500
 355
 356         struct Scsi_Host *shost;
 357
 358         u32 max_sqes;
 359         u32 max_rqes;
 360         u32 max_cqes;
 361         u32 num_ccell;
 362
 363         int ofld_conns_active;
 364
 365         int max_active_conns;
 366         struct iscsi_cid_queue cid_que;
 367
 368         rwlock_t ep_rdwr_lock;
 369         struct list_head ep_ofld_list;
 370         struct list_head ep_destroy_list;
 371
 372         /*
 373          * BD table to be used with MP (Middle Path requests.
 374          */
 375         char *mp_bd_tbl;
 376         dma_addr_t mp_bd_dma;
 377         char *dummy_buffer;
 378         dma_addr_t dummy_buf_dma;
 379
 380         spinlock_t lock;        /* protects hba structure access */
 381         struct mutex net_dev_lock;/* sync net device access */
 382
 383         /*
 384          * PCI related info.
 385          */
 386         u16 pci_did;
 387         u16 pci_vid;
 388         u16 pci_sdid;
 389         u16 pci_svid;
 390         u16 pci_func;
 391         u16 pci_devno;
 392
 393         /*
 394          * Following are a bunch of statistics useful during development
 395          * and later stage for score boarding.
 396          */
 397         u32 num_wqe_sent;
 398         u32 num_cqe_rcvd;
 399         u32 num_intr_claimed;
 400         u32 link_changed_count;
 401         u32 ipaddr_changed_count;
 402         u32 num_sess_opened;
 403         u32 num_conn_opened;
 404         unsigned int ctx_ccell_tasks;
 405 };
 406
 407
 408 /*******************************************************************************
 409  *      QP [ SQ / RQ / CQ ] info.
 410  ******************************************************************************/
 411
 412 /*
 413  * SQ/RQ/CQ generic structure definition
 414  */
 415 struct  sqe {
 416         u8 sqe_byte[BNX2I_SQ_WQE_SIZE];
 417 };
 418
 419 struct  rqe {
 420         u8 rqe_byte[BNX2I_RQ_WQE_SIZE];
 421 };
 422
 423 struct  cqe {
 424         u8 cqe_byte[BNX2I_CQE_SIZE];
 425 };
 426
 427
 428 enum {
 429 #if defined(__LITTLE_ENDIAN)
 430         CNIC_EVENT_COAL_INDEX   = 0x0,
 431         CNIC_SEND_DOORBELL      = 0x4,
 432         CNIC_EVENT_CQ_ARM       = 0x7,
 433         CNIC_RECV_DOORBELL      = 0x8
 434 #elif defined(__BIG_ENDIAN)
 435         CNIC_EVENT_COAL_INDEX   = 0x2,
 436         CNIC_SEND_DOORBELL      = 0x6,
 437         CNIC_EVENT_CQ_ARM       = 0x4,
 438         CNIC_RECV_DOORBELL      = 0xa
 439 #endif
 440 };
 441
 442
 443 /*
 444  * CQ DB
 445  */
 446 struct bnx2x_iscsi_cq_pend_cmpl {
 447         /* CQ producer, updated by Ustorm */
 448         u16 ustrom_prod;
 449         /* CQ pending completion counter */
 450         u16 pend_cntr;
 451 };
 452
 453
 454 struct bnx2i_5771x_cq_db {
 455         struct bnx2x_iscsi_cq_pend_cmpl qp_pend_cmpl[BNX2X_MAX_CQS];
 456         /* CQ pending completion ITT array */
 457         u16 itt[BNX2X_MAX_CQS];
 458         /* Cstorm CQ sequence to notify array, updated by driver */;
 459         u16 sqn[BNX2X_MAX_CQS];
 460         u32 reserved[4] /* 16 byte allignment */;
 461 };
 462
 463
 464 struct bnx2i_5771x_sq_rq_db {
 465         u16 prod_idx;
 466         u8 reserved0[14]; /* Pad structure size to 16 bytes */
 467 };
 468
 469
 470 struct bnx2i_5771x_dbell_hdr {
 471         u8 header;
 472         /* 1 for rx doorbell, 0 for tx doorbell */
 473 #define B577XX_DOORBELL_HDR_RX                          (0x1<<0)
 474 #define B577XX_DOORBELL_HDR_RX_SHIFT                    0
 475         /* 0 for normal doorbell, 1 for advertise wnd doorbell */
 476 #define B577XX_DOORBELL_HDR_DB_TYPE                     (0x1<<1)
 477 #define B577XX_DOORBELL_HDR_DB_TYPE_SHIFT               1
 478         /* rdma tx only: DPM transaction size specifier (64/128/256/512B) */
 479 #define B577XX_DOORBELL_HDR_DPM_SIZE                    (0x3<<2)
 480 #define B577XX_DOORBELL_HDR_DPM_SIZE_SHIFT              2
 481         /* connection type */
 482 #define B577XX_DOORBELL_HDR_CONN_TYPE                   (0xF<<4)
 483 #define B577XX_DOORBELL_HDR_CONN_TYPE_SHIFT             4
 484 };
 485
 486 struct bnx2i_5771x_dbell {
 487         struct bnx2i_5771x_dbell_hdr dbell;
 488         u8 pad[3];
 489
 490 };
 491
 492 /**
 493  * struct qp_info - QP (share queue region) atrributes structure
 494  *
 495  * @ctx_base:           ioremapped pci register base to access doorbell register
 496  *                      pertaining to this offloaded connection
 497  * @sq_virt:            virtual address of send queue (SQ) region
 498  * @sq_phys:            DMA address of SQ memory region
 499  * @sq_mem_size:        SQ size
 500  * @sq_prod_qe:         SQ producer entry pointer
 501  * @sq_cons_qe:         SQ consumer entry pointer
 502  * @sq_first_qe:        virtaul address of first entry in SQ
 503  * @sq_last_qe:         virtaul address of last entry in SQ
 504  * @sq_prod_idx:        SQ producer index
 505  * @sq_cons_idx:        SQ consumer index
 506  * @sqe_left:           number sq entry left
 507  * @sq_pgtbl_virt:      page table describing buffer consituting SQ region
 508  * @sq_pgtbl_phys:      dma address of 'sq_pgtbl_virt'
 509  * @sq_pgtbl_size:      SQ page table size
 510  * @cq_virt:            virtual address of completion queue (CQ) region
 511  * @cq_phys:            DMA address of RQ memory region
 512  * @cq_mem_size:        CQ size
 513  * @cq_prod_qe:         CQ producer entry pointer
 514  * @cq_cons_qe:         CQ consumer entry pointer
 515  * @cq_first_qe:        virtaul address of first entry in CQ
 516  * @cq_last_qe:         virtaul address of last entry in CQ
 517  * @cq_prod_idx:        CQ producer index
 518  * @cq_cons_idx:        CQ consumer index
 519  * @cqe_left:           number cq entry left
 520  * @cqe_size:           size of each CQ entry
 521  * @cqe_exp_seq_sn:     next expected CQE sequence number
 522  * @cq_pgtbl_virt:      page table describing buffer consituting CQ region
 523  * @cq_pgtbl_phys:      dma address of 'cq_pgtbl_virt'
 524  * @cq_pgtbl_size:      CQ page table size
 525  * @rq_virt:            virtual address of receive queue (RQ) region
 526  * @rq_phys:            DMA address of RQ memory region
 527  * @rq_mem_size:        RQ size
 528  * @rq_prod_qe:         RQ producer entry pointer
 529  * @rq_cons_qe:         RQ consumer entry pointer
 530  * @rq_first_qe:        virtaul address of first entry in RQ
 531  * @rq_last_qe:         virtaul address of last entry in RQ
 532  * @rq_prod_idx:        RQ producer index
 533  * @rq_cons_idx:        RQ consumer index
 534  * @rqe_left:           number rq entry left
 535  * @rq_pgtbl_virt:      page table describing buffer consituting RQ region
 536  * @rq_pgtbl_phys:      dma address of 'rq_pgtbl_virt'
 537  * @rq_pgtbl_size:      RQ page table size
 538  *
 539  * queue pair (QP) is a per connection shared data structure which is used
 540  *      to send work requests (SQ), receive completion notifications (CQ)
 541  *      and receive asynchoronous / scsi sense info (RQ). 'qp_info' structure
 542  *      below holds queue memory, consumer/producer indexes and page table
 543  *      information
 544  */
 545 struct qp_info {
 546         void __iomem *ctx_base;
 547 #define DPM_TRIGER_TYPE                 0x40
 548
 549 #define BNX2I_570x_QUE_DB_SIZE          0
 550 #define BNX2I_5771x_QUE_DB_SIZE         16
 551         struct sqe *sq_virt;
 552         dma_addr_t sq_phys;
 553         u32 sq_mem_size;
 554
 555         struct sqe *sq_prod_qe;
 556         struct sqe *sq_cons_qe;
 557         struct sqe *sq_first_qe;
 558         struct sqe *sq_last_qe;
 559         u16 sq_prod_idx;
 560         u16 sq_cons_idx;
 561         u32 sqe_left;
 562
 563         void *sq_pgtbl_virt;
 564         dma_addr_t sq_pgtbl_phys;
 565         u32 sq_pgtbl_size;      /* set to PAGE_SIZE for 5708 & 5709 */
 566
 567         struct cqe *cq_virt;
 568         dma_addr_t cq_phys;
 569         u32 cq_mem_size;
 570
 571         struct cqe *cq_prod_qe;
 572         struct cqe *cq_cons_qe;
 573         struct cqe *cq_first_qe;
 574         struct cqe *cq_last_qe;
 575         u16 cq_prod_idx;
 576         u16 cq_cons_idx;
 577         u32 cqe_left;
 578         u32 cqe_size;
 579         u32 cqe_exp_seq_sn;
 580
 581         void *cq_pgtbl_virt;
 582         dma_addr_t cq_pgtbl_phys;
 583         u32 cq_pgtbl_size;      /* set to PAGE_SIZE for 5708 & 5709 */
 584
 585         struct rqe *rq_virt;
 586         dma_addr_t rq_phys;
 587         u32 rq_mem_size;
 588
 589         struct rqe *rq_prod_qe;
 590         struct rqe *rq_cons_qe;
 591         struct rqe *rq_first_qe;
 592         struct rqe *rq_last_qe;
 593         u16 rq_prod_idx;
 594         u16 rq_cons_idx;
 595         u32 rqe_left;
 596
 597         void *rq_pgtbl_virt;
 598         dma_addr_t rq_pgtbl_phys;
 599         u32 rq_pgtbl_size;      /* set to PAGE_SIZE for 5708 & 5709 */
 600 };
 601
 602
 603
 604 /*
 605  * CID handles
 606  */
 607 struct ep_handles {
 608         u32 fw_cid;
 609         u32 drv_iscsi_cid;
 610         u16 pg_cid;
 611         u16 rsvd;
 612 };
 613
 614
 615 enum {
 616         EP_STATE_IDLE                   = 0x0,
 617         EP_STATE_PG_OFLD_START          = 0x1,
 618         EP_STATE_PG_OFLD_COMPL          = 0x2,
 619         EP_STATE_OFLD_START             = 0x4,
 620         EP_STATE_OFLD_COMPL             = 0x8,
 621         EP_STATE_CONNECT_START          = 0x10,
 622         EP_STATE_CONNECT_COMPL          = 0x20,
 623         EP_STATE_ULP_UPDATE_START       = 0x40,
 624         EP_STATE_ULP_UPDATE_COMPL       = 0x80,
 625         EP_STATE_DISCONN_START          = 0x100,
 626         EP_STATE_DISCONN_COMPL          = 0x200,
 627         EP_STATE_CLEANUP_START          = 0x400,
 628         EP_STATE_CLEANUP_CMPL           = 0x800,
 629         EP_STATE_TCP_FIN_RCVD           = 0x1000,
 630         EP_STATE_TCP_RST_RCVD           = 0x2000,
 631         EP_STATE_PG_OFLD_FAILED         = 0x1000000,
 632         EP_STATE_ULP_UPDATE_FAILED      = 0x2000000,
 633         EP_STATE_CLEANUP_FAILED         = 0x4000000,
 634         EP_STATE_OFLD_FAILED            = 0x8000000,
 635         EP_STATE_CONNECT_FAILED         = 0x10000000,
 636         EP_STATE_DISCONN_TIMEDOUT       = 0x20000000,
 637 };
 638
 639 /**
 640  * struct bnx2i_endpoint - representation of tcp connection in NX2 world
 641  *
 642  * @link:               list head to link elements
 643  * @hba:                adapter to which this connection belongs
 644  * @conn:               iscsi connection this EP is linked to
 645  * @sess:               iscsi session this EP is linked to
 646  * @cm_sk:              cnic sock struct
 647  * @hba_age:            age to detect if 'iscsid' issues ep_disconnect()
 648  *                      after HBA reset is completed by bnx2i/cnic/bnx2
 649  *                      modules
 650  * @state:              tracks offload connection state machine
 651  * @teardown_mode:      indicates if conn teardown is abortive or orderly
 652  * @qp:                 QP information
 653  * @ids:                contains chip allocated *context id* & driver assigned
 654  *                      *iscsi cid*
 655  * @ofld_timer:         offload timer to detect timeout
 656  * @ofld_wait:          wait queue
 657  *
 658  * Endpoint Structure - equivalent of tcp socket structure
 659  */
 660 struct bnx2i_endpoint {
 661         struct list_head link;
 662         struct bnx2i_hba *hba;
 663         struct bnx2i_conn *conn;
 664         struct cnic_sock *cm_sk;
 665         u32 hba_age;
 666         u32 state;
 667         unsigned long timestamp;
 668         int num_active_cmds;
 669
 670         struct qp_info qp;
 671         struct ep_handles ids;
 672                 #define ep_iscsi_cid    ids.drv_iscsi_cid
 673                 #define ep_cid          ids.fw_cid
 674                 #define ep_pg_cid       ids.pg_cid
 675         struct timer_list ofld_timer;
 676         wait_queue_head_t ofld_wait;
 677 };
 678
 679
 680
 681 /* Global variables */
 682 extern unsigned int error_mask1, error_mask2;
 683 extern u64 iscsi_error_mask;
 684 extern unsigned int en_tcp_dack;
 685 extern unsigned int event_coal_div;
 686
 687 extern struct scsi_transport_template *bnx2i_scsi_xport_template;
 688 extern struct iscsi_transport bnx2i_iscsi_transport;
 689 extern struct cnic_ulp_ops bnx2i_cnic_cb;
 690
 691 extern unsigned int sq_size;
 692 extern unsigned int rq_size;
 693
 694 extern struct device_attribute *bnx2i_dev_attributes[];
 695
 696
 697
 698 /*
 699  * Function Prototypes
 700  */
 701 extern void bnx2i_identify_device(struct bnx2i_hba *hba);
 702 extern void bnx2i_register_device(struct bnx2i_hba *hba);
 703
 704 extern void bnx2i_ulp_init(struct cnic_dev *dev);
 705 extern void bnx2i_ulp_exit(struct cnic_dev *dev);
 706 extern void bnx2i_start(void *handle);
 707 extern void bnx2i_stop(void *handle);
 708 extern void bnx2i_reg_dev_all(void);
 709 extern void bnx2i_unreg_dev_all(void);
 710 extern struct bnx2i_hba *get_adapter_list_head(void);
 711
 712 struct bnx2i_conn *bnx2i_get_conn_from_id(struct bnx2i_hba *hba,
 713                                           u16 iscsi_cid);
 714
 715 int bnx2i_alloc_ep_pool(void);
 716 void bnx2i_release_ep_pool(void);
 717 struct bnx2i_endpoint *bnx2i_ep_ofld_list_next(struct bnx2i_hba *hba);
 718 struct bnx2i_endpoint *bnx2i_ep_destroy_list_next(struct bnx2i_hba *hba);
 719
 720 struct bnx2i_hba *bnx2i_find_hba_for_cnic(struct cnic_dev *cnic);
 721
 722 struct bnx2i_hba *bnx2i_alloc_hba(struct cnic_dev *cnic);
 723 void bnx2i_free_hba(struct bnx2i_hba *hba);
 724
 725 void bnx2i_get_rq_buf(struct bnx2i_conn *conn, char *ptr, int len);
 726 void bnx2i_put_rq_buf(struct bnx2i_conn *conn, int count);
 727
 728 void bnx2i_iscsi_unmap_sg_list(struct bnx2i_cmd *cmd);
 729
 730 void bnx2i_drop_session(struct iscsi_cls_session *session);
 731
 732 extern int bnx2i_send_fw_iscsi_init_msg(struct bnx2i_hba *hba);
 733 extern int bnx2i_send_iscsi_login(struct bnx2i_conn *conn,
 734                                   struct iscsi_task *mtask);
 735 extern int bnx2i_send_iscsi_tmf(struct bnx2i_conn *conn,
 736                                   struct iscsi_task *mtask);
 737 extern int bnx2i_send_iscsi_scsicmd(struct bnx2i_conn *conn,
 738                                     struct bnx2i_cmd *cmnd);
 739 extern int bnx2i_send_iscsi_nopout(struct bnx2i_conn *conn,
 740                                    struct iscsi_task *mtask, u32 ttt,
 741                                    char *datap, int data_len, int unsol);
 742 extern int bnx2i_send_iscsi_logout(struct bnx2i_conn *conn,
 743                                    struct iscsi_task *mtask);
 744 extern void bnx2i_send_cmd_cleanup_req(struct bnx2i_hba *hba,
 745                                        struct bnx2i_cmd *cmd);
 746 extern void bnx2i_send_conn_ofld_req(struct bnx2i_hba *hba,
 747                                      struct bnx2i_endpoint *ep);
 748 extern void bnx2i_update_iscsi_conn(struct iscsi_conn *conn);
 749 extern void bnx2i_send_conn_destroy(struct bnx2i_hba *hba,
 750                                     struct bnx2i_endpoint *ep);
 751
 752 extern int bnx2i_alloc_qp_resc(struct bnx2i_hba *hba,
 753                                struct bnx2i_endpoint *ep);
 754 extern void bnx2i_free_qp_resc(struct bnx2i_hba *hba,
 755                                struct bnx2i_endpoint *ep);
 756 extern void bnx2i_ep_ofld_timer(unsigned long data);
 757 extern struct bnx2i_endpoint *bnx2i_find_ep_in_ofld_list(
 758                 struct bnx2i_hba *hba, u32 iscsi_cid);
 759 extern struct bnx2i_endpoint *bnx2i_find_ep_in_destroy_list(
 760                 struct bnx2i_hba *hba, u32 iscsi_cid);
 761
 762 extern int bnx2i_map_ep_dbell_regs(struct bnx2i_endpoint *ep);
 763 extern void bnx2i_arm_cq_event_coalescing(struct bnx2i_endpoint *ep, u8 action);
 764
 765 /* Debug related function prototypes */
 766 extern void bnx2i_print_pend_cmd_queue(struct bnx2i_conn *conn);
 767 extern void bnx2i_print_active_cmd_queue(struct bnx2i_conn *conn);
 768 extern void bnx2i_print_xmit_pdu_queue(struct bnx2i_conn *conn);
 769 extern void bnx2i_print_recv_state(struct bnx2i_conn *conn);
 770
 771 #endif