2 * SuperH On-Chip RTC Support
4 * Copyright (C) 2006, 2007, 2008 Paul Mundt
5 * Copyright (C) 2006 Jamie Lenehan
6 * Copyright (C) 2008 Angelo Castello
8 * Based on the old arch/sh/kernel/cpu/rtc.c by:
10 * Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
11 * Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka
13 * This file is subject to the terms and conditions of the GNU General Public
14 * License. See the file "COPYING" in the main directory of this archive
17 #include <linux/module.h>
18 #include <linux/kernel.h>
19 #include <linux/bcd.h>
20 #include <linux/rtc.h>
21 #include <linux/init.h>
22 #include <linux/platform_device.h>
23 #include <linux/seq_file.h>
24 #include <linux/interrupt.h>
25 #include <linux/spinlock.h>
27 #include <linux/log2.h>
30 #define DRV_NAME "sh-rtc"
31 #define DRV_VERSION "0.2.1"
33 #define RTC_REG(r) ((r) * rtc_reg_size)
35 #define R64CNT RTC_REG(0)
37 #define RSECCNT RTC_REG(1) /* RTC sec */
38 #define RMINCNT RTC_REG(2) /* RTC min */
39 #define RHRCNT RTC_REG(3) /* RTC hour */
40 #define RWKCNT RTC_REG(4) /* RTC week */
41 #define RDAYCNT RTC_REG(5) /* RTC day */
42 #define RMONCNT RTC_REG(6) /* RTC month */
43 #define RYRCNT RTC_REG(7) /* RTC year */
44 #define RSECAR RTC_REG(8) /* ALARM sec */
45 #define RMINAR RTC_REG(9) /* ALARM min */
46 #define RHRAR RTC_REG(10) /* ALARM hour */
47 #define RWKAR RTC_REG(11) /* ALARM week */
48 #define RDAYAR RTC_REG(12) /* ALARM day */
49 #define RMONAR RTC_REG(13) /* ALARM month */
50 #define RCR1 RTC_REG(14) /* Control */
51 #define RCR2 RTC_REG(15) /* Control */
54 * Note on RYRAR and RCR3: Up until this point most of the register
55 * definitions are consistent across all of the available parts. However,
56 * the placement of the optional RYRAR and RCR3 (the RYRAR control
57 * register used to control RYRCNT/RYRAR compare) varies considerably
58 * across various parts, occasionally being mapped in to a completely
59 * unrelated address space. For proper RYRAR support a separate resource
60 * would have to be handed off, but as this is purely optional in
61 * practice, we simply opt not to support it, thereby keeping the code
62 * quite a bit more simplified.
65 /* ALARM Bits - or with BCD encoded value */
66 #define AR_ENB 0x80 /* Enable for alarm cmp */
69 #define PF_HP 0x100 /* Enable Half Period to support 8,32,128Hz */
70 #define PF_COUNT 0x200 /* Half periodic counter */
71 #define PF_OXS 0x400 /* Periodic One x Second */
72 #define PF_KOU 0x800 /* Kernel or User periodic request 1=kernel */
76 #define RCR1_CF 0x80 /* Carry Flag */
77 #define RCR1_CIE 0x10 /* Carry Interrupt Enable */
78 #define RCR1_AIE 0x08 /* Alarm Interrupt Enable */
79 #define RCR1_AF 0x01 /* Alarm Flag */
82 #define RCR2_PEF 0x80 /* PEriodic interrupt Flag */
83 #define RCR2_PESMASK 0x70 /* Periodic interrupt Set */
84 #define RCR2_RTCEN 0x08 /* ENable RTC */
85 #define RCR2_ADJ 0x04 /* ADJustment (30-second) */
86 #define RCR2_RESET 0x02 /* Reset bit */
87 #define RCR2_START 0x01 /* Start bit */
90 void __iomem
*regbase
;
91 unsigned long regsize
;
96 struct rtc_device
*rtc_dev
;
98 unsigned long capabilities
; /* See asm-sh/rtc.h for cap bits */
99 unsigned short periodic_freq
;
102 static int __sh_rtc_interrupt(struct sh_rtc
*rtc
)
104 unsigned int tmp
, pending
;
106 tmp
= readb(rtc
->regbase
+ RCR1
);
107 pending
= tmp
& RCR1_CF
;
109 writeb(tmp
, rtc
->regbase
+ RCR1
);
111 /* Users have requested One x Second IRQ */
112 if (pending
&& rtc
->periodic_freq
& PF_OXS
)
113 rtc_update_irq(rtc
->rtc_dev
, 1, RTC_UF
| RTC_IRQF
);
118 static int __sh_rtc_alarm(struct sh_rtc
*rtc
)
120 unsigned int tmp
, pending
;
122 tmp
= readb(rtc
->regbase
+ RCR1
);
123 pending
= tmp
& RCR1_AF
;
124 tmp
&= ~(RCR1_AF
| RCR1_AIE
);
125 writeb(tmp
, rtc
->regbase
+ RCR1
);
128 rtc_update_irq(rtc
->rtc_dev
, 1, RTC_AF
| RTC_IRQF
);
133 static int __sh_rtc_periodic(struct sh_rtc
*rtc
)
135 struct rtc_device
*rtc_dev
= rtc
->rtc_dev
;
136 struct rtc_task
*irq_task
;
137 unsigned int tmp
, pending
;
139 tmp
= readb(rtc
->regbase
+ RCR2
);
140 pending
= tmp
& RCR2_PEF
;
142 writeb(tmp
, rtc
->regbase
+ RCR2
);
147 /* Half period enabled than one skipped and the next notified */
148 if ((rtc
->periodic_freq
& PF_HP
) && (rtc
->periodic_freq
& PF_COUNT
))
149 rtc
->periodic_freq
&= ~PF_COUNT
;
151 if (rtc
->periodic_freq
& PF_HP
)
152 rtc
->periodic_freq
|= PF_COUNT
;
153 if (rtc
->periodic_freq
& PF_KOU
) {
154 spin_lock(&rtc_dev
->irq_task_lock
);
155 irq_task
= rtc_dev
->irq_task
;
157 irq_task
->func(irq_task
->private_data
);
158 spin_unlock(&rtc_dev
->irq_task_lock
);
160 rtc_update_irq(rtc
->rtc_dev
, 1, RTC_PF
| RTC_IRQF
);
166 static irqreturn_t
sh_rtc_interrupt(int irq
, void *dev_id
)
168 struct sh_rtc
*rtc
= dev_id
;
171 spin_lock(&rtc
->lock
);
172 ret
= __sh_rtc_interrupt(rtc
);
173 spin_unlock(&rtc
->lock
);
175 return IRQ_RETVAL(ret
);
178 static irqreturn_t
sh_rtc_alarm(int irq
, void *dev_id
)
180 struct sh_rtc
*rtc
= dev_id
;
183 spin_lock(&rtc
->lock
);
184 ret
= __sh_rtc_alarm(rtc
);
185 spin_unlock(&rtc
->lock
);
187 return IRQ_RETVAL(ret
);
190 static irqreturn_t
sh_rtc_periodic(int irq
, void *dev_id
)
192 struct sh_rtc
*rtc
= dev_id
;
195 spin_lock(&rtc
->lock
);
196 ret
= __sh_rtc_periodic(rtc
);
197 spin_unlock(&rtc
->lock
);
199 return IRQ_RETVAL(ret
);
202 static irqreturn_t
sh_rtc_shared(int irq
, void *dev_id
)
204 struct sh_rtc
*rtc
= dev_id
;
207 spin_lock(&rtc
->lock
);
208 ret
= __sh_rtc_interrupt(rtc
);
209 ret
|= __sh_rtc_alarm(rtc
);
210 ret
|= __sh_rtc_periodic(rtc
);
211 spin_unlock(&rtc
->lock
);
213 return IRQ_RETVAL(ret
);
216 static inline void sh_rtc_setpie(struct device
*dev
, unsigned int enable
)
218 struct sh_rtc
*rtc
= dev_get_drvdata(dev
);
221 spin_lock_irq(&rtc
->lock
);
223 tmp
= readb(rtc
->regbase
+ RCR2
);
226 tmp
&= ~RCR2_PEF
; /* Clear PES bit */
227 tmp
|= (rtc
->periodic_freq
& ~PF_HP
); /* Set PES2-0 */
229 tmp
&= ~(RCR2_PESMASK
| RCR2_PEF
);
231 writeb(tmp
, rtc
->regbase
+ RCR2
);
233 spin_unlock_irq(&rtc
->lock
);
236 static inline int sh_rtc_setfreq(struct device
*dev
, unsigned int freq
)
238 struct sh_rtc
*rtc
= dev_get_drvdata(dev
);
241 spin_lock_irq(&rtc
->lock
);
242 tmp
= rtc
->periodic_freq
& PF_MASK
;
246 rtc
->periodic_freq
= 0x00;
249 rtc
->periodic_freq
= 0x60;
252 rtc
->periodic_freq
= 0x50;
255 rtc
->periodic_freq
= 0x40;
258 rtc
->periodic_freq
= 0x30 | PF_HP
;
261 rtc
->periodic_freq
= 0x30;
264 rtc
->periodic_freq
= 0x20 | PF_HP
;
267 rtc
->periodic_freq
= 0x20;
270 rtc
->periodic_freq
= 0x10 | PF_HP
;
273 rtc
->periodic_freq
= 0x10;
280 rtc
->periodic_freq
|= tmp
;
281 rtc
->rtc_dev
->irq_freq
= freq
;
284 spin_unlock_irq(&rtc
->lock
);
288 static inline void sh_rtc_setaie(struct device
*dev
, unsigned int enable
)
290 struct sh_rtc
*rtc
= dev_get_drvdata(dev
);
293 spin_lock_irq(&rtc
->lock
);
295 tmp
= readb(rtc
->regbase
+ RCR1
);
302 writeb(tmp
, rtc
->regbase
+ RCR1
);
304 spin_unlock_irq(&rtc
->lock
);
307 static int sh_rtc_proc(struct device
*dev
, struct seq_file
*seq
)
309 struct sh_rtc
*rtc
= dev_get_drvdata(dev
);
312 tmp
= readb(rtc
->regbase
+ RCR1
);
313 seq_printf(seq
, "carry_IRQ\t: %s\n", (tmp
& RCR1_CIE
) ? "yes" : "no");
315 tmp
= readb(rtc
->regbase
+ RCR2
);
316 seq_printf(seq
, "periodic_IRQ\t: %s\n",
317 (tmp
& RCR2_PESMASK
) ? "yes" : "no");
322 static inline void sh_rtc_setcie(struct device
*dev
, unsigned int enable
)
324 struct sh_rtc
*rtc
= dev_get_drvdata(dev
);
327 spin_lock_irq(&rtc
->lock
);
329 tmp
= readb(rtc
->regbase
+ RCR1
);
336 writeb(tmp
, rtc
->regbase
+ RCR1
);
338 spin_unlock_irq(&rtc
->lock
);
341 static int sh_rtc_ioctl(struct device
*dev
, unsigned int cmd
, unsigned long arg
)
343 struct sh_rtc
*rtc
= dev_get_drvdata(dev
);
344 unsigned int ret
= 0;
349 sh_rtc_setpie(dev
, cmd
== RTC_PIE_ON
);
353 sh_rtc_setaie(dev
, cmd
== RTC_AIE_ON
);
356 rtc
->periodic_freq
&= ~PF_OXS
;
357 sh_rtc_setcie(dev
, 0);
360 rtc
->periodic_freq
|= PF_OXS
;
361 sh_rtc_setcie(dev
, 1);
364 ret
= put_user(rtc
->rtc_dev
->irq_freq
,
365 (unsigned long __user
*)arg
);
368 ret
= sh_rtc_setfreq(dev
, arg
);
377 static int sh_rtc_read_time(struct device
*dev
, struct rtc_time
*tm
)
379 struct platform_device
*pdev
= to_platform_device(dev
);
380 struct sh_rtc
*rtc
= platform_get_drvdata(pdev
);
381 unsigned int sec128
, sec2
, yr
, yr100
, cf_bit
;
386 spin_lock_irq(&rtc
->lock
);
388 tmp
= readb(rtc
->regbase
+ RCR1
);
389 tmp
&= ~RCR1_CF
; /* Clear CF-bit */
391 writeb(tmp
, rtc
->regbase
+ RCR1
);
393 sec128
= readb(rtc
->regbase
+ R64CNT
);
395 tm
->tm_sec
= bcd2bin(readb(rtc
->regbase
+ RSECCNT
));
396 tm
->tm_min
= bcd2bin(readb(rtc
->regbase
+ RMINCNT
));
397 tm
->tm_hour
= bcd2bin(readb(rtc
->regbase
+ RHRCNT
));
398 tm
->tm_wday
= bcd2bin(readb(rtc
->regbase
+ RWKCNT
));
399 tm
->tm_mday
= bcd2bin(readb(rtc
->regbase
+ RDAYCNT
));
400 tm
->tm_mon
= bcd2bin(readb(rtc
->regbase
+ RMONCNT
)) - 1;
402 if (rtc
->capabilities
& RTC_CAP_4_DIGIT_YEAR
) {
403 yr
= readw(rtc
->regbase
+ RYRCNT
);
404 yr100
= bcd2bin(yr
>> 8);
407 yr
= readb(rtc
->regbase
+ RYRCNT
);
408 yr100
= bcd2bin((yr
== 0x99) ? 0x19 : 0x20);
411 tm
->tm_year
= (yr100
* 100 + bcd2bin(yr
)) - 1900;
413 sec2
= readb(rtc
->regbase
+ R64CNT
);
414 cf_bit
= readb(rtc
->regbase
+ RCR1
) & RCR1_CF
;
416 spin_unlock_irq(&rtc
->lock
);
417 } while (cf_bit
!= 0 || ((sec128
^ sec2
) & RTC_BIT_INVERTED
) != 0);
419 #if RTC_BIT_INVERTED != 0
420 if ((sec128
& RTC_BIT_INVERTED
))
424 /* only keep the carry interrupt enabled if UIE is on */
425 if (!(rtc
->periodic_freq
& PF_OXS
))
426 sh_rtc_setcie(dev
, 0);
428 dev_dbg(dev
, "%s: tm is secs=%d, mins=%d, hours=%d, "
429 "mday=%d, mon=%d, year=%d, wday=%d\n",
431 tm
->tm_sec
, tm
->tm_min
, tm
->tm_hour
,
432 tm
->tm_mday
, tm
->tm_mon
+ 1, tm
->tm_year
, tm
->tm_wday
);
434 return rtc_valid_tm(tm
);
437 static int sh_rtc_set_time(struct device
*dev
, struct rtc_time
*tm
)
439 struct platform_device
*pdev
= to_platform_device(dev
);
440 struct sh_rtc
*rtc
= platform_get_drvdata(pdev
);
444 spin_lock_irq(&rtc
->lock
);
446 /* Reset pre-scaler & stop RTC */
447 tmp
= readb(rtc
->regbase
+ RCR2
);
450 writeb(tmp
, rtc
->regbase
+ RCR2
);
452 writeb(bin2bcd(tm
->tm_sec
), rtc
->regbase
+ RSECCNT
);
453 writeb(bin2bcd(tm
->tm_min
), rtc
->regbase
+ RMINCNT
);
454 writeb(bin2bcd(tm
->tm_hour
), rtc
->regbase
+ RHRCNT
);
455 writeb(bin2bcd(tm
->tm_wday
), rtc
->regbase
+ RWKCNT
);
456 writeb(bin2bcd(tm
->tm_mday
), rtc
->regbase
+ RDAYCNT
);
457 writeb(bin2bcd(tm
->tm_mon
+ 1), rtc
->regbase
+ RMONCNT
);
459 if (rtc
->capabilities
& RTC_CAP_4_DIGIT_YEAR
) {
460 year
= (bin2bcd((tm
->tm_year
+ 1900) / 100) << 8) |
461 bin2bcd(tm
->tm_year
% 100);
462 writew(year
, rtc
->regbase
+ RYRCNT
);
464 year
= tm
->tm_year
% 100;
465 writeb(bin2bcd(year
), rtc
->regbase
+ RYRCNT
);
469 tmp
= readb(rtc
->regbase
+ RCR2
);
471 tmp
|= RCR2_RTCEN
| RCR2_START
;
472 writeb(tmp
, rtc
->regbase
+ RCR2
);
474 spin_unlock_irq(&rtc
->lock
);
479 static inline int sh_rtc_read_alarm_value(struct sh_rtc
*rtc
, int reg_off
)
482 int value
= 0xff; /* return 0xff for ignored values */
484 byte
= readb(rtc
->regbase
+ reg_off
);
486 byte
&= ~AR_ENB
; /* strip the enable bit */
487 value
= bcd2bin(byte
);
493 static int sh_rtc_read_alarm(struct device
*dev
, struct rtc_wkalrm
*wkalrm
)
495 struct platform_device
*pdev
= to_platform_device(dev
);
496 struct sh_rtc
*rtc
= platform_get_drvdata(pdev
);
497 struct rtc_time
*tm
= &wkalrm
->time
;
499 spin_lock_irq(&rtc
->lock
);
501 tm
->tm_sec
= sh_rtc_read_alarm_value(rtc
, RSECAR
);
502 tm
->tm_min
= sh_rtc_read_alarm_value(rtc
, RMINAR
);
503 tm
->tm_hour
= sh_rtc_read_alarm_value(rtc
, RHRAR
);
504 tm
->tm_wday
= sh_rtc_read_alarm_value(rtc
, RWKAR
);
505 tm
->tm_mday
= sh_rtc_read_alarm_value(rtc
, RDAYAR
);
506 tm
->tm_mon
= sh_rtc_read_alarm_value(rtc
, RMONAR
);
508 tm
->tm_mon
-= 1; /* RTC is 1-12, tm_mon is 0-11 */
509 tm
->tm_year
= 0xffff;
511 wkalrm
->enabled
= (readb(rtc
->regbase
+ RCR1
) & RCR1_AIE
) ? 1 : 0;
513 spin_unlock_irq(&rtc
->lock
);
518 static inline void sh_rtc_write_alarm_value(struct sh_rtc
*rtc
,
519 int value
, int reg_off
)
521 /* < 0 for a value that is ignored */
523 writeb(0, rtc
->regbase
+ reg_off
);
525 writeb(bin2bcd(value
) | AR_ENB
, rtc
->regbase
+ reg_off
);
528 static int sh_rtc_check_alarm(struct rtc_time
*tm
)
531 * The original rtc says anything > 0xc0 is "don't care" or "match
532 * all" - most users use 0xff but rtc-dev uses -1 for the same thing.
533 * The original rtc doesn't support years - some things use -1 and
534 * some 0xffff. We use -1 to make out tests easier.
536 if (tm
->tm_year
== 0xffff)
538 if (tm
->tm_mon
>= 0xff)
540 if (tm
->tm_mday
>= 0xff)
542 if (tm
->tm_wday
>= 0xff)
544 if (tm
->tm_hour
>= 0xff)
546 if (tm
->tm_min
>= 0xff)
548 if (tm
->tm_sec
>= 0xff)
551 if (tm
->tm_year
> 9999 ||
553 tm
->tm_mday
== 0 || tm
->tm_mday
>= 32 ||
563 static int sh_rtc_set_alarm(struct device
*dev
, struct rtc_wkalrm
*wkalrm
)
565 struct platform_device
*pdev
= to_platform_device(dev
);
566 struct sh_rtc
*rtc
= platform_get_drvdata(pdev
);
568 struct rtc_time
*tm
= &wkalrm
->time
;
571 err
= sh_rtc_check_alarm(tm
);
572 if (unlikely(err
< 0))
575 spin_lock_irq(&rtc
->lock
);
577 /* disable alarm interrupt and clear the alarm flag */
578 rcr1
= readb(rtc
->regbase
+ RCR1
);
579 rcr1
&= ~(RCR1_AF
| RCR1_AIE
);
580 writeb(rcr1
, rtc
->regbase
+ RCR1
);
583 sh_rtc_write_alarm_value(rtc
, tm
->tm_sec
, RSECAR
);
584 sh_rtc_write_alarm_value(rtc
, tm
->tm_min
, RMINAR
);
585 sh_rtc_write_alarm_value(rtc
, tm
->tm_hour
, RHRAR
);
586 sh_rtc_write_alarm_value(rtc
, tm
->tm_wday
, RWKAR
);
587 sh_rtc_write_alarm_value(rtc
, tm
->tm_mday
, RDAYAR
);
591 sh_rtc_write_alarm_value(rtc
, mon
, RMONAR
);
593 if (wkalrm
->enabled
) {
595 writeb(rcr1
, rtc
->regbase
+ RCR1
);
598 spin_unlock_irq(&rtc
->lock
);
603 static int sh_rtc_irq_set_state(struct device
*dev
, int enabled
)
605 struct platform_device
*pdev
= to_platform_device(dev
);
606 struct sh_rtc
*rtc
= platform_get_drvdata(pdev
);
609 rtc
->periodic_freq
|= PF_KOU
;
610 return sh_rtc_ioctl(dev
, RTC_PIE_ON
, 0);
612 rtc
->periodic_freq
&= ~PF_KOU
;
613 return sh_rtc_ioctl(dev
, RTC_PIE_OFF
, 0);
617 static int sh_rtc_irq_set_freq(struct device
*dev
, int freq
)
619 if (!is_power_of_2(freq
))
621 return sh_rtc_ioctl(dev
, RTC_IRQP_SET
, freq
);
624 static struct rtc_class_ops sh_rtc_ops
= {
625 .ioctl
= sh_rtc_ioctl
,
626 .read_time
= sh_rtc_read_time
,
627 .set_time
= sh_rtc_set_time
,
628 .read_alarm
= sh_rtc_read_alarm
,
629 .set_alarm
= sh_rtc_set_alarm
,
630 .irq_set_state
= sh_rtc_irq_set_state
,
631 .irq_set_freq
= sh_rtc_irq_set_freq
,
635 static int __devinit
sh_rtc_probe(struct platform_device
*pdev
)
638 struct resource
*res
;
642 rtc
= kzalloc(sizeof(struct sh_rtc
), GFP_KERNEL
);
646 spin_lock_init(&rtc
->lock
);
648 /* get periodic/carry/alarm irqs */
649 ret
= platform_get_irq(pdev
, 0);
650 if (unlikely(ret
<= 0)) {
652 dev_err(&pdev
->dev
, "No IRQ resource\n");
655 rtc
->periodic_irq
= ret
;
656 rtc
->carry_irq
= platform_get_irq(pdev
, 1);
657 rtc
->alarm_irq
= platform_get_irq(pdev
, 2);
659 res
= platform_get_resource(pdev
, IORESOURCE_IO
, 0);
660 if (unlikely(res
== NULL
)) {
662 dev_err(&pdev
->dev
, "No IO resource\n");
666 rtc
->regsize
= res
->end
- res
->start
+ 1;
668 rtc
->res
= request_mem_region(res
->start
, rtc
->regsize
, pdev
->name
);
669 if (unlikely(!rtc
->res
)) {
674 rtc
->regbase
= ioremap_nocache(rtc
->res
->start
, rtc
->regsize
);
675 if (unlikely(!rtc
->regbase
)) {
680 rtc
->rtc_dev
= rtc_device_register("sh", &pdev
->dev
,
681 &sh_rtc_ops
, THIS_MODULE
);
682 if (IS_ERR(rtc
->rtc_dev
)) {
683 ret
= PTR_ERR(rtc
->rtc_dev
);
687 rtc
->capabilities
= RTC_DEF_CAPABILITIES
;
688 if (pdev
->dev
.platform_data
) {
689 struct sh_rtc_platform_info
*pinfo
= pdev
->dev
.platform_data
;
692 * Some CPUs have special capabilities in addition to the
693 * default set. Add those in here.
695 rtc
->capabilities
|= pinfo
->capabilities
;
698 rtc
->rtc_dev
->max_user_freq
= 256;
700 platform_set_drvdata(pdev
, rtc
);
702 if (rtc
->carry_irq
<= 0) {
703 /* register shared periodic/carry/alarm irq */
704 ret
= request_irq(rtc
->periodic_irq
, sh_rtc_shared
,
705 IRQF_DISABLED
, "sh-rtc", rtc
);
708 "request IRQ failed with %d, IRQ %d\n", ret
,
713 /* register periodic/carry/alarm irqs */
714 ret
= request_irq(rtc
->periodic_irq
, sh_rtc_periodic
,
715 IRQF_DISABLED
, "sh-rtc period", rtc
);
718 "request period IRQ failed with %d, IRQ %d\n",
719 ret
, rtc
->periodic_irq
);
723 ret
= request_irq(rtc
->carry_irq
, sh_rtc_interrupt
,
724 IRQF_DISABLED
, "sh-rtc carry", rtc
);
727 "request carry IRQ failed with %d, IRQ %d\n",
728 ret
, rtc
->carry_irq
);
729 free_irq(rtc
->periodic_irq
, rtc
);
733 ret
= request_irq(rtc
->alarm_irq
, sh_rtc_alarm
,
734 IRQF_DISABLED
, "sh-rtc alarm", rtc
);
737 "request alarm IRQ failed with %d, IRQ %d\n",
738 ret
, rtc
->alarm_irq
);
739 free_irq(rtc
->carry_irq
, rtc
);
740 free_irq(rtc
->periodic_irq
, rtc
);
745 /* everything disabled by default */
746 rtc
->periodic_freq
= 0;
747 rtc
->rtc_dev
->irq_freq
= 0;
748 sh_rtc_setpie(&pdev
->dev
, 0);
749 sh_rtc_setaie(&pdev
->dev
, 0);
750 sh_rtc_setcie(&pdev
->dev
, 0);
752 /* reset rtc to epoch 0 if time is invalid */
753 if (rtc_read_time(rtc
->rtc_dev
, &r
) < 0) {
754 rtc_time_to_tm(0, &r
);
755 rtc_set_time(rtc
->rtc_dev
, &r
);
758 device_init_wakeup(&pdev
->dev
, 1);
762 iounmap(rtc
->regbase
);
764 release_resource(rtc
->res
);
771 static int __devexit
sh_rtc_remove(struct platform_device
*pdev
)
773 struct sh_rtc
*rtc
= platform_get_drvdata(pdev
);
775 if (likely(rtc
->rtc_dev
))
776 rtc_device_unregister(rtc
->rtc_dev
);
778 sh_rtc_setpie(&pdev
->dev
, 0);
779 sh_rtc_setaie(&pdev
->dev
, 0);
780 sh_rtc_setcie(&pdev
->dev
, 0);
782 free_irq(rtc
->periodic_irq
, rtc
);
783 if (rtc
->carry_irq
> 0) {
784 free_irq(rtc
->carry_irq
, rtc
);
785 free_irq(rtc
->alarm_irq
, rtc
);
788 release_resource(rtc
->res
);
790 iounmap(rtc
->regbase
);
792 platform_set_drvdata(pdev
, NULL
);
799 static void sh_rtc_set_irq_wake(struct device
*dev
, int enabled
)
801 struct platform_device
*pdev
= to_platform_device(dev
);
802 struct sh_rtc
*rtc
= platform_get_drvdata(pdev
);
804 set_irq_wake(rtc
->periodic_irq
, enabled
);
805 if (rtc
->carry_irq
> 0) {
806 set_irq_wake(rtc
->carry_irq
, enabled
);
807 set_irq_wake(rtc
->alarm_irq
, enabled
);
812 static int sh_rtc_suspend(struct device
*dev
)
814 if (device_may_wakeup(dev
))
815 sh_rtc_set_irq_wake(dev
, 1);
820 static int sh_rtc_resume(struct device
*dev
)
822 if (device_may_wakeup(dev
))
823 sh_rtc_set_irq_wake(dev
, 0);
828 static struct dev_pm_ops sh_rtc_dev_pm_ops
= {
829 .suspend
= sh_rtc_suspend
,
830 .resume
= sh_rtc_resume
,
833 static struct platform_driver sh_rtc_platform_driver
= {
836 .owner
= THIS_MODULE
,
837 .pm
= &sh_rtc_dev_pm_ops
,
839 .probe
= sh_rtc_probe
,
840 .remove
= __devexit_p(sh_rtc_remove
),
843 static int __init
sh_rtc_init(void)
845 return platform_driver_register(&sh_rtc_platform_driver
);
848 static void __exit
sh_rtc_exit(void)
850 platform_driver_unregister(&sh_rtc_platform_driver
);
853 module_init(sh_rtc_init
);
854 module_exit(sh_rtc_exit
);
856 MODULE_DESCRIPTION("SuperH on-chip RTC driver");
857 MODULE_VERSION(DRV_VERSION
);
858 MODULE_AUTHOR("Paul Mundt <lethal@linux-sh.org>, "
859 "Jamie Lenehan <lenehan@twibble.org>, "
860 "Angelo Castello <angelo.castello@st.com>");
861 MODULE_LICENSE("GPL");
862 MODULE_ALIAS("platform:" DRV_NAME
);