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docbook: fix fusion source files
[linux-2.6/mini2440.git] / drivers / message / fusion / mptbase.c
blob6b6df8679585dfae3715f327683a8f677e17eae8
1 /*
2 * linux/drivers/message/fusion/mptbase.c
3 * This is the Fusion MPT base driver which supports multiple
4 * (SCSI + LAN) specialized protocol drivers.
5 * For use with LSI PCI chip/adapter(s)
6 * running LSI Fusion MPT (Message Passing Technology) firmware.
7 *
8 * Copyright (c) 1999-2007 LSI Corporation
9 * (mailto:DL-MPTFusionLinux@lsi.com)
10 *
11 */
12 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
13 /*
14 This program is free software; you can redistribute it and/or modify
15 it under the terms of the GNU General Public License as published by
16 the Free Software Foundation; version 2 of the License.
17
18 This program is distributed in the hope that it will be useful,
19 but WITHOUT ANY WARRANTY; without even the implied warranty of
20 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 GNU General Public License for more details.
22
23 NO WARRANTY
24 THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
25 CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
26 LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
27 MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
28 solely responsible for determining the appropriateness of using and
29 distributing the Program and assumes all risks associated with its
30 exercise of rights under this Agreement, including but not limited to
31 the risks and costs of program errors, damage to or loss of data,
32 programs or equipment, and unavailability or interruption of operations.
33
34 DISCLAIMER OF LIABILITY
35 NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
36 DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
37 DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
38 ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
39 TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
40 USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
41 HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
42
43 You should have received a copy of the GNU General Public License
44 along with this program; if not, write to the Free Software
45 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
46 */
47 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
48
49 #include <linux/kernel.h>
50 #include <linux/module.h>
51 #include <linux/errno.h>
52 #include <linux/init.h>
53 #include <linux/slab.h>
54 #include <linux/types.h>
55 #include <linux/pci.h>
56 #include <linux/kdev_t.h>
57 #include <linux/blkdev.h>
58 #include <linux/delay.h>
59 #include <linux/interrupt.h> /* needed for in_interrupt() proto */
60 #include <linux/dma-mapping.h>
61 #include <asm/io.h>
62 #ifdef CONFIG_MTRR
63 #include <asm/mtrr.h>
64 #endif
65
66 #include "mptbase.h"
67 #include "lsi/mpi_log_fc.h"
68
69 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
70 #define my_NAME "Fusion MPT base driver"
71 #define my_VERSION MPT_LINUX_VERSION_COMMON
72 #define MYNAM "mptbase"
73
74 MODULE_AUTHOR(MODULEAUTHOR);
75 MODULE_DESCRIPTION(my_NAME);
76 MODULE_LICENSE("GPL");
77 MODULE_VERSION(my_VERSION);
78
79 /*
80 * cmd line parameters
81 */
82 static int mpt_msi_enable;
83 module_param(mpt_msi_enable, int, 0);
84 MODULE_PARM_DESC(mpt_msi_enable, " MSI Support Enable (default=0)");
85
86 static int mpt_channel_mapping;
87 module_param(mpt_channel_mapping, int, 0);
88 MODULE_PARM_DESC(mpt_channel_mapping, " Mapping id's to channels (default=0)");
89
90 static int mpt_debug_level;
91 static int mpt_set_debug_level(const char *val, struct kernel_param *kp);
92 module_param_call(mpt_debug_level, mpt_set_debug_level, param_get_int,
93 &mpt_debug_level, 0600);
94 MODULE_PARM_DESC(mpt_debug_level, " debug level - refer to mptdebug.h - (default=0)");
95
96 #ifdef MFCNT
97 static int mfcounter = 0;
98 #define PRINT_MF_COUNT 20000
99 #endif
100
101 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
102 /*
103 * Public data...
104 */
105
106 struct proc_dir_entry *mpt_proc_root_dir;
107
108 #define WHOINIT_UNKNOWN 0xAA
109
110 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
111 /*
112 * Private data...
113 */
114 /* Adapter link list */
115 LIST_HEAD(ioc_list);
116 /* Callback lookup table */
117 static MPT_CALLBACK MptCallbacks[MPT_MAX_PROTOCOL_DRIVERS];
118 /* Protocol driver class lookup table */
119 static int MptDriverClass[MPT_MAX_PROTOCOL_DRIVERS];
120 /* Event handler lookup table */
121 static MPT_EVHANDLER MptEvHandlers[MPT_MAX_PROTOCOL_DRIVERS];
122 /* Reset handler lookup table */
123 static MPT_RESETHANDLER MptResetHandlers[MPT_MAX_PROTOCOL_DRIVERS];
124 static struct mpt_pci_driver *MptDeviceDriverHandlers[MPT_MAX_PROTOCOL_DRIVERS];
125
126 static DECLARE_WAIT_QUEUE_HEAD(mpt_waitq);
127
128 /*
129 * Driver Callback Index's
130 */
131 static u8 mpt_base_index = MPT_MAX_PROTOCOL_DRIVERS;
132 static u8 last_drv_idx;
133
134 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
135 /*
136 * Forward protos...
137 */
138 static irqreturn_t mpt_interrupt(int irq, void *bus_id);
139 static int mpt_base_reply(MPT_ADAPTER *ioc, MPT_FRAME_HDR *req, MPT_FRAME_HDR *reply);
140 static int mpt_handshake_req_reply_wait(MPT_ADAPTER *ioc, int reqBytes,
141 u32 *req, int replyBytes, u16 *u16reply, int maxwait,
142 int sleepFlag);
143 static int mpt_do_ioc_recovery(MPT_ADAPTER *ioc, u32 reason, int sleepFlag);
144 static void mpt_detect_bound_ports(MPT_ADAPTER *ioc, struct pci_dev *pdev);
145 static void mpt_adapter_disable(MPT_ADAPTER *ioc);
146 static void mpt_adapter_dispose(MPT_ADAPTER *ioc);
147
148 static void MptDisplayIocCapabilities(MPT_ADAPTER *ioc);
149 static int MakeIocReady(MPT_ADAPTER *ioc, int force, int sleepFlag);
150 static int GetIocFacts(MPT_ADAPTER *ioc, int sleepFlag, int reason);
151 static int GetPortFacts(MPT_ADAPTER *ioc, int portnum, int sleepFlag);
152 static int SendIocInit(MPT_ADAPTER *ioc, int sleepFlag);
153 static int SendPortEnable(MPT_ADAPTER *ioc, int portnum, int sleepFlag);
154 static int mpt_do_upload(MPT_ADAPTER *ioc, int sleepFlag);
155 static int mpt_downloadboot(MPT_ADAPTER *ioc, MpiFwHeader_t *pFwHeader, int sleepFlag);
156 static int mpt_diag_reset(MPT_ADAPTER *ioc, int ignore, int sleepFlag);
157 static int KickStart(MPT_ADAPTER *ioc, int ignore, int sleepFlag);
158 static int SendIocReset(MPT_ADAPTER *ioc, u8 reset_type, int sleepFlag);
159 static int PrimeIocFifos(MPT_ADAPTER *ioc);
160 static int WaitForDoorbellAck(MPT_ADAPTER *ioc, int howlong, int sleepFlag);
161 static int WaitForDoorbellInt(MPT_ADAPTER *ioc, int howlong, int sleepFlag);
162 static int WaitForDoorbellReply(MPT_ADAPTER *ioc, int howlong, int sleepFlag);
163 static int GetLanConfigPages(MPT_ADAPTER *ioc);
164 static int GetIoUnitPage2(MPT_ADAPTER *ioc);
165 int mptbase_sas_persist_operation(MPT_ADAPTER *ioc, u8 persist_opcode);
166 static int mpt_GetScsiPortSettings(MPT_ADAPTER *ioc, int portnum);
167 static int mpt_readScsiDevicePageHeaders(MPT_ADAPTER *ioc, int portnum);
168 static void mpt_read_ioc_pg_1(MPT_ADAPTER *ioc);
169 static void mpt_read_ioc_pg_4(MPT_ADAPTER *ioc);
170 static void mpt_timer_expired(unsigned long data);
171 static void mpt_get_manufacturing_pg_0(MPT_ADAPTER *ioc);
172 static int SendEventNotification(MPT_ADAPTER *ioc, u8 EvSwitch);
173 static int SendEventAck(MPT_ADAPTER *ioc, EventNotificationReply_t *evnp);
174 static int mpt_host_page_access_control(MPT_ADAPTER *ioc, u8 access_control_value, int sleepFlag);
175 static int mpt_host_page_alloc(MPT_ADAPTER *ioc, pIOCInit_t ioc_init);
176
177 #ifdef CONFIG_PROC_FS
178 static int procmpt_summary_read(char *buf, char **start, off_t offset,
179 int request, int *eof, void *data);
180 static int procmpt_version_read(char *buf, char **start, off_t offset,
181 int request, int *eof, void *data);
182 static int procmpt_iocinfo_read(char *buf, char **start, off_t offset,
183 int request, int *eof, void *data);
184 #endif
185 static void mpt_get_fw_exp_ver(char *buf, MPT_ADAPTER *ioc);
186
187 //int mpt_HardResetHandler(MPT_ADAPTER *ioc, int sleepFlag);
188 static int ProcessEventNotification(MPT_ADAPTER *ioc, EventNotificationReply_t *evReply, int *evHandlers);
189 static void mpt_iocstatus_info(MPT_ADAPTER *ioc, u32 ioc_status, MPT_FRAME_HDR *mf);
190 static void mpt_fc_log_info(MPT_ADAPTER *ioc, u32 log_info);
191 static void mpt_spi_log_info(MPT_ADAPTER *ioc, u32 log_info);
192 static void mpt_sas_log_info(MPT_ADAPTER *ioc, u32 log_info);
193 static int mpt_read_ioc_pg_3(MPT_ADAPTER *ioc);
194 static void mpt_inactive_raid_list_free(MPT_ADAPTER *ioc);
195
196 /* module entry point */
197 static int __init fusion_init (void);
198 static void __exit fusion_exit (void);
199
200 #define CHIPREG_READ32(addr) readl_relaxed(addr)
201 #define CHIPREG_READ32_dmasync(addr) readl(addr)
202 #define CHIPREG_WRITE32(addr,val) writel(val, addr)
203 #define CHIPREG_PIO_WRITE32(addr,val) outl(val, (unsigned long)addr)
204 #define CHIPREG_PIO_READ32(addr) inl((unsigned long)addr)
205
206 static void
207 pci_disable_io_access(struct pci_dev *pdev)
208 {
209 u16 command_reg;
210
211 pci_read_config_word(pdev, PCI_COMMAND, &command_reg);
212 command_reg &= ~1;
213 pci_write_config_word(pdev, PCI_COMMAND, command_reg);
214 }
215
216 static void
217 pci_enable_io_access(struct pci_dev *pdev)
218 {
219 u16 command_reg;
220
221 pci_read_config_word(pdev, PCI_COMMAND, &command_reg);
222 command_reg |= 1;
223 pci_write_config_word(pdev, PCI_COMMAND, command_reg);
224 }
225
226 static int mpt_set_debug_level(const char *val, struct kernel_param *kp)
227 {
228 int ret = param_set_int(val, kp);
229 MPT_ADAPTER *ioc;
230
231 if (ret)
232 return ret;
233
234 list_for_each_entry(ioc, &ioc_list, list)
235 ioc->debug_level = mpt_debug_level;
236 return 0;
237 }
238
239 /**
240 * mpt_get_cb_idx - obtain cb_idx for registered driver
241 * @dclass: class driver enum
242 *
243 * Returns cb_idx, or zero means it wasn't found
244 **/
245 static u8
246 mpt_get_cb_idx(MPT_DRIVER_CLASS dclass)
247 {
248 u8 cb_idx;
249
250 for (cb_idx = MPT_MAX_PROTOCOL_DRIVERS-1; cb_idx; cb_idx--)
251 if (MptDriverClass[cb_idx] == dclass)
252 return cb_idx;
253 return 0;
254 }
255
256 /*
257 * Process turbo (context) reply...
258 */
259 static void
260 mpt_turbo_reply(MPT_ADAPTER *ioc, u32 pa)
261 {
262 MPT_FRAME_HDR *mf = NULL;
263 MPT_FRAME_HDR *mr = NULL;
264 u16 req_idx = 0;
265 u8 cb_idx;
266
267 dmfprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Got TURBO reply req_idx=%08x\n",
268 ioc->name, pa));
269
270 switch (pa >> MPI_CONTEXT_REPLY_TYPE_SHIFT) {
271 case MPI_CONTEXT_REPLY_TYPE_SCSI_INIT:
272 req_idx = pa & 0x0000FFFF;
273 cb_idx = (pa & 0x00FF0000) >> 16;
274 mf = MPT_INDEX_2_MFPTR(ioc, req_idx);
275 break;
276 case MPI_CONTEXT_REPLY_TYPE_LAN:
277 cb_idx = mpt_get_cb_idx(MPTLAN_DRIVER);
278 /*
279 * Blind set of mf to NULL here was fatal
280 * after lan_reply says "freeme"
281 * Fix sort of combined with an optimization here;
282 * added explicit check for case where lan_reply
283 * was just returning 1 and doing nothing else.
284 * For this case skip the callback, but set up
285 * proper mf value first here:-)
286 */
287 if ((pa & 0x58000000) == 0x58000000) {
288 req_idx = pa & 0x0000FFFF;
289 mf = MPT_INDEX_2_MFPTR(ioc, req_idx);
290 mpt_free_msg_frame(ioc, mf);
291 mb();
292 return;
293 break;
294 }
295 mr = (MPT_FRAME_HDR *) CAST_U32_TO_PTR(pa);
296 break;
297 case MPI_CONTEXT_REPLY_TYPE_SCSI_TARGET:
298 cb_idx = mpt_get_cb_idx(MPTSTM_DRIVER);
299 mr = (MPT_FRAME_HDR *) CAST_U32_TO_PTR(pa);
300 break;
301 default:
302 cb_idx = 0;
303 BUG();
304 }
305
306 /* Check for (valid) IO callback! */
307 if (!cb_idx || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS ||
308 MptCallbacks[cb_idx] == NULL) {
309 printk(MYIOC_s_WARN_FMT "%s: Invalid cb_idx (%d)!\n",
310 __FUNCTION__, ioc->name, cb_idx);
311 goto out;
312 }
313
314 if (MptCallbacks[cb_idx](ioc, mf, mr))
315 mpt_free_msg_frame(ioc, mf);
316 out:
317 mb();
318 }
319
320 static void
321 mpt_reply(MPT_ADAPTER *ioc, u32 pa)
322 {
323 MPT_FRAME_HDR *mf;
324 MPT_FRAME_HDR *mr;
325 u16 req_idx;
326 u8 cb_idx;
327 int freeme;
328
329 u32 reply_dma_low;
330 u16 ioc_stat;
331
332 /* non-TURBO reply! Hmmm, something may be up...
333 * Newest turbo reply mechanism; get address
334 * via left shift 1 (get rid of MPI_ADDRESS_REPLY_A_BIT)!
335 */
336
337 /* Map DMA address of reply header to cpu address.
338 * pa is 32 bits - but the dma address may be 32 or 64 bits
339 * get offset based only only the low addresses
340 */
341
342 reply_dma_low = (pa <<= 1);
343 mr = (MPT_FRAME_HDR *)((u8 *)ioc->reply_frames +
344 (reply_dma_low - ioc->reply_frames_low_dma));
345
346 req_idx = le16_to_cpu(mr->u.frame.hwhdr.msgctxu.fld.req_idx);
347 cb_idx = mr->u.frame.hwhdr.msgctxu.fld.cb_idx;
348 mf = MPT_INDEX_2_MFPTR(ioc, req_idx);
349
350 dmfprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Got non-TURBO reply=%p req_idx=%x cb_idx=%x Function=%x\n",
351 ioc->name, mr, req_idx, cb_idx, mr->u.hdr.Function));
352 DBG_DUMP_REPLY_FRAME(ioc, (u32 *)mr);
353
354 /* Check/log IOC log info
355 */
356 ioc_stat = le16_to_cpu(mr->u.reply.IOCStatus);
357 if (ioc_stat & MPI_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE) {
358 u32 log_info = le32_to_cpu(mr->u.reply.IOCLogInfo);
359 if (ioc->bus_type == FC)
360 mpt_fc_log_info(ioc, log_info);
361 else if (ioc->bus_type == SPI)
362 mpt_spi_log_info(ioc, log_info);
363 else if (ioc->bus_type == SAS)
364 mpt_sas_log_info(ioc, log_info);
365 }
366
367 if (ioc_stat & MPI_IOCSTATUS_MASK)
368 mpt_iocstatus_info(ioc, (u32)ioc_stat, mf);
369
370 /* Check for (valid) IO callback! */
371 if (!cb_idx || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS ||
372 MptCallbacks[cb_idx] == NULL) {
373 printk(MYIOC_s_WARN_FMT "%s: Invalid cb_idx (%d)!\n",
374 __FUNCTION__, ioc->name, cb_idx);
375 freeme = 0;
376 goto out;
377 }
378
379 freeme = MptCallbacks[cb_idx](ioc, mf, mr);
380
381 out:
382 /* Flush (non-TURBO) reply with a WRITE! */
383 CHIPREG_WRITE32(&ioc->chip->ReplyFifo, pa);
384
385 if (freeme)
386 mpt_free_msg_frame(ioc, mf);
387 mb();
388 }
389
390 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
391 /**
392 * mpt_interrupt - MPT adapter (IOC) specific interrupt handler.
393 * @irq: irq number (not used)
394 * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure
395 *
396 * This routine is registered via the request_irq() kernel API call,
397 * and handles all interrupts generated from a specific MPT adapter
398 * (also referred to as a IO Controller or IOC).
399 * This routine must clear the interrupt from the adapter and does
400 * so by reading the reply FIFO. Multiple replies may be processed
401 * per single call to this routine.
402 *
403 * This routine handles register-level access of the adapter but
404 * dispatches (calls) a protocol-specific callback routine to handle
405 * the protocol-specific details of the MPT request completion.
406 */
407 static irqreturn_t
408 mpt_interrupt(int irq, void *bus_id)
409 {
410 MPT_ADAPTER *ioc = bus_id;
411 u32 pa = CHIPREG_READ32_dmasync(&ioc->chip->ReplyFifo);
412
413 if (pa == 0xFFFFFFFF)
414 return IRQ_NONE;
415
416 /*
417 * Drain the reply FIFO!
418 */
419 do {
420 if (pa & MPI_ADDRESS_REPLY_A_BIT)
421 mpt_reply(ioc, pa);
422 else
423 mpt_turbo_reply(ioc, pa);
424 pa = CHIPREG_READ32_dmasync(&ioc->chip->ReplyFifo);
425 } while (pa != 0xFFFFFFFF);
426
427 return IRQ_HANDLED;
428 }
429
430 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
431 /**
432 * mpt_base_reply - MPT base driver's callback routine
433 * @ioc: Pointer to MPT_ADAPTER structure
434 * @mf: Pointer to original MPT request frame
435 * @reply: Pointer to MPT reply frame (NULL if TurboReply)
436 *
437 * MPT base driver's callback routine; all base driver
438 * "internal" request/reply processing is routed here.
439 * Currently used for EventNotification and EventAck handling.
440 *
441 * Returns 1 indicating original alloc'd request frame ptr
442 * should be freed, or 0 if it shouldn't.
443 */
444 static int
445 mpt_base_reply(MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf, MPT_FRAME_HDR *reply)
446 {
447 int freereq = 1;
448 u8 func;
449
450 dmfprintk(ioc, printk(MYIOC_s_DEBUG_FMT "mpt_base_reply() called\n", ioc->name));
451 #ifdef CONFIG_FUSION_LOGGING
452 if ((ioc->debug_level & MPT_DEBUG_MSG_FRAME) &&
453 !(reply->u.hdr.MsgFlags & MPI_MSGFLAGS_CONTINUATION_REPLY)) {
454 dmfprintk(ioc, printk(MYIOC_s_INFO_FMT ": Original request frame (@%p) header\n",
455 ioc->name, mf));
456 DBG_DUMP_REQUEST_FRAME_HDR(ioc, (u32 *)mf);
457 }
458 #endif
459
460 func = reply->u.hdr.Function;
461 dmfprintk(ioc, printk(MYIOC_s_DEBUG_FMT "mpt_base_reply, Function=%02Xh\n",
462 ioc->name, func));
463
464 if (func == MPI_FUNCTION_EVENT_NOTIFICATION) {
465 EventNotificationReply_t *pEvReply = (EventNotificationReply_t *) reply;
466 int evHandlers = 0;
467 int results;
468
469 results = ProcessEventNotification(ioc, pEvReply, &evHandlers);
470 if (results != evHandlers) {
471 /* CHECKME! Any special handling needed here? */
472 devtverboseprintk(ioc, printk(MYIOC_s_WARN_FMT "Called %d event handlers, sum results = %d\n",
473 ioc->name, evHandlers, results));
474 }
475
476 /*
477 * Hmmm... It seems that EventNotificationReply is an exception
478 * to the rule of one reply per request.
479 */
480 if (pEvReply->MsgFlags & MPI_MSGFLAGS_CONTINUATION_REPLY) {
481 freereq = 0;
482 } else {
483 devtverboseprintk(ioc, printk(MYIOC_s_WARN_FMT "EVENT_NOTIFICATION reply %p returns Request frame\n",
484 ioc->name, pEvReply));
485 }
486
487 #ifdef CONFIG_PROC_FS
488 // LogEvent(ioc, pEvReply);
489 #endif
490
491 } else if (func == MPI_FUNCTION_EVENT_ACK) {
492 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "mpt_base_reply, EventAck reply received\n",
493 ioc->name));
494 } else if (func == MPI_FUNCTION_CONFIG) {
495 CONFIGPARMS *pCfg;
496 unsigned long flags;
497
498 dcprintk(ioc, printk(MYIOC_s_DEBUG_FMT "config_complete (mf=%p,mr=%p)\n",
499 ioc->name, mf, reply));
500
501 pCfg = * ((CONFIGPARMS **)((u8 *) mf + ioc->req_sz - sizeof(void *)));
502
503 if (pCfg) {
504 /* disable timer and remove from linked list */
505 del_timer(&pCfg->timer);
506
507 spin_lock_irqsave(&ioc->FreeQlock, flags);
508 list_del(&pCfg->linkage);
509 spin_unlock_irqrestore(&ioc->FreeQlock, flags);
510
511 /*
512 * If IOC Status is SUCCESS, save the header
513 * and set the status code to GOOD.
514 */
515 pCfg->status = MPT_CONFIG_ERROR;
516 if (reply) {
517 ConfigReply_t *pReply = (ConfigReply_t *)reply;
518 u16 status;
519
520 status = le16_to_cpu(pReply->IOCStatus) & MPI_IOCSTATUS_MASK;
521 dcprintk(ioc, printk(MYIOC_s_NOTE_FMT " IOCStatus=%04xh, IOCLogInfo=%08xh\n",
522 ioc->name, status, le32_to_cpu(pReply->IOCLogInfo)));
523
524 pCfg->status = status;
525 if (status == MPI_IOCSTATUS_SUCCESS) {
526 if ((pReply->Header.PageType &
527 MPI_CONFIG_PAGETYPE_MASK) ==
528 MPI_CONFIG_PAGETYPE_EXTENDED) {
529 pCfg->cfghdr.ehdr->ExtPageLength =
530 le16_to_cpu(pReply->ExtPageLength);
531 pCfg->cfghdr.ehdr->ExtPageType =
532 pReply->ExtPageType;
533 }
534 pCfg->cfghdr.hdr->PageVersion = pReply->Header.PageVersion;
535
536 /* If this is a regular header, save PageLength. */
537 /* LMP Do this better so not using a reserved field! */
538 pCfg->cfghdr.hdr->PageLength = pReply->Header.PageLength;
539 pCfg->cfghdr.hdr->PageNumber = pReply->Header.PageNumber;
540 pCfg->cfghdr.hdr->PageType = pReply->Header.PageType;
541 }
542 }
543
544 /*
545 * Wake up the original calling thread
546 */
547 pCfg->wait_done = 1;
548 wake_up(&mpt_waitq);
549 }
550 } else if (func == MPI_FUNCTION_SAS_IO_UNIT_CONTROL) {
551 /* we should be always getting a reply frame */
552 memcpy(ioc->persist_reply_frame, reply,
553 min(MPT_DEFAULT_FRAME_SIZE,
554 4*reply->u.reply.MsgLength));
555 del_timer(&ioc->persist_timer);
556 ioc->persist_wait_done = 1;
557 wake_up(&mpt_waitq);
558 } else {
559 printk(MYIOC_s_ERR_FMT "Unexpected msg function (=%02Xh) reply received!\n",
560 ioc->name, func);
561 }
562
563 /*
564 * Conditionally tell caller to free the original
565 * EventNotification/EventAck/unexpected request frame!
566 */
567 return freereq;
568 }
569
570 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
571 /**
572 * mpt_register - Register protocol-specific main callback handler.
573 * @cbfunc: callback function pointer
574 * @dclass: Protocol driver's class (%MPT_DRIVER_CLASS enum value)
575 *
576 * This routine is called by a protocol-specific driver (SCSI host,
577 * LAN, SCSI target) to register its reply callback routine. Each
578 * protocol-specific driver must do this before it will be able to
579 * use any IOC resources, such as obtaining request frames.
580 *
581 * NOTES: The SCSI protocol driver currently calls this routine thrice
582 * in order to register separate callbacks; one for "normal" SCSI IO;
583 * one for MptScsiTaskMgmt requests; one for Scan/DV requests.
584 *
585 * Returns u8 valued "handle" in the range (and S.O.D. order)
586 * {N,...,7,6,5,...,1} if successful.
587 * A return value of MPT_MAX_PROTOCOL_DRIVERS (including zero!) should be
588 * considered an error by the caller.
589 */
590 u8
591 mpt_register(MPT_CALLBACK cbfunc, MPT_DRIVER_CLASS dclass)
592 {
593 u8 cb_idx;
594 last_drv_idx = MPT_MAX_PROTOCOL_DRIVERS;
595
596 /*
597 * Search for empty callback slot in this order: {N,...,7,6,5,...,1}
598 * (slot/handle 0 is reserved!)
599 */
600 for (cb_idx = MPT_MAX_PROTOCOL_DRIVERS-1; cb_idx; cb_idx--) {
601 if (MptCallbacks[cb_idx] == NULL) {
602 MptCallbacks[cb_idx] = cbfunc;
603 MptDriverClass[cb_idx] = dclass;
604 MptEvHandlers[cb_idx] = NULL;
605 last_drv_idx = cb_idx;
606 break;
607 }
608 }
609
610 return last_drv_idx;
611 }
612
613 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
614 /**
615 * mpt_deregister - Deregister a protocol drivers resources.
616 * @cb_idx: previously registered callback handle
617 *
618 * Each protocol-specific driver should call this routine when its
619 * module is unloaded.
620 */
621 void
622 mpt_deregister(u8 cb_idx)
623 {
624 if (cb_idx && (cb_idx < MPT_MAX_PROTOCOL_DRIVERS)) {
625 MptCallbacks[cb_idx] = NULL;
626 MptDriverClass[cb_idx] = MPTUNKNOWN_DRIVER;
627 MptEvHandlers[cb_idx] = NULL;
628
629 last_drv_idx++;
630 }
631 }
632
633 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
634 /**
635 * mpt_event_register - Register protocol-specific event callback handler.
636 * @cb_idx: previously registered (via mpt_register) callback handle
637 * @ev_cbfunc: callback function
638 *
639 * This routine can be called by one or more protocol-specific drivers
640 * if/when they choose to be notified of MPT events.
641 *
642 * Returns 0 for success.
643 */
644 int
645 mpt_event_register(u8 cb_idx, MPT_EVHANDLER ev_cbfunc)
646 {
647 if (!cb_idx || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
648 return -1;
649
650 MptEvHandlers[cb_idx] = ev_cbfunc;
651 return 0;
652 }
653
654 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
655 /**
656 * mpt_event_deregister - Deregister protocol-specific event callback handler
657 * @cb_idx: previously registered callback handle
658 *
659 * Each protocol-specific driver should call this routine
660 * when it does not (or can no longer) handle events,
661 * or when its module is unloaded.
662 */
663 void
664 mpt_event_deregister(u8 cb_idx)
665 {
666 if (!cb_idx || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
667 return;
668
669 MptEvHandlers[cb_idx] = NULL;
670 }
671
672 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
673 /**
674 * mpt_reset_register - Register protocol-specific IOC reset handler.
675 * @cb_idx: previously registered (via mpt_register) callback handle
676 * @reset_func: reset function
677 *
678 * This routine can be called by one or more protocol-specific drivers
679 * if/when they choose to be notified of IOC resets.
680 *
681 * Returns 0 for success.
682 */
683 int
684 mpt_reset_register(u8 cb_idx, MPT_RESETHANDLER reset_func)
685 {
686 if (!cb_idx || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
687 return -1;
688
689 MptResetHandlers[cb_idx] = reset_func;
690 return 0;
691 }
692
693 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
694 /**
695 * mpt_reset_deregister - Deregister protocol-specific IOC reset handler.
696 * @cb_idx: previously registered callback handle
697 *
698 * Each protocol-specific driver should call this routine
699 * when it does not (or can no longer) handle IOC reset handling,
700 * or when its module is unloaded.
701 */
702 void
703 mpt_reset_deregister(u8 cb_idx)
704 {
705 if (!cb_idx || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
706 return;
707
708 MptResetHandlers[cb_idx] = NULL;
709 }
710
711 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
712 /**
713 * mpt_device_driver_register - Register device driver hooks
714 * @dd_cbfunc: driver callbacks struct
715 * @cb_idx: MPT protocol driver index
716 */
717 int
718 mpt_device_driver_register(struct mpt_pci_driver * dd_cbfunc, u8 cb_idx)
719 {
720 MPT_ADAPTER *ioc;
721 const struct pci_device_id *id;
722
723 if (!cb_idx || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
724 return -EINVAL;
725
726 MptDeviceDriverHandlers[cb_idx] = dd_cbfunc;
727
728 /* call per pci device probe entry point */
729 list_for_each_entry(ioc, &ioc_list, list) {
730 id = ioc->pcidev->driver ?
731 ioc->pcidev->driver->id_table : NULL;
732 if (dd_cbfunc->probe)
733 dd_cbfunc->probe(ioc->pcidev, id);
734 }
735
736 return 0;
737 }
738
739 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
740 /**
741 * mpt_device_driver_deregister - DeRegister device driver hooks
742 * @cb_idx: MPT protocol driver index
743 */
744 void
745 mpt_device_driver_deregister(u8 cb_idx)
746 {
747 struct mpt_pci_driver *dd_cbfunc;
748 MPT_ADAPTER *ioc;
749
750 if (!cb_idx || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
751 return;
752
753 dd_cbfunc = MptDeviceDriverHandlers[cb_idx];
754
755 list_for_each_entry(ioc, &ioc_list, list) {
756 if (dd_cbfunc->remove)
757 dd_cbfunc->remove(ioc->pcidev);
758 }
759
760 MptDeviceDriverHandlers[cb_idx] = NULL;
761 }
762
763
764 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
765 /**
766 * mpt_get_msg_frame - Obtain an MPT request frame from the pool
767 * @cb_idx: Handle of registered MPT protocol driver
768 * @ioc: Pointer to MPT adapter structure
769 *
770 * Obtain an MPT request frame from the pool (of 1024) that are
771 * allocated per MPT adapter.
772 *
773 * Returns pointer to a MPT request frame or %NULL if none are available
774 * or IOC is not active.
775 */
776 MPT_FRAME_HDR*
777 mpt_get_msg_frame(u8 cb_idx, MPT_ADAPTER *ioc)
778 {
779 MPT_FRAME_HDR *mf;
780 unsigned long flags;
781 u16 req_idx; /* Request index */
782
783 /* validate handle and ioc identifier */
784
785 #ifdef MFCNT
786 if (!ioc->active)
787 printk(MYIOC_s_WARN_FMT "IOC Not Active! mpt_get_msg_frame "
788 "returning NULL!\n", ioc->name);
789 #endif
790
791 /* If interrupts are not attached, do not return a request frame */
792 if (!ioc->active)
793 return NULL;
794
795 spin_lock_irqsave(&ioc->FreeQlock, flags);
796 if (!list_empty(&ioc->FreeQ)) {
797 int req_offset;
798
799 mf = list_entry(ioc->FreeQ.next, MPT_FRAME_HDR,
800 u.frame.linkage.list);
801 list_del(&mf->u.frame.linkage.list);
802 mf->u.frame.linkage.arg1 = 0;
803 mf->u.frame.hwhdr.msgctxu.fld.cb_idx = cb_idx; /* byte */
804 req_offset = (u8 *)mf - (u8 *)ioc->req_frames;
805 /* u16! */
806 req_idx = req_offset / ioc->req_sz;
807 mf->u.frame.hwhdr.msgctxu.fld.req_idx = cpu_to_le16(req_idx);
808 mf->u.frame.hwhdr.msgctxu.fld.rsvd = 0;
809 /* Default, will be changed if necessary in SG generation */
810 ioc->RequestNB[req_idx] = ioc->NB_for_64_byte_frame;
811 #ifdef MFCNT
812 ioc->mfcnt++;
813 #endif
814 }
815 else
816 mf = NULL;
817 spin_unlock_irqrestore(&ioc->FreeQlock, flags);
818
819 #ifdef MFCNT
820 if (mf == NULL)
821 printk(MYIOC_s_WARN_FMT "IOC Active. No free Msg Frames! "
822 "Count 0x%x Max 0x%x\n", ioc->name, ioc->mfcnt,
823 ioc->req_depth);
824 mfcounter++;
825 if (mfcounter == PRINT_MF_COUNT)
826 printk(MYIOC_s_INFO_FMT "MF Count 0x%x Max 0x%x \n", ioc->name,
827 ioc->mfcnt, ioc->req_depth);
828 #endif
829
830 dmfprintk(ioc, printk(MYIOC_s_DEBUG_FMT "mpt_get_msg_frame(%d,%d), got mf=%p\n",
831 ioc->name, cb_idx, ioc->id, mf));
832 return mf;
833 }
834
835 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
836 /**
837 * mpt_put_msg_frame - Send a protocol-specific MPT request frame to an IOC
838 * @cb_idx: Handle of registered MPT protocol driver
839 * @ioc: Pointer to MPT adapter structure
840 * @mf: Pointer to MPT request frame
841 *
842 * This routine posts an MPT request frame to the request post FIFO of a
843 * specific MPT adapter.
844 */
845 void
846 mpt_put_msg_frame(u8 cb_idx, MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf)
847 {
848 u32 mf_dma_addr;
849 int req_offset;
850 u16 req_idx; /* Request index */
851
852 /* ensure values are reset properly! */
853 mf->u.frame.hwhdr.msgctxu.fld.cb_idx = cb_idx; /* byte */
854 req_offset = (u8 *)mf - (u8 *)ioc->req_frames;
855 /* u16! */
856 req_idx = req_offset / ioc->req_sz;
857 mf->u.frame.hwhdr.msgctxu.fld.req_idx = cpu_to_le16(req_idx);
858 mf->u.frame.hwhdr.msgctxu.fld.rsvd = 0;
859
860 DBG_DUMP_PUT_MSG_FRAME(ioc, (u32 *)mf);
861
862 mf_dma_addr = (ioc->req_frames_low_dma + req_offset) | ioc->RequestNB[req_idx];
863 dsgprintk(ioc, printk(MYIOC_s_DEBUG_FMT "mf_dma_addr=%x req_idx=%d "
864 "RequestNB=%x\n", ioc->name, mf_dma_addr, req_idx,
865 ioc->RequestNB[req_idx]));
866 CHIPREG_WRITE32(&ioc->chip->RequestFifo, mf_dma_addr);
867 }
868
869 /**
870 * mpt_put_msg_frame_hi_pri - Send a hi-pri protocol-specific MPT request frame
871 * @cb_idx: Handle of registered MPT protocol driver
872 * @ioc: Pointer to MPT adapter structure
873 * @mf: Pointer to MPT request frame
874 *
875 * Send a protocol-specific MPT request frame to an IOC using
876 * hi-priority request queue.
877 *
878 * This routine posts an MPT request frame to the request post FIFO of a
879 * specific MPT adapter.
880 **/
881 void
882 mpt_put_msg_frame_hi_pri(u8 cb_idx, MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf)
883 {
884 u32 mf_dma_addr;
885 int req_offset;
886 u16 req_idx; /* Request index */
887
888 /* ensure values are reset properly! */
889 mf->u.frame.hwhdr.msgctxu.fld.cb_idx = cb_idx;
890 req_offset = (u8 *)mf - (u8 *)ioc->req_frames;
891 req_idx = req_offset / ioc->req_sz;
892 mf->u.frame.hwhdr.msgctxu.fld.req_idx = cpu_to_le16(req_idx);
893 mf->u.frame.hwhdr.msgctxu.fld.rsvd = 0;
894
895 DBG_DUMP_PUT_MSG_FRAME(ioc, (u32 *)mf);
896
897 mf_dma_addr = (ioc->req_frames_low_dma + req_offset);
898 dsgprintk(ioc, printk(MYIOC_s_DEBUG_FMT "mf_dma_addr=%x req_idx=%d\n",
899 ioc->name, mf_dma_addr, req_idx));
900 CHIPREG_WRITE32(&ioc->chip->RequestHiPriFifo, mf_dma_addr);
901 }
902
903 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
904 /**
905 * mpt_free_msg_frame - Place MPT request frame back on FreeQ.
906 * @handle: Handle of registered MPT protocol driver
907 * @ioc: Pointer to MPT adapter structure
908 * @mf: Pointer to MPT request frame
909 *
910 * This routine places a MPT request frame back on the MPT adapter's
911 * FreeQ.
912 */
913 void
914 mpt_free_msg_frame(MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf)
915 {
916 unsigned long flags;
917
918 /* Put Request back on FreeQ! */
919 spin_lock_irqsave(&ioc->FreeQlock, flags);
920 mf->u.frame.linkage.arg1 = 0xdeadbeaf; /* signature to know if this mf is freed */
921 list_add_tail(&mf->u.frame.linkage.list, &ioc->FreeQ);
922 #ifdef MFCNT
923 ioc->mfcnt--;
924 #endif
925 spin_unlock_irqrestore(&ioc->FreeQlock, flags);
926 }
927
928 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
929 /**
930 * mpt_add_sge - Place a simple SGE at address pAddr.
931 * @pAddr: virtual address for SGE
932 * @flagslength: SGE flags and data transfer length
933 * @dma_addr: Physical address
934 *
935 * This routine places a MPT request frame back on the MPT adapter's
936 * FreeQ.
937 */
938 void
939 mpt_add_sge(char *pAddr, u32 flagslength, dma_addr_t dma_addr)
940 {
941 if (sizeof(dma_addr_t) == sizeof(u64)) {
942 SGESimple64_t *pSge = (SGESimple64_t *) pAddr;
943 u32 tmp = dma_addr & 0xFFFFFFFF;
944
945 pSge->FlagsLength = cpu_to_le32(flagslength);
946 pSge->Address.Low = cpu_to_le32(tmp);
947 tmp = (u32) ((u64)dma_addr >> 32);
948 pSge->Address.High = cpu_to_le32(tmp);
949
950 } else {
951 SGESimple32_t *pSge = (SGESimple32_t *) pAddr;
952 pSge->FlagsLength = cpu_to_le32(flagslength);
953 pSge->Address = cpu_to_le32(dma_addr);
954 }
955 }
956
957 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
958 /**
959 * mpt_send_handshake_request - Send MPT request via doorbell handshake method.
960 * @cb_idx: Handle of registered MPT protocol driver
961 * @ioc: Pointer to MPT adapter structure
962 * @reqBytes: Size of the request in bytes
963 * @req: Pointer to MPT request frame
964 * @sleepFlag: Use schedule if CAN_SLEEP else use udelay.
965 *
966 * This routine is used exclusively to send MptScsiTaskMgmt
967 * requests since they are required to be sent via doorbell handshake.
968 *
969 * NOTE: It is the callers responsibility to byte-swap fields in the
970 * request which are greater than 1 byte in size.
971 *
972 * Returns 0 for success, non-zero for failure.
973 */
974 int
975 mpt_send_handshake_request(u8 cb_idx, MPT_ADAPTER *ioc, int reqBytes, u32 *req, int sleepFlag)
976 {
977 int r = 0;
978 u8 *req_as_bytes;
979 int ii;
980
981 /* State is known to be good upon entering
982 * this function so issue the bus reset
983 * request.
984 */
985
986 /*
987 * Emulate what mpt_put_msg_frame() does /wrt to sanity
988 * setting cb_idx/req_idx. But ONLY if this request
989 * is in proper (pre-alloc'd) request buffer range...
990 */
991 ii = MFPTR_2_MPT_INDEX(ioc,(MPT_FRAME_HDR*)req);
992 if (reqBytes >= 12 && ii >= 0 && ii < ioc->req_depth) {
993 MPT_FRAME_HDR *mf = (MPT_FRAME_HDR*)req;
994 mf->u.frame.hwhdr.msgctxu.fld.req_idx = cpu_to_le16(ii);
995 mf->u.frame.hwhdr.msgctxu.fld.cb_idx = cb_idx;
996 }
997
998 /* Make sure there are no doorbells */
999 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
1000
1001 CHIPREG_WRITE32(&ioc->chip->Doorbell,
1002 ((MPI_FUNCTION_HANDSHAKE<<MPI_DOORBELL_FUNCTION_SHIFT) |
1003 ((reqBytes/4)<<MPI_DOORBELL_ADD_DWORDS_SHIFT)));
1004
1005 /* Wait for IOC doorbell int */
1006 if ((ii = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0) {
1007 return ii;
1008 }
1009
1010 /* Read doorbell and check for active bit */
1011 if (!(CHIPREG_READ32(&ioc->chip->Doorbell) & MPI_DOORBELL_ACTIVE))
1012 return -5;
1013
1014 dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "mpt_send_handshake_request start, WaitCnt=%d\n",
1015 ioc->name, ii));
1016
1017 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
1018
1019 if ((r = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0) {
1020 return -2;
1021 }
1022
1023 /* Send request via doorbell handshake */
1024 req_as_bytes = (u8 *) req;
1025 for (ii = 0; ii < reqBytes/4; ii++) {
1026 u32 word;
1027
1028 word = ((req_as_bytes[(ii*4) + 0] << 0) |
1029 (req_as_bytes[(ii*4) + 1] << 8) |
1030 (req_as_bytes[(ii*4) + 2] << 16) |
1031 (req_as_bytes[(ii*4) + 3] << 24));
1032 CHIPREG_WRITE32(&ioc->chip->Doorbell, word);
1033 if ((r = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0) {
1034 r = -3;
1035 break;
1036 }
1037 }
1038
1039 if (r >= 0 && WaitForDoorbellInt(ioc, 10, sleepFlag) >= 0)
1040 r = 0;
1041 else
1042 r = -4;
1043
1044 /* Make sure there are no doorbells */
1045 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
1046
1047 return r;
1048 }
1049
1050 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1051 /**
1052 * mpt_host_page_access_control - control the IOC's Host Page Buffer access
1053 * @ioc: Pointer to MPT adapter structure
1054 * @access_control_value: define bits below
1055 * @sleepFlag: Specifies whether the process can sleep
1056 *
1057 * Provides mechanism for the host driver to control the IOC's
1058 * Host Page Buffer access.
1059 *
1060 * Access Control Value - bits[15:12]
1061 * 0h Reserved
1062 * 1h Enable Access { MPI_DB_HPBAC_ENABLE_ACCESS }
1063 * 2h Disable Access { MPI_DB_HPBAC_DISABLE_ACCESS }
1064 * 3h Free Buffer { MPI_DB_HPBAC_FREE_BUFFER }
1065 *
1066 * Returns 0 for success, non-zero for failure.
1067 */
1068
1069 static int
1070 mpt_host_page_access_control(MPT_ADAPTER *ioc, u8 access_control_value, int sleepFlag)
1071 {
1072 int r = 0;
1073
1074 /* return if in use */
1075 if (CHIPREG_READ32(&ioc->chip->Doorbell)
1076 & MPI_DOORBELL_ACTIVE)
1077 return -1;
1078
1079 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
1080
1081 CHIPREG_WRITE32(&ioc->chip->Doorbell,
1082 ((MPI_FUNCTION_HOST_PAGEBUF_ACCESS_CONTROL
1083 <<MPI_DOORBELL_FUNCTION_SHIFT) |
1084 (access_control_value<<12)));
1085
1086 /* Wait for IOC to clear Doorbell Status bit */
1087 if ((r = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0) {
1088 return -2;
1089 }else
1090 return 0;
1091 }
1092
1093 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1094 /**
1095 * mpt_host_page_alloc - allocate system memory for the fw
1096 * @ioc: Pointer to pointer to IOC adapter
1097 * @ioc_init: Pointer to ioc init config page
1098 *
1099 * If we already allocated memory in past, then resend the same pointer.
1100 * Returns 0 for success, non-zero for failure.
1101 */
1102 static int
1103 mpt_host_page_alloc(MPT_ADAPTER *ioc, pIOCInit_t ioc_init)
1104 {
1105 char *psge;
1106 int flags_length;
1107 u32 host_page_buffer_sz=0;
1108
1109 if(!ioc->HostPageBuffer) {
1110
1111 host_page_buffer_sz =
1112 le32_to_cpu(ioc->facts.HostPageBufferSGE.FlagsLength) & 0xFFFFFF;
1113
1114 if(!host_page_buffer_sz)
1115 return 0; /* fw doesn't need any host buffers */
1116
1117 /* spin till we get enough memory */
1118 while(host_page_buffer_sz > 0) {
1119
1120 if((ioc->HostPageBuffer = pci_alloc_consistent(
1121 ioc->pcidev,
1122 host_page_buffer_sz,
1123 &ioc->HostPageBuffer_dma)) != NULL) {
1124
1125 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT
1126 "host_page_buffer @ %p, dma @ %x, sz=%d bytes\n",
1127 ioc->name, ioc->HostPageBuffer,
1128 (u32)ioc->HostPageBuffer_dma,
1129 host_page_buffer_sz));
1130 ioc->alloc_total += host_page_buffer_sz;
1131 ioc->HostPageBuffer_sz = host_page_buffer_sz;
1132 break;
1133 }
1134
1135 host_page_buffer_sz -= (4*1024);
1136 }
1137 }
1138
1139 if(!ioc->HostPageBuffer) {
1140 printk(MYIOC_s_ERR_FMT
1141 "Failed to alloc memory for host_page_buffer!\n",
1142 ioc->name);
1143 return -999;
1144 }
1145
1146 psge = (char *)&ioc_init->HostPageBufferSGE;
1147 flags_length = MPI_SGE_FLAGS_SIMPLE_ELEMENT |
1148 MPI_SGE_FLAGS_SYSTEM_ADDRESS |
1149 MPI_SGE_FLAGS_32_BIT_ADDRESSING |
1150 MPI_SGE_FLAGS_HOST_TO_IOC |
1151 MPI_SGE_FLAGS_END_OF_BUFFER;
1152 if (sizeof(dma_addr_t) == sizeof(u64)) {
1153 flags_length |= MPI_SGE_FLAGS_64_BIT_ADDRESSING;
1154 }
1155 flags_length = flags_length << MPI_SGE_FLAGS_SHIFT;
1156 flags_length |= ioc->HostPageBuffer_sz;
1157 mpt_add_sge(psge, flags_length, ioc->HostPageBuffer_dma);
1158 ioc->facts.HostPageBufferSGE = ioc_init->HostPageBufferSGE;
1159
1160 return 0;
1161 }
1162
1163 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1164 /**
1165 * mpt_verify_adapter - Given IOC identifier, set pointer to its adapter structure.
1166 * @iocid: IOC unique identifier (integer)
1167 * @iocpp: Pointer to pointer to IOC adapter
1168 *
1169 * Given a unique IOC identifier, set pointer to the associated MPT
1170 * adapter structure.
1171 *
1172 * Returns iocid and sets iocpp if iocid is found.
1173 * Returns -1 if iocid is not found.
1174 */
1175 int
1176 mpt_verify_adapter(int iocid, MPT_ADAPTER **iocpp)
1177 {
1178 MPT_ADAPTER *ioc;
1179
1180 list_for_each_entry(ioc,&ioc_list,list) {
1181 if (ioc->id == iocid) {
1182 *iocpp =ioc;
1183 return iocid;
1184 }
1185 }
1186
1187 *iocpp = NULL;
1188 return -1;
1189 }
1190
1191 /**
1192 * mpt_get_product_name - returns product string
1193 * @vendor: pci vendor id
1194 * @device: pci device id
1195 * @revision: pci revision id
1196 * @prod_name: string returned
1197 *
1198 * Returns product string displayed when driver loads,
1199 * in /proc/mpt/summary and /sysfs/class/scsi_host/host<X>/version_product
1200 *
1201 **/
1202 static void
1203 mpt_get_product_name(u16 vendor, u16 device, u8 revision, char *prod_name)
1204 {
1205 char *product_str = NULL;
1206
1207 if (vendor == PCI_VENDOR_ID_BROCADE) {
1208 switch (device)
1209 {
1210 case MPI_MANUFACTPAGE_DEVICEID_FC949E:
1211 switch (revision)
1212 {
1213 case 0x00:
1214 product_str = "BRE040 A0";
1215 break;
1216 case 0x01:
1217 product_str = "BRE040 A1";
1218 break;
1219 default:
1220 product_str = "BRE040";
1221 break;
1222 }
1223 break;
1224 }
1225 goto out;
1226 }
1227
1228 switch (device)
1229 {
1230 case MPI_MANUFACTPAGE_DEVICEID_FC909:
1231 product_str = "LSIFC909 B1";
1232 break;
1233 case MPI_MANUFACTPAGE_DEVICEID_FC919:
1234 product_str = "LSIFC919 B0";
1235 break;
1236 case MPI_MANUFACTPAGE_DEVICEID_FC929:
1237 product_str = "LSIFC929 B0";
1238 break;
1239 case MPI_MANUFACTPAGE_DEVICEID_FC919X:
1240 if (revision < 0x80)
1241 product_str = "LSIFC919X A0";
1242 else
1243 product_str = "LSIFC919XL A1";
1244 break;
1245 case MPI_MANUFACTPAGE_DEVICEID_FC929X:
1246 if (revision < 0x80)
1247 product_str = "LSIFC929X A0";
1248 else
1249 product_str = "LSIFC929XL A1";
1250 break;
1251 case MPI_MANUFACTPAGE_DEVICEID_FC939X:
1252 product_str = "LSIFC939X A1";
1253 break;
1254 case MPI_MANUFACTPAGE_DEVICEID_FC949X:
1255 product_str = "LSIFC949X A1";
1256 break;
1257 case MPI_MANUFACTPAGE_DEVICEID_FC949E:
1258 switch (revision)
1259 {
1260 case 0x00:
1261 product_str = "LSIFC949E A0";
1262 break;
1263 case 0x01:
1264 product_str = "LSIFC949E A1";
1265 break;
1266 default:
1267 product_str = "LSIFC949E";
1268 break;
1269 }
1270 break;
1271 case MPI_MANUFACTPAGE_DEVID_53C1030:
1272 switch (revision)
1273 {
1274 case 0x00:
1275 product_str = "LSI53C1030 A0";
1276 break;
1277 case 0x01:
1278 product_str = "LSI53C1030 B0";
1279 break;
1280 case 0x03:
1281 product_str = "LSI53C1030 B1";
1282 break;
1283 case 0x07:
1284 product_str = "LSI53C1030 B2";
1285 break;
1286 case 0x08:
1287 product_str = "LSI53C1030 C0";
1288 break;
1289 case 0x80:
1290 product_str = "LSI53C1030T A0";
1291 break;
1292 case 0x83:
1293 product_str = "LSI53C1030T A2";
1294 break;
1295 case 0x87:
1296 product_str = "LSI53C1030T A3";
1297 break;
1298 case 0xc1:
1299 product_str = "LSI53C1020A A1";
1300 break;
1301 default:
1302 product_str = "LSI53C1030";
1303 break;
1304 }
1305 break;
1306 case MPI_MANUFACTPAGE_DEVID_1030_53C1035:
1307 switch (revision)
1308 {
1309 case 0x03:
1310 product_str = "LSI53C1035 A2";
1311 break;
1312 case 0x04:
1313 product_str = "LSI53C1035 B0";
1314 break;
1315 default:
1316 product_str = "LSI53C1035";
1317 break;
1318 }
1319 break;
1320 case MPI_MANUFACTPAGE_DEVID_SAS1064:
1321 switch (revision)
1322 {
1323 case 0x00:
1324 product_str = "LSISAS1064 A1";
1325 break;
1326 case 0x01:
1327 product_str = "LSISAS1064 A2";
1328 break;
1329 case 0x02:
1330 product_str = "LSISAS1064 A3";
1331 break;
1332 case 0x03:
1333 product_str = "LSISAS1064 A4";
1334 break;
1335 default:
1336 product_str = "LSISAS1064";
1337 break;
1338 }
1339 break;
1340 case MPI_MANUFACTPAGE_DEVID_SAS1064E:
1341 switch (revision)
1342 {
1343 case 0x00:
1344 product_str = "LSISAS1064E A0";
1345 break;
1346 case 0x01:
1347 product_str = "LSISAS1064E B0";
1348 break;
1349 case 0x02:
1350 product_str = "LSISAS1064E B1";
1351 break;
1352 case 0x04:
1353 product_str = "LSISAS1064E B2";
1354 break;
1355 case 0x08:
1356 product_str = "LSISAS1064E B3";
1357 break;
1358 default:
1359 product_str = "LSISAS1064E";
1360 break;
1361 }
1362 break;
1363 case MPI_MANUFACTPAGE_DEVID_SAS1068:
1364 switch (revision)
1365 {
1366 case 0x00:
1367 product_str = "LSISAS1068 A0";
1368 break;
1369 case 0x01:
1370 product_str = "LSISAS1068 B0";
1371 break;
1372 case 0x02:
1373 product_str = "LSISAS1068 B1";
1374 break;
1375 default:
1376 product_str = "LSISAS1068";
1377 break;
1378 }
1379 break;
1380 case MPI_MANUFACTPAGE_DEVID_SAS1068E:
1381 switch (revision)
1382 {
1383 case 0x00:
1384 product_str = "LSISAS1068E A0";
1385 break;
1386 case 0x01:
1387 product_str = "LSISAS1068E B0";
1388 break;
1389 case 0x02:
1390 product_str = "LSISAS1068E B1";
1391 break;
1392 case 0x04:
1393 product_str = "LSISAS1068E B2";
1394 break;
1395 case 0x08:
1396 product_str = "LSISAS1068E B3";
1397 break;
1398 default:
1399 product_str = "LSISAS1068E";
1400 break;
1401 }
1402 break;
1403 case MPI_MANUFACTPAGE_DEVID_SAS1078:
1404 switch (revision)
1405 {
1406 case 0x00:
1407 product_str = "LSISAS1078 A0";
1408 break;
1409 case 0x01:
1410 product_str = "LSISAS1078 B0";
1411 break;
1412 case 0x02:
1413 product_str = "LSISAS1078 C0";
1414 break;
1415 case 0x03:
1416 product_str = "LSISAS1078 C1";
1417 break;
1418 case 0x04:
1419 product_str = "LSISAS1078 C2";
1420 break;
1421 default:
1422 product_str = "LSISAS1078";
1423 break;
1424 }
1425 break;
1426 }
1427
1428 out:
1429 if (product_str)
1430 sprintf(prod_name, "%s", product_str);
1431 }
1432
1433 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1434 /**
1435 * mpt_attach - Install a PCI intelligent MPT adapter.
1436 * @pdev: Pointer to pci_dev structure
1437 * @id: PCI device ID information
1438 *
1439 * This routine performs all the steps necessary to bring the IOC of
1440 * a MPT adapter to a OPERATIONAL state. This includes registering
1441 * memory regions, registering the interrupt, and allocating request
1442 * and reply memory pools.
1443 *
1444 * This routine also pre-fetches the LAN MAC address of a Fibre Channel
1445 * MPT adapter.
1446 *
1447 * Returns 0 for success, non-zero for failure.
1448 *
1449 * TODO: Add support for polled controllers
1450 */
1451 int
1452 mpt_attach(struct pci_dev *pdev, const struct pci_device_id *id)
1453 {
1454 MPT_ADAPTER *ioc;
1455 u8 __iomem *mem;
1456 u8 __iomem *pmem;
1457 unsigned long mem_phys;
1458 unsigned long port;
1459 u32 msize;
1460 u32 psize;
1461 int ii;
1462 u8 cb_idx;
1463 int r = -ENODEV;
1464 u8 revision;
1465 u8 pcixcmd;
1466 static int mpt_ids = 0;
1467 #ifdef CONFIG_PROC_FS
1468 struct proc_dir_entry *dent, *ent;
1469 #endif
1470
1471 if (mpt_debug_level)
1472 printk(KERN_INFO MYNAM ": mpt_debug_level=%xh\n", mpt_debug_level);
1473
1474 ioc = kzalloc(sizeof(MPT_ADAPTER), GFP_ATOMIC);
1475 if (ioc == NULL) {
1476 printk(KERN_ERR MYNAM ": ERROR - Insufficient memory to add adapter!\n");
1477 return -ENOMEM;
1478 }
1479 ioc->debug_level = mpt_debug_level;
1480 ioc->id = mpt_ids++;
1481 sprintf(ioc->name, "ioc%d", ioc->id);
1482
1483 ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM);
1484 if (pci_enable_device_mem(pdev)) {
1485 printk(MYIOC_s_ERR_FMT "pci_enable_device_mem() "
1486 "failed\n", ioc->name);
1487 kfree(ioc);
1488 return r;
1489 }
1490 if (pci_request_selected_regions(pdev, ioc->bars, "mpt")) {
1491 printk(MYIOC_s_ERR_FMT "pci_request_selected_regions() with "
1492 "MEM failed\n", ioc->name);
1493 kfree(ioc);
1494 return r;
1495 }
1496
1497 dinitprintk(ioc, printk(MYIOC_s_INFO_FMT ": mpt_adapter_install\n", ioc->name));
1498
1499 if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK)) {
1500 dprintk(ioc, printk(MYIOC_s_INFO_FMT
1501 ": 64 BIT PCI BUS DMA ADDRESSING SUPPORTED\n", ioc->name));
1502 } else if (pci_set_dma_mask(pdev, DMA_32BIT_MASK)) {
1503 printk(MYIOC_s_WARN_FMT ": 32 BIT PCI BUS DMA ADDRESSING NOT SUPPORTED\n",
1504 ioc->name);
1505 kfree(ioc);
1506 return r;
1507 }
1508
1509 if (!pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK)) {
1510 dprintk(ioc, printk(MYIOC_s_INFO_FMT
1511 ": Using 64 bit consistent mask\n", ioc->name));
1512 } else {
1513 dprintk(ioc, printk(MYIOC_s_INFO_FMT
1514 ": Not using 64 bit consistent mask\n", ioc->name));
1515 }
1516
1517 ioc->alloc_total = sizeof(MPT_ADAPTER);
1518 ioc->req_sz = MPT_DEFAULT_FRAME_SIZE; /* avoid div by zero! */
1519 ioc->reply_sz = MPT_REPLY_FRAME_SIZE;
1520
1521 ioc->pcidev = pdev;
1522 ioc->diagPending = 0;
1523 spin_lock_init(&ioc->diagLock);
1524 spin_lock_init(&ioc->initializing_hba_lock);
1525
1526 /* Initialize the event logging.
1527 */
1528 ioc->eventTypes = 0; /* None */
1529 ioc->eventContext = 0;
1530 ioc->eventLogSize = 0;
1531 ioc->events = NULL;
1532
1533 #ifdef MFCNT
1534 ioc->mfcnt = 0;
1535 #endif
1536
1537 ioc->cached_fw = NULL;
1538
1539 /* Initilize SCSI Config Data structure
1540 */
1541 memset(&ioc->spi_data, 0, sizeof(SpiCfgData));
1542
1543 /* Initialize the running configQ head.
1544 */
1545 INIT_LIST_HEAD(&ioc->configQ);
1546
1547 /* Initialize the fc rport list head.
1548 */
1549 INIT_LIST_HEAD(&ioc->fc_rports);
1550
1551 /* Find lookup slot. */
1552 INIT_LIST_HEAD(&ioc->list);
1553
1554 mem_phys = msize = 0;
1555 port = psize = 0;
1556 for (ii=0; ii < DEVICE_COUNT_RESOURCE; ii++) {
1557 if (pci_resource_flags(pdev, ii) & PCI_BASE_ADDRESS_SPACE_IO) {
1558 if (psize)
1559 continue;
1560 /* Get I/O space! */
1561 port = pci_resource_start(pdev, ii);
1562 psize = pci_resource_len(pdev,ii);
1563 } else {
1564 if (msize)
1565 continue;
1566 /* Get memmap */
1567 mem_phys = pci_resource_start(pdev, ii);
1568 msize = pci_resource_len(pdev,ii);
1569 }
1570 }
1571 ioc->mem_size = msize;
1572
1573 mem = NULL;
1574 /* Get logical ptr for PciMem0 space */
1575 /*mem = ioremap(mem_phys, msize);*/
1576 mem = ioremap(mem_phys, msize);
1577 if (mem == NULL) {
1578 printk(MYIOC_s_ERR_FMT "Unable to map adapter memory!\n", ioc->name);
1579 kfree(ioc);
1580 return -EINVAL;
1581 }
1582 ioc->memmap = mem;
1583 dinitprintk(ioc, printk(MYIOC_s_INFO_FMT "mem = %p, mem_phys = %lx\n", ioc->name, mem, mem_phys));
1584
1585 dinitprintk(ioc, printk(MYIOC_s_INFO_FMT "facts @ %p, pfacts[0] @ %p\n",
1586 ioc->name, &ioc->facts, &ioc->pfacts[0]));
1587
1588 ioc->mem_phys = mem_phys;
1589 ioc->chip = (SYSIF_REGS __iomem *)mem;
1590
1591 /* Save Port IO values in case we need to do downloadboot */
1592 ioc->pio_mem_phys = port;
1593 pmem = (u8 __iomem *)port;
1594 ioc->pio_chip = (SYSIF_REGS __iomem *)pmem;
1595
1596 pci_read_config_byte(pdev, PCI_CLASS_REVISION, &revision);
1597 mpt_get_product_name(pdev->vendor, pdev->device, revision, ioc->prod_name);
1598
1599 switch (pdev->device)
1600 {
1601 case MPI_MANUFACTPAGE_DEVICEID_FC939X:
1602 case MPI_MANUFACTPAGE_DEVICEID_FC949X:
1603 ioc->errata_flag_1064 = 1;
1604 case MPI_MANUFACTPAGE_DEVICEID_FC909:
1605 case MPI_MANUFACTPAGE_DEVICEID_FC929:
1606 case MPI_MANUFACTPAGE_DEVICEID_FC919:
1607 case MPI_MANUFACTPAGE_DEVICEID_FC949E:
1608 ioc->bus_type = FC;
1609 break;
1610
1611 case MPI_MANUFACTPAGE_DEVICEID_FC929X:
1612 if (revision < XL_929) {
1613 /* 929X Chip Fix. Set Split transactions level
1614 * for PCIX. Set MOST bits to zero.
1615 */
1616 pci_read_config_byte(pdev, 0x6a, &pcixcmd);
1617 pcixcmd &= 0x8F;
1618 pci_write_config_byte(pdev, 0x6a, pcixcmd);
1619 } else {
1620 /* 929XL Chip Fix. Set MMRBC to 0x08.
1621 */
1622 pci_read_config_byte(pdev, 0x6a, &pcixcmd);
1623 pcixcmd |= 0x08;
1624 pci_write_config_byte(pdev, 0x6a, pcixcmd);
1625 }
1626 ioc->bus_type = FC;
1627 break;
1628
1629 case MPI_MANUFACTPAGE_DEVICEID_FC919X:
1630 /* 919X Chip Fix. Set Split transactions level
1631 * for PCIX. Set MOST bits to zero.
1632 */
1633 pci_read_config_byte(pdev, 0x6a, &pcixcmd);
1634 pcixcmd &= 0x8F;
1635 pci_write_config_byte(pdev, 0x6a, pcixcmd);
1636 ioc->bus_type = FC;
1637 break;
1638
1639 case MPI_MANUFACTPAGE_DEVID_53C1030:
1640 /* 1030 Chip Fix. Disable Split transactions
1641 * for PCIX. Set MOST bits to zero if Rev < C0( = 8).
1642 */
1643 if (revision < C0_1030) {
1644 pci_read_config_byte(pdev, 0x6a, &pcixcmd);
1645 pcixcmd &= 0x8F;
1646 pci_write_config_byte(pdev, 0x6a, pcixcmd);
1647 }
1648
1649 case MPI_MANUFACTPAGE_DEVID_1030_53C1035:
1650 ioc->bus_type = SPI;
1651 break;
1652
1653 case MPI_MANUFACTPAGE_DEVID_SAS1064:
1654 case MPI_MANUFACTPAGE_DEVID_SAS1068:
1655 ioc->errata_flag_1064 = 1;
1656
1657 case MPI_MANUFACTPAGE_DEVID_SAS1064E:
1658 case MPI_MANUFACTPAGE_DEVID_SAS1068E:
1659 case MPI_MANUFACTPAGE_DEVID_SAS1078:
1660 ioc->bus_type = SAS;
1661 }
1662
1663 if (ioc->errata_flag_1064)
1664 pci_disable_io_access(pdev);
1665
1666 spin_lock_init(&ioc->FreeQlock);
1667
1668 /* Disable all! */
1669 CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
1670 ioc->active = 0;
1671 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
1672
1673 /* Set IOC ptr in the pcidev's driver data. */
1674 pci_set_drvdata(ioc->pcidev, ioc);
1675
1676 /* Set lookup ptr. */
1677 list_add_tail(&ioc->list, &ioc_list);
1678
1679 /* Check for "bound ports" (929, 929X, 1030, 1035) to reduce redundant resets.
1680 */
1681 mpt_detect_bound_ports(ioc, pdev);
1682
1683 if ((r = mpt_do_ioc_recovery(ioc, MPT_HOSTEVENT_IOC_BRINGUP,
1684 CAN_SLEEP)) != 0){
1685 printk(MYIOC_s_ERR_FMT "didn't initialize properly! (%d)\n",
1686 ioc->name, r);
1687
1688 list_del(&ioc->list);
1689 if (ioc->alt_ioc)
1690 ioc->alt_ioc->alt_ioc = NULL;
1691 iounmap(mem);
1692 kfree(ioc);
1693 pci_set_drvdata(pdev, NULL);
1694 return r;
1695 }
1696
1697 /* call per device driver probe entry point */
1698 for(cb_idx = 0; cb_idx < MPT_MAX_PROTOCOL_DRIVERS; cb_idx++) {
1699 if(MptDeviceDriverHandlers[cb_idx] &&
1700 MptDeviceDriverHandlers[cb_idx]->probe) {
1701 MptDeviceDriverHandlers[cb_idx]->probe(pdev,id);
1702 }
1703 }
1704
1705 #ifdef CONFIG_PROC_FS
1706 /*
1707 * Create "/proc/mpt/iocN" subdirectory entry for each MPT adapter.
1708 */
1709 dent = proc_mkdir(ioc->name, mpt_proc_root_dir);
1710 if (dent) {
1711 ent = create_proc_entry("info", S_IFREG|S_IRUGO, dent);
1712 if (ent) {
1713 ent->read_proc = procmpt_iocinfo_read;
1714 ent->data = ioc;
1715 }
1716 ent = create_proc_entry("summary", S_IFREG|S_IRUGO, dent);
1717 if (ent) {
1718 ent->read_proc = procmpt_summary_read;
1719 ent->data = ioc;
1720 }
1721 }
1722 #endif
1723
1724 return 0;
1725 }
1726
1727 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1728 /**
1729 * mpt_detach - Remove a PCI intelligent MPT adapter.
1730 * @pdev: Pointer to pci_dev structure
1731 */
1732
1733 void
1734 mpt_detach(struct pci_dev *pdev)
1735 {
1736 MPT_ADAPTER *ioc = pci_get_drvdata(pdev);
1737 char pname[32];
1738 u8 cb_idx;
1739
1740 sprintf(pname, MPT_PROCFS_MPTBASEDIR "/%s/summary", ioc->name);
1741 remove_proc_entry(pname, NULL);
1742 sprintf(pname, MPT_PROCFS_MPTBASEDIR "/%s/info", ioc->name);
1743 remove_proc_entry(pname, NULL);
1744 sprintf(pname, MPT_PROCFS_MPTBASEDIR "/%s", ioc->name);
1745 remove_proc_entry(pname, NULL);
1746
1747 /* call per device driver remove entry point */
1748 for(cb_idx = 0; cb_idx < MPT_MAX_PROTOCOL_DRIVERS; cb_idx++) {
1749 if(MptDeviceDriverHandlers[cb_idx] &&
1750 MptDeviceDriverHandlers[cb_idx]->remove) {
1751 MptDeviceDriverHandlers[cb_idx]->remove(pdev);
1752 }
1753 }
1754
1755 /* Disable interrupts! */
1756 CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
1757
1758 ioc->active = 0;
1759 synchronize_irq(pdev->irq);
1760
1761 /* Clear any lingering interrupt */
1762 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
1763
1764 CHIPREG_READ32(&ioc->chip->IntStatus);
1765
1766 mpt_adapter_dispose(ioc);
1767
1768 pci_set_drvdata(pdev, NULL);
1769 }
1770
1771 /**************************************************************************
1772 * Power Management
1773 */
1774 #ifdef CONFIG_PM
1775 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1776 /**
1777 * mpt_suspend - Fusion MPT base driver suspend routine.
1778 * @pdev: Pointer to pci_dev structure
1779 * @state: new state to enter
1780 */
1781 int
1782 mpt_suspend(struct pci_dev *pdev, pm_message_t state)
1783 {
1784 u32 device_state;
1785 MPT_ADAPTER *ioc = pci_get_drvdata(pdev);
1786
1787 device_state=pci_choose_state(pdev, state);
1788
1789 printk(MYIOC_s_INFO_FMT
1790 "pci-suspend: pdev=0x%p, slot=%s, Entering operating state [D%d]\n",
1791 ioc->name, pdev, pci_name(pdev), device_state);
1792
1793 pci_save_state(pdev);
1794
1795 /* put ioc into READY_STATE */
1796 if(SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, CAN_SLEEP)) {
1797 printk(MYIOC_s_ERR_FMT
1798 "pci-suspend: IOC msg unit reset failed!\n", ioc->name);
1799 }
1800
1801 /* disable interrupts */
1802 CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
1803 ioc->active = 0;
1804
1805 /* Clear any lingering interrupt */
1806 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
1807
1808 pci_disable_device(pdev);
1809 pci_release_selected_regions(pdev, ioc->bars);
1810 pci_set_power_state(pdev, device_state);
1811
1812 return 0;
1813 }
1814
1815 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1816 /**
1817 * mpt_resume - Fusion MPT base driver resume routine.
1818 * @pdev: Pointer to pci_dev structure
1819 */
1820 int
1821 mpt_resume(struct pci_dev *pdev)
1822 {
1823 MPT_ADAPTER *ioc = pci_get_drvdata(pdev);
1824 u32 device_state = pdev->current_state;
1825 int recovery_state;
1826
1827 printk(MYIOC_s_INFO_FMT
1828 "pci-resume: pdev=0x%p, slot=%s, Previous operating state [D%d]\n",
1829 ioc->name, pdev, pci_name(pdev), device_state);
1830
1831 pci_set_power_state(pdev, 0);
1832 pci_restore_state(pdev);
1833 if (ioc->facts.Flags & MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT) {
1834 ioc->bars = pci_select_bars(ioc->pcidev, IORESOURCE_MEM |
1835 IORESOURCE_IO);
1836 if (pci_enable_device(pdev))
1837 return 0;
1838 } else {
1839 ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM);
1840 if (pci_enable_device_mem(pdev))
1841 return 0;
1842 }
1843 if (pci_request_selected_regions(pdev, ioc->bars, "mpt"))
1844 return 0;
1845
1846 /* enable interrupts */
1847 CHIPREG_WRITE32(&ioc->chip->IntMask, MPI_HIM_DIM);
1848 ioc->active = 1;
1849
1850 printk(MYIOC_s_INFO_FMT
1851 "pci-resume: ioc-state=0x%x,doorbell=0x%x\n",
1852 ioc->name,
1853 (mpt_GetIocState(ioc, 1) >> MPI_IOC_STATE_SHIFT),
1854 CHIPREG_READ32(&ioc->chip->Doorbell));
1855
1856 /* bring ioc to operational state */
1857 if ((recovery_state = mpt_do_ioc_recovery(ioc,
1858 MPT_HOSTEVENT_IOC_RECOVER, CAN_SLEEP)) != 0) {
1859 printk(MYIOC_s_INFO_FMT
1860 "pci-resume: Cannot recover, error:[%x]\n",
1861 ioc->name, recovery_state);
1862 } else {
1863 printk(MYIOC_s_INFO_FMT
1864 "pci-resume: success\n", ioc->name);
1865 }
1866
1867 return 0;
1868 }
1869 #endif
1870
1871 static int
1872 mpt_signal_reset(u8 index, MPT_ADAPTER *ioc, int reset_phase)
1873 {
1874 if ((MptDriverClass[index] == MPTSPI_DRIVER &&
1875 ioc->bus_type != SPI) ||
1876 (MptDriverClass[index] == MPTFC_DRIVER &&
1877 ioc->bus_type != FC) ||
1878 (MptDriverClass[index] == MPTSAS_DRIVER &&
1879 ioc->bus_type != SAS))
1880 /* make sure we only call the relevant reset handler
1881 * for the bus */
1882 return 0;
1883 return (MptResetHandlers[index])(ioc, reset_phase);
1884 }
1885
1886 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1887 /**
1888 * mpt_do_ioc_recovery - Initialize or recover MPT adapter.
1889 * @ioc: Pointer to MPT adapter structure
1890 * @reason: Event word / reason
1891 * @sleepFlag: Use schedule if CAN_SLEEP else use udelay.
1892 *
1893 * This routine performs all the steps necessary to bring the IOC
1894 * to a OPERATIONAL state.
1895 *
1896 * This routine also pre-fetches the LAN MAC address of a Fibre Channel
1897 * MPT adapter.
1898 *
1899 * Returns:
1900 * 0 for success
1901 * -1 if failed to get board READY
1902 * -2 if READY but IOCFacts Failed
1903 * -3 if READY but PrimeIOCFifos Failed
1904 * -4 if READY but IOCInit Failed
1905 * -5 if failed to enable_device and/or request_selected_regions
1906 */
1907 static int
1908 mpt_do_ioc_recovery(MPT_ADAPTER *ioc, u32 reason, int sleepFlag)
1909 {
1910 int hard_reset_done = 0;
1911 int alt_ioc_ready = 0;
1912 int hard;
1913 int rc=0;
1914 int ii;
1915 u8 cb_idx;
1916 int handlers;
1917 int ret = 0;
1918 int reset_alt_ioc_active = 0;
1919 int irq_allocated = 0;
1920 u8 *a;
1921
1922 printk(MYIOC_s_INFO_FMT "Initiating %s\n", ioc->name,
1923 reason == MPT_HOSTEVENT_IOC_BRINGUP ? "bringup" : "recovery");
1924
1925 /* Disable reply interrupts (also blocks FreeQ) */
1926 CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
1927 ioc->active = 0;
1928
1929 if (ioc->alt_ioc) {
1930 if (ioc->alt_ioc->active)
1931 reset_alt_ioc_active = 1;
1932
1933 /* Disable alt-IOC's reply interrupts (and FreeQ) for a bit ... */
1934 CHIPREG_WRITE32(&ioc->alt_ioc->chip->IntMask, 0xFFFFFFFF);
1935 ioc->alt_ioc->active = 0;
1936 }
1937
1938 hard = 1;
1939 if (reason == MPT_HOSTEVENT_IOC_BRINGUP)
1940 hard = 0;
1941
1942 if ((hard_reset_done = MakeIocReady(ioc, hard, sleepFlag)) < 0) {
1943 if (hard_reset_done == -4) {
1944 printk(MYIOC_s_WARN_FMT "Owned by PEER..skipping!\n",
1945 ioc->name);
1946
1947 if (reset_alt_ioc_active && ioc->alt_ioc) {
1948 /* (re)Enable alt-IOC! (reply interrupt, FreeQ) */
1949 dprintk(ioc, printk(MYIOC_s_INFO_FMT
1950 "alt_ioc reply irq re-enabled\n", ioc->alt_ioc->name));
1951 CHIPREG_WRITE32(&ioc->alt_ioc->chip->IntMask, MPI_HIM_DIM);
1952 ioc->alt_ioc->active = 1;
1953 }
1954
1955 } else {
1956 printk(MYIOC_s_WARN_FMT "NOT READY!\n", ioc->name);
1957 }
1958 return -1;
1959 }
1960
1961 /* hard_reset_done = 0 if a soft reset was performed
1962 * and 1 if a hard reset was performed.
1963 */
1964 if (hard_reset_done && reset_alt_ioc_active && ioc->alt_ioc) {
1965 if ((rc = MakeIocReady(ioc->alt_ioc, 0, sleepFlag)) == 0)
1966 alt_ioc_ready = 1;
1967 else
1968 printk(MYIOC_s_WARN_FMT "alt_ioc not ready!\n", ioc->alt_ioc->name);
1969 }
1970
1971 for (ii=0; ii<5; ii++) {
1972 /* Get IOC facts! Allow 5 retries */
1973 if ((rc = GetIocFacts(ioc, sleepFlag, reason)) == 0)
1974 break;
1975 }
1976
1977
1978 if (ii == 5) {
1979 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT
1980 "Retry IocFacts failed rc=%x\n", ioc->name, rc));
1981 ret = -2;
1982 } else if (reason == MPT_HOSTEVENT_IOC_BRINGUP) {
1983 MptDisplayIocCapabilities(ioc);
1984 }
1985
1986 if (alt_ioc_ready) {
1987 if ((rc = GetIocFacts(ioc->alt_ioc, sleepFlag, reason)) != 0) {
1988 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT
1989 "Initial Alt IocFacts failed rc=%x\n", ioc->name, rc));
1990 /* Retry - alt IOC was initialized once
1991 */
1992 rc = GetIocFacts(ioc->alt_ioc, sleepFlag, reason);
1993 }
1994 if (rc) {
1995 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT
1996 "Retry Alt IocFacts failed rc=%x\n", ioc->name, rc));
1997 alt_ioc_ready = 0;
1998 reset_alt_ioc_active = 0;
1999 } else if (reason == MPT_HOSTEVENT_IOC_BRINGUP) {
2000 MptDisplayIocCapabilities(ioc->alt_ioc);
2001 }
2002 }
2003
2004 if ((ret == 0) && (reason == MPT_HOSTEVENT_IOC_BRINGUP) &&
2005 (ioc->facts.Flags & MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT)) {
2006 pci_release_selected_regions(ioc->pcidev, ioc->bars);
2007 ioc->bars = pci_select_bars(ioc->pcidev, IORESOURCE_MEM |
2008 IORESOURCE_IO);
2009 if (pci_enable_device(ioc->pcidev))
2010 return -5;
2011 if (pci_request_selected_regions(ioc->pcidev, ioc->bars,
2012 "mpt"))
2013 return -5;
2014 }
2015
2016 /*
2017 * Device is reset now. It must have de-asserted the interrupt line
2018 * (if it was asserted) and it should be safe to register for the
2019 * interrupt now.
2020 */
2021 if ((ret == 0) && (reason == MPT_HOSTEVENT_IOC_BRINGUP)) {
2022 ioc->pci_irq = -1;
2023 if (ioc->pcidev->irq) {
2024 if (mpt_msi_enable && !pci_enable_msi(ioc->pcidev))
2025 printk(MYIOC_s_INFO_FMT "PCI-MSI enabled\n",
2026 ioc->name);
2027 rc = request_irq(ioc->pcidev->irq, mpt_interrupt,
2028 IRQF_SHARED, ioc->name, ioc);
2029 if (rc < 0) {
2030 printk(MYIOC_s_ERR_FMT "Unable to allocate "
2031 "interrupt %d!\n", ioc->name, ioc->pcidev->irq);
2032 if (mpt_msi_enable)
2033 pci_disable_msi(ioc->pcidev);
2034 return -EBUSY;
2035 }
2036 irq_allocated = 1;
2037 ioc->pci_irq = ioc->pcidev->irq;
2038 pci_set_master(ioc->pcidev); /* ?? */
2039 dprintk(ioc, printk(MYIOC_s_INFO_FMT "installed at interrupt "
2040 "%d\n", ioc->name, ioc->pcidev->irq));
2041 }
2042 }
2043
2044 /* Prime reply & request queues!
2045 * (mucho alloc's) Must be done prior to
2046 * init as upper addresses are needed for init.
2047 * If fails, continue with alt-ioc processing
2048 */
2049 if ((ret == 0) && ((rc = PrimeIocFifos(ioc)) != 0))
2050 ret = -3;
2051
2052 /* May need to check/upload firmware & data here!
2053 * If fails, continue with alt-ioc processing
2054 */
2055 if ((ret == 0) && ((rc = SendIocInit(ioc, sleepFlag)) != 0))
2056 ret = -4;
2057 // NEW!
2058 if (alt_ioc_ready && ((rc = PrimeIocFifos(ioc->alt_ioc)) != 0)) {
2059 printk(MYIOC_s_WARN_FMT ": alt_ioc (%d) FIFO mgmt alloc!\n",
2060 ioc->alt_ioc->name, rc);
2061 alt_ioc_ready = 0;
2062 reset_alt_ioc_active = 0;
2063 }
2064
2065 if (alt_ioc_ready) {
2066 if ((rc = SendIocInit(ioc->alt_ioc, sleepFlag)) != 0) {
2067 alt_ioc_ready = 0;
2068 reset_alt_ioc_active = 0;
2069 printk(MYIOC_s_WARN_FMT "alt_ioc (%d) init failure!\n",
2070 ioc->alt_ioc->name, rc);
2071 }
2072 }
2073
2074 if (reason == MPT_HOSTEVENT_IOC_BRINGUP){
2075 if (ioc->upload_fw) {
2076 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2077 "firmware upload required!\n", ioc->name));
2078
2079 /* Controller is not operational, cannot do upload
2080 */
2081 if (ret == 0) {
2082 rc = mpt_do_upload(ioc, sleepFlag);
2083 if (rc == 0) {
2084 if (ioc->alt_ioc && ioc->alt_ioc->cached_fw) {
2085 /*
2086 * Maintain only one pointer to FW memory
2087 * so there will not be two attempt to
2088 * downloadboot onboard dual function
2089 * chips (mpt_adapter_disable,
2090 * mpt_diag_reset)
2091 */
2092 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2093 "mpt_upload: alt_%s has cached_fw=%p \n",
2094 ioc->name, ioc->alt_ioc->name, ioc->alt_ioc->cached_fw));
2095 ioc->cached_fw = NULL;
2096 }
2097 } else {
2098 printk(MYIOC_s_WARN_FMT
2099 "firmware upload failure!\n", ioc->name);
2100 ret = -5;
2101 }
2102 }
2103 }
2104 }
2105
2106 if (ret == 0) {
2107 /* Enable! (reply interrupt) */
2108 CHIPREG_WRITE32(&ioc->chip->IntMask, MPI_HIM_DIM);
2109 ioc->active = 1;
2110 }
2111
2112 if (reset_alt_ioc_active && ioc->alt_ioc) {
2113 /* (re)Enable alt-IOC! (reply interrupt) */
2114 dinitprintk(ioc, printk(MYIOC_s_INFO_FMT "alt_ioc reply irq re-enabled\n",
2115 ioc->alt_ioc->name));
2116 CHIPREG_WRITE32(&ioc->alt_ioc->chip->IntMask, MPI_HIM_DIM);
2117 ioc->alt_ioc->active = 1;
2118 }
2119
2120 /* Enable MPT base driver management of EventNotification
2121 * and EventAck handling.
2122 */
2123 if ((ret == 0) && (!ioc->facts.EventState))
2124 (void) SendEventNotification(ioc, 1); /* 1=Enable EventNotification */
2125
2126 if (ioc->alt_ioc && alt_ioc_ready && !ioc->alt_ioc->facts.EventState)
2127 (void) SendEventNotification(ioc->alt_ioc, 1); /* 1=Enable EventNotification */
2128
2129 /* Add additional "reason" check before call to GetLanConfigPages
2130 * (combined with GetIoUnitPage2 call). This prevents a somewhat
2131 * recursive scenario; GetLanConfigPages times out, timer expired
2132 * routine calls HardResetHandler, which calls into here again,
2133 * and we try GetLanConfigPages again...
2134 */
2135 if ((ret == 0) && (reason == MPT_HOSTEVENT_IOC_BRINGUP)) {
2136
2137 /*
2138 * Initalize link list for inactive raid volumes.
2139 */
2140 init_MUTEX(&ioc->raid_data.inactive_list_mutex);
2141 INIT_LIST_HEAD(&ioc->raid_data.inactive_list);
2142
2143 if (ioc->bus_type == SAS) {
2144
2145 /* clear persistency table */
2146 if(ioc->facts.IOCExceptions &
2147 MPI_IOCFACTS_EXCEPT_PERSISTENT_TABLE_FULL) {
2148 ret = mptbase_sas_persist_operation(ioc,
2149 MPI_SAS_OP_CLEAR_NOT_PRESENT);
2150 if(ret != 0)
2151 goto out;
2152 }
2153
2154 /* Find IM volumes
2155 */
2156 mpt_findImVolumes(ioc);
2157
2158 } else if (ioc->bus_type == FC) {
2159 if ((ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_LAN) &&
2160 (ioc->lan_cnfg_page0.Header.PageLength == 0)) {
2161 /*
2162 * Pre-fetch the ports LAN MAC address!
2163 * (LANPage1_t stuff)
2164 */
2165 (void) GetLanConfigPages(ioc);
2166 a = (u8*)&ioc->lan_cnfg_page1.HardwareAddressLow;
2167 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2168 "LanAddr = %02X:%02X:%02X:%02X:%02X:%02X\n",
2169 ioc->name, a[5], a[4], a[3], a[2], a[1], a[0]));
2170
2171 }
2172 } else {
2173 /* Get NVRAM and adapter maximums from SPP 0 and 2
2174 */
2175 mpt_GetScsiPortSettings(ioc, 0);
2176
2177 /* Get version and length of SDP 1
2178 */
2179 mpt_readScsiDevicePageHeaders(ioc, 0);
2180
2181 /* Find IM volumes
2182 */
2183 if (ioc->facts.MsgVersion >= MPI_VERSION_01_02)
2184 mpt_findImVolumes(ioc);
2185
2186 /* Check, and possibly reset, the coalescing value
2187 */
2188 mpt_read_ioc_pg_1(ioc);
2189
2190 mpt_read_ioc_pg_4(ioc);
2191 }
2192
2193 GetIoUnitPage2(ioc);
2194 mpt_get_manufacturing_pg_0(ioc);
2195 }
2196
2197 /*
2198 * Call each currently registered protocol IOC reset handler
2199 * with post-reset indication.
2200 * NOTE: If we're doing _IOC_BRINGUP, there can be no
2201 * MptResetHandlers[] registered yet.
2202 */
2203 if (hard_reset_done) {
2204 rc = handlers = 0;
2205 for (cb_idx = MPT_MAX_PROTOCOL_DRIVERS-1; cb_idx; cb_idx--) {
2206 if ((ret == 0) && MptResetHandlers[cb_idx]) {
2207 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2208 "Calling IOC post_reset handler #%d\n",
2209 ioc->name, cb_idx));
2210 rc += mpt_signal_reset(cb_idx, ioc, MPT_IOC_POST_RESET);
2211 handlers++;
2212 }
2213
2214 if (alt_ioc_ready && MptResetHandlers[cb_idx]) {
2215 drsprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2216 "Calling IOC post_reset handler #%d\n",
2217 ioc->alt_ioc->name, cb_idx));
2218 rc += mpt_signal_reset(cb_idx, ioc->alt_ioc, MPT_IOC_POST_RESET);
2219 handlers++;
2220 }
2221 }
2222 /* FIXME? Examine results here? */
2223 }
2224
2225 out:
2226 if ((ret != 0) && irq_allocated) {
2227 free_irq(ioc->pci_irq, ioc);
2228 if (mpt_msi_enable)
2229 pci_disable_msi(ioc->pcidev);
2230 }
2231 return ret;
2232 }
2233
2234 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2235 /**
2236 * mpt_detect_bound_ports - Search for matching PCI bus/dev_function
2237 * @ioc: Pointer to MPT adapter structure
2238 * @pdev: Pointer to (struct pci_dev) structure
2239 *
2240 * Search for PCI bus/dev_function which matches
2241 * PCI bus/dev_function (+/-1) for newly discovered 929,
2242 * 929X, 1030 or 1035.
2243 *
2244 * If match on PCI dev_function +/-1 is found, bind the two MPT adapters
2245 * using alt_ioc pointer fields in their %MPT_ADAPTER structures.
2246 */
2247 static void
2248 mpt_detect_bound_ports(MPT_ADAPTER *ioc, struct pci_dev *pdev)
2249 {
2250 struct pci_dev *peer=NULL;
2251 unsigned int slot = PCI_SLOT(pdev->devfn);
2252 unsigned int func = PCI_FUNC(pdev->devfn);
2253 MPT_ADAPTER *ioc_srch;
2254
2255 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "PCI device %s devfn=%x/%x,"
2256 " searching for devfn match on %x or %x\n",
2257 ioc->name, pci_name(pdev), pdev->bus->number,
2258 pdev->devfn, func-1, func+1));
2259
2260 peer = pci_get_slot(pdev->bus, PCI_DEVFN(slot,func-1));
2261 if (!peer) {
2262 peer = pci_get_slot(pdev->bus, PCI_DEVFN(slot,func+1));
2263 if (!peer)
2264 return;
2265 }
2266
2267 list_for_each_entry(ioc_srch, &ioc_list, list) {
2268 struct pci_dev *_pcidev = ioc_srch->pcidev;
2269 if (_pcidev == peer) {
2270 /* Paranoia checks */
2271 if (ioc->alt_ioc != NULL) {
2272 printk(MYIOC_s_WARN_FMT "Oops, already bound to %s!\n",
2273 ioc->name, ioc->alt_ioc->name);
2274 break;
2275 } else if (ioc_srch->alt_ioc != NULL) {
2276 printk(MYIOC_s_WARN_FMT "Oops, already bound to %s!\n",
2277 ioc_srch->name, ioc_srch->alt_ioc->name);
2278 break;
2279 }
2280 dprintk(ioc, printk(MYIOC_s_INFO_FMT "FOUND! binding to %s\n",
2281 ioc->name, ioc_srch->name));
2282 ioc_srch->alt_ioc = ioc;
2283 ioc->alt_ioc = ioc_srch;
2284 }
2285 }
2286 pci_dev_put(peer);
2287 }
2288
2289 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2290 /**
2291 * mpt_adapter_disable - Disable misbehaving MPT adapter.
2292 * @ioc: Pointer to MPT adapter structure
2293 */
2294 static void
2295 mpt_adapter_disable(MPT_ADAPTER *ioc)
2296 {
2297 int sz;
2298 int ret;
2299
2300 if (ioc->cached_fw != NULL) {
2301 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "%s: Pushing FW onto "
2302 "adapter\n", __FUNCTION__, ioc->name));
2303 if ((ret = mpt_downloadboot(ioc, (MpiFwHeader_t *)
2304 ioc->cached_fw, CAN_SLEEP)) < 0) {
2305 printk(MYIOC_s_WARN_FMT
2306 ": firmware downloadboot failure (%d)!\n",
2307 ioc->name, ret);
2308 }
2309 }
2310
2311 /* Disable adapter interrupts! */
2312 CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
2313 ioc->active = 0;
2314 /* Clear any lingering interrupt */
2315 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
2316
2317 if (ioc->alloc != NULL) {
2318 sz = ioc->alloc_sz;
2319 dexitprintk(ioc, printk(MYIOC_s_INFO_FMT "free @ %p, sz=%d bytes\n",
2320 ioc->name, ioc->alloc, ioc->alloc_sz));
2321 pci_free_consistent(ioc->pcidev, sz,
2322 ioc->alloc, ioc->alloc_dma);
2323 ioc->reply_frames = NULL;
2324 ioc->req_frames = NULL;
2325 ioc->alloc = NULL;
2326 ioc->alloc_total -= sz;
2327 }
2328
2329 if (ioc->sense_buf_pool != NULL) {
2330 sz = (ioc->req_depth * MPT_SENSE_BUFFER_ALLOC);
2331 pci_free_consistent(ioc->pcidev, sz,
2332 ioc->sense_buf_pool, ioc->sense_buf_pool_dma);
2333 ioc->sense_buf_pool = NULL;
2334 ioc->alloc_total -= sz;
2335 }
2336
2337 if (ioc->events != NULL){
2338 sz = MPTCTL_EVENT_LOG_SIZE * sizeof(MPT_IOCTL_EVENTS);
2339 kfree(ioc->events);
2340 ioc->events = NULL;
2341 ioc->alloc_total -= sz;
2342 }
2343
2344 mpt_free_fw_memory(ioc);
2345
2346 kfree(ioc->spi_data.nvram);
2347 mpt_inactive_raid_list_free(ioc);
2348 kfree(ioc->raid_data.pIocPg2);
2349 kfree(ioc->raid_data.pIocPg3);
2350 ioc->spi_data.nvram = NULL;
2351 ioc->raid_data.pIocPg3 = NULL;
2352
2353 if (ioc->spi_data.pIocPg4 != NULL) {
2354 sz = ioc->spi_data.IocPg4Sz;
2355 pci_free_consistent(ioc->pcidev, sz,
2356 ioc->spi_data.pIocPg4,
2357 ioc->spi_data.IocPg4_dma);
2358 ioc->spi_data.pIocPg4 = NULL;
2359 ioc->alloc_total -= sz;
2360 }
2361
2362 if (ioc->ReqToChain != NULL) {
2363 kfree(ioc->ReqToChain);
2364 kfree(ioc->RequestNB);
2365 ioc->ReqToChain = NULL;
2366 }
2367
2368 kfree(ioc->ChainToChain);
2369 ioc->ChainToChain = NULL;
2370
2371 if (ioc->HostPageBuffer != NULL) {
2372 if((ret = mpt_host_page_access_control(ioc,
2373 MPI_DB_HPBAC_FREE_BUFFER, NO_SLEEP)) != 0) {
2374 printk(MYIOC_s_ERR_FMT
2375 "host page buffers free failed (%d)!\n",
2376 ioc->name, ret);
2377 }
2378 dexitprintk(ioc, printk(MYIOC_s_INFO_FMT "HostPageBuffer free @ %p, sz=%d bytes\n",
2379 ioc->name, ioc->HostPageBuffer, ioc->HostPageBuffer_sz));
2380 pci_free_consistent(ioc->pcidev, ioc->HostPageBuffer_sz,
2381 ioc->HostPageBuffer, ioc->HostPageBuffer_dma);
2382 ioc->HostPageBuffer = NULL;
2383 ioc->HostPageBuffer_sz = 0;
2384 ioc->alloc_total -= ioc->HostPageBuffer_sz;
2385 }
2386 }
2387
2388 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2389 /**
2390 * mpt_adapter_dispose - Free all resources associated with an MPT adapter
2391 * @ioc: Pointer to MPT adapter structure
2392 *
2393 * This routine unregisters h/w resources and frees all alloc'd memory
2394 * associated with a MPT adapter structure.
2395 */
2396 static void
2397 mpt_adapter_dispose(MPT_ADAPTER *ioc)
2398 {
2399 int sz_first, sz_last;
2400
2401 if (ioc == NULL)
2402 return;
2403
2404 sz_first = ioc->alloc_total;
2405
2406 mpt_adapter_disable(ioc);
2407
2408 if (ioc->pci_irq != -1) {
2409 free_irq(ioc->pci_irq, ioc);
2410 if (mpt_msi_enable)
2411 pci_disable_msi(ioc->pcidev);
2412 ioc->pci_irq = -1;
2413 }
2414
2415 if (ioc->memmap != NULL) {
2416 iounmap(ioc->memmap);
2417 ioc->memmap = NULL;
2418 }
2419
2420 pci_disable_device(ioc->pcidev);
2421 pci_release_selected_regions(ioc->pcidev, ioc->bars);
2422
2423 #if defined(CONFIG_MTRR) && 0
2424 if (ioc->mtrr_reg > 0) {
2425 mtrr_del(ioc->mtrr_reg, 0, 0);
2426 dprintk(ioc, printk(MYIOC_s_INFO_FMT "MTRR region de-registered\n", ioc->name));
2427 }
2428 #endif
2429
2430 /* Zap the adapter lookup ptr! */
2431 list_del(&ioc->list);
2432
2433 sz_last = ioc->alloc_total;
2434 dprintk(ioc, printk(MYIOC_s_INFO_FMT "free'd %d of %d bytes\n",
2435 ioc->name, sz_first-sz_last+(int)sizeof(*ioc), sz_first));
2436
2437 if (ioc->alt_ioc)
2438 ioc->alt_ioc->alt_ioc = NULL;
2439
2440 kfree(ioc);
2441 }
2442
2443 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2444 /**
2445 * MptDisplayIocCapabilities - Disply IOC's capabilities.
2446 * @ioc: Pointer to MPT adapter structure
2447 */
2448 static void
2449 MptDisplayIocCapabilities(MPT_ADAPTER *ioc)
2450 {
2451 int i = 0;
2452
2453 printk(KERN_INFO "%s: ", ioc->name);
2454 if (ioc->prod_name)
2455 printk("%s: ", ioc->prod_name);
2456 printk("Capabilities={");
2457
2458 if (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_INITIATOR) {
2459 printk("Initiator");
2460 i++;
2461 }
2462
2463 if (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_TARGET) {
2464 printk("%sTarget", i ? "," : "");
2465 i++;
2466 }
2467
2468 if (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_LAN) {
2469 printk("%sLAN", i ? "," : "");
2470 i++;
2471 }
2472
2473 #if 0
2474 /*
2475 * This would probably evoke more questions than it's worth
2476 */
2477 if (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_TARGET) {
2478 printk("%sLogBusAddr", i ? "," : "");
2479 i++;
2480 }
2481 #endif
2482
2483 printk("}\n");
2484 }
2485
2486 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2487 /**
2488 * MakeIocReady - Get IOC to a READY state, using KickStart if needed.
2489 * @ioc: Pointer to MPT_ADAPTER structure
2490 * @force: Force hard KickStart of IOC
2491 * @sleepFlag: Specifies whether the process can sleep
2492 *
2493 * Returns:
2494 * 1 - DIAG reset and READY
2495 * 0 - READY initially OR soft reset and READY
2496 * -1 - Any failure on KickStart
2497 * -2 - Msg Unit Reset Failed
2498 * -3 - IO Unit Reset Failed
2499 * -4 - IOC owned by a PEER
2500 */
2501 static int
2502 MakeIocReady(MPT_ADAPTER *ioc, int force, int sleepFlag)
2503 {
2504 u32 ioc_state;
2505 int statefault = 0;
2506 int cntdn;
2507 int hard_reset_done = 0;
2508 int r;
2509 int ii;
2510 int whoinit;
2511
2512 /* Get current [raw] IOC state */
2513 ioc_state = mpt_GetIocState(ioc, 0);
2514 dhsprintk(ioc, printk(MYIOC_s_INFO_FMT "MakeIocReady [raw] state=%08x\n", ioc->name, ioc_state));
2515
2516 /*
2517 * Check to see if IOC got left/stuck in doorbell handshake
2518 * grip of death. If so, hard reset the IOC.
2519 */
2520 if (ioc_state & MPI_DOORBELL_ACTIVE) {
2521 statefault = 1;
2522 printk(MYIOC_s_WARN_FMT "Unexpected doorbell active!\n",
2523 ioc->name);
2524 }
2525
2526 /* Is it already READY? */
2527 if (!statefault && (ioc_state & MPI_IOC_STATE_MASK) == MPI_IOC_STATE_READY)
2528 return 0;
2529
2530 /*
2531 * Check to see if IOC is in FAULT state.
2532 */
2533 if ((ioc_state & MPI_IOC_STATE_MASK) == MPI_IOC_STATE_FAULT) {
2534 statefault = 2;
2535 printk(MYIOC_s_WARN_FMT "IOC is in FAULT state!!!\n",
2536 ioc->name);
2537 printk(MYIOC_s_WARN_FMT " FAULT code = %04xh\n",
2538 ioc->name, ioc_state & MPI_DOORBELL_DATA_MASK);
2539 }
2540
2541 /*
2542 * Hmmm... Did it get left operational?
2543 */
2544 if ((ioc_state & MPI_IOC_STATE_MASK) == MPI_IOC_STATE_OPERATIONAL) {
2545 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "IOC operational unexpected\n",
2546 ioc->name));
2547
2548 /* Check WhoInit.
2549 * If PCI Peer, exit.
2550 * Else, if no fault conditions are present, issue a MessageUnitReset
2551 * Else, fall through to KickStart case
2552 */
2553 whoinit = (ioc_state & MPI_DOORBELL_WHO_INIT_MASK) >> MPI_DOORBELL_WHO_INIT_SHIFT;
2554 dinitprintk(ioc, printk(MYIOC_s_INFO_FMT
2555 "whoinit 0x%x statefault %d force %d\n",
2556 ioc->name, whoinit, statefault, force));
2557 if (whoinit == MPI_WHOINIT_PCI_PEER)
2558 return -4;
2559 else {
2560 if ((statefault == 0 ) && (force == 0)) {
2561 if ((r = SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, sleepFlag)) == 0)
2562 return 0;
2563 }
2564 statefault = 3;
2565 }
2566 }
2567
2568 hard_reset_done = KickStart(ioc, statefault||force, sleepFlag);
2569 if (hard_reset_done < 0)
2570 return -1;
2571
2572 /*
2573 * Loop here waiting for IOC to come READY.
2574 */
2575 ii = 0;
2576 cntdn = ((sleepFlag == CAN_SLEEP) ? HZ : 1000) * 5; /* 5 seconds */
2577
2578 while ((ioc_state = mpt_GetIocState(ioc, 1)) != MPI_IOC_STATE_READY) {
2579 if (ioc_state == MPI_IOC_STATE_OPERATIONAL) {
2580 /*
2581 * BIOS or previous driver load left IOC in OP state.
2582 * Reset messaging FIFOs.
2583 */
2584 if ((r = SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, sleepFlag)) != 0) {
2585 printk(MYIOC_s_ERR_FMT "IOC msg unit reset failed!\n", ioc->name);
2586 return -2;
2587 }
2588 } else if (ioc_state == MPI_IOC_STATE_RESET) {
2589 /*
2590 * Something is wrong. Try to get IOC back
2591 * to a known state.
2592 */
2593 if ((r = SendIocReset(ioc, MPI_FUNCTION_IO_UNIT_RESET, sleepFlag)) != 0) {
2594 printk(MYIOC_s_ERR_FMT "IO unit reset failed!\n", ioc->name);
2595 return -3;
2596 }
2597 }
2598
2599 ii++; cntdn--;
2600 if (!cntdn) {
2601 printk(MYIOC_s_ERR_FMT "Wait IOC_READY state timeout(%d)!\n",
2602 ioc->name, (int)((ii+5)/HZ));
2603 return -ETIME;
2604 }
2605
2606 if (sleepFlag == CAN_SLEEP) {
2607 msleep(1);
2608 } else {
2609 mdelay (1); /* 1 msec delay */
2610 }
2611
2612 }
2613
2614 if (statefault < 3) {
2615 printk(MYIOC_s_INFO_FMT "Recovered from %s\n",
2616 ioc->name,
2617 statefault==1 ? "stuck handshake" : "IOC FAULT");
2618 }
2619
2620 return hard_reset_done;
2621 }
2622
2623 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2624 /**
2625 * mpt_GetIocState - Get the current state of a MPT adapter.
2626 * @ioc: Pointer to MPT_ADAPTER structure
2627 * @cooked: Request raw or cooked IOC state
2628 *
2629 * Returns all IOC Doorbell register bits if cooked==0, else just the
2630 * Doorbell bits in MPI_IOC_STATE_MASK.
2631 */
2632 u32
2633 mpt_GetIocState(MPT_ADAPTER *ioc, int cooked)
2634 {
2635 u32 s, sc;
2636
2637 /* Get! */
2638 s = CHIPREG_READ32(&ioc->chip->Doorbell);
2639 sc = s & MPI_IOC_STATE_MASK;
2640
2641 /* Save! */
2642 ioc->last_state = sc;
2643
2644 return cooked ? sc : s;
2645 }
2646
2647 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2648 /**
2649 * GetIocFacts - Send IOCFacts request to MPT adapter.
2650 * @ioc: Pointer to MPT_ADAPTER structure
2651 * @sleepFlag: Specifies whether the process can sleep
2652 * @reason: If recovery, only update facts.
2653 *
2654 * Returns 0 for success, non-zero for failure.
2655 */
2656 static int
2657 GetIocFacts(MPT_ADAPTER *ioc, int sleepFlag, int reason)
2658 {
2659 IOCFacts_t get_facts;
2660 IOCFactsReply_t *facts;
2661 int r;
2662 int req_sz;
2663 int reply_sz;
2664 int sz;
2665 u32 status, vv;
2666 u8 shiftFactor=1;
2667
2668 /* IOC *must* NOT be in RESET state! */
2669 if (ioc->last_state == MPI_IOC_STATE_RESET) {
2670 printk(MYIOC_s_ERR_FMT "Can't get IOCFacts NOT READY! (%08x)\n",
2671 ioc->name, ioc->last_state );
2672 return -44;
2673 }
2674
2675 facts = &ioc->facts;
2676
2677 /* Destination (reply area)... */
2678 reply_sz = sizeof(*facts);
2679 memset(facts, 0, reply_sz);
2680
2681 /* Request area (get_facts on the stack right now!) */
2682 req_sz = sizeof(get_facts);
2683 memset(&get_facts, 0, req_sz);
2684
2685 get_facts.Function = MPI_FUNCTION_IOC_FACTS;
2686 /* Assert: All other get_facts fields are zero! */
2687
2688 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2689 "Sending get IocFacts request req_sz=%d reply_sz=%d\n",
2690 ioc->name, req_sz, reply_sz));
2691
2692 /* No non-zero fields in the get_facts request are greater than
2693 * 1 byte in size, so we can just fire it off as is.
2694 */
2695 r = mpt_handshake_req_reply_wait(ioc, req_sz, (u32*)&get_facts,
2696 reply_sz, (u16*)facts, 5 /*seconds*/, sleepFlag);
2697 if (r != 0)
2698 return r;
2699
2700 /*
2701 * Now byte swap (GRRR) the necessary fields before any further
2702 * inspection of reply contents.
2703 *
2704 * But need to do some sanity checks on MsgLength (byte) field
2705 * to make sure we don't zero IOC's req_sz!
2706 */
2707 /* Did we get a valid reply? */
2708 if (facts->MsgLength > offsetof(IOCFactsReply_t, RequestFrameSize)/sizeof(u32)) {
2709 if (reason == MPT_HOSTEVENT_IOC_BRINGUP) {
2710 /*
2711 * If not been here, done that, save off first WhoInit value
2712 */
2713 if (ioc->FirstWhoInit == WHOINIT_UNKNOWN)
2714 ioc->FirstWhoInit = facts->WhoInit;
2715 }
2716
2717 facts->MsgVersion = le16_to_cpu(facts->MsgVersion);
2718 facts->MsgContext = le32_to_cpu(facts->MsgContext);
2719 facts->IOCExceptions = le16_to_cpu(facts->IOCExceptions);
2720 facts->IOCStatus = le16_to_cpu(facts->IOCStatus);
2721 facts->IOCLogInfo = le32_to_cpu(facts->IOCLogInfo);
2722 status = le16_to_cpu(facts->IOCStatus) & MPI_IOCSTATUS_MASK;
2723 /* CHECKME! IOCStatus, IOCLogInfo */
2724
2725 facts->ReplyQueueDepth = le16_to_cpu(facts->ReplyQueueDepth);
2726 facts->RequestFrameSize = le16_to_cpu(facts->RequestFrameSize);
2727
2728 /*
2729 * FC f/w version changed between 1.1 and 1.2
2730 * Old: u16{Major(4),Minor(4),SubMinor(8)}
2731 * New: u32{Major(8),Minor(8),Unit(8),Dev(8)}
2732 */
2733 if (facts->MsgVersion < 0x0102) {
2734 /*
2735 * Handle old FC f/w style, convert to new...
2736 */
2737 u16 oldv = le16_to_cpu(facts->Reserved_0101_FWVersion);
2738 facts->FWVersion.Word =
2739 ((oldv<<12) & 0xFF000000) |
2740 ((oldv<<8) & 0x000FFF00);
2741 } else
2742 facts->FWVersion.Word = le32_to_cpu(facts->FWVersion.Word);
2743
2744 facts->ProductID = le16_to_cpu(facts->ProductID);
2745 if ((ioc->facts.ProductID & MPI_FW_HEADER_PID_PROD_MASK)
2746 > MPI_FW_HEADER_PID_PROD_TARGET_SCSI)
2747 ioc->ir_firmware = 1;
2748 facts->CurrentHostMfaHighAddr =
2749 le32_to_cpu(facts->CurrentHostMfaHighAddr);
2750 facts->GlobalCredits = le16_to_cpu(facts->GlobalCredits);
2751 facts->CurrentSenseBufferHighAddr =
2752 le32_to_cpu(facts->CurrentSenseBufferHighAddr);
2753 facts->CurReplyFrameSize =
2754 le16_to_cpu(facts->CurReplyFrameSize);
2755 facts->IOCCapabilities = le32_to_cpu(facts->IOCCapabilities);
2756
2757 /*
2758 * Handle NEW (!) IOCFactsReply fields in MPI-1.01.xx
2759 * Older MPI-1.00.xx struct had 13 dwords, and enlarged
2760 * to 14 in MPI-1.01.0x.
2761 */
2762 if (facts->MsgLength >= (offsetof(IOCFactsReply_t,FWImageSize) + 7)/4 &&
2763 facts->MsgVersion > 0x0100) {
2764 facts->FWImageSize = le32_to_cpu(facts->FWImageSize);
2765 }
2766
2767 sz = facts->FWImageSize;
2768 if ( sz & 0x01 )
2769 sz += 1;
2770 if ( sz & 0x02 )
2771 sz += 2;
2772 facts->FWImageSize = sz;
2773
2774 if (!facts->RequestFrameSize) {
2775 /* Something is wrong! */
2776 printk(MYIOC_s_ERR_FMT "IOC reported invalid 0 request size!\n",
2777 ioc->name);
2778 return -55;
2779 }
2780
2781 r = sz = facts->BlockSize;
2782 vv = ((63 / (sz * 4)) + 1) & 0x03;
2783 ioc->NB_for_64_byte_frame = vv;
2784 while ( sz )
2785 {
2786 shiftFactor++;
2787 sz = sz >> 1;
2788 }
2789 ioc->NBShiftFactor = shiftFactor;
2790 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2791 "NB_for_64_byte_frame=%x NBShiftFactor=%x BlockSize=%x\n",
2792 ioc->name, vv, shiftFactor, r));
2793
2794 if (reason == MPT_HOSTEVENT_IOC_BRINGUP) {
2795 /*
2796 * Set values for this IOC's request & reply frame sizes,
2797 * and request & reply queue depths...
2798 */
2799 ioc->req_sz = min(MPT_DEFAULT_FRAME_SIZE, facts->RequestFrameSize * 4);
2800 ioc->req_depth = min_t(int, MPT_MAX_REQ_DEPTH, facts->GlobalCredits);
2801 ioc->reply_sz = MPT_REPLY_FRAME_SIZE;
2802 ioc->reply_depth = min_t(int, MPT_DEFAULT_REPLY_DEPTH, facts->ReplyQueueDepth);
2803
2804 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "reply_sz=%3d, reply_depth=%4d\n",
2805 ioc->name, ioc->reply_sz, ioc->reply_depth));
2806 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "req_sz =%3d, req_depth =%4d\n",
2807 ioc->name, ioc->req_sz, ioc->req_depth));
2808
2809 /* Get port facts! */
2810 if ( (r = GetPortFacts(ioc, 0, sleepFlag)) != 0 )
2811 return r;
2812 }
2813 } else {
2814 printk(MYIOC_s_ERR_FMT
2815 "Invalid IOC facts reply, msgLength=%d offsetof=%zd!\n",
2816 ioc->name, facts->MsgLength, (offsetof(IOCFactsReply_t,
2817 RequestFrameSize)/sizeof(u32)));
2818 return -66;
2819 }
2820
2821 return 0;
2822 }
2823
2824 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2825 /**
2826 * GetPortFacts - Send PortFacts request to MPT adapter.
2827 * @ioc: Pointer to MPT_ADAPTER structure
2828 * @portnum: Port number
2829 * @sleepFlag: Specifies whether the process can sleep
2830 *
2831 * Returns 0 for success, non-zero for failure.
2832 */
2833 static int
2834 GetPortFacts(MPT_ADAPTER *ioc, int portnum, int sleepFlag)
2835 {
2836 PortFacts_t get_pfacts;
2837 PortFactsReply_t *pfacts;
2838 int ii;
2839 int req_sz;
2840 int reply_sz;
2841 int max_id;
2842
2843 /* IOC *must* NOT be in RESET state! */
2844 if (ioc->last_state == MPI_IOC_STATE_RESET) {
2845 printk(MYIOC_s_ERR_FMT "Can't get PortFacts NOT READY! (%08x)\n",
2846 ioc->name, ioc->last_state );
2847 return -4;
2848 }
2849
2850 pfacts = &ioc->pfacts[portnum];
2851
2852 /* Destination (reply area)... */
2853 reply_sz = sizeof(*pfacts);
2854 memset(pfacts, 0, reply_sz);
2855
2856 /* Request area (get_pfacts on the stack right now!) */
2857 req_sz = sizeof(get_pfacts);
2858 memset(&get_pfacts, 0, req_sz);
2859
2860 get_pfacts.Function = MPI_FUNCTION_PORT_FACTS;
2861 get_pfacts.PortNumber = portnum;
2862 /* Assert: All other get_pfacts fields are zero! */
2863
2864 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending get PortFacts(%d) request\n",
2865 ioc->name, portnum));
2866
2867 /* No non-zero fields in the get_pfacts request are greater than
2868 * 1 byte in size, so we can just fire it off as is.
2869 */
2870 ii = mpt_handshake_req_reply_wait(ioc, req_sz, (u32*)&get_pfacts,
2871 reply_sz, (u16*)pfacts, 5 /*seconds*/, sleepFlag);
2872 if (ii != 0)
2873 return ii;
2874
2875 /* Did we get a valid reply? */
2876
2877 /* Now byte swap the necessary fields in the response. */
2878 pfacts->MsgContext = le32_to_cpu(pfacts->MsgContext);
2879 pfacts->IOCStatus = le16_to_cpu(pfacts->IOCStatus);
2880 pfacts->IOCLogInfo = le32_to_cpu(pfacts->IOCLogInfo);
2881 pfacts->MaxDevices = le16_to_cpu(pfacts->MaxDevices);
2882 pfacts->PortSCSIID = le16_to_cpu(pfacts->PortSCSIID);
2883 pfacts->ProtocolFlags = le16_to_cpu(pfacts->ProtocolFlags);
2884 pfacts->MaxPostedCmdBuffers = le16_to_cpu(pfacts->MaxPostedCmdBuffers);
2885 pfacts->MaxPersistentIDs = le16_to_cpu(pfacts->MaxPersistentIDs);
2886 pfacts->MaxLanBuckets = le16_to_cpu(pfacts->MaxLanBuckets);
2887
2888 max_id = (ioc->bus_type == SAS) ? pfacts->PortSCSIID :
2889 pfacts->MaxDevices;
2890 ioc->devices_per_bus = (max_id > 255) ? 256 : max_id;
2891 ioc->number_of_buses = (ioc->devices_per_bus < 256) ? 1 : max_id/256;
2892
2893 /*
2894 * Place all the devices on channels
2895 *
2896 * (for debuging)
2897 */
2898 if (mpt_channel_mapping) {
2899 ioc->devices_per_bus = 1;
2900 ioc->number_of_buses = (max_id > 255) ? 255 : max_id;
2901 }
2902
2903 return 0;
2904 }
2905
2906 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2907 /**
2908 * SendIocInit - Send IOCInit request to MPT adapter.
2909 * @ioc: Pointer to MPT_ADAPTER structure
2910 * @sleepFlag: Specifies whether the process can sleep
2911 *
2912 * Send IOCInit followed by PortEnable to bring IOC to OPERATIONAL state.
2913 *
2914 * Returns 0 for success, non-zero for failure.
2915 */
2916 static int
2917 SendIocInit(MPT_ADAPTER *ioc, int sleepFlag)
2918 {
2919 IOCInit_t ioc_init;
2920 MPIDefaultReply_t init_reply;
2921 u32 state;
2922 int r;
2923 int count;
2924 int cntdn;
2925
2926 memset(&ioc_init, 0, sizeof(ioc_init));
2927 memset(&init_reply, 0, sizeof(init_reply));
2928
2929 ioc_init.WhoInit = MPI_WHOINIT_HOST_DRIVER;
2930 ioc_init.Function = MPI_FUNCTION_IOC_INIT;
2931
2932 /* If we are in a recovery mode and we uploaded the FW image,
2933 * then this pointer is not NULL. Skip the upload a second time.
2934 * Set this flag if cached_fw set for either IOC.
2935 */
2936 if (ioc->facts.Flags & MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT)
2937 ioc->upload_fw = 1;
2938 else
2939 ioc->upload_fw = 0;
2940 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "upload_fw %d facts.Flags=%x\n",
2941 ioc->name, ioc->upload_fw, ioc->facts.Flags));
2942
2943 ioc_init.MaxDevices = (U8)ioc->devices_per_bus;
2944 ioc_init.MaxBuses = (U8)ioc->number_of_buses;
2945 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "facts.MsgVersion=%x\n",
2946 ioc->name, ioc->facts.MsgVersion));
2947 if (ioc->facts.MsgVersion >= MPI_VERSION_01_05) {
2948 // set MsgVersion and HeaderVersion host driver was built with
2949 ioc_init.MsgVersion = cpu_to_le16(MPI_VERSION);
2950 ioc_init.HeaderVersion = cpu_to_le16(MPI_HEADER_VERSION);
2951
2952 if (ioc->facts.Flags & MPI_IOCFACTS_FLAGS_HOST_PAGE_BUFFER_PERSISTENT) {
2953 ioc_init.HostPageBufferSGE = ioc->facts.HostPageBufferSGE;
2954 } else if(mpt_host_page_alloc(ioc, &ioc_init))
2955 return -99;
2956 }
2957 ioc_init.ReplyFrameSize = cpu_to_le16(ioc->reply_sz); /* in BYTES */
2958
2959 if (sizeof(dma_addr_t) == sizeof(u64)) {
2960 /* Save the upper 32-bits of the request
2961 * (reply) and sense buffers.
2962 */
2963 ioc_init.HostMfaHighAddr = cpu_to_le32((u32)((u64)ioc->alloc_dma >> 32));
2964 ioc_init.SenseBufferHighAddr = cpu_to_le32((u32)((u64)ioc->sense_buf_pool_dma >> 32));
2965 } else {
2966 /* Force 32-bit addressing */
2967 ioc_init.HostMfaHighAddr = cpu_to_le32(0);
2968 ioc_init.SenseBufferHighAddr = cpu_to_le32(0);
2969 }
2970
2971 ioc->facts.CurrentHostMfaHighAddr = ioc_init.HostMfaHighAddr;
2972 ioc->facts.CurrentSenseBufferHighAddr = ioc_init.SenseBufferHighAddr;
2973 ioc->facts.MaxDevices = ioc_init.MaxDevices;
2974 ioc->facts.MaxBuses = ioc_init.MaxBuses;
2975
2976 dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending IOCInit (req @ %p)\n",
2977 ioc->name, &ioc_init));
2978
2979 r = mpt_handshake_req_reply_wait(ioc, sizeof(IOCInit_t), (u32*)&ioc_init,
2980 sizeof(MPIDefaultReply_t), (u16*)&init_reply, 10 /*seconds*/, sleepFlag);
2981 if (r != 0) {
2982 printk(MYIOC_s_ERR_FMT "Sending IOCInit failed(%d)!\n",ioc->name, r);
2983 return r;
2984 }
2985
2986 /* No need to byte swap the multibyte fields in the reply
2987 * since we don't even look at its contents.
2988 */
2989
2990 dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending PortEnable (req @ %p)\n",
2991 ioc->name, &ioc_init));
2992
2993 if ((r = SendPortEnable(ioc, 0, sleepFlag)) != 0) {
2994 printk(MYIOC_s_ERR_FMT "Sending PortEnable failed(%d)!\n",ioc->name, r);
2995 return r;
2996 }
2997
2998 /* YIKES! SUPER IMPORTANT!!!
2999 * Poll IocState until _OPERATIONAL while IOC is doing
3000 * LoopInit and TargetDiscovery!
3001 */
3002 count = 0;
3003 cntdn = ((sleepFlag == CAN_SLEEP) ? HZ : 1000) * 60; /* 60 seconds */
3004 state = mpt_GetIocState(ioc, 1);
3005 while (state != MPI_IOC_STATE_OPERATIONAL && --cntdn) {
3006 if (sleepFlag == CAN_SLEEP) {
3007 msleep(1);
3008 } else {
3009 mdelay(1);
3010 }
3011
3012 if (!cntdn) {
3013 printk(MYIOC_s_ERR_FMT "Wait IOC_OP state timeout(%d)!\n",
3014 ioc->name, (int)((count+5)/HZ));
3015 return -9;
3016 }
3017
3018 state = mpt_GetIocState(ioc, 1);
3019 count++;
3020 }
3021 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Wait IOC_OPERATIONAL state (cnt=%d)\n",
3022 ioc->name, count));
3023
3024 ioc->aen_event_read_flag=0;
3025 return r;
3026 }
3027
3028 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3029 /**
3030 * SendPortEnable - Send PortEnable request to MPT adapter port.
3031 * @ioc: Pointer to MPT_ADAPTER structure
3032 * @portnum: Port number to enable
3033 * @sleepFlag: Specifies whether the process can sleep
3034 *
3035 * Send PortEnable to bring IOC to OPERATIONAL state.
3036 *
3037 * Returns 0 for success, non-zero for failure.
3038 */
3039 static int
3040 SendPortEnable(MPT_ADAPTER *ioc, int portnum, int sleepFlag)
3041 {
3042 PortEnable_t port_enable;
3043 MPIDefaultReply_t reply_buf;
3044 int rc;
3045 int req_sz;
3046 int reply_sz;
3047
3048 /* Destination... */
3049 reply_sz = sizeof(MPIDefaultReply_t);
3050 memset(&reply_buf, 0, reply_sz);
3051
3052 req_sz = sizeof(PortEnable_t);
3053 memset(&port_enable, 0, req_sz);
3054
3055 port_enable.Function = MPI_FUNCTION_PORT_ENABLE;
3056 port_enable.PortNumber = portnum;
3057 /* port_enable.ChainOffset = 0; */
3058 /* port_enable.MsgFlags = 0; */
3059 /* port_enable.MsgContext = 0; */
3060
3061 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending Port(%d)Enable (req @ %p)\n",
3062 ioc->name, portnum, &port_enable));
3063
3064 /* RAID FW may take a long time to enable
3065 */
3066 if (ioc->ir_firmware || ioc->bus_type == SAS) {
3067 rc = mpt_handshake_req_reply_wait(ioc, req_sz,
3068 (u32*)&port_enable, reply_sz, (u16*)&reply_buf,
3069 300 /*seconds*/, sleepFlag);
3070 } else {
3071 rc = mpt_handshake_req_reply_wait(ioc, req_sz,
3072 (u32*)&port_enable, reply_sz, (u16*)&reply_buf,
3073 30 /*seconds*/, sleepFlag);
3074 }
3075 return rc;
3076 }
3077
3078 /**
3079 * mpt_alloc_fw_memory - allocate firmware memory
3080 * @ioc: Pointer to MPT_ADAPTER structure
3081 * @size: total FW bytes
3082 *
3083 * If memory has already been allocated, the same (cached) value
3084 * is returned.
3085 *
3086 * Return 0 if successfull, or non-zero for failure
3087 **/
3088 int
3089 mpt_alloc_fw_memory(MPT_ADAPTER *ioc, int size)
3090 {
3091 int rc;
3092
3093 if (ioc->cached_fw) {
3094 rc = 0; /* use already allocated memory */
3095 goto out;
3096 }
3097 else if (ioc->alt_ioc && ioc->alt_ioc->cached_fw) {
3098 ioc->cached_fw = ioc->alt_ioc->cached_fw; /* use alt_ioc's memory */
3099 ioc->cached_fw_dma = ioc->alt_ioc->cached_fw_dma;
3100 rc = 0;
3101 goto out;
3102 }
3103 ioc->cached_fw = pci_alloc_consistent(ioc->pcidev, size, &ioc->cached_fw_dma);
3104 if (!ioc->cached_fw) {
3105 printk(MYIOC_s_ERR_FMT "Unable to allocate memory for the cached firmware image!\n",
3106 ioc->name);
3107 rc = -1;
3108 } else {
3109 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "FW Image @ %p[%p], sz=%d[%x] bytes\n",
3110 ioc->name, ioc->cached_fw, (void *)(ulong)ioc->cached_fw_dma, size, size));
3111 ioc->alloc_total += size;
3112 rc = 0;
3113 }
3114 out:
3115 return rc;
3116 }
3117
3118 /**
3119 * mpt_free_fw_memory - free firmware memory
3120 * @ioc: Pointer to MPT_ADAPTER structure
3121 *
3122 * If alt_img is NULL, delete from ioc structure.
3123 * Else, delete a secondary image in same format.
3124 **/
3125 void
3126 mpt_free_fw_memory(MPT_ADAPTER *ioc)
3127 {
3128 int sz;
3129
3130 if (!ioc->cached_fw)
3131 return;
3132
3133 sz = ioc->facts.FWImageSize;
3134 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "free_fw_memory: FW Image @ %p[%p], sz=%d[%x] bytes\n",
3135 ioc->name, ioc->cached_fw, (void *)(ulong)ioc->cached_fw_dma, sz, sz));
3136 pci_free_consistent(ioc->pcidev, sz, ioc->cached_fw, ioc->cached_fw_dma);
3137 ioc->alloc_total -= sz;
3138 ioc->cached_fw = NULL;
3139 }
3140
3141 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3142 /**
3143 * mpt_do_upload - Construct and Send FWUpload request to MPT adapter port.
3144 * @ioc: Pointer to MPT_ADAPTER structure
3145 * @sleepFlag: Specifies whether the process can sleep
3146 *
3147 * Returns 0 for success, >0 for handshake failure
3148 * <0 for fw upload failure.
3149 *
3150 * Remark: If bound IOC and a successful FWUpload was performed
3151 * on the bound IOC, the second image is discarded
3152 * and memory is free'd. Both channels must upload to prevent
3153 * IOC from running in degraded mode.
3154 */
3155 static int
3156 mpt_do_upload(MPT_ADAPTER *ioc, int sleepFlag)
3157 {
3158 u8 reply[sizeof(FWUploadReply_t)];
3159 FWUpload_t *prequest;
3160 FWUploadReply_t *preply;
3161 FWUploadTCSGE_t *ptcsge;
3162 int sgeoffset;
3163 u32 flagsLength;
3164 int ii, sz, reply_sz;
3165 int cmdStatus;
3166
3167 /* If the image size is 0, we are done.
3168 */
3169 if ((sz = ioc->facts.FWImageSize) == 0)
3170 return 0;
3171
3172 if (mpt_alloc_fw_memory(ioc, ioc->facts.FWImageSize) != 0)
3173 return -ENOMEM;
3174
3175 dinitprintk(ioc, printk(MYIOC_s_INFO_FMT ": FW Image @ %p[%p], sz=%d[%x] bytes\n",
3176 ioc->name, ioc->cached_fw, (void *)(ulong)ioc->cached_fw_dma, sz, sz));
3177
3178 prequest = (sleepFlag == NO_SLEEP) ? kzalloc(ioc->req_sz, GFP_ATOMIC) :
3179 kzalloc(ioc->req_sz, GFP_KERNEL);
3180 if (!prequest) {
3181 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "fw upload failed "
3182 "while allocating memory \n", ioc->name));
3183 mpt_free_fw_memory(ioc);
3184 return -ENOMEM;
3185 }
3186
3187 preply = (FWUploadReply_t *)&reply;
3188
3189 reply_sz = sizeof(reply);
3190 memset(preply, 0, reply_sz);
3191
3192 prequest->ImageType = MPI_FW_UPLOAD_ITYPE_FW_IOC_MEM;
3193 prequest->Function = MPI_FUNCTION_FW_UPLOAD;
3194
3195 ptcsge = (FWUploadTCSGE_t *) &prequest->SGL;
3196 ptcsge->DetailsLength = 12;
3197 ptcsge->Flags = MPI_SGE_FLAGS_TRANSACTION_ELEMENT;
3198 ptcsge->ImageSize = cpu_to_le32(sz);
3199 ptcsge++;
3200
3201 sgeoffset = sizeof(FWUpload_t) - sizeof(SGE_MPI_UNION) + sizeof(FWUploadTCSGE_t);
3202
3203 flagsLength = MPT_SGE_FLAGS_SSIMPLE_READ | sz;
3204 mpt_add_sge((char *)ptcsge, flagsLength, ioc->cached_fw_dma);
3205
3206 sgeoffset += sizeof(u32) + sizeof(dma_addr_t);
3207 dinitprintk(ioc, printk(MYIOC_s_INFO_FMT ": Sending FW Upload (req @ %p) sgeoffset=%d \n",
3208 ioc->name, prequest, sgeoffset));
3209 DBG_DUMP_FW_REQUEST_FRAME(ioc, (u32 *)prequest);
3210
3211 ii = mpt_handshake_req_reply_wait(ioc, sgeoffset, (u32*)prequest,
3212 reply_sz, (u16*)preply, 65 /*seconds*/, sleepFlag);
3213
3214 dinitprintk(ioc, printk(MYIOC_s_INFO_FMT ": FW Upload completed rc=%x \n", ioc->name, ii));
3215
3216 cmdStatus = -EFAULT;
3217 if (ii == 0) {
3218 /* Handshake transfer was complete and successful.
3219 * Check the Reply Frame.
3220 */
3221 int status, transfer_sz;
3222 status = le16_to_cpu(preply->IOCStatus);
3223 if (status == MPI_IOCSTATUS_SUCCESS) {
3224 transfer_sz = le32_to_cpu(preply->ActualImageSize);
3225 if (transfer_sz == sz)
3226 cmdStatus = 0;
3227 }
3228 }
3229 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT ": do_upload cmdStatus=%d \n",
3230 ioc->name, cmdStatus));
3231
3232
3233 if (cmdStatus) {
3234
3235 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT ": fw upload failed, freeing image \n",
3236 ioc->name));
3237 mpt_free_fw_memory(ioc);
3238 }
3239 kfree(prequest);
3240
3241 return cmdStatus;
3242 }
3243
3244 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3245 /**
3246 * mpt_downloadboot - DownloadBoot code
3247 * @ioc: Pointer to MPT_ADAPTER structure
3248 * @pFwHeader: Pointer to firmware header info
3249 * @sleepFlag: Specifies whether the process can sleep
3250 *
3251 * FwDownloadBoot requires Programmed IO access.
3252 *
3253 * Returns 0 for success
3254 * -1 FW Image size is 0
3255 * -2 No valid cached_fw Pointer
3256 * <0 for fw upload failure.
3257 */
3258 static int
3259 mpt_downloadboot(MPT_ADAPTER *ioc, MpiFwHeader_t *pFwHeader, int sleepFlag)
3260 {
3261 MpiExtImageHeader_t *pExtImage;
3262 u32 fwSize;
3263 u32 diag0val;
3264 int count;
3265 u32 *ptrFw;
3266 u32 diagRwData;
3267 u32 nextImage;
3268 u32 load_addr;
3269 u32 ioc_state=0;
3270
3271 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "downloadboot: fw size 0x%x (%d), FW Ptr %p\n",
3272 ioc->name, pFwHeader->ImageSize, pFwHeader->ImageSize, pFwHeader));
3273
3274 CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
3275 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_1ST_KEY_VALUE);
3276 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_2ND_KEY_VALUE);
3277 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_3RD_KEY_VALUE);
3278 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_4TH_KEY_VALUE);
3279 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_5TH_KEY_VALUE);
3280
3281 CHIPREG_WRITE32(&ioc->chip->Diagnostic, (MPI_DIAG_PREVENT_IOC_BOOT | MPI_DIAG_DISABLE_ARM));
3282
3283 /* wait 1 msec */
3284 if (sleepFlag == CAN_SLEEP) {
3285 msleep(1);
3286 } else {
3287 mdelay (1);
3288 }
3289
3290 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3291 CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val | MPI_DIAG_RESET_ADAPTER);
3292
3293 for (count = 0; count < 30; count ++) {
3294 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3295 if (!(diag0val & MPI_DIAG_RESET_ADAPTER)) {
3296 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "RESET_ADAPTER cleared, count=%d\n",
3297 ioc->name, count));
3298 break;
3299 }
3300 /* wait .1 sec */
3301 if (sleepFlag == CAN_SLEEP) {
3302 msleep (100);
3303 } else {
3304 mdelay (100);
3305 }
3306 }
3307
3308 if ( count == 30 ) {
3309 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "downloadboot failed! "
3310 "Unable to get MPI_DIAG_DRWE mode, diag0val=%x\n",
3311 ioc->name, diag0val));
3312 return -3;
3313 }
3314
3315 CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
3316 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_1ST_KEY_VALUE);
3317 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_2ND_KEY_VALUE);
3318 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_3RD_KEY_VALUE);
3319 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_4TH_KEY_VALUE);
3320 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_5TH_KEY_VALUE);
3321
3322 /* Set the DiagRwEn and Disable ARM bits */
3323 CHIPREG_WRITE32(&ioc->chip->Diagnostic, (MPI_DIAG_RW_ENABLE | MPI_DIAG_DISABLE_ARM));
3324
3325 fwSize = (pFwHeader->ImageSize + 3)/4;
3326 ptrFw = (u32 *) pFwHeader;
3327
3328 /* Write the LoadStartAddress to the DiagRw Address Register
3329 * using Programmed IO
3330 */
3331 if (ioc->errata_flag_1064)
3332 pci_enable_io_access(ioc->pcidev);
3333
3334 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, pFwHeader->LoadStartAddress);
3335 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "LoadStart addr written 0x%x \n",
3336 ioc->name, pFwHeader->LoadStartAddress));
3337
3338 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Write FW Image: 0x%x bytes @ %p\n",
3339 ioc->name, fwSize*4, ptrFw));
3340 while (fwSize--) {
3341 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwData, *ptrFw++);
3342 }
3343
3344 nextImage = pFwHeader->NextImageHeaderOffset;
3345 while (nextImage) {
3346 pExtImage = (MpiExtImageHeader_t *) ((char *)pFwHeader + nextImage);
3347
3348 load_addr = pExtImage->LoadStartAddress;
3349
3350 fwSize = (pExtImage->ImageSize + 3) >> 2;
3351 ptrFw = (u32 *)pExtImage;
3352
3353 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Write Ext Image: 0x%x (%d) bytes @ %p load_addr=%x\n",
3354 ioc->name, fwSize*4, fwSize*4, ptrFw, load_addr));
3355 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, load_addr);
3356
3357 while (fwSize--) {
3358 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwData, *ptrFw++);
3359 }
3360 nextImage = pExtImage->NextImageHeaderOffset;
3361 }
3362
3363 /* Write the IopResetVectorRegAddr */
3364 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Write IopResetVector Addr=%x! \n", ioc->name, pFwHeader->IopResetRegAddr));
3365 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, pFwHeader->IopResetRegAddr);
3366
3367 /* Write the IopResetVectorValue */
3368 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Write IopResetVector Value=%x! \n", ioc->name, pFwHeader->IopResetVectorValue));
3369 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwData, pFwHeader->IopResetVectorValue);
3370
3371 /* Clear the internal flash bad bit - autoincrementing register,
3372 * so must do two writes.
3373 */
3374 if (ioc->bus_type == SPI) {
3375 /*
3376 * 1030 and 1035 H/W errata, workaround to access
3377 * the ClearFlashBadSignatureBit
3378 */
3379 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, 0x3F000000);
3380 diagRwData = CHIPREG_PIO_READ32(&ioc->pio_chip->DiagRwData);
3381 diagRwData |= 0x40000000;
3382 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, 0x3F000000);
3383 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwData, diagRwData);
3384
3385 } else /* if((ioc->bus_type == SAS) || (ioc->bus_type == FC)) */ {
3386 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3387 CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val |
3388 MPI_DIAG_CLEAR_FLASH_BAD_SIG);
3389
3390 /* wait 1 msec */
3391 if (sleepFlag == CAN_SLEEP) {
3392 msleep (1);
3393 } else {
3394 mdelay (1);
3395 }
3396 }
3397
3398 if (ioc->errata_flag_1064)
3399 pci_disable_io_access(ioc->pcidev);
3400
3401 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3402 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "downloadboot diag0val=%x, "
3403 "turning off PREVENT_IOC_BOOT, DISABLE_ARM, RW_ENABLE\n",
3404 ioc->name, diag0val));
3405 diag0val &= ~(MPI_DIAG_PREVENT_IOC_BOOT | MPI_DIAG_DISABLE_ARM | MPI_DIAG_RW_ENABLE);
3406 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "downloadboot now diag0val=%x\n",
3407 ioc->name, diag0val));
3408 CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val);
3409
3410 /* Write 0xFF to reset the sequencer */
3411 CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
3412
3413 if (ioc->bus_type == SAS) {
3414 ioc_state = mpt_GetIocState(ioc, 0);
3415 if ( (GetIocFacts(ioc, sleepFlag,
3416 MPT_HOSTEVENT_IOC_BRINGUP)) != 0 ) {
3417 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "GetIocFacts failed: IocState=%x\n",
3418 ioc->name, ioc_state));
3419 return -EFAULT;
3420 }
3421 }
3422
3423 for (count=0; count<HZ*20; count++) {
3424 if ((ioc_state = mpt_GetIocState(ioc, 0)) & MPI_IOC_STATE_READY) {
3425 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT
3426 "downloadboot successful! (count=%d) IocState=%x\n",
3427 ioc->name, count, ioc_state));
3428 if (ioc->bus_type == SAS) {
3429 return 0;
3430 }
3431 if ((SendIocInit(ioc, sleepFlag)) != 0) {
3432 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT
3433 "downloadboot: SendIocInit failed\n",
3434 ioc->name));
3435 return -EFAULT;
3436 }
3437 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT
3438 "downloadboot: SendIocInit successful\n",
3439 ioc->name));
3440 return 0;
3441 }
3442 if (sleepFlag == CAN_SLEEP) {
3443 msleep (10);
3444 } else {
3445 mdelay (10);
3446 }
3447 }
3448 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT
3449 "downloadboot failed! IocState=%x\n",ioc->name, ioc_state));
3450 return -EFAULT;
3451 }
3452
3453 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3454 /**
3455 * KickStart - Perform hard reset of MPT adapter.
3456 * @ioc: Pointer to MPT_ADAPTER structure
3457 * @force: Force hard reset
3458 * @sleepFlag: Specifies whether the process can sleep
3459 *
3460 * This routine places MPT adapter in diagnostic mode via the
3461 * WriteSequence register, and then performs a hard reset of adapter
3462 * via the Diagnostic register.
3463 *
3464 * Inputs: sleepflag - CAN_SLEEP (non-interrupt thread)
3465 * or NO_SLEEP (interrupt thread, use mdelay)
3466 * force - 1 if doorbell active, board fault state
3467 * board operational, IOC_RECOVERY or
3468 * IOC_BRINGUP and there is an alt_ioc.
3469 * 0 else
3470 *
3471 * Returns:
3472 * 1 - hard reset, READY
3473 * 0 - no reset due to History bit, READY
3474 * -1 - no reset due to History bit but not READY
3475 * OR reset but failed to come READY
3476 * -2 - no reset, could not enter DIAG mode
3477 * -3 - reset but bad FW bit
3478 */
3479 static int
3480 KickStart(MPT_ADAPTER *ioc, int force, int sleepFlag)
3481 {
3482 int hard_reset_done = 0;
3483 u32 ioc_state=0;
3484 int cnt,cntdn;
3485
3486 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "KickStarting!\n", ioc->name));
3487 if (ioc->bus_type == SPI) {
3488 /* Always issue a Msg Unit Reset first. This will clear some
3489 * SCSI bus hang conditions.
3490 */
3491 SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, sleepFlag);
3492
3493 if (sleepFlag == CAN_SLEEP) {
3494 msleep (1000);
3495 } else {
3496 mdelay (1000);
3497 }
3498 }
3499
3500 hard_reset_done = mpt_diag_reset(ioc, force, sleepFlag);
3501 if (hard_reset_done < 0)
3502 return hard_reset_done;
3503
3504 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Diagnostic reset successful!\n",
3505 ioc->name));
3506
3507 cntdn = ((sleepFlag == CAN_SLEEP) ? HZ : 1000) * 2; /* 2 seconds */
3508 for (cnt=0; cnt<cntdn; cnt++) {
3509 ioc_state = mpt_GetIocState(ioc, 1);
3510 if ((ioc_state == MPI_IOC_STATE_READY) || (ioc_state == MPI_IOC_STATE_OPERATIONAL)) {
3511 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "KickStart successful! (cnt=%d)\n",
3512 ioc->name, cnt));
3513 return hard_reset_done;
3514 }
3515 if (sleepFlag == CAN_SLEEP) {
3516 msleep (10);
3517 } else {
3518 mdelay (10);
3519 }
3520 }
3521
3522 dinitprintk(ioc, printk(MYIOC_s_ERR_FMT "Failed to come READY after reset! IocState=%x\n",
3523 ioc->name, mpt_GetIocState(ioc, 0)));
3524 return -1;
3525 }
3526
3527 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3528 /**
3529 * mpt_diag_reset - Perform hard reset of the adapter.
3530 * @ioc: Pointer to MPT_ADAPTER structure
3531 * @ignore: Set if to honor and clear to ignore
3532 * the reset history bit
3533 * @sleepFlag: CAN_SLEEP if called in a non-interrupt thread,
3534 * else set to NO_SLEEP (use mdelay instead)
3535 *
3536 * This routine places the adapter in diagnostic mode via the
3537 * WriteSequence register and then performs a hard reset of adapter
3538 * via the Diagnostic register. Adapter should be in ready state
3539 * upon successful completion.
3540 *
3541 * Returns: 1 hard reset successful
3542 * 0 no reset performed because reset history bit set
3543 * -2 enabling diagnostic mode failed
3544 * -3 diagnostic reset failed
3545 */
3546 static int
3547 mpt_diag_reset(MPT_ADAPTER *ioc, int ignore, int sleepFlag)
3548 {
3549 u32 diag0val;
3550 u32 doorbell;
3551 int hard_reset_done = 0;
3552 int count = 0;
3553 u32 diag1val = 0;
3554 MpiFwHeader_t *cached_fw; /* Pointer to FW */
3555
3556 /* Clear any existing interrupts */
3557 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
3558
3559 if (ioc->pcidev->device == MPI_MANUFACTPAGE_DEVID_SAS1078) {
3560 drsprintk(ioc, printk(MYIOC_s_WARN_FMT "%s: Doorbell=%p; 1078 reset "
3561 "address=%p\n", ioc->name, __FUNCTION__,
3562 &ioc->chip->Doorbell, &ioc->chip->Reset_1078));
3563 CHIPREG_WRITE32(&ioc->chip->Reset_1078, 0x07);
3564 if (sleepFlag == CAN_SLEEP)
3565 msleep(1);
3566 else
3567 mdelay(1);
3568
3569 for (count = 0; count < 60; count ++) {
3570 doorbell = CHIPREG_READ32(&ioc->chip->Doorbell);
3571 doorbell &= MPI_IOC_STATE_MASK;
3572
3573 drsprintk(ioc, printk(MYIOC_s_DEBUG_FMT
3574 "looking for READY STATE: doorbell=%x"
3575 " count=%d\n",
3576 ioc->name, doorbell, count));
3577 if (doorbell == MPI_IOC_STATE_READY) {
3578 return 1;
3579 }
3580
3581 /* wait 1 sec */
3582 if (sleepFlag == CAN_SLEEP)
3583 msleep(1000);
3584 else
3585 mdelay(1000);
3586 }
3587 return -1;
3588 }
3589
3590 /* Use "Diagnostic reset" method! (only thing available!) */
3591 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3592
3593 if (ioc->debug_level & MPT_DEBUG) {
3594 if (ioc->alt_ioc)
3595 diag1val = CHIPREG_READ32(&ioc->alt_ioc->chip->Diagnostic);
3596 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "DbG1: diag0=%08x, diag1=%08x\n",
3597 ioc->name, diag0val, diag1val));
3598 }
3599
3600 /* Do the reset if we are told to ignore the reset history
3601 * or if the reset history is 0
3602 */
3603 if (ignore || !(diag0val & MPI_DIAG_RESET_HISTORY)) {
3604 while ((diag0val & MPI_DIAG_DRWE) == 0) {
3605 /* Write magic sequence to WriteSequence register
3606 * Loop until in diagnostic mode
3607 */
3608 CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
3609 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_1ST_KEY_VALUE);
3610 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_2ND_KEY_VALUE);
3611 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_3RD_KEY_VALUE);
3612 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_4TH_KEY_VALUE);
3613 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_5TH_KEY_VALUE);
3614
3615 /* wait 100 msec */
3616 if (sleepFlag == CAN_SLEEP) {
3617 msleep (100);
3618 } else {
3619 mdelay (100);
3620 }
3621
3622 count++;
3623 if (count > 20) {
3624 printk(MYIOC_s_ERR_FMT "Enable Diagnostic mode FAILED! (%02xh)\n",
3625 ioc->name, diag0val);
3626 return -2;
3627
3628 }
3629
3630 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3631
3632 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Wrote magic DiagWriteEn sequence (%x)\n",
3633 ioc->name, diag0val));
3634 }
3635
3636 if (ioc->debug_level & MPT_DEBUG) {
3637 if (ioc->alt_ioc)
3638 diag1val = CHIPREG_READ32(&ioc->alt_ioc->chip->Diagnostic);
3639 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "DbG2: diag0=%08x, diag1=%08x\n",
3640 ioc->name, diag0val, diag1val));
3641 }
3642 /*
3643 * Disable the ARM (Bug fix)
3644 *
3645 */
3646 CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val | MPI_DIAG_DISABLE_ARM);
3647 mdelay(1);
3648
3649 /*
3650 * Now hit the reset bit in the Diagnostic register
3651 * (THE BIG HAMMER!) (Clears DRWE bit).
3652 */
3653 CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val | MPI_DIAG_RESET_ADAPTER);
3654 hard_reset_done = 1;
3655 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Diagnostic reset performed\n",
3656 ioc->name));
3657
3658 /*
3659 * Call each currently registered protocol IOC reset handler
3660 * with pre-reset indication.
3661 * NOTE: If we're doing _IOC_BRINGUP, there can be no
3662 * MptResetHandlers[] registered yet.
3663 */
3664 {
3665 u8 cb_idx;
3666 int r = 0;
3667
3668 for (cb_idx = MPT_MAX_PROTOCOL_DRIVERS-1; cb_idx; cb_idx--) {
3669 if (MptResetHandlers[cb_idx]) {
3670 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT
3671 "Calling IOC pre_reset handler #%d\n",
3672 ioc->name, cb_idx));
3673 r += mpt_signal_reset(cb_idx, ioc, MPT_IOC_PRE_RESET);
3674 if (ioc->alt_ioc) {
3675 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT
3676 "Calling alt-%s pre_reset handler #%d\n",
3677 ioc->name, ioc->alt_ioc->name, cb_idx));
3678 r += mpt_signal_reset(cb_idx, ioc->alt_ioc, MPT_IOC_PRE_RESET);
3679 }
3680 }
3681 }
3682 /* FIXME? Examine results here? */
3683 }
3684
3685 if (ioc->cached_fw)
3686 cached_fw = (MpiFwHeader_t *)ioc->cached_fw;
3687 else if (ioc->alt_ioc && ioc->alt_ioc->cached_fw)
3688 cached_fw = (MpiFwHeader_t *)ioc->alt_ioc->cached_fw;
3689 else
3690 cached_fw = NULL;
3691 if (cached_fw) {
3692 /* If the DownloadBoot operation fails, the
3693 * IOC will be left unusable. This is a fatal error
3694 * case. _diag_reset will return < 0
3695 */
3696 for (count = 0; count < 30; count ++) {
3697 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3698 if (!(diag0val & MPI_DIAG_RESET_ADAPTER)) {
3699 break;
3700 }
3701
3702 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "cached_fw: diag0val=%x count=%d\n",
3703 ioc->name, diag0val, count));
3704 /* wait 1 sec */
3705 if (sleepFlag == CAN_SLEEP) {
3706 msleep (1000);
3707 } else {
3708 mdelay (1000);
3709 }
3710 }
3711 if ((count = mpt_downloadboot(ioc, cached_fw, sleepFlag)) < 0) {
3712 printk(MYIOC_s_WARN_FMT
3713 "firmware downloadboot failure (%d)!\n", ioc->name, count);
3714 }
3715
3716 } else {
3717 /* Wait for FW to reload and for board
3718 * to go to the READY state.
3719 * Maximum wait is 60 seconds.
3720 * If fail, no error will check again
3721 * with calling program.
3722 */
3723 for (count = 0; count < 60; count ++) {
3724 doorbell = CHIPREG_READ32(&ioc->chip->Doorbell);
3725 doorbell &= MPI_IOC_STATE_MASK;
3726
3727 if (doorbell == MPI_IOC_STATE_READY) {
3728 break;
3729 }
3730
3731 /* wait 1 sec */
3732 if (sleepFlag == CAN_SLEEP) {
3733 msleep (1000);
3734 } else {
3735 mdelay (1000);
3736 }
3737 }
3738 }
3739 }
3740
3741 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3742 if (ioc->debug_level & MPT_DEBUG) {
3743 if (ioc->alt_ioc)
3744 diag1val = CHIPREG_READ32(&ioc->alt_ioc->chip->Diagnostic);
3745 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "DbG3: diag0=%08x, diag1=%08x\n",
3746 ioc->name, diag0val, diag1val));
3747 }
3748
3749 /* Clear RESET_HISTORY bit! Place board in the
3750 * diagnostic mode to update the diag register.
3751 */
3752 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3753 count = 0;
3754 while ((diag0val & MPI_DIAG_DRWE) == 0) {
3755 /* Write magic sequence to WriteSequence register
3756 * Loop until in diagnostic mode
3757 */
3758 CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
3759 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_1ST_KEY_VALUE);
3760 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_2ND_KEY_VALUE);
3761 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_3RD_KEY_VALUE);
3762 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_4TH_KEY_VALUE);
3763 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_5TH_KEY_VALUE);
3764
3765 /* wait 100 msec */
3766 if (sleepFlag == CAN_SLEEP) {
3767 msleep (100);
3768 } else {
3769 mdelay (100);
3770 }
3771
3772 count++;
3773 if (count > 20) {
3774 printk(MYIOC_s_ERR_FMT "Enable Diagnostic mode FAILED! (%02xh)\n",
3775 ioc->name, diag0val);
3776 break;
3777 }
3778 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3779 }
3780 diag0val &= ~MPI_DIAG_RESET_HISTORY;
3781 CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val);
3782 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3783 if (diag0val & MPI_DIAG_RESET_HISTORY) {
3784 printk(MYIOC_s_WARN_FMT "ResetHistory bit failed to clear!\n",
3785 ioc->name);
3786 }
3787
3788 /* Disable Diagnostic Mode
3789 */
3790 CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFFFFFFFF);
3791
3792 /* Check FW reload status flags.
3793 */
3794 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3795 if (diag0val & (MPI_DIAG_FLASH_BAD_SIG | MPI_DIAG_RESET_ADAPTER | MPI_DIAG_DISABLE_ARM)) {
3796 printk(MYIOC_s_ERR_FMT "Diagnostic reset FAILED! (%02xh)\n",
3797 ioc->name, diag0val);
3798 return -3;
3799 }
3800
3801 if (ioc->debug_level & MPT_DEBUG) {
3802 if (ioc->alt_ioc)
3803 diag1val = CHIPREG_READ32(&ioc->alt_ioc->chip->Diagnostic);
3804 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "DbG4: diag0=%08x, diag1=%08x\n",
3805 ioc->name, diag0val, diag1val));
3806 }
3807
3808 /*
3809 * Reset flag that says we've enabled event notification
3810 */
3811 ioc->facts.EventState = 0;
3812
3813 if (ioc->alt_ioc)
3814 ioc->alt_ioc->facts.EventState = 0;
3815
3816 return hard_reset_done;
3817 }
3818
3819 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3820 /**
3821 * SendIocReset - Send IOCReset request to MPT adapter.
3822 * @ioc: Pointer to MPT_ADAPTER structure
3823 * @reset_type: reset type, expected values are
3824 * %MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET or %MPI_FUNCTION_IO_UNIT_RESET
3825 * @sleepFlag: Specifies whether the process can sleep
3826 *
3827 * Send IOCReset request to the MPT adapter.
3828 *
3829 * Returns 0 for success, non-zero for failure.
3830 */
3831 static int
3832 SendIocReset(MPT_ADAPTER *ioc, u8 reset_type, int sleepFlag)
3833 {
3834 int r;
3835 u32 state;
3836 int cntdn, count;
3837
3838 drsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending IOC reset(0x%02x)!\n",
3839 ioc->name, reset_type));
3840 CHIPREG_WRITE32(&ioc->chip->Doorbell, reset_type<<MPI_DOORBELL_FUNCTION_SHIFT);
3841 if ((r = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0)
3842 return r;
3843
3844 /* FW ACK'd request, wait for READY state
3845 */
3846 count = 0;
3847 cntdn = ((sleepFlag == CAN_SLEEP) ? HZ : 1000) * 15; /* 15 seconds */
3848
3849 while ((state = mpt_GetIocState(ioc, 1)) != MPI_IOC_STATE_READY) {
3850 cntdn--;
3851 count++;
3852 if (!cntdn) {
3853 if (sleepFlag != CAN_SLEEP)
3854 count *= 10;
3855
3856 printk(MYIOC_s_ERR_FMT "Wait IOC_READY state timeout(%d)!\n",
3857 ioc->name, (int)((count+5)/HZ));
3858 return -ETIME;
3859 }
3860
3861 if (sleepFlag == CAN_SLEEP) {
3862 msleep(1);
3863 } else {
3864 mdelay (1); /* 1 msec delay */
3865 }
3866 }
3867
3868 /* TODO!
3869 * Cleanup all event stuff for this IOC; re-issue EventNotification
3870 * request if needed.
3871 */
3872 if (ioc->facts.Function)
3873 ioc->facts.EventState = 0;
3874
3875 return 0;
3876 }
3877
3878 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3879 /**
3880 * initChainBuffers - Allocate memory for and initialize chain buffers
3881 * @ioc: Pointer to MPT_ADAPTER structure
3882 *
3883 * Allocates memory for and initializes chain buffers,
3884 * chain buffer control arrays and spinlock.
3885 */
3886 static int
3887 initChainBuffers(MPT_ADAPTER *ioc)
3888 {
3889 u8 *mem;
3890 int sz, ii, num_chain;
3891 int scale, num_sge, numSGE;
3892
3893 /* ReqToChain size must equal the req_depth
3894 * index = req_idx
3895 */
3896 if (ioc->ReqToChain == NULL) {
3897 sz = ioc->req_depth * sizeof(int);
3898 mem = kmalloc(sz, GFP_ATOMIC);
3899 if (mem == NULL)
3900 return -1;
3901
3902 ioc->ReqToChain = (int *) mem;
3903 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ReqToChain alloc @ %p, sz=%d bytes\n",
3904 ioc->name, mem, sz));
3905 mem = kmalloc(sz, GFP_ATOMIC);
3906 if (mem == NULL)
3907 return -1;
3908
3909 ioc->RequestNB = (int *) mem;
3910 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "RequestNB alloc @ %p, sz=%d bytes\n",
3911 ioc->name, mem, sz));
3912 }
3913 for (ii = 0; ii < ioc->req_depth; ii++) {
3914 ioc->ReqToChain[ii] = MPT_HOST_NO_CHAIN;
3915 }
3916
3917 /* ChainToChain size must equal the total number
3918 * of chain buffers to be allocated.
3919 * index = chain_idx
3920 *
3921 * Calculate the number of chain buffers needed(plus 1) per I/O
3922 * then multiply the maximum number of simultaneous cmds
3923 *
3924 * num_sge = num sge in request frame + last chain buffer
3925 * scale = num sge per chain buffer if no chain element
3926 */
3927 scale = ioc->req_sz/(sizeof(dma_addr_t) + sizeof(u32));
3928 if (sizeof(dma_addr_t) == sizeof(u64))
3929 num_sge = scale + (ioc->req_sz - 60) / (sizeof(dma_addr_t) + sizeof(u32));
3930 else
3931 num_sge = 1+ scale + (ioc->req_sz - 64) / (sizeof(dma_addr_t) + sizeof(u32));
3932
3933 if (sizeof(dma_addr_t) == sizeof(u64)) {
3934 numSGE = (scale - 1) * (ioc->facts.MaxChainDepth-1) + scale +
3935 (ioc->req_sz - 60) / (sizeof(dma_addr_t) + sizeof(u32));
3936 } else {
3937 numSGE = 1 + (scale - 1) * (ioc->facts.MaxChainDepth-1) + scale +
3938 (ioc->req_sz - 64) / (sizeof(dma_addr_t) + sizeof(u32));
3939 }
3940 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "num_sge=%d numSGE=%d\n",
3941 ioc->name, num_sge, numSGE));
3942
3943 if ( numSGE > MPT_SCSI_SG_DEPTH )
3944 numSGE = MPT_SCSI_SG_DEPTH;
3945
3946 num_chain = 1;
3947 while (numSGE - num_sge > 0) {
3948 num_chain++;
3949 num_sge += (scale - 1);
3950 }
3951 num_chain++;
3952
3953 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Now numSGE=%d num_sge=%d num_chain=%d\n",
3954 ioc->name, numSGE, num_sge, num_chain));
3955
3956 if (ioc->bus_type == SPI)
3957 num_chain *= MPT_SCSI_CAN_QUEUE;
3958 else
3959 num_chain *= MPT_FC_CAN_QUEUE;
3960
3961 ioc->num_chain = num_chain;
3962
3963 sz = num_chain * sizeof(int);
3964 if (ioc->ChainToChain == NULL) {
3965 mem = kmalloc(sz, GFP_ATOMIC);
3966 if (mem == NULL)
3967 return -1;
3968
3969 ioc->ChainToChain = (int *) mem;
3970 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ChainToChain alloc @ %p, sz=%d bytes\n",
3971 ioc->name, mem, sz));
3972 } else {
3973 mem = (u8 *) ioc->ChainToChain;
3974 }
3975 memset(mem, 0xFF, sz);
3976 return num_chain;
3977 }
3978
3979 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3980 /**
3981 * PrimeIocFifos - Initialize IOC request and reply FIFOs.
3982 * @ioc: Pointer to MPT_ADAPTER structure
3983 *
3984 * This routine allocates memory for the MPT reply and request frame
3985 * pools (if necessary), and primes the IOC reply FIFO with
3986 * reply frames.
3987 *
3988 * Returns 0 for success, non-zero for failure.
3989 */
3990 static int
3991 PrimeIocFifos(MPT_ADAPTER *ioc)
3992 {
3993 MPT_FRAME_HDR *mf;
3994 unsigned long flags;
3995 dma_addr_t alloc_dma;
3996 u8 *mem;
3997 int i, reply_sz, sz, total_size, num_chain;
3998
3999 /* Prime reply FIFO... */
4000
4001 if (ioc->reply_frames == NULL) {
4002 if ( (num_chain = initChainBuffers(ioc)) < 0)
4003 return -1;
4004
4005 total_size = reply_sz = (ioc->reply_sz * ioc->reply_depth);
4006 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ReplyBuffer sz=%d bytes, ReplyDepth=%d\n",
4007 ioc->name, ioc->reply_sz, ioc->reply_depth));
4008 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ReplyBuffer sz=%d[%x] bytes\n",
4009 ioc->name, reply_sz, reply_sz));
4010
4011 sz = (ioc->req_sz * ioc->req_depth);
4012 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "RequestBuffer sz=%d bytes, RequestDepth=%d\n",
4013 ioc->name, ioc->req_sz, ioc->req_depth));
4014 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "RequestBuffer sz=%d[%x] bytes\n",
4015 ioc->name, sz, sz));
4016 total_size += sz;
4017
4018 sz = num_chain * ioc->req_sz; /* chain buffer pool size */
4019 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ChainBuffer sz=%d bytes, ChainDepth=%d\n",
4020 ioc->name, ioc->req_sz, num_chain));
4021 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ChainBuffer sz=%d[%x] bytes num_chain=%d\n",
4022 ioc->name, sz, sz, num_chain));
4023
4024 total_size += sz;
4025 mem = pci_alloc_consistent(ioc->pcidev, total_size, &alloc_dma);
4026 if (mem == NULL) {
4027 printk(MYIOC_s_ERR_FMT "Unable to allocate Reply, Request, Chain Buffers!\n",
4028 ioc->name);
4029 goto out_fail;
4030 }
4031
4032 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Total alloc @ %p[%p], sz=%d[%x] bytes\n",
4033 ioc->name, mem, (void *)(ulong)alloc_dma, total_size, total_size));
4034
4035 memset(mem, 0, total_size);
4036 ioc->alloc_total += total_size;
4037 ioc->alloc = mem;
4038 ioc->alloc_dma = alloc_dma;
4039 ioc->alloc_sz = total_size;
4040 ioc->reply_frames = (MPT_FRAME_HDR *) mem;
4041 ioc->reply_frames_low_dma = (u32) (alloc_dma & 0xFFFFFFFF);
4042
4043 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ReplyBuffers @ %p[%p]\n",
4044 ioc->name, ioc->reply_frames, (void *)(ulong)alloc_dma));
4045
4046 alloc_dma += reply_sz;
4047 mem += reply_sz;
4048
4049 /* Request FIFO - WE manage this! */
4050
4051 ioc->req_frames = (MPT_FRAME_HDR *) mem;
4052 ioc->req_frames_dma = alloc_dma;
4053
4054 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "RequestBuffers @ %p[%p]\n",
4055 ioc->name, mem, (void *)(ulong)alloc_dma));
4056
4057 ioc->req_frames_low_dma = (u32) (alloc_dma & 0xFFFFFFFF);
4058
4059 #if defined(CONFIG_MTRR) && 0
4060 /*
4061 * Enable Write Combining MTRR for IOC's memory region.
4062 * (at least as much as we can; "size and base must be
4063 * multiples of 4 kiB"
4064 */
4065 ioc->mtrr_reg = mtrr_add(ioc->req_frames_dma,
4066 sz,
4067 MTRR_TYPE_WRCOMB, 1);
4068 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "MTRR region registered (base:size=%08x:%x)\n",
4069 ioc->name, ioc->req_frames_dma, sz));
4070 #endif
4071
4072 for (i = 0; i < ioc->req_depth; i++) {
4073 alloc_dma += ioc->req_sz;
4074 mem += ioc->req_sz;
4075 }
4076
4077 ioc->ChainBuffer = mem;
4078 ioc->ChainBufferDMA = alloc_dma;
4079
4080 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ChainBuffers @ %p(%p)\n",
4081 ioc->name, ioc->ChainBuffer, (void *)(ulong)ioc->ChainBufferDMA));
4082
4083 /* Initialize the free chain Q.
4084 */
4085
4086 INIT_LIST_HEAD(&ioc->FreeChainQ);
4087
4088 /* Post the chain buffers to the FreeChainQ.
4089 */
4090 mem = (u8 *)ioc->ChainBuffer;
4091 for (i=0; i < num_chain; i++) {
4092 mf = (MPT_FRAME_HDR *) mem;
4093 list_add_tail(&mf->u.frame.linkage.list, &ioc->FreeChainQ);
4094 mem += ioc->req_sz;
4095 }
4096
4097 /* Initialize Request frames linked list
4098 */
4099 alloc_dma = ioc->req_frames_dma;
4100 mem = (u8 *) ioc->req_frames;
4101
4102 spin_lock_irqsave(&ioc->FreeQlock, flags);
4103 INIT_LIST_HEAD(&ioc->FreeQ);
4104 for (i = 0; i < ioc->req_depth; i++) {
4105 mf = (MPT_FRAME_HDR *) mem;
4106
4107 /* Queue REQUESTs *internally*! */
4108 list_add_tail(&mf->u.frame.linkage.list, &ioc->FreeQ);
4109
4110 mem += ioc->req_sz;
4111 }
4112 spin_unlock_irqrestore(&ioc->FreeQlock, flags);
4113
4114 sz = (ioc->req_depth * MPT_SENSE_BUFFER_ALLOC);
4115 ioc->sense_buf_pool =
4116 pci_alloc_consistent(ioc->pcidev, sz, &ioc->sense_buf_pool_dma);
4117 if (ioc->sense_buf_pool == NULL) {
4118 printk(MYIOC_s_ERR_FMT "Unable to allocate Sense Buffers!\n",
4119 ioc->name);
4120 goto out_fail;
4121 }
4122
4123 ioc->sense_buf_low_dma = (u32) (ioc->sense_buf_pool_dma & 0xFFFFFFFF);
4124 ioc->alloc_total += sz;
4125 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "SenseBuffers @ %p[%p]\n",
4126 ioc->name, ioc->sense_buf_pool, (void *)(ulong)ioc->sense_buf_pool_dma));
4127
4128 }
4129
4130 /* Post Reply frames to FIFO
4131 */
4132 alloc_dma = ioc->alloc_dma;
4133 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ReplyBuffers @ %p[%p]\n",
4134 ioc->name, ioc->reply_frames, (void *)(ulong)alloc_dma));
4135
4136 for (i = 0; i < ioc->reply_depth; i++) {
4137 /* Write each address to the IOC! */
4138 CHIPREG_WRITE32(&ioc->chip->ReplyFifo, alloc_dma);
4139 alloc_dma += ioc->reply_sz;
4140 }
4141
4142 return 0;
4143
4144 out_fail:
4145 if (ioc->alloc != NULL) {
4146 sz = ioc->alloc_sz;
4147 pci_free_consistent(ioc->pcidev,
4148 sz,
4149 ioc->alloc, ioc->alloc_dma);
4150 ioc->reply_frames = NULL;
4151 ioc->req_frames = NULL;
4152 ioc->alloc_total -= sz;
4153 }
4154 if (ioc->sense_buf_pool != NULL) {
4155 sz = (ioc->req_depth * MPT_SENSE_BUFFER_ALLOC);
4156 pci_free_consistent(ioc->pcidev,
4157 sz,
4158 ioc->sense_buf_pool, ioc->sense_buf_pool_dma);
4159 ioc->sense_buf_pool = NULL;
4160 }
4161 return -1;
4162 }
4163
4164 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4165 /**
4166 * mpt_handshake_req_reply_wait - Send MPT request to and receive reply
4167 * from IOC via doorbell handshake method.
4168 * @ioc: Pointer to MPT_ADAPTER structure
4169 * @reqBytes: Size of the request in bytes
4170 * @req: Pointer to MPT request frame
4171 * @replyBytes: Expected size of the reply in bytes
4172 * @u16reply: Pointer to area where reply should be written
4173 * @maxwait: Max wait time for a reply (in seconds)
4174 * @sleepFlag: Specifies whether the process can sleep
4175 *
4176 * NOTES: It is the callers responsibility to byte-swap fields in the
4177 * request which are greater than 1 byte in size. It is also the
4178 * callers responsibility to byte-swap response fields which are
4179 * greater than 1 byte in size.
4180 *
4181 * Returns 0 for success, non-zero for failure.
4182 */
4183 static int
4184 mpt_handshake_req_reply_wait(MPT_ADAPTER *ioc, int reqBytes, u32 *req,
4185 int replyBytes, u16 *u16reply, int maxwait, int sleepFlag)
4186 {
4187 MPIDefaultReply_t *mptReply;
4188 int failcnt = 0;
4189 int t;
4190
4191 /*
4192 * Get ready to cache a handshake reply
4193 */
4194 ioc->hs_reply_idx = 0;
4195 mptReply = (MPIDefaultReply_t *) ioc->hs_reply;
4196 mptReply->MsgLength = 0;
4197
4198 /*
4199 * Make sure there are no doorbells (WRITE 0 to IntStatus reg),
4200 * then tell IOC that we want to handshake a request of N words.
4201 * (WRITE u32val to Doorbell reg).
4202 */
4203 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
4204 CHIPREG_WRITE32(&ioc->chip->Doorbell,
4205 ((MPI_FUNCTION_HANDSHAKE<<MPI_DOORBELL_FUNCTION_SHIFT) |
4206 ((reqBytes/4)<<MPI_DOORBELL_ADD_DWORDS_SHIFT)));
4207
4208 /*
4209 * Wait for IOC's doorbell handshake int
4210 */
4211 if ((t = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0)
4212 failcnt++;
4213
4214 dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "HandShake request start reqBytes=%d, WaitCnt=%d%s\n",
4215 ioc->name, reqBytes, t, failcnt ? " - MISSING DOORBELL HANDSHAKE!" : ""));
4216
4217 /* Read doorbell and check for active bit */
4218 if (!(CHIPREG_READ32(&ioc->chip->Doorbell) & MPI_DOORBELL_ACTIVE))
4219 return -1;
4220
4221 /*
4222 * Clear doorbell int (WRITE 0 to IntStatus reg),
4223 * then wait for IOC to ACKnowledge that it's ready for
4224 * our handshake request.
4225 */
4226 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
4227 if (!failcnt && (t = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0)
4228 failcnt++;
4229
4230 if (!failcnt) {
4231 int ii;
4232 u8 *req_as_bytes = (u8 *) req;
4233
4234 /*
4235 * Stuff request words via doorbell handshake,
4236 * with ACK from IOC for each.
4237 */
4238 for (ii = 0; !failcnt && ii < reqBytes/4; ii++) {
4239 u32 word = ((req_as_bytes[(ii*4) + 0] << 0) |
4240 (req_as_bytes[(ii*4) + 1] << 8) |
4241 (req_as_bytes[(ii*4) + 2] << 16) |
4242 (req_as_bytes[(ii*4) + 3] << 24));
4243
4244 CHIPREG_WRITE32(&ioc->chip->Doorbell, word);
4245 if ((t = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0)
4246 failcnt++;
4247 }
4248
4249 dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Handshake request frame (@%p) header\n", ioc->name, req));
4250 DBG_DUMP_REQUEST_FRAME_HDR(ioc, (u32 *)req);
4251
4252 dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "HandShake request post done, WaitCnt=%d%s\n",
4253 ioc->name, t, failcnt ? " - MISSING DOORBELL ACK!" : ""));
4254
4255 /*
4256 * Wait for completion of doorbell handshake reply from the IOC
4257 */
4258 if (!failcnt && (t = WaitForDoorbellReply(ioc, maxwait, sleepFlag)) < 0)
4259 failcnt++;
4260
4261 dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "HandShake reply count=%d%s\n",
4262 ioc->name, t, failcnt ? " - MISSING DOORBELL REPLY!" : ""));
4263
4264 /*
4265 * Copy out the cached reply...
4266 */
4267 for (ii=0; ii < min(replyBytes/2,mptReply->MsgLength*2); ii++)
4268 u16reply[ii] = ioc->hs_reply[ii];
4269 } else {
4270 return -99;
4271 }
4272
4273 return -failcnt;
4274 }
4275
4276 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4277 /**
4278 * WaitForDoorbellAck - Wait for IOC doorbell handshake acknowledge
4279 * @ioc: Pointer to MPT_ADAPTER structure
4280 * @howlong: How long to wait (in seconds)
4281 * @sleepFlag: Specifies whether the process can sleep
4282 *
4283 * This routine waits (up to ~2 seconds max) for IOC doorbell
4284 * handshake ACKnowledge, indicated by the IOP_DOORBELL_STATUS
4285 * bit in its IntStatus register being clear.
4286 *
4287 * Returns a negative value on failure, else wait loop count.
4288 */
4289 static int
4290 WaitForDoorbellAck(MPT_ADAPTER *ioc, int howlong, int sleepFlag)
4291 {
4292 int cntdn;
4293 int count = 0;
4294 u32 intstat=0;
4295
4296 cntdn = 1000 * howlong;
4297
4298 if (sleepFlag == CAN_SLEEP) {
4299 while (--cntdn) {
4300 msleep (1);
4301 intstat = CHIPREG_READ32(&ioc->chip->IntStatus);
4302 if (! (intstat & MPI_HIS_IOP_DOORBELL_STATUS))
4303 break;
4304 count++;
4305 }
4306 } else {
4307 while (--cntdn) {
4308 udelay (1000);
4309 intstat = CHIPREG_READ32(&ioc->chip->IntStatus);
4310 if (! (intstat & MPI_HIS_IOP_DOORBELL_STATUS))
4311 break;
4312 count++;
4313 }
4314 }
4315
4316 if (cntdn) {
4317 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "WaitForDoorbell ACK (count=%d)\n",
4318 ioc->name, count));
4319 return count;
4320 }
4321
4322 printk(MYIOC_s_ERR_FMT "Doorbell ACK timeout (count=%d), IntStatus=%x!\n",
4323 ioc->name, count, intstat);
4324 return -1;
4325 }
4326
4327 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4328 /**
4329 * WaitForDoorbellInt - Wait for IOC to set its doorbell interrupt bit
4330 * @ioc: Pointer to MPT_ADAPTER structure
4331 * @howlong: How long to wait (in seconds)
4332 * @sleepFlag: Specifies whether the process can sleep
4333 *
4334 * This routine waits (up to ~2 seconds max) for IOC doorbell interrupt
4335 * (MPI_HIS_DOORBELL_INTERRUPT) to be set in the IntStatus register.
4336 *
4337 * Returns a negative value on failure, else wait loop count.
4338 */
4339 static int
4340 WaitForDoorbellInt(MPT_ADAPTER *ioc, int howlong, int sleepFlag)
4341 {
4342 int cntdn;
4343 int count = 0;
4344 u32 intstat=0;
4345
4346 cntdn = 1000 * howlong;
4347 if (sleepFlag == CAN_SLEEP) {
4348 while (--cntdn) {
4349 intstat = CHIPREG_READ32(&ioc->chip->IntStatus);
4350 if (intstat & MPI_HIS_DOORBELL_INTERRUPT)
4351 break;
4352 msleep(1);
4353 count++;
4354 }
4355 } else {
4356 while (--cntdn) {
4357 intstat = CHIPREG_READ32(&ioc->chip->IntStatus);
4358 if (intstat & MPI_HIS_DOORBELL_INTERRUPT)
4359 break;
4360 udelay (1000);
4361 count++;
4362 }
4363 }
4364
4365 if (cntdn) {
4366 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "WaitForDoorbell INT (cnt=%d) howlong=%d\n",
4367 ioc->name, count, howlong));
4368 return count;
4369 }
4370
4371 printk(MYIOC_s_ERR_FMT "Doorbell INT timeout (count=%d), IntStatus=%x!\n",
4372 ioc->name, count, intstat);
4373 return -1;
4374 }
4375
4376 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4377 /**
4378 * WaitForDoorbellReply - Wait for and capture an IOC handshake reply.
4379 * @ioc: Pointer to MPT_ADAPTER structure
4380 * @howlong: How long to wait (in seconds)
4381 * @sleepFlag: Specifies whether the process can sleep
4382 *
4383 * This routine polls the IOC for a handshake reply, 16 bits at a time.
4384 * Reply is cached to IOC private area large enough to hold a maximum
4385 * of 128 bytes of reply data.
4386 *
4387 * Returns a negative value on failure, else size of reply in WORDS.
4388 */
4389 static int
4390 WaitForDoorbellReply(MPT_ADAPTER *ioc, int howlong, int sleepFlag)
4391 {
4392 int u16cnt = 0;
4393 int failcnt = 0;
4394 int t;
4395 u16 *hs_reply = ioc->hs_reply;
4396 volatile MPIDefaultReply_t *mptReply = (MPIDefaultReply_t *) ioc->hs_reply;
4397 u16 hword;
4398
4399 hs_reply[0] = hs_reply[1] = hs_reply[7] = 0;
4400
4401 /*
4402 * Get first two u16's so we can look at IOC's intended reply MsgLength
4403 */
4404 u16cnt=0;
4405 if ((t = WaitForDoorbellInt(ioc, howlong, sleepFlag)) < 0) {
4406 failcnt++;
4407 } else {
4408 hs_reply[u16cnt++] = le16_to_cpu(CHIPREG_READ32(&ioc->chip->Doorbell) & 0x0000FFFF);
4409 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
4410 if ((t = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0)
4411 failcnt++;
4412 else {
4413 hs_reply[u16cnt++] = le16_to_cpu(CHIPREG_READ32(&ioc->chip->Doorbell) & 0x0000FFFF);
4414 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
4415 }
4416 }
4417
4418 dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "WaitCnt=%d First handshake reply word=%08x%s\n",
4419 ioc->name, t, le32_to_cpu(*(u32 *)hs_reply),
4420 failcnt ? " - MISSING DOORBELL HANDSHAKE!" : ""));
4421
4422 /*
4423 * If no error (and IOC said MsgLength is > 0), piece together
4424 * reply 16 bits at a time.
4425 */
4426 for (u16cnt=2; !failcnt && u16cnt < (2 * mptReply->MsgLength); u16cnt++) {
4427 if ((t = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0)
4428 failcnt++;
4429 hword = le16_to_cpu(CHIPREG_READ32(&ioc->chip->Doorbell) & 0x0000FFFF);
4430 /* don't overflow our IOC hs_reply[] buffer! */
4431 if (u16cnt < sizeof(ioc->hs_reply) / sizeof(ioc->hs_reply[0]))
4432 hs_reply[u16cnt] = hword;
4433 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
4434 }
4435
4436 if (!failcnt && (t = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0)
4437 failcnt++;
4438 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
4439
4440 if (failcnt) {
4441 printk(MYIOC_s_ERR_FMT "Handshake reply failure!\n",
4442 ioc->name);
4443 return -failcnt;
4444 }
4445 #if 0
4446 else if (u16cnt != (2 * mptReply->MsgLength)) {
4447 return -101;
4448 }
4449 else if ((mptReply->IOCStatus & MPI_IOCSTATUS_MASK) != MPI_IOCSTATUS_SUCCESS) {
4450 return -102;
4451 }
4452 #endif
4453
4454 dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Got Handshake reply:\n", ioc->name));
4455 DBG_DUMP_REPLY_FRAME(ioc, (u32 *)mptReply);
4456
4457 dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "WaitForDoorbell REPLY WaitCnt=%d (sz=%d)\n",
4458 ioc->name, t, u16cnt/2));
4459 return u16cnt/2;
4460 }
4461
4462 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4463 /**
4464 * GetLanConfigPages - Fetch LANConfig pages.
4465 * @ioc: Pointer to MPT_ADAPTER structure
4466 *
4467 * Return: 0 for success
4468 * -ENOMEM if no memory available
4469 * -EPERM if not allowed due to ISR context
4470 * -EAGAIN if no msg frames currently available
4471 * -EFAULT for non-successful reply or no reply (timeout)
4472 */
4473 static int
4474 GetLanConfigPages(MPT_ADAPTER *ioc)
4475 {
4476 ConfigPageHeader_t hdr;
4477 CONFIGPARMS cfg;
4478 LANPage0_t *ppage0_alloc;
4479 dma_addr_t page0_dma;
4480 LANPage1_t *ppage1_alloc;
4481 dma_addr_t page1_dma;
4482 int rc = 0;
4483 int data_sz;
4484 int copy_sz;
4485
4486 /* Get LAN Page 0 header */
4487 hdr.PageVersion = 0;
4488 hdr.PageLength = 0;
4489 hdr.PageNumber = 0;
4490 hdr.PageType = MPI_CONFIG_PAGETYPE_LAN;
4491 cfg.cfghdr.hdr = &hdr;
4492 cfg.physAddr = -1;
4493 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
4494 cfg.dir = 0;
4495 cfg.pageAddr = 0;
4496 cfg.timeout = 0;
4497
4498 if ((rc = mpt_config(ioc, &cfg)) != 0)
4499 return rc;
4500
4501 if (hdr.PageLength > 0) {
4502 data_sz = hdr.PageLength * 4;
4503 ppage0_alloc = (LANPage0_t *) pci_alloc_consistent(ioc->pcidev, data_sz, &page0_dma);
4504 rc = -ENOMEM;
4505 if (ppage0_alloc) {
4506 memset((u8 *)ppage0_alloc, 0, data_sz);
4507 cfg.physAddr = page0_dma;
4508 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
4509
4510 if ((rc = mpt_config(ioc, &cfg)) == 0) {
4511 /* save the data */
4512 copy_sz = min_t(int, sizeof(LANPage0_t), data_sz);
4513 memcpy(&ioc->lan_cnfg_page0, ppage0_alloc, copy_sz);
4514
4515 }
4516
4517 pci_free_consistent(ioc->pcidev, data_sz, (u8 *) ppage0_alloc, page0_dma);
4518
4519 /* FIXME!
4520 * Normalize endianness of structure data,
4521 * by byte-swapping all > 1 byte fields!
4522 */
4523
4524 }
4525
4526 if (rc)
4527 return rc;
4528 }
4529
4530 /* Get LAN Page 1 header */
4531 hdr.PageVersion = 0;
4532 hdr.PageLength = 0;
4533 hdr.PageNumber = 1;
4534 hdr.PageType = MPI_CONFIG_PAGETYPE_LAN;
4535 cfg.cfghdr.hdr = &hdr;
4536 cfg.physAddr = -1;
4537 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
4538 cfg.dir = 0;
4539 cfg.pageAddr = 0;
4540
4541 if ((rc = mpt_config(ioc, &cfg)) != 0)
4542 return rc;
4543
4544 if (hdr.PageLength == 0)
4545 return 0;
4546
4547 data_sz = hdr.PageLength * 4;
4548 rc = -ENOMEM;
4549 ppage1_alloc = (LANPage1_t *) pci_alloc_consistent(ioc->pcidev, data_sz, &page1_dma);
4550 if (ppage1_alloc) {
4551 memset((u8 *)ppage1_alloc, 0, data_sz);
4552 cfg.physAddr = page1_dma;
4553 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
4554
4555 if ((rc = mpt_config(ioc, &cfg)) == 0) {
4556 /* save the data */
4557 copy_sz = min_t(int, sizeof(LANPage1_t), data_sz);
4558 memcpy(&ioc->lan_cnfg_page1, ppage1_alloc, copy_sz);
4559 }
4560
4561 pci_free_consistent(ioc->pcidev, data_sz, (u8 *) ppage1_alloc, page1_dma);
4562
4563 /* FIXME!
4564 * Normalize endianness of structure data,
4565 * by byte-swapping all > 1 byte fields!
4566 */
4567
4568 }
4569
4570 return rc;
4571 }
4572
4573 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4574 /**
4575 * mptbase_sas_persist_operation - Perform operation on SAS Persistent Table
4576 * @ioc: Pointer to MPT_ADAPTER structure
4577 * @persist_opcode: see below
4578 *
4579 * MPI_SAS_OP_CLEAR_NOT_PRESENT - Free all persist TargetID mappings for
4580 * devices not currently present.
4581 * MPI_SAS_OP_CLEAR_ALL_PERSISTENT - Clear al persist TargetID mappings
4582 *
4583 * NOTE: Don't use not this function during interrupt time.
4584 *
4585 * Returns 0 for success, non-zero error
4586 */
4587
4588 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4589 int
4590 mptbase_sas_persist_operation(MPT_ADAPTER *ioc, u8 persist_opcode)
4591 {
4592 SasIoUnitControlRequest_t *sasIoUnitCntrReq;
4593 SasIoUnitControlReply_t *sasIoUnitCntrReply;
4594 MPT_FRAME_HDR *mf = NULL;
4595 MPIHeader_t *mpi_hdr;
4596
4597
4598 /* insure garbage is not sent to fw */
4599 switch(persist_opcode) {
4600
4601 case MPI_SAS_OP_CLEAR_NOT_PRESENT:
4602 case MPI_SAS_OP_CLEAR_ALL_PERSISTENT:
4603 break;
4604
4605 default:
4606 return -1;
4607 break;
4608 }
4609
4610 printk("%s: persist_opcode=%x\n",__FUNCTION__, persist_opcode);
4611
4612 /* Get a MF for this command.
4613 */
4614 if ((mf = mpt_get_msg_frame(mpt_base_index, ioc)) == NULL) {
4615 printk("%s: no msg frames!\n",__FUNCTION__);
4616 return -1;
4617 }
4618
4619 mpi_hdr = (MPIHeader_t *) mf;
4620 sasIoUnitCntrReq = (SasIoUnitControlRequest_t *)mf;
4621 memset(sasIoUnitCntrReq,0,sizeof(SasIoUnitControlRequest_t));
4622 sasIoUnitCntrReq->Function = MPI_FUNCTION_SAS_IO_UNIT_CONTROL;
4623 sasIoUnitCntrReq->MsgContext = mpi_hdr->MsgContext;
4624 sasIoUnitCntrReq->Operation = persist_opcode;
4625
4626 init_timer(&ioc->persist_timer);
4627 ioc->persist_timer.data = (unsigned long) ioc;
4628 ioc->persist_timer.function = mpt_timer_expired;
4629 ioc->persist_timer.expires = jiffies + HZ*10 /* 10 sec */;
4630 ioc->persist_wait_done=0;
4631 add_timer(&ioc->persist_timer);
4632 mpt_put_msg_frame(mpt_base_index, ioc, mf);
4633 wait_event(mpt_waitq, ioc->persist_wait_done);
4634
4635 sasIoUnitCntrReply =
4636 (SasIoUnitControlReply_t *)ioc->persist_reply_frame;
4637 if (le16_to_cpu(sasIoUnitCntrReply->IOCStatus) != MPI_IOCSTATUS_SUCCESS) {
4638 printk("%s: IOCStatus=0x%X IOCLogInfo=0x%X\n",
4639 __FUNCTION__,
4640 sasIoUnitCntrReply->IOCStatus,
4641 sasIoUnitCntrReply->IOCLogInfo);
4642 return -1;
4643 }
4644
4645 printk("%s: success\n",__FUNCTION__);
4646 return 0;
4647 }
4648
4649 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4650
4651 static void
4652 mptbase_raid_process_event_data(MPT_ADAPTER *ioc,
4653 MpiEventDataRaid_t * pRaidEventData)
4654 {
4655 int volume;
4656 int reason;
4657 int disk;
4658 int status;
4659 int flags;
4660 int state;
4661
4662 volume = pRaidEventData->VolumeID;
4663 reason = pRaidEventData->ReasonCode;
4664 disk = pRaidEventData->PhysDiskNum;
4665 status = le32_to_cpu(pRaidEventData->SettingsStatus);
4666 flags = (status >> 0) & 0xff;
4667 state = (status >> 8) & 0xff;
4668
4669 if (reason == MPI_EVENT_RAID_RC_DOMAIN_VAL_NEEDED) {
4670 return;
4671 }
4672
4673 if ((reason >= MPI_EVENT_RAID_RC_PHYSDISK_CREATED &&
4674 reason <= MPI_EVENT_RAID_RC_PHYSDISK_STATUS_CHANGED) ||
4675 (reason == MPI_EVENT_RAID_RC_SMART_DATA)) {
4676 printk(MYIOC_s_INFO_FMT "RAID STATUS CHANGE for PhysDisk %d id=%d\n",
4677 ioc->name, disk, volume);
4678 } else {
4679 printk(MYIOC_s_INFO_FMT "RAID STATUS CHANGE for VolumeID %d\n",
4680 ioc->name, volume);
4681 }
4682
4683 switch(reason) {
4684 case MPI_EVENT_RAID_RC_VOLUME_CREATED:
4685 printk(MYIOC_s_INFO_FMT " volume has been created\n",
4686 ioc->name);
4687 break;
4688
4689 case MPI_EVENT_RAID_RC_VOLUME_DELETED:
4690
4691 printk(MYIOC_s_INFO_FMT " volume has been deleted\n",
4692 ioc->name);
4693 break;
4694
4695 case MPI_EVENT_RAID_RC_VOLUME_SETTINGS_CHANGED:
4696 printk(MYIOC_s_INFO_FMT " volume settings have been changed\n",
4697 ioc->name);
4698 break;
4699
4700 case MPI_EVENT_RAID_RC_VOLUME_STATUS_CHANGED:
4701 printk(MYIOC_s_INFO_FMT " volume is now %s%s%s%s\n",
4702 ioc->name,
4703 state == MPI_RAIDVOL0_STATUS_STATE_OPTIMAL
4704 ? "optimal"
4705 : state == MPI_RAIDVOL0_STATUS_STATE_DEGRADED
4706 ? "degraded"
4707 : state == MPI_RAIDVOL0_STATUS_STATE_FAILED
4708 ? "failed"
4709 : "state unknown",
4710 flags & MPI_RAIDVOL0_STATUS_FLAG_ENABLED
4711 ? ", enabled" : "",
4712 flags & MPI_RAIDVOL0_STATUS_FLAG_QUIESCED
4713 ? ", quiesced" : "",
4714 flags & MPI_RAIDVOL0_STATUS_FLAG_RESYNC_IN_PROGRESS
4715 ? ", resync in progress" : "" );
4716 break;
4717
4718 case MPI_EVENT_RAID_RC_VOLUME_PHYSDISK_CHANGED:
4719 printk(MYIOC_s_INFO_FMT " volume membership of PhysDisk %d has changed\n",
4720 ioc->name, disk);
4721 break;
4722
4723 case MPI_EVENT_RAID_RC_PHYSDISK_CREATED:
4724 printk(MYIOC_s_INFO_FMT " PhysDisk has been created\n",
4725 ioc->name);
4726 break;
4727
4728 case MPI_EVENT_RAID_RC_PHYSDISK_DELETED:
4729 printk(MYIOC_s_INFO_FMT " PhysDisk has been deleted\n",
4730 ioc->name);
4731 break;
4732
4733 case MPI_EVENT_RAID_RC_PHYSDISK_SETTINGS_CHANGED:
4734 printk(MYIOC_s_INFO_FMT " PhysDisk settings have been changed\n",
4735 ioc->name);
4736 break;
4737
4738 case MPI_EVENT_RAID_RC_PHYSDISK_STATUS_CHANGED:
4739 printk(MYIOC_s_INFO_FMT " PhysDisk is now %s%s%s\n",
4740 ioc->name,
4741 state == MPI_PHYSDISK0_STATUS_ONLINE
4742 ? "online"
4743 : state == MPI_PHYSDISK0_STATUS_MISSING
4744 ? "missing"
4745 : state == MPI_PHYSDISK0_STATUS_NOT_COMPATIBLE
4746 ? "not compatible"
4747 : state == MPI_PHYSDISK0_STATUS_FAILED
4748 ? "failed"
4749 : state == MPI_PHYSDISK0_STATUS_INITIALIZING
4750 ? "initializing"
4751 : state == MPI_PHYSDISK0_STATUS_OFFLINE_REQUESTED
4752 ? "offline requested"
4753 : state == MPI_PHYSDISK0_STATUS_FAILED_REQUESTED
4754 ? "failed requested"
4755 : state == MPI_PHYSDISK0_STATUS_OTHER_OFFLINE
4756 ? "offline"
4757 : "state unknown",
4758 flags & MPI_PHYSDISK0_STATUS_FLAG_OUT_OF_SYNC
4759 ? ", out of sync" : "",
4760 flags & MPI_PHYSDISK0_STATUS_FLAG_QUIESCED
4761 ? ", quiesced" : "" );
4762 break;
4763
4764 case MPI_EVENT_RAID_RC_DOMAIN_VAL_NEEDED:
4765 printk(MYIOC_s_INFO_FMT " Domain Validation needed for PhysDisk %d\n",
4766 ioc->name, disk);
4767 break;
4768
4769 case MPI_EVENT_RAID_RC_SMART_DATA:
4770 printk(MYIOC_s_INFO_FMT " SMART data received, ASC/ASCQ = %02xh/%02xh\n",
4771 ioc->name, pRaidEventData->ASC, pRaidEventData->ASCQ);
4772 break;
4773
4774 case MPI_EVENT_RAID_RC_REPLACE_ACTION_STARTED:
4775 printk(MYIOC_s_INFO_FMT " replacement of PhysDisk %d has started\n",
4776 ioc->name, disk);
4777 break;
4778 }
4779 }
4780
4781 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4782 /**
4783 * GetIoUnitPage2 - Retrieve BIOS version and boot order information.
4784 * @ioc: Pointer to MPT_ADAPTER structure
4785 *
4786 * Returns: 0 for success
4787 * -ENOMEM if no memory available
4788 * -EPERM if not allowed due to ISR context
4789 * -EAGAIN if no msg frames currently available
4790 * -EFAULT for non-successful reply or no reply (timeout)
4791 */
4792 static int
4793 GetIoUnitPage2(MPT_ADAPTER *ioc)
4794 {
4795 ConfigPageHeader_t hdr;
4796 CONFIGPARMS cfg;
4797 IOUnitPage2_t *ppage_alloc;
4798 dma_addr_t page_dma;
4799 int data_sz;
4800 int rc;
4801
4802 /* Get the page header */
4803 hdr.PageVersion = 0;
4804 hdr.PageLength = 0;
4805 hdr.PageNumber = 2;
4806 hdr.PageType = MPI_CONFIG_PAGETYPE_IO_UNIT;
4807 cfg.cfghdr.hdr = &hdr;
4808 cfg.physAddr = -1;
4809 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
4810 cfg.dir = 0;
4811 cfg.pageAddr = 0;
4812 cfg.timeout = 0;
4813
4814 if ((rc = mpt_config(ioc, &cfg)) != 0)
4815 return rc;
4816
4817 if (hdr.PageLength == 0)
4818 return 0;
4819
4820 /* Read the config page */
4821 data_sz = hdr.PageLength * 4;
4822 rc = -ENOMEM;
4823 ppage_alloc = (IOUnitPage2_t *) pci_alloc_consistent(ioc->pcidev, data_sz, &page_dma);
4824 if (ppage_alloc) {
4825 memset((u8 *)ppage_alloc, 0, data_sz);
4826 cfg.physAddr = page_dma;
4827 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
4828
4829 /* If Good, save data */
4830 if ((rc = mpt_config(ioc, &cfg)) == 0)
4831 ioc->biosVersion = le32_to_cpu(ppage_alloc->BiosVersion);
4832
4833 pci_free_consistent(ioc->pcidev, data_sz, (u8 *) ppage_alloc, page_dma);
4834 }
4835
4836 return rc;
4837 }
4838
4839 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4840 /**
4841 * mpt_GetScsiPortSettings - read SCSI Port Page 0 and 2
4842 * @ioc: Pointer to a Adapter Strucutre
4843 * @portnum: IOC port number
4844 *
4845 * Return: -EFAULT if read of config page header fails
4846 * or if no nvram
4847 * If read of SCSI Port Page 0 fails,
4848 * NVRAM = MPT_HOST_NVRAM_INVALID (0xFFFFFFFF)
4849 * Adapter settings: async, narrow
4850 * Return 1
4851 * If read of SCSI Port Page 2 fails,
4852 * Adapter settings valid
4853 * NVRAM = MPT_HOST_NVRAM_INVALID (0xFFFFFFFF)
4854 * Return 1
4855 * Else
4856 * Both valid
4857 * Return 0
4858 * CHECK - what type of locking mechanisms should be used????
4859 */
4860 static int
4861 mpt_GetScsiPortSettings(MPT_ADAPTER *ioc, int portnum)
4862 {
4863 u8 *pbuf;
4864 dma_addr_t buf_dma;
4865 CONFIGPARMS cfg;
4866 ConfigPageHeader_t header;
4867 int ii;
4868 int data, rc = 0;
4869
4870 /* Allocate memory
4871 */
4872 if (!ioc->spi_data.nvram) {
4873 int sz;
4874 u8 *mem;
4875 sz = MPT_MAX_SCSI_DEVICES * sizeof(int);
4876 mem = kmalloc(sz, GFP_ATOMIC);
4877 if (mem == NULL)
4878 return -EFAULT;
4879
4880 ioc->spi_data.nvram = (int *) mem;
4881
4882 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "SCSI device NVRAM settings @ %p, sz=%d\n",
4883 ioc->name, ioc->spi_data.nvram, sz));
4884 }
4885
4886 /* Invalidate NVRAM information
4887 */
4888 for (ii=0; ii < MPT_MAX_SCSI_DEVICES; ii++) {
4889 ioc->spi_data.nvram[ii] = MPT_HOST_NVRAM_INVALID;
4890 }
4891
4892 /* Read SPP0 header, allocate memory, then read page.
4893 */
4894 header.PageVersion = 0;
4895 header.PageLength = 0;
4896 header.PageNumber = 0;
4897 header.PageType = MPI_CONFIG_PAGETYPE_SCSI_PORT;
4898 cfg.cfghdr.hdr = &header;
4899 cfg.physAddr = -1;
4900 cfg.pageAddr = portnum;
4901 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
4902 cfg.dir = 0;
4903 cfg.timeout = 0; /* use default */
4904 if (mpt_config(ioc, &cfg) != 0)
4905 return -EFAULT;
4906
4907 if (header.PageLength > 0) {
4908 pbuf = pci_alloc_consistent(ioc->pcidev, header.PageLength * 4, &buf_dma);
4909 if (pbuf) {
4910 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
4911 cfg.physAddr = buf_dma;
4912 if (mpt_config(ioc, &cfg) != 0) {
4913 ioc->spi_data.maxBusWidth = MPT_NARROW;
4914 ioc->spi_data.maxSyncOffset = 0;
4915 ioc->spi_data.minSyncFactor = MPT_ASYNC;
4916 ioc->spi_data.busType = MPT_HOST_BUS_UNKNOWN;
4917 rc = 1;
4918 ddvprintk(ioc, printk(MYIOC_s_DEBUG_FMT
4919 "Unable to read PortPage0 minSyncFactor=%x\n",
4920 ioc->name, ioc->spi_data.minSyncFactor));
4921 } else {
4922 /* Save the Port Page 0 data
4923 */
4924 SCSIPortPage0_t *pPP0 = (SCSIPortPage0_t *) pbuf;
4925 pPP0->Capabilities = le32_to_cpu(pPP0->Capabilities);
4926 pPP0->PhysicalInterface = le32_to_cpu(pPP0->PhysicalInterface);
4927
4928 if ( (pPP0->Capabilities & MPI_SCSIPORTPAGE0_CAP_QAS) == 0 ) {
4929 ioc->spi_data.noQas |= MPT_TARGET_NO_NEGO_QAS;
4930 ddvprintk(ioc, printk(MYIOC_s_DEBUG_FMT
4931 "noQas due to Capabilities=%x\n",
4932 ioc->name, pPP0->Capabilities));
4933 }
4934 ioc->spi_data.maxBusWidth = pPP0->Capabilities & MPI_SCSIPORTPAGE0_CAP_WIDE ? 1 : 0;
4935 data = pPP0->Capabilities & MPI_SCSIPORTPAGE0_CAP_MAX_SYNC_OFFSET_MASK;
4936 if (data) {
4937 ioc->spi_data.maxSyncOffset = (u8) (data >> 16);
4938 data = pPP0->Capabilities & MPI_SCSIPORTPAGE0_CAP_MIN_SYNC_PERIOD_MASK;
4939 ioc->spi_data.minSyncFactor = (u8) (data >> 8);
4940 ddvprintk(ioc, printk(MYIOC_s_DEBUG_FMT
4941 "PortPage0 minSyncFactor=%x\n",
4942 ioc->name, ioc->spi_data.minSyncFactor));
4943 } else {
4944 ioc->spi_data.maxSyncOffset = 0;
4945 ioc->spi_data.minSyncFactor = MPT_ASYNC;
4946 }
4947
4948 ioc->spi_data.busType = pPP0->PhysicalInterface & MPI_SCSIPORTPAGE0_PHY_SIGNAL_TYPE_MASK;
4949
4950 /* Update the minSyncFactor based on bus type.
4951 */
4952 if ((ioc->spi_data.busType == MPI_SCSIPORTPAGE0_PHY_SIGNAL_HVD) ||
4953 (ioc->spi_data.busType == MPI_SCSIPORTPAGE0_PHY_SIGNAL_SE)) {
4954
4955 if (ioc->spi_data.minSyncFactor < MPT_ULTRA) {
4956 ioc->spi_data.minSyncFactor = MPT_ULTRA;
4957 ddvprintk(ioc, printk(MYIOC_s_DEBUG_FMT
4958 "HVD or SE detected, minSyncFactor=%x\n",
4959 ioc->name, ioc->spi_data.minSyncFactor));
4960 }
4961 }
4962 }
4963 if (pbuf) {
4964 pci_free_consistent(ioc->pcidev, header.PageLength * 4, pbuf, buf_dma);
4965 }
4966 }
4967 }
4968
4969 /* SCSI Port Page 2 - Read the header then the page.
4970 */
4971 header.PageVersion = 0;
4972 header.PageLength = 0;
4973 header.PageNumber = 2;
4974 header.PageType = MPI_CONFIG_PAGETYPE_SCSI_PORT;
4975 cfg.cfghdr.hdr = &header;
4976 cfg.physAddr = -1;
4977 cfg.pageAddr = portnum;
4978 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
4979 cfg.dir = 0;
4980 if (mpt_config(ioc, &cfg) != 0)
4981 return -EFAULT;
4982
4983 if (header.PageLength > 0) {
4984 /* Allocate memory and read SCSI Port Page 2
4985 */
4986 pbuf = pci_alloc_consistent(ioc->pcidev, header.PageLength * 4, &buf_dma);
4987 if (pbuf) {
4988 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_NVRAM;
4989 cfg.physAddr = buf_dma;
4990 if (mpt_config(ioc, &cfg) != 0) {
4991 /* Nvram data is left with INVALID mark
4992 */
4993 rc = 1;
4994 } else if (ioc->pcidev->vendor == PCI_VENDOR_ID_ATTO) {
4995
4996 /* This is an ATTO adapter, read Page2 accordingly
4997 */
4998 ATTO_SCSIPortPage2_t *pPP2 = (ATTO_SCSIPortPage2_t *) pbuf;
4999 ATTODeviceInfo_t *pdevice = NULL;
5000 u16 ATTOFlags;
5001
5002 /* Save the Port Page 2 data
5003 * (reformat into a 32bit quantity)
5004 */
5005 for (ii=0; ii < MPT_MAX_SCSI_DEVICES; ii++) {
5006 pdevice = &pPP2->DeviceSettings[ii];
5007 ATTOFlags = le16_to_cpu(pdevice->ATTOFlags);
5008 data = 0;
5009
5010 /* Translate ATTO device flags to LSI format
5011 */
5012 if (ATTOFlags & ATTOFLAG_DISC)
5013 data |= (MPI_SCSIPORTPAGE2_DEVICE_DISCONNECT_ENABLE);
5014 if (ATTOFlags & ATTOFLAG_ID_ENB)
5015 data |= (MPI_SCSIPORTPAGE2_DEVICE_ID_SCAN_ENABLE);
5016 if (ATTOFlags & ATTOFLAG_LUN_ENB)
5017 data |= (MPI_SCSIPORTPAGE2_DEVICE_LUN_SCAN_ENABLE);
5018 if (ATTOFlags & ATTOFLAG_TAGGED)
5019 data |= (MPI_SCSIPORTPAGE2_DEVICE_TAG_QUEUE_ENABLE);
5020 if (!(ATTOFlags & ATTOFLAG_WIDE_ENB))
5021 data |= (MPI_SCSIPORTPAGE2_DEVICE_WIDE_DISABLE);
5022
5023 data = (data << 16) | (pdevice->Period << 8) | 10;
5024 ioc->spi_data.nvram[ii] = data;
5025 }
5026 } else {
5027 SCSIPortPage2_t *pPP2 = (SCSIPortPage2_t *) pbuf;
5028 MpiDeviceInfo_t *pdevice = NULL;
5029
5030 /*
5031 * Save "Set to Avoid SCSI Bus Resets" flag
5032 */
5033 ioc->spi_data.bus_reset =
5034 (le32_to_cpu(pPP2->PortFlags) &
5035 MPI_SCSIPORTPAGE2_PORT_FLAGS_AVOID_SCSI_RESET) ?
5036 0 : 1 ;
5037
5038 /* Save the Port Page 2 data
5039 * (reformat into a 32bit quantity)
5040 */
5041 data = le32_to_cpu(pPP2->PortFlags) & MPI_SCSIPORTPAGE2_PORT_FLAGS_DV_MASK;
5042 ioc->spi_data.PortFlags = data;
5043 for (ii=0; ii < MPT_MAX_SCSI_DEVICES; ii++) {
5044 pdevice = &pPP2->DeviceSettings[ii];
5045 data = (le16_to_cpu(pdevice->DeviceFlags) << 16) |
5046 (pdevice->SyncFactor << 8) | pdevice->Timeout;
5047 ioc->spi_data.nvram[ii] = data;
5048 }
5049 }
5050
5051 pci_free_consistent(ioc->pcidev, header.PageLength * 4, pbuf, buf_dma);
5052 }
5053 }
5054
5055 /* Update Adapter limits with those from NVRAM
5056 * Comment: Don't need to do this. Target performance
5057 * parameters will never exceed the adapters limits.
5058 */
5059
5060 return rc;
5061 }
5062
5063 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5064 /**
5065 * mpt_readScsiDevicePageHeaders - save version and length of SDP1
5066 * @ioc: Pointer to a Adapter Strucutre
5067 * @portnum: IOC port number
5068 *
5069 * Return: -EFAULT if read of config page header fails
5070 * or 0 if success.
5071 */
5072 static int
5073 mpt_readScsiDevicePageHeaders(MPT_ADAPTER *ioc, int portnum)
5074 {
5075 CONFIGPARMS cfg;
5076 ConfigPageHeader_t header;
5077
5078 /* Read the SCSI Device Page 1 header
5079 */
5080 header.PageVersion = 0;
5081 header.PageLength = 0;
5082 header.PageNumber = 1;
5083 header.PageType = MPI_CONFIG_PAGETYPE_SCSI_DEVICE;
5084 cfg.cfghdr.hdr = &header;
5085 cfg.physAddr = -1;
5086 cfg.pageAddr = portnum;
5087 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
5088 cfg.dir = 0;
5089 cfg.timeout = 0;
5090 if (mpt_config(ioc, &cfg) != 0)
5091 return -EFAULT;
5092
5093 ioc->spi_data.sdp1version = cfg.cfghdr.hdr->PageVersion;
5094 ioc->spi_data.sdp1length = cfg.cfghdr.hdr->PageLength;
5095
5096 header.PageVersion = 0;
5097 header.PageLength = 0;
5098 header.PageNumber = 0;
5099 header.PageType = MPI_CONFIG_PAGETYPE_SCSI_DEVICE;
5100 if (mpt_config(ioc, &cfg) != 0)
5101 return -EFAULT;
5102
5103 ioc->spi_data.sdp0version = cfg.cfghdr.hdr->PageVersion;
5104 ioc->spi_data.sdp0length = cfg.cfghdr.hdr->PageLength;
5105
5106 dcprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Headers: 0: version %d length %d\n",
5107 ioc->name, ioc->spi_data.sdp0version, ioc->spi_data.sdp0length));
5108
5109 dcprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Headers: 1: version %d length %d\n",
5110 ioc->name, ioc->spi_data.sdp1version, ioc->spi_data.sdp1length));
5111 return 0;
5112 }
5113
5114 /**
5115 * mpt_inactive_raid_list_free - This clears this link list.
5116 * @ioc : pointer to per adapter structure
5117 **/
5118 static void
5119 mpt_inactive_raid_list_free(MPT_ADAPTER *ioc)
5120 {
5121 struct inactive_raid_component_info *component_info, *pNext;
5122
5123 if (list_empty(&ioc->raid_data.inactive_list))
5124 return;
5125
5126 down(&ioc->raid_data.inactive_list_mutex);
5127 list_for_each_entry_safe(component_info, pNext,
5128 &ioc->raid_data.inactive_list, list) {
5129 list_del(&component_info->list);
5130 kfree(component_info);
5131 }
5132 up(&ioc->raid_data.inactive_list_mutex);
5133 }
5134
5135 /**
5136 * mpt_inactive_raid_volumes - sets up link list of phy_disk_nums for devices belonging in an inactive volume
5137 *
5138 * @ioc : pointer to per adapter structure
5139 * @channel : volume channel
5140 * @id : volume target id
5141 **/
5142 static void
5143 mpt_inactive_raid_volumes(MPT_ADAPTER *ioc, u8 channel, u8 id)
5144 {
5145 CONFIGPARMS cfg;
5146 ConfigPageHeader_t hdr;
5147 dma_addr_t dma_handle;
5148 pRaidVolumePage0_t buffer = NULL;
5149 int i;
5150 RaidPhysDiskPage0_t phys_disk;
5151 struct inactive_raid_component_info *component_info;
5152 int handle_inactive_volumes;
5153
5154 memset(&cfg, 0 , sizeof(CONFIGPARMS));
5155 memset(&hdr, 0 , sizeof(ConfigPageHeader_t));
5156 hdr.PageType = MPI_CONFIG_PAGETYPE_RAID_VOLUME;
5157 cfg.pageAddr = (channel << 8) + id;
5158 cfg.cfghdr.hdr = &hdr;
5159 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
5160
5161 if (mpt_config(ioc, &cfg) != 0)
5162 goto out;
5163
5164 if (!hdr.PageLength)
5165 goto out;
5166
5167 buffer = pci_alloc_consistent(ioc->pcidev, hdr.PageLength * 4,
5168 &dma_handle);
5169
5170 if (!buffer)
5171 goto out;
5172
5173 cfg.physAddr = dma_handle;
5174 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
5175
5176 if (mpt_config(ioc, &cfg) != 0)
5177 goto out;
5178
5179 if (!buffer->NumPhysDisks)
5180 goto out;
5181
5182 handle_inactive_volumes =
5183 (buffer->VolumeStatus.Flags & MPI_RAIDVOL0_STATUS_FLAG_VOLUME_INACTIVE ||
5184 (buffer->VolumeStatus.Flags & MPI_RAIDVOL0_STATUS_FLAG_ENABLED) == 0 ||
5185 buffer->VolumeStatus.State == MPI_RAIDVOL0_STATUS_STATE_FAILED ||
5186 buffer->VolumeStatus.State == MPI_RAIDVOL0_STATUS_STATE_MISSING) ? 1 : 0;
5187
5188 if (!handle_inactive_volumes)
5189 goto out;
5190
5191 down(&ioc->raid_data.inactive_list_mutex);
5192 for (i = 0; i < buffer->NumPhysDisks; i++) {
5193 if(mpt_raid_phys_disk_pg0(ioc,
5194 buffer->PhysDisk[i].PhysDiskNum, &phys_disk) != 0)
5195 continue;
5196
5197 if ((component_info = kmalloc(sizeof (*component_info),
5198 GFP_KERNEL)) == NULL)
5199 continue;
5200
5201 component_info->volumeID = id;
5202 component_info->volumeBus = channel;
5203 component_info->d.PhysDiskNum = phys_disk.PhysDiskNum;
5204 component_info->d.PhysDiskBus = phys_disk.PhysDiskBus;
5205 component_info->d.PhysDiskID = phys_disk.PhysDiskID;
5206 component_info->d.PhysDiskIOC = phys_disk.PhysDiskIOC;
5207
5208 list_add_tail(&component_info->list,
5209 &ioc->raid_data.inactive_list);
5210 }
5211 up(&ioc->raid_data.inactive_list_mutex);
5212
5213 out:
5214 if (buffer)
5215 pci_free_consistent(ioc->pcidev, hdr.PageLength * 4, buffer,
5216 dma_handle);
5217 }
5218
5219 /**
5220 * mpt_raid_phys_disk_pg0 - returns phys disk page zero
5221 * @ioc: Pointer to a Adapter Structure
5222 * @phys_disk_num: io unit unique phys disk num generated by the ioc
5223 * @phys_disk: requested payload data returned
5224 *
5225 * Return:
5226 * 0 on success
5227 * -EFAULT if read of config page header fails or data pointer not NULL
5228 * -ENOMEM if pci_alloc failed
5229 **/
5230 int
5231 mpt_raid_phys_disk_pg0(MPT_ADAPTER *ioc, u8 phys_disk_num, pRaidPhysDiskPage0_t phys_disk)
5232 {
5233 CONFIGPARMS cfg;
5234 ConfigPageHeader_t hdr;
5235 dma_addr_t dma_handle;
5236 pRaidPhysDiskPage0_t buffer = NULL;
5237 int rc;
5238
5239 memset(&cfg, 0 , sizeof(CONFIGPARMS));
5240 memset(&hdr, 0 , sizeof(ConfigPageHeader_t));
5241
5242 hdr.PageType = MPI_CONFIG_PAGETYPE_RAID_PHYSDISK;
5243 cfg.cfghdr.hdr = &hdr;
5244 cfg.physAddr = -1;
5245 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
5246
5247 if (mpt_config(ioc, &cfg) != 0) {
5248 rc = -EFAULT;
5249 goto out;
5250 }
5251
5252 if (!hdr.PageLength) {
5253 rc = -EFAULT;
5254 goto out;
5255 }
5256
5257 buffer = pci_alloc_consistent(ioc->pcidev, hdr.PageLength * 4,
5258 &dma_handle);
5259
5260 if (!buffer) {
5261 rc = -ENOMEM;
5262 goto out;
5263 }
5264
5265 cfg.physAddr = dma_handle;
5266 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
5267 cfg.pageAddr = phys_disk_num;
5268
5269 if (mpt_config(ioc, &cfg) != 0) {
5270 rc = -EFAULT;
5271 goto out;
5272 }
5273
5274 rc = 0;
5275 memcpy(phys_disk, buffer, sizeof(*buffer));
5276 phys_disk->MaxLBA = le32_to_cpu(buffer->MaxLBA);
5277
5278 out:
5279
5280 if (buffer)
5281 pci_free_consistent(ioc->pcidev, hdr.PageLength * 4, buffer,
5282 dma_handle);
5283
5284 return rc;
5285 }
5286
5287 /**
5288 * mpt_findImVolumes - Identify IDs of hidden disks and RAID Volumes
5289 * @ioc: Pointer to a Adapter Strucutre
5290 * @portnum: IOC port number
5291 *
5292 * Return:
5293 * 0 on success
5294 * -EFAULT if read of config page header fails or data pointer not NULL
5295 * -ENOMEM if pci_alloc failed
5296 **/
5297 int
5298 mpt_findImVolumes(MPT_ADAPTER *ioc)
5299 {
5300 IOCPage2_t *pIoc2;
5301 u8 *mem;
5302 dma_addr_t ioc2_dma;
5303 CONFIGPARMS cfg;
5304 ConfigPageHeader_t header;
5305 int rc = 0;
5306 int iocpage2sz;
5307 int i;
5308
5309 if (!ioc->ir_firmware)
5310 return 0;
5311
5312 /* Free the old page
5313 */
5314 kfree(ioc->raid_data.pIocPg2);
5315 ioc->raid_data.pIocPg2 = NULL;
5316 mpt_inactive_raid_list_free(ioc);
5317
5318 /* Read IOCP2 header then the page.
5319 */
5320 header.PageVersion = 0;
5321 header.PageLength = 0;
5322 header.PageNumber = 2;
5323 header.PageType = MPI_CONFIG_PAGETYPE_IOC;
5324 cfg.cfghdr.hdr = &header;
5325 cfg.physAddr = -1;
5326 cfg.pageAddr = 0;
5327 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
5328 cfg.dir = 0;
5329 cfg.timeout = 0;
5330 if (mpt_config(ioc, &cfg) != 0)
5331 return -EFAULT;
5332
5333 if (header.PageLength == 0)
5334 return -EFAULT;
5335
5336 iocpage2sz = header.PageLength * 4;
5337 pIoc2 = pci_alloc_consistent(ioc->pcidev, iocpage2sz, &ioc2_dma);
5338 if (!pIoc2)
5339 return -ENOMEM;
5340
5341 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
5342 cfg.physAddr = ioc2_dma;
5343 if (mpt_config(ioc, &cfg) != 0)
5344 goto out;
5345
5346 mem = kmalloc(iocpage2sz, GFP_KERNEL);
5347 if (!mem)
5348 goto out;
5349
5350 memcpy(mem, (u8 *)pIoc2, iocpage2sz);
5351 ioc->raid_data.pIocPg2 = (IOCPage2_t *) mem;
5352
5353 mpt_read_ioc_pg_3(ioc);
5354
5355 for (i = 0; i < pIoc2->NumActiveVolumes ; i++)
5356 mpt_inactive_raid_volumes(ioc,
5357 pIoc2->RaidVolume[i].VolumeBus,
5358 pIoc2->RaidVolume[i].VolumeID);
5359
5360 out:
5361 pci_free_consistent(ioc->pcidev, iocpage2sz, pIoc2, ioc2_dma);
5362
5363 return rc;
5364 }
5365
5366 static int
5367 mpt_read_ioc_pg_3(MPT_ADAPTER *ioc)
5368 {
5369 IOCPage3_t *pIoc3;
5370 u8 *mem;
5371 CONFIGPARMS cfg;
5372 ConfigPageHeader_t header;
5373 dma_addr_t ioc3_dma;
5374 int iocpage3sz = 0;
5375
5376 /* Free the old page
5377 */
5378 kfree(ioc->raid_data.pIocPg3);
5379 ioc->raid_data.pIocPg3 = NULL;
5380
5381 /* There is at least one physical disk.
5382 * Read and save IOC Page 3
5383 */
5384 header.PageVersion = 0;
5385 header.PageLength = 0;
5386 header.PageNumber = 3;
5387 header.PageType = MPI_CONFIG_PAGETYPE_IOC;
5388 cfg.cfghdr.hdr = &header;
5389 cfg.physAddr = -1;
5390 cfg.pageAddr = 0;
5391 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
5392 cfg.dir = 0;
5393 cfg.timeout = 0;
5394 if (mpt_config(ioc, &cfg) != 0)
5395 return 0;
5396
5397 if (header.PageLength == 0)
5398 return 0;
5399
5400 /* Read Header good, alloc memory
5401 */
5402 iocpage3sz = header.PageLength * 4;
5403 pIoc3 = pci_alloc_consistent(ioc->pcidev, iocpage3sz, &ioc3_dma);
5404 if (!pIoc3)
5405 return 0;
5406
5407 /* Read the Page and save the data
5408 * into malloc'd memory.
5409 */
5410 cfg.physAddr = ioc3_dma;
5411 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
5412 if (mpt_config(ioc, &cfg) == 0) {
5413 mem = kmalloc(iocpage3sz, GFP_KERNEL);
5414 if (mem) {
5415 memcpy(mem, (u8 *)pIoc3, iocpage3sz);
5416 ioc->raid_data.pIocPg3 = (IOCPage3_t *) mem;
5417 }
5418 }
5419
5420 pci_free_consistent(ioc->pcidev, iocpage3sz, pIoc3, ioc3_dma);
5421
5422 return 0;
5423 }
5424
5425 static void
5426 mpt_read_ioc_pg_4(MPT_ADAPTER *ioc)
5427 {
5428 IOCPage4_t *pIoc4;
5429 CONFIGPARMS cfg;
5430 ConfigPageHeader_t header;
5431 dma_addr_t ioc4_dma;
5432 int iocpage4sz;
5433
5434 /* Read and save IOC Page 4
5435 */
5436 header.PageVersion = 0;
5437 header.PageLength = 0;
5438 header.PageNumber = 4;
5439 header.PageType = MPI_CONFIG_PAGETYPE_IOC;
5440 cfg.cfghdr.hdr = &header;
5441 cfg.physAddr = -1;
5442 cfg.pageAddr = 0;
5443 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
5444 cfg.dir = 0;
5445 cfg.timeout = 0;
5446 if (mpt_config(ioc, &cfg) != 0)
5447 return;
5448
5449 if (header.PageLength == 0)
5450 return;
5451
5452 if ( (pIoc4 = ioc->spi_data.pIocPg4) == NULL ) {
5453 iocpage4sz = (header.PageLength + 4) * 4; /* Allow 4 additional SEP's */
5454 pIoc4 = pci_alloc_consistent(ioc->pcidev, iocpage4sz, &ioc4_dma);
5455 if (!pIoc4)
5456 return;
5457 ioc->alloc_total += iocpage4sz;
5458 } else {
5459 ioc4_dma = ioc->spi_data.IocPg4_dma;
5460 iocpage4sz = ioc->spi_data.IocPg4Sz;
5461 }
5462
5463 /* Read the Page into dma memory.
5464 */
5465 cfg.physAddr = ioc4_dma;
5466 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
5467 if (mpt_config(ioc, &cfg) == 0) {
5468 ioc->spi_data.pIocPg4 = (IOCPage4_t *) pIoc4;
5469 ioc->spi_data.IocPg4_dma = ioc4_dma;
5470 ioc->spi_data.IocPg4Sz = iocpage4sz;
5471 } else {
5472 pci_free_consistent(ioc->pcidev, iocpage4sz, pIoc4, ioc4_dma);
5473 ioc->spi_data.pIocPg4 = NULL;
5474 ioc->alloc_total -= iocpage4sz;
5475 }
5476 }
5477
5478 static void
5479 mpt_read_ioc_pg_1(MPT_ADAPTER *ioc)
5480 {
5481 IOCPage1_t *pIoc1;
5482 CONFIGPARMS cfg;
5483 ConfigPageHeader_t header;
5484 dma_addr_t ioc1_dma;
5485 int iocpage1sz = 0;
5486 u32 tmp;
5487
5488 /* Check the Coalescing Timeout in IOC Page 1
5489 */
5490 header.PageVersion = 0;
5491 header.PageLength = 0;
5492 header.PageNumber = 1;
5493 header.PageType = MPI_CONFIG_PAGETYPE_IOC;
5494 cfg.cfghdr.hdr = &header;
5495 cfg.physAddr = -1;
5496 cfg.pageAddr = 0;
5497 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
5498 cfg.dir = 0;
5499 cfg.timeout = 0;
5500 if (mpt_config(ioc, &cfg) != 0)
5501 return;
5502
5503 if (header.PageLength == 0)
5504 return;
5505
5506 /* Read Header good, alloc memory
5507 */
5508 iocpage1sz = header.PageLength * 4;
5509 pIoc1 = pci_alloc_consistent(ioc->pcidev, iocpage1sz, &ioc1_dma);
5510 if (!pIoc1)
5511 return;
5512
5513 /* Read the Page and check coalescing timeout
5514 */
5515 cfg.physAddr = ioc1_dma;
5516 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
5517 if (mpt_config(ioc, &cfg) == 0) {
5518
5519 tmp = le32_to_cpu(pIoc1->Flags) & MPI_IOCPAGE1_REPLY_COALESCING;
5520 if (tmp == MPI_IOCPAGE1_REPLY_COALESCING) {
5521 tmp = le32_to_cpu(pIoc1->CoalescingTimeout);
5522
5523 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Coalescing Enabled Timeout = %d\n",
5524 ioc->name, tmp));
5525
5526 if (tmp > MPT_COALESCING_TIMEOUT) {
5527 pIoc1->CoalescingTimeout = cpu_to_le32(MPT_COALESCING_TIMEOUT);
5528
5529 /* Write NVRAM and current
5530 */
5531 cfg.dir = 1;
5532 cfg.action = MPI_CONFIG_ACTION_PAGE_WRITE_CURRENT;
5533 if (mpt_config(ioc, &cfg) == 0) {
5534 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Reset Current Coalescing Timeout to = %d\n",
5535 ioc->name, MPT_COALESCING_TIMEOUT));
5536
5537 cfg.action = MPI_CONFIG_ACTION_PAGE_WRITE_NVRAM;
5538 if (mpt_config(ioc, &cfg) == 0) {
5539 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT
5540 "Reset NVRAM Coalescing Timeout to = %d\n",
5541 ioc->name, MPT_COALESCING_TIMEOUT));
5542 } else {
5543 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT
5544 "Reset NVRAM Coalescing Timeout Failed\n",
5545 ioc->name));
5546 }
5547
5548 } else {
5549 dprintk(ioc, printk(MYIOC_s_WARN_FMT
5550 "Reset of Current Coalescing Timeout Failed!\n",
5551 ioc->name));
5552 }
5553 }
5554
5555 } else {
5556 dprintk(ioc, printk(MYIOC_s_WARN_FMT "Coalescing Disabled\n", ioc->name));
5557 }
5558 }
5559
5560 pci_free_consistent(ioc->pcidev, iocpage1sz, pIoc1, ioc1_dma);
5561
5562 return;
5563 }
5564
5565 static void
5566 mpt_get_manufacturing_pg_0(MPT_ADAPTER *ioc)
5567 {
5568 CONFIGPARMS cfg;
5569 ConfigPageHeader_t hdr;
5570 dma_addr_t buf_dma;
5571 ManufacturingPage0_t *pbuf = NULL;
5572
5573 memset(&cfg, 0 , sizeof(CONFIGPARMS));
5574 memset(&hdr, 0 , sizeof(ConfigPageHeader_t));
5575
5576 hdr.PageType = MPI_CONFIG_PAGETYPE_MANUFACTURING;
5577 cfg.cfghdr.hdr = &hdr;
5578 cfg.physAddr = -1;
5579 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
5580 cfg.timeout = 10;
5581
5582 if (mpt_config(ioc, &cfg) != 0)
5583 goto out;
5584
5585 if (!cfg.cfghdr.hdr->PageLength)
5586 goto out;
5587
5588 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
5589 pbuf = pci_alloc_consistent(ioc->pcidev, hdr.PageLength * 4, &buf_dma);
5590 if (!pbuf)
5591 goto out;
5592
5593 cfg.physAddr = buf_dma;
5594
5595 if (mpt_config(ioc, &cfg) != 0)
5596 goto out;
5597
5598 memcpy(ioc->board_name, pbuf->BoardName, sizeof(ioc->board_name));
5599 memcpy(ioc->board_assembly, pbuf->BoardAssembly, sizeof(ioc->board_assembly));
5600 memcpy(ioc->board_tracer, pbuf->BoardTracerNumber, sizeof(ioc->board_tracer));
5601
5602 out:
5603
5604 if (pbuf)
5605 pci_free_consistent(ioc->pcidev, hdr.PageLength * 4, pbuf, buf_dma);
5606 }
5607
5608 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5609 /**
5610 * SendEventNotification - Send EventNotification (on or off) request to adapter
5611 * @ioc: Pointer to MPT_ADAPTER structure
5612 * @EvSwitch: Event switch flags
5613 */
5614 static int
5615 SendEventNotification(MPT_ADAPTER *ioc, u8 EvSwitch)
5616 {
5617 EventNotification_t *evnp;
5618
5619 evnp = (EventNotification_t *) mpt_get_msg_frame(mpt_base_index, ioc);
5620 if (evnp == NULL) {
5621 devtverboseprintk(ioc, printk(MYIOC_s_WARN_FMT "Unable to allocate event request frame!\n",
5622 ioc->name));
5623 return 0;
5624 }
5625 memset(evnp, 0, sizeof(*evnp));
5626
5627 devtverboseprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending EventNotification (%d) request %p\n", ioc->name, EvSwitch, evnp));
5628
5629 evnp->Function = MPI_FUNCTION_EVENT_NOTIFICATION;
5630 evnp->ChainOffset = 0;
5631 evnp->MsgFlags = 0;
5632 evnp->Switch = EvSwitch;
5633
5634 mpt_put_msg_frame(mpt_base_index, ioc, (MPT_FRAME_HDR *)evnp);
5635
5636 return 0;
5637 }
5638
5639 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5640 /**
5641 * SendEventAck - Send EventAck request to MPT adapter.
5642 * @ioc: Pointer to MPT_ADAPTER structure
5643 * @evnp: Pointer to original EventNotification request
5644 */
5645 static int
5646 SendEventAck(MPT_ADAPTER *ioc, EventNotificationReply_t *evnp)
5647 {
5648 EventAck_t *pAck;
5649
5650 if ((pAck = (EventAck_t *) mpt_get_msg_frame(mpt_base_index, ioc)) == NULL) {
5651 dfailprintk(ioc, printk(MYIOC_s_WARN_FMT "%s, no msg frames!!\n",
5652 ioc->name,__FUNCTION__));
5653 return -1;
5654 }
5655
5656 devtverboseprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending EventAck\n", ioc->name));
5657
5658 pAck->Function = MPI_FUNCTION_EVENT_ACK;
5659 pAck->ChainOffset = 0;
5660 pAck->Reserved[0] = pAck->Reserved[1] = 0;
5661 pAck->MsgFlags = 0;
5662 pAck->Reserved1[0] = pAck->Reserved1[1] = pAck->Reserved1[2] = 0;
5663 pAck->Event = evnp->Event;
5664 pAck->EventContext = evnp->EventContext;
5665
5666 mpt_put_msg_frame(mpt_base_index, ioc, (MPT_FRAME_HDR *)pAck);
5667
5668 return 0;
5669 }
5670
5671 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5672 /**
5673 * mpt_config - Generic function to issue config message
5674 * @ioc: Pointer to an adapter structure
5675 * @pCfg: Pointer to a configuration structure. Struct contains
5676 * action, page address, direction, physical address
5677 * and pointer to a configuration page header
5678 * Page header is updated.
5679 *
5680 * Returns 0 for success
5681 * -EPERM if not allowed due to ISR context
5682 * -EAGAIN if no msg frames currently available
5683 * -EFAULT for non-successful reply or no reply (timeout)
5684 */
5685 int
5686 mpt_config(MPT_ADAPTER *ioc, CONFIGPARMS *pCfg)
5687 {
5688 Config_t *pReq;
5689 ConfigExtendedPageHeader_t *pExtHdr = NULL;
5690 MPT_FRAME_HDR *mf;
5691 unsigned long flags;
5692 int ii, rc;
5693 int flagsLength;
5694 int in_isr;
5695
5696 /* Prevent calling wait_event() (below), if caller happens
5697 * to be in ISR context, because that is fatal!
5698 */
5699 in_isr = in_interrupt();
5700 if (in_isr) {
5701 dcprintk(ioc, printk(MYIOC_s_WARN_FMT "Config request not allowed in ISR context!\n",
5702 ioc->name));
5703 return -EPERM;
5704 }
5705
5706 /* Get and Populate a free Frame
5707 */
5708 if ((mf = mpt_get_msg_frame(mpt_base_index, ioc)) == NULL) {
5709 dcprintk(ioc, printk(MYIOC_s_WARN_FMT "mpt_config: no msg frames!\n",
5710 ioc->name));
5711 return -EAGAIN;
5712 }
5713 pReq = (Config_t *)mf;
5714 pReq->Action = pCfg->action;
5715 pReq->Reserved = 0;
5716 pReq->ChainOffset = 0;
5717 pReq->Function = MPI_FUNCTION_CONFIG;
5718
5719 /* Assume page type is not extended and clear "reserved" fields. */
5720 pReq->ExtPageLength = 0;
5721 pReq->ExtPageType = 0;
5722 pReq->MsgFlags = 0;
5723
5724 for (ii=0; ii < 8; ii++)
5725 pReq->Reserved2[ii] = 0;
5726
5727 pReq->Header.PageVersion = pCfg->cfghdr.hdr->PageVersion;
5728 pReq->Header.PageLength = pCfg->cfghdr.hdr->PageLength;
5729 pReq->Header.PageNumber = pCfg->cfghdr.hdr->PageNumber;
5730 pReq->Header.PageType = (pCfg->cfghdr.hdr->PageType & MPI_CONFIG_PAGETYPE_MASK);
5731
5732 if ((pCfg->cfghdr.hdr->PageType & MPI_CONFIG_PAGETYPE_MASK) == MPI_CONFIG_PAGETYPE_EXTENDED) {
5733 pExtHdr = (ConfigExtendedPageHeader_t *)pCfg->cfghdr.ehdr;
5734 pReq->ExtPageLength = cpu_to_le16(pExtHdr->ExtPageLength);
5735 pReq->ExtPageType = pExtHdr->ExtPageType;
5736 pReq->Header.PageType = MPI_CONFIG_PAGETYPE_EXTENDED;
5737
5738 /* Page Length must be treated as a reserved field for the extended header. */
5739 pReq->Header.PageLength = 0;
5740 }
5741
5742 pReq->PageAddress = cpu_to_le32(pCfg->pageAddr);
5743
5744 /* Add a SGE to the config request.
5745 */
5746 if (pCfg->dir)
5747 flagsLength = MPT_SGE_FLAGS_SSIMPLE_WRITE;
5748 else
5749 flagsLength = MPT_SGE_FLAGS_SSIMPLE_READ;
5750
5751 if ((pCfg->cfghdr.hdr->PageType & MPI_CONFIG_PAGETYPE_MASK) == MPI_CONFIG_PAGETYPE_EXTENDED) {
5752 flagsLength |= pExtHdr->ExtPageLength * 4;
5753
5754 dcprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending Config request type %d, page %d and action %d\n",
5755 ioc->name, pReq->ExtPageType, pReq->Header.PageNumber, pReq->Action));
5756 }
5757 else {
5758 flagsLength |= pCfg->cfghdr.hdr->PageLength * 4;
5759
5760 dcprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending Config request type %d, page %d and action %d\n",
5761 ioc->name, pReq->Header.PageType, pReq->Header.PageNumber, pReq->Action));
5762 }
5763
5764 mpt_add_sge((char *)&pReq->PageBufferSGE, flagsLength, pCfg->physAddr);
5765
5766 /* Append pCfg pointer to end of mf
5767 */
5768 *((void **) (((u8 *) mf) + (ioc->req_sz - sizeof(void *)))) = (void *) pCfg;
5769
5770 /* Initalize the timer
5771 */
5772 init_timer(&pCfg->timer);
5773 pCfg->timer.data = (unsigned long) ioc;
5774 pCfg->timer.function = mpt_timer_expired;
5775 pCfg->wait_done = 0;
5776
5777 /* Set the timer; ensure 10 second minimum */
5778 if (pCfg->timeout < 10)
5779 pCfg->timer.expires = jiffies + HZ*10;
5780 else
5781 pCfg->timer.expires = jiffies + HZ*pCfg->timeout;
5782
5783 /* Add to end of Q, set timer and then issue this command */
5784 spin_lock_irqsave(&ioc->FreeQlock, flags);
5785 list_add_tail(&pCfg->linkage, &ioc->configQ);
5786 spin_unlock_irqrestore(&ioc->FreeQlock, flags);
5787
5788 add_timer(&pCfg->timer);
5789 mpt_put_msg_frame(mpt_base_index, ioc, mf);
5790 wait_event(mpt_waitq, pCfg->wait_done);
5791
5792 /* mf has been freed - do not access */
5793
5794 rc = pCfg->status;
5795
5796 return rc;
5797 }
5798
5799 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5800 /**
5801 * mpt_timer_expired - Callback for timer process.
5802 * Used only internal config functionality.
5803 * @data: Pointer to MPT_SCSI_HOST recast as an unsigned long
5804 */
5805 static void
5806 mpt_timer_expired(unsigned long data)
5807 {
5808 MPT_ADAPTER *ioc = (MPT_ADAPTER *) data;
5809
5810 dcprintk(ioc, printk(MYIOC_s_DEBUG_FMT "mpt_timer_expired! \n", ioc->name));
5811
5812 /* Perform a FW reload */
5813 if (mpt_HardResetHandler(ioc, NO_SLEEP) < 0)
5814 printk(MYIOC_s_WARN_FMT "Firmware Reload FAILED!\n", ioc->name);
5815
5816 /* No more processing.
5817 * Hard reset clean-up will wake up
5818 * process and free all resources.
5819 */
5820 dcprintk(ioc, printk(MYIOC_s_DEBUG_FMT "mpt_timer_expired complete!\n", ioc->name));
5821
5822 return;
5823 }
5824
5825 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5826 /**
5827 * mpt_ioc_reset - Base cleanup for hard reset
5828 * @ioc: Pointer to the adapter structure
5829 * @reset_phase: Indicates pre- or post-reset functionality
5830 *
5831 * Remark: Frees resources with internally generated commands.
5832 */
5833 static int
5834 mpt_ioc_reset(MPT_ADAPTER *ioc, int reset_phase)
5835 {
5836 CONFIGPARMS *pCfg;
5837 unsigned long flags;
5838
5839 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT
5840 ": IOC %s_reset routed to MPT base driver!\n",
5841 ioc->name, reset_phase==MPT_IOC_SETUP_RESET ? "setup" : (
5842 reset_phase==MPT_IOC_PRE_RESET ? "pre" : "post")));
5843
5844 if (reset_phase == MPT_IOC_SETUP_RESET) {
5845 ;
5846 } else if (reset_phase == MPT_IOC_PRE_RESET) {
5847 /* If the internal config Q is not empty -
5848 * delete timer. MF resources will be freed when
5849 * the FIFO's are primed.
5850 */
5851 spin_lock_irqsave(&ioc->FreeQlock, flags);
5852 list_for_each_entry(pCfg, &ioc->configQ, linkage)
5853 del_timer(&pCfg->timer);
5854 spin_unlock_irqrestore(&ioc->FreeQlock, flags);
5855
5856 } else {
5857 CONFIGPARMS *pNext;
5858
5859 /* Search the configQ for internal commands.
5860 * Flush the Q, and wake up all suspended threads.
5861 */
5862 spin_lock_irqsave(&ioc->FreeQlock, flags);
5863 list_for_each_entry_safe(pCfg, pNext, &ioc->configQ, linkage) {
5864 list_del(&pCfg->linkage);
5865
5866 pCfg->status = MPT_CONFIG_ERROR;
5867 pCfg->wait_done = 1;
5868 wake_up(&mpt_waitq);
5869 }
5870 spin_unlock_irqrestore(&ioc->FreeQlock, flags);
5871 }
5872
5873 return 1; /* currently means nothing really */
5874 }
5875
5876
5877 #ifdef CONFIG_PROC_FS /* { */
5878 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5879 /*
5880 * procfs (%MPT_PROCFS_MPTBASEDIR/...) support stuff...
5881 */
5882 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5883 /**
5884 * procmpt_create - Create %MPT_PROCFS_MPTBASEDIR entries.
5885 *
5886 * Returns 0 for success, non-zero for failure.
5887 */
5888 static int
5889 procmpt_create(void)
5890 {
5891 struct proc_dir_entry *ent;
5892
5893 mpt_proc_root_dir = proc_mkdir(MPT_PROCFS_MPTBASEDIR, NULL);
5894 if (mpt_proc_root_dir == NULL)
5895 return -ENOTDIR;
5896
5897 ent = create_proc_entry("summary", S_IFREG|S_IRUGO, mpt_proc_root_dir);
5898 if (ent)
5899 ent->read_proc = procmpt_summary_read;
5900
5901 ent = create_proc_entry("version", S_IFREG|S_IRUGO, mpt_proc_root_dir);
5902 if (ent)
5903 ent->read_proc = procmpt_version_read;
5904
5905 return 0;
5906 }
5907
5908 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5909 /**
5910 * procmpt_destroy - Tear down %MPT_PROCFS_MPTBASEDIR entries.
5911 *
5912 * Returns 0 for success, non-zero for failure.
5913 */
5914 static void
5915 procmpt_destroy(void)
5916 {
5917 remove_proc_entry("version", mpt_proc_root_dir);
5918 remove_proc_entry("summary", mpt_proc_root_dir);
5919 remove_proc_entry(MPT_PROCFS_MPTBASEDIR, NULL);
5920 }
5921
5922 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5923 /**
5924 * procmpt_summary_read - Handle read request of a summary file
5925 * @buf: Pointer to area to write information
5926 * @start: Pointer to start pointer
5927 * @offset: Offset to start writing
5928 * @request: Amount of read data requested
5929 * @eof: Pointer to EOF integer
5930 * @data: Pointer
5931 *
5932 * Handles read request from /proc/mpt/summary or /proc/mpt/iocN/summary.
5933 * Returns number of characters written to process performing the read.
5934 */
5935 static int
5936 procmpt_summary_read(char *buf, char **start, off_t offset, int request, int *eof, void *data)
5937 {
5938 MPT_ADAPTER *ioc;
5939 char *out = buf;
5940 int len;
5941
5942 if (data) {
5943 int more = 0;
5944
5945 ioc = data;
5946 mpt_print_ioc_summary(ioc, out, &more, 0, 1);
5947
5948 out += more;
5949 } else {
5950 list_for_each_entry(ioc, &ioc_list, list) {
5951 int more = 0;
5952
5953 mpt_print_ioc_summary(ioc, out, &more, 0, 1);
5954
5955 out += more;
5956 if ((out-buf) >= request)
5957 break;
5958 }
5959 }
5960
5961 len = out - buf;
5962
5963 MPT_PROC_READ_RETURN(buf,start,offset,request,eof,len);
5964 }
5965
5966 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5967 /**
5968 * procmpt_version_read - Handle read request from /proc/mpt/version.
5969 * @buf: Pointer to area to write information
5970 * @start: Pointer to start pointer
5971 * @offset: Offset to start writing
5972 * @request: Amount of read data requested
5973 * @eof: Pointer to EOF integer
5974 * @data: Pointer
5975 *
5976 * Returns number of characters written to process performing the read.
5977 */
5978 static int
5979 procmpt_version_read(char *buf, char **start, off_t offset, int request, int *eof, void *data)
5980 {
5981 u8 cb_idx;
5982 int scsi, fc, sas, lan, ctl, targ, dmp;
5983 char *drvname;
5984 int len;
5985
5986 len = sprintf(buf, "%s-%s\n", "mptlinux", MPT_LINUX_VERSION_COMMON);
5987 len += sprintf(buf+len, " Fusion MPT base driver\n");
5988
5989 scsi = fc = sas = lan = ctl = targ = dmp = 0;
5990 for (cb_idx = MPT_MAX_PROTOCOL_DRIVERS-1; cb_idx; cb_idx--) {
5991 drvname = NULL;
5992 if (MptCallbacks[cb_idx]) {
5993 switch (MptDriverClass[cb_idx]) {
5994 case MPTSPI_DRIVER:
5995 if (!scsi++) drvname = "SPI host";
5996 break;
5997 case MPTFC_DRIVER:
5998 if (!fc++) drvname = "FC host";
5999 break;
6000 case MPTSAS_DRIVER:
6001 if (!sas++) drvname = "SAS host";
6002 break;
6003 case MPTLAN_DRIVER:
6004 if (!lan++) drvname = "LAN";
6005 break;
6006 case MPTSTM_DRIVER:
6007 if (!targ++) drvname = "SCSI target";
6008 break;
6009 case MPTCTL_DRIVER:
6010 if (!ctl++) drvname = "ioctl";
6011 break;
6012 }
6013
6014 if (drvname)
6015 len += sprintf(buf+len, " Fusion MPT %s driver\n", drvname);
6016 }
6017 }
6018
6019 MPT_PROC_READ_RETURN(buf,start,offset,request,eof,len);
6020 }
6021
6022 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
6023 /**
6024 * procmpt_iocinfo_read - Handle read request from /proc/mpt/iocN/info.
6025 * @buf: Pointer to area to write information
6026 * @start: Pointer to start pointer
6027 * @offset: Offset to start writing
6028 * @request: Amount of read data requested
6029 * @eof: Pointer to EOF integer
6030 * @data: Pointer
6031 *
6032 * Returns number of characters written to process performing the read.
6033 */
6034 static int
6035 procmpt_iocinfo_read(char *buf, char **start, off_t offset, int request, int *eof, void *data)
6036 {
6037 MPT_ADAPTER *ioc = data;
6038 int len;
6039 char expVer[32];
6040 int sz;
6041 int p;
6042
6043 mpt_get_fw_exp_ver(expVer, ioc);
6044
6045 len = sprintf(buf, "%s:", ioc->name);
6046 if (ioc->facts.Flags & MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT)
6047 len += sprintf(buf+len, " (f/w download boot flag set)");
6048 // if (ioc->facts.IOCExceptions & MPI_IOCFACTS_EXCEPT_CONFIG_CHECKSUM_FAIL)
6049 // len += sprintf(buf+len, " CONFIG_CHECKSUM_FAIL!");
6050
6051 len += sprintf(buf+len, "\n ProductID = 0x%04x (%s)\n",
6052 ioc->facts.ProductID,
6053 ioc->prod_name);
6054 len += sprintf(buf+len, " FWVersion = 0x%08x%s", ioc->facts.FWVersion.Word, expVer);
6055 if (ioc->facts.FWImageSize)
6056 len += sprintf(buf+len, " (fw_size=%d)", ioc->facts.FWImageSize);
6057 len += sprintf(buf+len, "\n MsgVersion = 0x%04x\n", ioc->facts.MsgVersion);
6058 len += sprintf(buf+len, " FirstWhoInit = 0x%02x\n", ioc->FirstWhoInit);
6059 len += sprintf(buf+len, " EventState = 0x%02x\n", ioc->facts.EventState);
6060
6061 len += sprintf(buf+len, " CurrentHostMfaHighAddr = 0x%08x\n",
6062 ioc->facts.CurrentHostMfaHighAddr);
6063 len += sprintf(buf+len, " CurrentSenseBufferHighAddr = 0x%08x\n",
6064 ioc->facts.CurrentSenseBufferHighAddr);
6065
6066 len += sprintf(buf+len, " MaxChainDepth = 0x%02x frames\n", ioc->facts.MaxChainDepth);
6067 len += sprintf(buf+len, " MinBlockSize = 0x%02x bytes\n", 4*ioc->facts.BlockSize);
6068
6069 len += sprintf(buf+len, " RequestFrames @ 0x%p (Dma @ 0x%p)\n",
6070 (void *)ioc->req_frames, (void *)(ulong)ioc->req_frames_dma);
6071 /*
6072 * Rounding UP to nearest 4-kB boundary here...
6073 */
6074 sz = (ioc->req_sz * ioc->req_depth) + 128;
6075 sz = ((sz + 0x1000UL - 1UL) / 0x1000) * 0x1000;
6076 len += sprintf(buf+len, " {CurReqSz=%d} x {CurReqDepth=%d} = %d bytes ^= 0x%x\n",
6077 ioc->req_sz, ioc->req_depth, ioc->req_sz*ioc->req_depth, sz);
6078 len += sprintf(buf+len, " {MaxReqSz=%d} {MaxReqDepth=%d}\n",
6079 4*ioc->facts.RequestFrameSize,
6080 ioc->facts.GlobalCredits);
6081
6082 len += sprintf(buf+len, " Frames @ 0x%p (Dma @ 0x%p)\n",
6083 (void *)ioc->alloc, (void *)(ulong)ioc->alloc_dma);
6084 sz = (ioc->reply_sz * ioc->reply_depth) + 128;
6085 len += sprintf(buf+len, " {CurRepSz=%d} x {CurRepDepth=%d} = %d bytes ^= 0x%x\n",
6086 ioc->reply_sz, ioc->reply_depth, ioc->reply_sz*ioc->reply_depth, sz);
6087 len += sprintf(buf+len, " {MaxRepSz=%d} {MaxRepDepth=%d}\n",
6088 ioc->facts.CurReplyFrameSize,
6089 ioc->facts.ReplyQueueDepth);
6090
6091 len += sprintf(buf+len, " MaxDevices = %d\n",
6092 (ioc->facts.MaxDevices==0) ? 255 : ioc->facts.MaxDevices);
6093 len += sprintf(buf+len, " MaxBuses = %d\n", ioc->facts.MaxBuses);
6094
6095 /* per-port info */
6096 for (p=0; p < ioc->facts.NumberOfPorts; p++) {
6097 len += sprintf(buf+len, " PortNumber = %d (of %d)\n",
6098 p+1,
6099 ioc->facts.NumberOfPorts);
6100 if (ioc->bus_type == FC) {
6101 if (ioc->pfacts[p].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_LAN) {
6102 u8 *a = (u8*)&ioc->lan_cnfg_page1.HardwareAddressLow;
6103 len += sprintf(buf+len, " LanAddr = %02X:%02X:%02X:%02X:%02X:%02X\n",
6104 a[5], a[4], a[3], a[2], a[1], a[0]);
6105 }
6106 len += sprintf(buf+len, " WWN = %08X%08X:%08X%08X\n",
6107 ioc->fc_port_page0[p].WWNN.High,
6108 ioc->fc_port_page0[p].WWNN.Low,
6109 ioc->fc_port_page0[p].WWPN.High,
6110 ioc->fc_port_page0[p].WWPN.Low);
6111 }
6112 }
6113
6114 MPT_PROC_READ_RETURN(buf,start,offset,request,eof,len);
6115 }
6116
6117 #endif /* CONFIG_PROC_FS } */
6118
6119 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
6120 static void
6121 mpt_get_fw_exp_ver(char *buf, MPT_ADAPTER *ioc)
6122 {
6123 buf[0] ='\0';
6124 if ((ioc->facts.FWVersion.Word >> 24) == 0x0E) {
6125 sprintf(buf, " (Exp %02d%02d)",
6126 (ioc->facts.FWVersion.Word >> 16) & 0x00FF, /* Month */
6127 (ioc->facts.FWVersion.Word >> 8) & 0x1F); /* Day */
6128
6129 /* insider hack! */
6130 if ((ioc->facts.FWVersion.Word >> 8) & 0x80)
6131 strcat(buf, " [MDBG]");
6132 }
6133 }
6134
6135 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
6136 /**
6137 * mpt_print_ioc_summary - Write ASCII summary of IOC to a buffer.
6138 * @ioc: Pointer to MPT_ADAPTER structure
6139 * @buffer: Pointer to buffer where IOC summary info should be written
6140 * @size: Pointer to number of bytes we wrote (set by this routine)
6141 * @len: Offset at which to start writing in buffer
6142 * @showlan: Display LAN stuff?
6143 *
6144 * This routine writes (english readable) ASCII text, which represents
6145 * a summary of IOC information, to a buffer.
6146 */
6147 void
6148 mpt_print_ioc_summary(MPT_ADAPTER *ioc, char *buffer, int *size, int len, int showlan)
6149 {
6150 char expVer[32];
6151 int y;
6152
6153 mpt_get_fw_exp_ver(expVer, ioc);
6154
6155 /*
6156 * Shorter summary of attached ioc's...
6157 */
6158 y = sprintf(buffer+len, "%s: %s, %s%08xh%s, Ports=%d, MaxQ=%d",
6159 ioc->name,
6160 ioc->prod_name,
6161 MPT_FW_REV_MAGIC_ID_STRING, /* "FwRev=" or somesuch */
6162 ioc->facts.FWVersion.Word,
6163 expVer,
6164 ioc->facts.NumberOfPorts,
6165 ioc->req_depth);
6166
6167 if (showlan && (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_LAN)) {
6168 u8 *a = (u8*)&ioc->lan_cnfg_page1.HardwareAddressLow;
6169 y += sprintf(buffer+len+y, ", LanAddr=%02X:%02X:%02X:%02X:%02X:%02X",
6170 a[5], a[4], a[3], a[2], a[1], a[0]);
6171 }
6172
6173 y += sprintf(buffer+len+y, ", IRQ=%d", ioc->pci_irq);
6174
6175 if (!ioc->active)
6176 y += sprintf(buffer+len+y, " (disabled)");
6177
6178 y += sprintf(buffer+len+y, "\n");
6179
6180 *size = y;
6181 }
6182
6183 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
6184 /*
6185 * Reset Handling
6186 */
6187 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
6188 /**
6189 * mpt_HardResetHandler - Generic reset handler
6190 * @ioc: Pointer to MPT_ADAPTER structure
6191 * @sleepFlag: Indicates if sleep or schedule must be called.
6192 *
6193 * Issues SCSI Task Management call based on input arg values.
6194 * If TaskMgmt fails, returns associated SCSI request.
6195 *
6196 * Remark: _HardResetHandler can be invoked from an interrupt thread (timer)
6197 * or a non-interrupt thread. In the former, must not call schedule().
6198 *
6199 * Note: A return of -1 is a FATAL error case, as it means a
6200 * FW reload/initialization failed.
6201 *
6202 * Returns 0 for SUCCESS or -1 if FAILED.
6203 */
6204 int
6205 mpt_HardResetHandler(MPT_ADAPTER *ioc, int sleepFlag)
6206 {
6207 int rc;
6208 unsigned long flags;
6209
6210 dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT "HardResetHandler Entered!\n", ioc->name));
6211 #ifdef MFCNT
6212 printk(MYIOC_s_INFO_FMT "HardResetHandler Entered!\n", ioc->name);
6213 printk("MF count 0x%x !\n", ioc->mfcnt);
6214 #endif
6215
6216 /* Reset the adapter. Prevent more than 1 call to
6217 * mpt_do_ioc_recovery at any instant in time.
6218 */
6219 spin_lock_irqsave(&ioc->diagLock, flags);
6220 if ((ioc->diagPending) || (ioc->alt_ioc && ioc->alt_ioc->diagPending)){
6221 spin_unlock_irqrestore(&ioc->diagLock, flags);
6222 return 0;
6223 } else {
6224 ioc->diagPending = 1;
6225 }
6226 spin_unlock_irqrestore(&ioc->diagLock, flags);
6227
6228 /* FIXME: If do_ioc_recovery fails, repeat....
6229 */
6230
6231 /* The SCSI driver needs to adjust timeouts on all current
6232 * commands prior to the diagnostic reset being issued.
6233 * Prevents timeouts occurring during a diagnostic reset...very bad.
6234 * For all other protocol drivers, this is a no-op.
6235 */
6236 {
6237 u8 cb_idx;
6238 int r = 0;
6239
6240 for (cb_idx = MPT_MAX_PROTOCOL_DRIVERS-1; cb_idx; cb_idx--) {
6241 if (MptResetHandlers[cb_idx]) {
6242 dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Calling IOC reset_setup handler #%d\n",
6243 ioc->name, cb_idx));
6244 r += mpt_signal_reset(cb_idx, ioc, MPT_IOC_SETUP_RESET);
6245 if (ioc->alt_ioc) {
6246 dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Calling alt-%s setup reset handler #%d\n",
6247 ioc->name, ioc->alt_ioc->name, cb_idx));
6248 r += mpt_signal_reset(cb_idx, ioc->alt_ioc, MPT_IOC_SETUP_RESET);
6249 }
6250 }
6251 }
6252 }
6253
6254 if ((rc = mpt_do_ioc_recovery(ioc, MPT_HOSTEVENT_IOC_RECOVER, sleepFlag)) != 0) {
6255 printk(MYIOC_s_WARN_FMT "Cannot recover rc = %d!\n", ioc->name, rc);
6256 }
6257 ioc->reload_fw = 0;
6258 if (ioc->alt_ioc)
6259 ioc->alt_ioc->reload_fw = 0;
6260
6261 spin_lock_irqsave(&ioc->diagLock, flags);
6262 ioc->diagPending = 0;
6263 if (ioc->alt_ioc)
6264 ioc->alt_ioc->diagPending = 0;
6265 spin_unlock_irqrestore(&ioc->diagLock, flags);
6266
6267 dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT "HardResetHandler rc = %d!\n", ioc->name, rc));
6268
6269 return rc;
6270 }
6271
6272 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
6273 static void
6274 EventDescriptionStr(u8 event, u32 evData0, char *evStr)
6275 {
6276 char *ds = NULL;
6277
6278 switch(event) {
6279 case MPI_EVENT_NONE:
6280 ds = "None";
6281 break;
6282 case MPI_EVENT_LOG_DATA:
6283 ds = "Log Data";
6284 break;
6285 case MPI_EVENT_STATE_CHANGE:
6286 ds = "State Change";
6287 break;
6288 case MPI_EVENT_UNIT_ATTENTION:
6289 ds = "Unit Attention";
6290 break;
6291 case MPI_EVENT_IOC_BUS_RESET:
6292 ds = "IOC Bus Reset";
6293 break;
6294 case MPI_EVENT_EXT_BUS_RESET:
6295 ds = "External Bus Reset";
6296 break;
6297 case MPI_EVENT_RESCAN:
6298 ds = "Bus Rescan Event";
6299 break;
6300 case MPI_EVENT_LINK_STATUS_CHANGE:
6301 if (evData0 == MPI_EVENT_LINK_STATUS_FAILURE)
6302 ds = "Link Status(FAILURE) Change";
6303 else
6304 ds = "Link Status(ACTIVE) Change";
6305 break;
6306 case MPI_EVENT_LOOP_STATE_CHANGE:
6307 if (evData0 == MPI_EVENT_LOOP_STATE_CHANGE_LIP)
6308 ds = "Loop State(LIP) Change";
6309 else if (evData0 == MPI_EVENT_LOOP_STATE_CHANGE_LPE)
6310 ds = "Loop State(LPE) Change"; /* ??? */
6311 else
6312 ds = "Loop State(LPB) Change"; /* ??? */
6313 break;
6314 case MPI_EVENT_LOGOUT:
6315 ds = "Logout";
6316 break;
6317 case MPI_EVENT_EVENT_CHANGE:
6318 if (evData0)
6319 ds = "Events ON";
6320 else
6321 ds = "Events OFF";
6322 break;
6323 case MPI_EVENT_INTEGRATED_RAID:
6324 {
6325 u8 ReasonCode = (u8)(evData0 >> 16);
6326 switch (ReasonCode) {
6327 case MPI_EVENT_RAID_RC_VOLUME_CREATED :
6328 ds = "Integrated Raid: Volume Created";
6329 break;
6330 case MPI_EVENT_RAID_RC_VOLUME_DELETED :
6331 ds = "Integrated Raid: Volume Deleted";
6332 break;
6333 case MPI_EVENT_RAID_RC_VOLUME_SETTINGS_CHANGED :
6334 ds = "Integrated Raid: Volume Settings Changed";
6335 break;
6336 case MPI_EVENT_RAID_RC_VOLUME_STATUS_CHANGED :
6337 ds = "Integrated Raid: Volume Status Changed";
6338 break;
6339 case MPI_EVENT_RAID_RC_VOLUME_PHYSDISK_CHANGED :
6340 ds = "Integrated Raid: Volume Physdisk Changed";
6341 break;
6342 case MPI_EVENT_RAID_RC_PHYSDISK_CREATED :
6343 ds = "Integrated Raid: Physdisk Created";
6344 break;
6345 case MPI_EVENT_RAID_RC_PHYSDISK_DELETED :
6346 ds = "Integrated Raid: Physdisk Deleted";
6347 break;
6348 case MPI_EVENT_RAID_RC_PHYSDISK_SETTINGS_CHANGED :
6349 ds = "Integrated Raid: Physdisk Settings Changed";
6350 break;
6351 case MPI_EVENT_RAID_RC_PHYSDISK_STATUS_CHANGED :
6352 ds = "Integrated Raid: Physdisk Status Changed";
6353 break;
6354 case MPI_EVENT_RAID_RC_DOMAIN_VAL_NEEDED :
6355 ds = "Integrated Raid: Domain Validation Needed";
6356 break;
6357 case MPI_EVENT_RAID_RC_SMART_DATA :
6358 ds = "Integrated Raid; Smart Data";
6359 break;
6360 case MPI_EVENT_RAID_RC_REPLACE_ACTION_STARTED :
6361 ds = "Integrated Raid: Replace Action Started";
6362 break;
6363 default:
6364 ds = "Integrated Raid";
6365 break;
6366 }
6367 break;
6368 }
6369 case MPI_EVENT_SCSI_DEVICE_STATUS_CHANGE:
6370 ds = "SCSI Device Status Change";
6371 break;
6372 case MPI_EVENT_SAS_DEVICE_STATUS_CHANGE:
6373 {
6374 u8 id = (u8)(evData0);
6375 u8 channel = (u8)(evData0 >> 8);
6376 u8 ReasonCode = (u8)(evData0 >> 16);
6377 switch (ReasonCode) {
6378 case MPI_EVENT_SAS_DEV_STAT_RC_ADDED:
6379 snprintf(evStr, EVENT_DESCR_STR_SZ,
6380 "SAS Device Status Change: Added: "
6381 "id=%d channel=%d", id, channel);
6382 break;
6383 case MPI_EVENT_SAS_DEV_STAT_RC_NOT_RESPONDING:
6384 snprintf(evStr, EVENT_DESCR_STR_SZ,
6385 "SAS Device Status Change: Deleted: "
6386 "id=%d channel=%d", id, channel);
6387 break;
6388 case MPI_EVENT_SAS_DEV_STAT_RC_SMART_DATA:
6389 snprintf(evStr, EVENT_DESCR_STR_SZ,
6390 "SAS Device Status Change: SMART Data: "
6391 "id=%d channel=%d", id, channel);
6392 break;
6393 case MPI_EVENT_SAS_DEV_STAT_RC_NO_PERSIST_ADDED:
6394 snprintf(evStr, EVENT_DESCR_STR_SZ,
6395 "SAS Device Status Change: No Persistancy: "
6396 "id=%d channel=%d", id, channel);
6397 break;
6398 case MPI_EVENT_SAS_DEV_STAT_RC_UNSUPPORTED:
6399 snprintf(evStr, EVENT_DESCR_STR_SZ,
6400 "SAS Device Status Change: Unsupported Device "
6401 "Discovered : id=%d channel=%d", id, channel);
6402 break;
6403 case MPI_EVENT_SAS_DEV_STAT_RC_INTERNAL_DEVICE_RESET:
6404 snprintf(evStr, EVENT_DESCR_STR_SZ,
6405 "SAS Device Status Change: Internal Device "
6406 "Reset : id=%d channel=%d", id, channel);
6407 break;
6408 case MPI_EVENT_SAS_DEV_STAT_RC_TASK_ABORT_INTERNAL:
6409 snprintf(evStr, EVENT_DESCR_STR_SZ,
6410 "SAS Device Status Change: Internal Task "
6411 "Abort : id=%d channel=%d", id, channel);
6412 break;
6413 case MPI_EVENT_SAS_DEV_STAT_RC_ABORT_TASK_SET_INTERNAL:
6414 snprintf(evStr, EVENT_DESCR_STR_SZ,
6415 "SAS Device Status Change: Internal Abort "
6416 "Task Set : id=%d channel=%d", id, channel);
6417 break;
6418 case MPI_EVENT_SAS_DEV_STAT_RC_CLEAR_TASK_SET_INTERNAL:
6419 snprintf(evStr, EVENT_DESCR_STR_SZ,
6420 "SAS Device Status Change: Internal Clear "
6421 "Task Set : id=%d channel=%d", id, channel);
6422 break;
6423 case MPI_EVENT_SAS_DEV_STAT_RC_QUERY_TASK_INTERNAL:
6424 snprintf(evStr, EVENT_DESCR_STR_SZ,
6425 "SAS Device Status Change: Internal Query "
6426 "Task : id=%d channel=%d", id, channel);
6427 break;
6428 default:
6429 snprintf(evStr, EVENT_DESCR_STR_SZ,
6430 "SAS Device Status Change: Unknown: "
6431 "id=%d channel=%d", id, channel);
6432 break;
6433 }
6434 break;
6435 }
6436 case MPI_EVENT_ON_BUS_TIMER_EXPIRED:
6437 ds = "Bus Timer Expired";
6438 break;
6439 case MPI_EVENT_QUEUE_FULL:
6440 {
6441 u16 curr_depth = (u16)(evData0 >> 16);
6442 u8 channel = (u8)(evData0 >> 8);
6443 u8 id = (u8)(evData0);
6444
6445 snprintf(evStr, EVENT_DESCR_STR_SZ,
6446 "Queue Full: channel=%d id=%d depth=%d",
6447 channel, id, curr_depth);
6448 break;
6449 }
6450 case MPI_EVENT_SAS_SES:
6451 ds = "SAS SES Event";
6452 break;
6453 case MPI_EVENT_PERSISTENT_TABLE_FULL:
6454 ds = "Persistent Table Full";
6455 break;
6456 case MPI_EVENT_SAS_PHY_LINK_STATUS:
6457 {
6458 u8 LinkRates = (u8)(evData0 >> 8);
6459 u8 PhyNumber = (u8)(evData0);
6460 LinkRates = (LinkRates & MPI_EVENT_SAS_PLS_LR_CURRENT_MASK) >>
6461 MPI_EVENT_SAS_PLS_LR_CURRENT_SHIFT;
6462 switch (LinkRates) {
6463 case MPI_EVENT_SAS_PLS_LR_RATE_UNKNOWN:
6464 snprintf(evStr, EVENT_DESCR_STR_SZ,
6465 "SAS PHY Link Status: Phy=%d:"
6466 " Rate Unknown",PhyNumber);
6467 break;
6468 case MPI_EVENT_SAS_PLS_LR_RATE_PHY_DISABLED:
6469 snprintf(evStr, EVENT_DESCR_STR_SZ,
6470 "SAS PHY Link Status: Phy=%d:"
6471 " Phy Disabled",PhyNumber);
6472 break;
6473 case MPI_EVENT_SAS_PLS_LR_RATE_FAILED_SPEED_NEGOTIATION:
6474 snprintf(evStr, EVENT_DESCR_STR_SZ,
6475 "SAS PHY Link Status: Phy=%d:"
6476 " Failed Speed Nego",PhyNumber);
6477 break;
6478 case MPI_EVENT_SAS_PLS_LR_RATE_SATA_OOB_COMPLETE:
6479 snprintf(evStr, EVENT_DESCR_STR_SZ,
6480 "SAS PHY Link Status: Phy=%d:"
6481 " Sata OOB Completed",PhyNumber);
6482 break;
6483 case MPI_EVENT_SAS_PLS_LR_RATE_1_5:
6484 snprintf(evStr, EVENT_DESCR_STR_SZ,
6485 "SAS PHY Link Status: Phy=%d:"
6486 " Rate 1.5 Gbps",PhyNumber);
6487 break;
6488 case MPI_EVENT_SAS_PLS_LR_RATE_3_0:
6489 snprintf(evStr, EVENT_DESCR_STR_SZ,
6490 "SAS PHY Link Status: Phy=%d:"
6491 " Rate 3.0 Gpbs",PhyNumber);
6492 break;
6493 default:
6494 snprintf(evStr, EVENT_DESCR_STR_SZ,
6495 "SAS PHY Link Status: Phy=%d", PhyNumber);
6496 break;
6497 }
6498 break;
6499 }
6500 case MPI_EVENT_SAS_DISCOVERY_ERROR:
6501 ds = "SAS Discovery Error";
6502 break;
6503 case MPI_EVENT_IR_RESYNC_UPDATE:
6504 {
6505 u8 resync_complete = (u8)(evData0 >> 16);
6506 snprintf(evStr, EVENT_DESCR_STR_SZ,
6507 "IR Resync Update: Complete = %d:",resync_complete);
6508 break;
6509 }
6510 case MPI_EVENT_IR2:
6511 {
6512 u8 ReasonCode = (u8)(evData0 >> 16);
6513 switch (ReasonCode) {
6514 case MPI_EVENT_IR2_RC_LD_STATE_CHANGED:
6515 ds = "IR2: LD State Changed";
6516 break;
6517 case MPI_EVENT_IR2_RC_PD_STATE_CHANGED:
6518 ds = "IR2: PD State Changed";
6519 break;
6520 case MPI_EVENT_IR2_RC_BAD_BLOCK_TABLE_FULL:
6521 ds = "IR2: Bad Block Table Full";
6522 break;
6523 case MPI_EVENT_IR2_RC_PD_INSERTED:
6524 ds = "IR2: PD Inserted";
6525 break;
6526 case MPI_EVENT_IR2_RC_PD_REMOVED:
6527 ds = "IR2: PD Removed";
6528 break;
6529 case MPI_EVENT_IR2_RC_FOREIGN_CFG_DETECTED:
6530 ds = "IR2: Foreign CFG Detected";
6531 break;
6532 case MPI_EVENT_IR2_RC_REBUILD_MEDIUM_ERROR:
6533 ds = "IR2: Rebuild Medium Error";
6534 break;
6535 default:
6536 ds = "IR2";
6537 break;
6538 }
6539 break;
6540 }
6541 case MPI_EVENT_SAS_DISCOVERY:
6542 {
6543 if (evData0)
6544 ds = "SAS Discovery: Start";
6545 else
6546 ds = "SAS Discovery: Stop";
6547 break;
6548 }
6549 case MPI_EVENT_LOG_ENTRY_ADDED:
6550 ds = "SAS Log Entry Added";
6551 break;
6552
6553 case MPI_EVENT_SAS_BROADCAST_PRIMITIVE:
6554 {
6555 u8 phy_num = (u8)(evData0);
6556 u8 port_num = (u8)(evData0 >> 8);
6557 u8 port_width = (u8)(evData0 >> 16);
6558 u8 primative = (u8)(evData0 >> 24);
6559 snprintf(evStr, EVENT_DESCR_STR_SZ,
6560 "SAS Broadcase Primative: phy=%d port=%d "
6561 "width=%d primative=0x%02x",
6562 phy_num, port_num, port_width, primative);
6563 break;
6564 }
6565
6566 case MPI_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE:
6567 {
6568 u8 reason = (u8)(evData0);
6569 u8 port_num = (u8)(evData0 >> 8);
6570 u16 handle = le16_to_cpu(evData0 >> 16);
6571
6572 snprintf(evStr, EVENT_DESCR_STR_SZ,
6573 "SAS Initiator Device Status Change: reason=0x%02x "
6574 "port=%d handle=0x%04x",
6575 reason, port_num, handle);
6576 break;
6577 }
6578
6579 case MPI_EVENT_SAS_INIT_TABLE_OVERFLOW:
6580 {
6581 u8 max_init = (u8)(evData0);
6582 u8 current_init = (u8)(evData0 >> 8);
6583
6584 snprintf(evStr, EVENT_DESCR_STR_SZ,
6585 "SAS Initiator Device Table Overflow: max initiators=%02d "
6586 "current initators=%02d",
6587 max_init, current_init);
6588 break;
6589 }
6590 case MPI_EVENT_SAS_SMP_ERROR:
6591 {
6592 u8 status = (u8)(evData0);
6593 u8 port_num = (u8)(evData0 >> 8);
6594 u8 result = (u8)(evData0 >> 16);
6595
6596 if (status == MPI_EVENT_SAS_SMP_FUNCTION_RESULT_VALID)
6597 snprintf(evStr, EVENT_DESCR_STR_SZ,
6598 "SAS SMP Error: port=%d result=0x%02x",
6599 port_num, result);
6600 else if (status == MPI_EVENT_SAS_SMP_CRC_ERROR)
6601 snprintf(evStr, EVENT_DESCR_STR_SZ,
6602 "SAS SMP Error: port=%d : CRC Error",
6603 port_num);
6604 else if (status == MPI_EVENT_SAS_SMP_TIMEOUT)
6605 snprintf(evStr, EVENT_DESCR_STR_SZ,
6606 "SAS SMP Error: port=%d : Timeout",
6607 port_num);
6608 else if (status == MPI_EVENT_SAS_SMP_NO_DESTINATION)
6609 snprintf(evStr, EVENT_DESCR_STR_SZ,
6610 "SAS SMP Error: port=%d : No Destination",
6611 port_num);
6612 else if (status == MPI_EVENT_SAS_SMP_BAD_DESTINATION)
6613 snprintf(evStr, EVENT_DESCR_STR_SZ,
6614 "SAS SMP Error: port=%d : Bad Destination",
6615 port_num);
6616 else
6617 snprintf(evStr, EVENT_DESCR_STR_SZ,
6618 "SAS SMP Error: port=%d : status=0x%02x",
6619 port_num, status);
6620 break;
6621 }
6622
6623 /*
6624 * MPT base "custom" events may be added here...
6625 */
6626 default:
6627 ds = "Unknown";
6628 break;
6629 }
6630 if (ds)
6631 strncpy(evStr, ds, EVENT_DESCR_STR_SZ);
6632 }
6633
6634 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
6635 /**
6636 * ProcessEventNotification - Route EventNotificationReply to all event handlers
6637 * @ioc: Pointer to MPT_ADAPTER structure
6638 * @pEventReply: Pointer to EventNotification reply frame
6639 * @evHandlers: Pointer to integer, number of event handlers
6640 *
6641 * Routes a received EventNotificationReply to all currently registered
6642 * event handlers.
6643 * Returns sum of event handlers return values.
6644 */
6645 static int
6646 ProcessEventNotification(MPT_ADAPTER *ioc, EventNotificationReply_t *pEventReply, int *evHandlers)
6647 {
6648 u16 evDataLen;
6649 u32 evData0 = 0;
6650 // u32 evCtx;
6651 int ii;
6652 u8 cb_idx;
6653 int r = 0;
6654 int handlers = 0;
6655 char evStr[EVENT_DESCR_STR_SZ];
6656 u8 event;
6657
6658 /*
6659 * Do platform normalization of values
6660 */
6661 event = le32_to_cpu(pEventReply->Event) & 0xFF;
6662 // evCtx = le32_to_cpu(pEventReply->EventContext);
6663 evDataLen = le16_to_cpu(pEventReply->EventDataLength);
6664 if (evDataLen) {
6665 evData0 = le32_to_cpu(pEventReply->Data[0]);
6666 }
6667
6668 EventDescriptionStr(event, evData0, evStr);
6669 devtprintk(ioc, printk(MYIOC_s_DEBUG_FMT "MPT event:(%02Xh) : %s\n",
6670 ioc->name,
6671 event,
6672 evStr));
6673
6674 #ifdef CONFIG_FUSION_LOGGING
6675 devtverboseprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6676 ": Event data:\n", ioc->name));
6677 for (ii = 0; ii < evDataLen; ii++)
6678 devtverboseprintk(ioc, printk(" %08x",
6679 le32_to_cpu(pEventReply->Data[ii])));
6680 devtverboseprintk(ioc, printk("\n"));
6681 #endif
6682
6683 /*
6684 * Do general / base driver event processing
6685 */
6686 switch(event) {
6687 case MPI_EVENT_EVENT_CHANGE: /* 0A */
6688 if (evDataLen) {
6689 u8 evState = evData0 & 0xFF;
6690
6691 /* CHECKME! What if evState unexpectedly says OFF (0)? */
6692
6693 /* Update EventState field in cached IocFacts */
6694 if (ioc->facts.Function) {
6695 ioc->facts.EventState = evState;
6696 }
6697 }
6698 break;
6699 case MPI_EVENT_INTEGRATED_RAID:
6700 mptbase_raid_process_event_data(ioc,
6701 (MpiEventDataRaid_t *)pEventReply->Data);
6702 break;
6703 default:
6704 break;
6705 }
6706
6707 /*
6708 * Should this event be logged? Events are written sequentially.
6709 * When buffer is full, start again at the top.
6710 */
6711 if (ioc->events && (ioc->eventTypes & ( 1 << event))) {
6712 int idx;
6713
6714 idx = ioc->eventContext % MPTCTL_EVENT_LOG_SIZE;
6715
6716 ioc->events[idx].event = event;
6717 ioc->events[idx].eventContext = ioc->eventContext;
6718
6719 for (ii = 0; ii < 2; ii++) {
6720 if (ii < evDataLen)
6721 ioc->events[idx].data[ii] = le32_to_cpu(pEventReply->Data[ii]);
6722 else
6723 ioc->events[idx].data[ii] = 0;
6724 }
6725
6726 ioc->eventContext++;
6727 }
6728
6729
6730 /*
6731 * Call each currently registered protocol event handler.
6732 */
6733 for (cb_idx = MPT_MAX_PROTOCOL_DRIVERS-1; cb_idx; cb_idx--) {
6734 if (MptEvHandlers[cb_idx]) {
6735 devtverboseprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Routing Event to event handler #%d\n",
6736 ioc->name, cb_idx));
6737 r += (*(MptEvHandlers[cb_idx]))(ioc, pEventReply);
6738 handlers++;
6739 }
6740 }
6741 /* FIXME? Examine results here? */
6742
6743 /*
6744 * If needed, send (a single) EventAck.
6745 */
6746 if (pEventReply->AckRequired == MPI_EVENT_NOTIFICATION_ACK_REQUIRED) {
6747 devtverboseprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6748 "EventAck required\n",ioc->name));
6749 if ((ii = SendEventAck(ioc, pEventReply)) != 0) {
6750 devtverboseprintk(ioc, printk(MYIOC_s_DEBUG_FMT "SendEventAck returned %d\n",
6751 ioc->name, ii));
6752 }
6753 }
6754
6755 *evHandlers = handlers;
6756 return r;
6757 }
6758
6759 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
6760 /**
6761 * mpt_fc_log_info - Log information returned from Fibre Channel IOC.
6762 * @ioc: Pointer to MPT_ADAPTER structure
6763 * @log_info: U32 LogInfo reply word from the IOC
6764 *
6765 * Refer to lsi/mpi_log_fc.h.
6766 */
6767 static void
6768 mpt_fc_log_info(MPT_ADAPTER *ioc, u32 log_info)
6769 {
6770 char *desc = "unknown";
6771
6772 switch (log_info & 0xFF000000) {
6773 case MPI_IOCLOGINFO_FC_INIT_BASE:
6774 desc = "FCP Initiator";
6775 break;
6776 case MPI_IOCLOGINFO_FC_TARGET_BASE:
6777 desc = "FCP Target";
6778 break;
6779 case MPI_IOCLOGINFO_FC_LAN_BASE:
6780 desc = "LAN";
6781 break;
6782 case MPI_IOCLOGINFO_FC_MSG_BASE:
6783 desc = "MPI Message Layer";
6784 break;
6785 case MPI_IOCLOGINFO_FC_LINK_BASE:
6786 desc = "FC Link";
6787 break;
6788 case MPI_IOCLOGINFO_FC_CTX_BASE:
6789 desc = "Context Manager";
6790 break;
6791 case MPI_IOCLOGINFO_FC_INVALID_FIELD_BYTE_OFFSET:
6792 desc = "Invalid Field Offset";
6793 break;
6794 case MPI_IOCLOGINFO_FC_STATE_CHANGE:
6795 desc = "State Change Info";
6796 break;
6797 }
6798
6799 printk(MYIOC_s_INFO_FMT "LogInfo(0x%08x): SubClass={%s}, Value=(0x%06x)\n",
6800 ioc->name, log_info, desc, (log_info & 0xFFFFFF));
6801 }
6802
6803 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
6804 /**
6805 * mpt_spi_log_info - Log information returned from SCSI Parallel IOC.
6806 * @ioc: Pointer to MPT_ADAPTER structure
6807 * @mr: Pointer to MPT reply frame
6808 * @log_info: U32 LogInfo word from the IOC
6809 *
6810 * Refer to lsi/sp_log.h.
6811 */
6812 static void
6813 mpt_spi_log_info(MPT_ADAPTER *ioc, u32 log_info)
6814 {
6815 u32 info = log_info & 0x00FF0000;
6816 char *desc = "unknown";
6817
6818 switch (info) {
6819 case 0x00010000:
6820 desc = "bug! MID not found";
6821 if (ioc->reload_fw == 0)
6822 ioc->reload_fw++;
6823 break;
6824
6825 case 0x00020000:
6826 desc = "Parity Error";
6827 break;
6828
6829 case 0x00030000:
6830 desc = "ASYNC Outbound Overrun";
6831 break;
6832
6833 case 0x00040000:
6834 desc = "SYNC Offset Error";
6835 break;
6836
6837 case 0x00050000:
6838 desc = "BM Change";
6839 break;
6840
6841 case 0x00060000:
6842 desc = "Msg In Overflow";
6843 break;
6844
6845 case 0x00070000:
6846 desc = "DMA Error";
6847 break;
6848
6849 case 0x00080000:
6850 desc = "Outbound DMA Overrun";
6851 break;
6852
6853 case 0x00090000:
6854 desc = "Task Management";
6855 break;
6856
6857 case 0x000A0000:
6858 desc = "Device Problem";
6859 break;
6860
6861 case 0x000B0000:
6862 desc = "Invalid Phase Change";
6863 break;
6864
6865 case 0x000C0000:
6866 desc = "Untagged Table Size";
6867 break;
6868
6869 }
6870
6871 printk(MYIOC_s_INFO_FMT "LogInfo(0x%08x): F/W: %s\n", ioc->name, log_info, desc);
6872 }
6873
6874 /* strings for sas loginfo */
6875 static char *originator_str[] = {
6876 "IOP", /* 00h */
6877 "PL", /* 01h */
6878 "IR" /* 02h */
6879 };
6880 static char *iop_code_str[] = {
6881 NULL, /* 00h */
6882 "Invalid SAS Address", /* 01h */
6883 NULL, /* 02h */
6884 "Invalid Page", /* 03h */
6885 "Diag Message Error", /* 04h */
6886 "Task Terminated", /* 05h */
6887 "Enclosure Management", /* 06h */
6888 "Target Mode" /* 07h */
6889 };
6890 static char *pl_code_str[] = {
6891 NULL, /* 00h */
6892 "Open Failure", /* 01h */
6893 "Invalid Scatter Gather List", /* 02h */
6894 "Wrong Relative Offset or Frame Length", /* 03h */
6895 "Frame Transfer Error", /* 04h */
6896 "Transmit Frame Connected Low", /* 05h */
6897 "SATA Non-NCQ RW Error Bit Set", /* 06h */
6898 "SATA Read Log Receive Data Error", /* 07h */
6899 "SATA NCQ Fail All Commands After Error", /* 08h */
6900 "SATA Error in Receive Set Device Bit FIS", /* 09h */
6901 "Receive Frame Invalid Message", /* 0Ah */
6902 "Receive Context Message Valid Error", /* 0Bh */
6903 "Receive Frame Current Frame Error", /* 0Ch */
6904 "SATA Link Down", /* 0Dh */
6905 "Discovery SATA Init W IOS", /* 0Eh */
6906 "Config Invalid Page", /* 0Fh */
6907 "Discovery SATA Init Timeout", /* 10h */
6908 "Reset", /* 11h */
6909 "Abort", /* 12h */
6910 "IO Not Yet Executed", /* 13h */
6911 "IO Executed", /* 14h */
6912 "Persistent Reservation Out Not Affiliation "
6913 "Owner", /* 15h */
6914 "Open Transmit DMA Abort", /* 16h */
6915 "IO Device Missing Delay Retry", /* 17h */
6916 "IO Cancelled Due to Recieve Error", /* 18h */
6917 NULL, /* 19h */
6918 NULL, /* 1Ah */
6919 NULL, /* 1Bh */
6920 NULL, /* 1Ch */
6921 NULL, /* 1Dh */
6922 NULL, /* 1Eh */
6923 NULL, /* 1Fh */
6924 "Enclosure Management" /* 20h */
6925 };
6926 static char *ir_code_str[] = {
6927 "Raid Action Error", /* 00h */
6928 NULL, /* 00h */
6929 NULL, /* 01h */
6930 NULL, /* 02h */
6931 NULL, /* 03h */
6932 NULL, /* 04h */
6933 NULL, /* 05h */
6934 NULL, /* 06h */
6935 NULL /* 07h */
6936 };
6937 static char *raid_sub_code_str[] = {
6938 NULL, /* 00h */
6939 "Volume Creation Failed: Data Passed too "
6940 "Large", /* 01h */
6941 "Volume Creation Failed: Duplicate Volumes "
6942 "Attempted", /* 02h */
6943 "Volume Creation Failed: Max Number "
6944 "Supported Volumes Exceeded", /* 03h */
6945 "Volume Creation Failed: DMA Error", /* 04h */
6946 "Volume Creation Failed: Invalid Volume Type", /* 05h */
6947 "Volume Creation Failed: Error Reading "
6948 "MFG Page 4", /* 06h */
6949 "Volume Creation Failed: Creating Internal "
6950 "Structures", /* 07h */
6951 NULL, /* 08h */
6952 NULL, /* 09h */
6953 NULL, /* 0Ah */
6954 NULL, /* 0Bh */
6955 NULL, /* 0Ch */
6956 NULL, /* 0Dh */
6957 NULL, /* 0Eh */
6958 NULL, /* 0Fh */
6959 "Activation failed: Already Active Volume", /* 10h */
6960 "Activation failed: Unsupported Volume Type", /* 11h */
6961 "Activation failed: Too Many Active Volumes", /* 12h */
6962 "Activation failed: Volume ID in Use", /* 13h */
6963 "Activation failed: Reported Failure", /* 14h */
6964 "Activation failed: Importing a Volume", /* 15h */
6965 NULL, /* 16h */
6966 NULL, /* 17h */
6967 NULL, /* 18h */
6968 NULL, /* 19h */
6969 NULL, /* 1Ah */
6970 NULL, /* 1Bh */
6971 NULL, /* 1Ch */
6972 NULL, /* 1Dh */
6973 NULL, /* 1Eh */
6974 NULL, /* 1Fh */
6975 "Phys Disk failed: Too Many Phys Disks", /* 20h */
6976 "Phys Disk failed: Data Passed too Large", /* 21h */
6977 "Phys Disk failed: DMA Error", /* 22h */
6978 "Phys Disk failed: Invalid <channel:id>", /* 23h */
6979 "Phys Disk failed: Creating Phys Disk Config "
6980 "Page", /* 24h */
6981 NULL, /* 25h */
6982 NULL, /* 26h */
6983 NULL, /* 27h */
6984 NULL, /* 28h */
6985 NULL, /* 29h */
6986 NULL, /* 2Ah */
6987 NULL, /* 2Bh */
6988 NULL, /* 2Ch */
6989 NULL, /* 2Dh */
6990 NULL, /* 2Eh */
6991 NULL, /* 2Fh */
6992 "Compatibility Error: IR Disabled", /* 30h */
6993 "Compatibility Error: Inquiry Comand Failed", /* 31h */
6994 "Compatibility Error: Device not Direct Access "
6995 "Device ", /* 32h */
6996 "Compatibility Error: Removable Device Found", /* 33h */
6997 "Compatibility Error: Device SCSI Version not "
6998 "2 or Higher", /* 34h */
6999 "Compatibility Error: SATA Device, 48 BIT LBA "
7000 "not Supported", /* 35h */
7001 "Compatibility Error: Device doesn't have "
7002 "512 Byte Block Sizes", /* 36h */
7003 "Compatibility Error: Volume Type Check Failed", /* 37h */
7004 "Compatibility Error: Volume Type is "
7005 "Unsupported by FW", /* 38h */
7006 "Compatibility Error: Disk Drive too Small for "
7007 "use in Volume", /* 39h */
7008 "Compatibility Error: Phys Disk for Create "
7009 "Volume not Found", /* 3Ah */
7010 "Compatibility Error: Too Many or too Few "
7011 "Disks for Volume Type", /* 3Bh */
7012 "Compatibility Error: Disk stripe Sizes "
7013 "Must be 64KB", /* 3Ch */
7014 "Compatibility Error: IME Size Limited to < 2TB", /* 3Dh */
7015 };
7016
7017 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
7018 /**
7019 * mpt_sas_log_info - Log information returned from SAS IOC.
7020 * @ioc: Pointer to MPT_ADAPTER structure
7021 * @log_info: U32 LogInfo reply word from the IOC
7022 *
7023 * Refer to lsi/mpi_log_sas.h.
7024 **/
7025 static void
7026 mpt_sas_log_info(MPT_ADAPTER *ioc, u32 log_info)
7027 {
7028 union loginfo_type {
7029 u32 loginfo;
7030 struct {
7031 u32 subcode:16;
7032 u32 code:8;
7033 u32 originator:4;
7034 u32 bus_type:4;
7035 }dw;
7036 };
7037 union loginfo_type sas_loginfo;
7038 char *originator_desc = NULL;
7039 char *code_desc = NULL;
7040 char *sub_code_desc = NULL;
7041
7042 sas_loginfo.loginfo = log_info;
7043 if ((sas_loginfo.dw.bus_type != 3 /*SAS*/) &&
7044 (sas_loginfo.dw.originator < sizeof(originator_str)/sizeof(char*)))
7045 return;
7046
7047 originator_desc = originator_str[sas_loginfo.dw.originator];
7048
7049 switch (sas_loginfo.dw.originator) {
7050
7051 case 0: /* IOP */
7052 if (sas_loginfo.dw.code <
7053 sizeof(iop_code_str)/sizeof(char*))
7054 code_desc = iop_code_str[sas_loginfo.dw.code];
7055 break;
7056 case 1: /* PL */
7057 if (sas_loginfo.dw.code <
7058 sizeof(pl_code_str)/sizeof(char*))
7059 code_desc = pl_code_str[sas_loginfo.dw.code];
7060 break;
7061 case 2: /* IR */
7062 if (sas_loginfo.dw.code >=
7063 sizeof(ir_code_str)/sizeof(char*))
7064 break;
7065 code_desc = ir_code_str[sas_loginfo.dw.code];
7066 if (sas_loginfo.dw.subcode >=
7067 sizeof(raid_sub_code_str)/sizeof(char*))
7068 break;
7069 if (sas_loginfo.dw.code == 0)
7070 sub_code_desc =
7071 raid_sub_code_str[sas_loginfo.dw.subcode];
7072 break;
7073 default:
7074 return;
7075 }
7076
7077 if (sub_code_desc != NULL)
7078 printk(MYIOC_s_INFO_FMT
7079 "LogInfo(0x%08x): Originator={%s}, Code={%s},"
7080 " SubCode={%s}\n",
7081 ioc->name, log_info, originator_desc, code_desc,
7082 sub_code_desc);
7083 else if (code_desc != NULL)
7084 printk(MYIOC_s_INFO_FMT
7085 "LogInfo(0x%08x): Originator={%s}, Code={%s},"
7086 " SubCode(0x%04x)\n",
7087 ioc->name, log_info, originator_desc, code_desc,
7088 sas_loginfo.dw.subcode);
7089 else
7090 printk(MYIOC_s_INFO_FMT
7091 "LogInfo(0x%08x): Originator={%s}, Code=(0x%02x),"
7092 " SubCode(0x%04x)\n",
7093 ioc->name, log_info, originator_desc,
7094 sas_loginfo.dw.code, sas_loginfo.dw.subcode);
7095 }
7096
7097 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
7098 /**
7099 * mpt_iocstatus_info_config - IOCSTATUS information for config pages
7100 * @ioc: Pointer to MPT_ADAPTER structure
7101 * @ioc_status: U32 IOCStatus word from IOC
7102 * @mf: Pointer to MPT request frame
7103 *
7104 * Refer to lsi/mpi.h.
7105 **/
7106 static void
7107 mpt_iocstatus_info_config(MPT_ADAPTER *ioc, u32 ioc_status, MPT_FRAME_HDR *mf)
7108 {
7109 Config_t *pReq = (Config_t *)mf;
7110 char extend_desc[EVENT_DESCR_STR_SZ];
7111 char *desc = NULL;
7112 u32 form;
7113 u8 page_type;
7114
7115 if (pReq->Header.PageType == MPI_CONFIG_PAGETYPE_EXTENDED)
7116 page_type = pReq->ExtPageType;
7117 else
7118 page_type = pReq->Header.PageType;
7119
7120 /*
7121 * ignore invalid page messages for GET_NEXT_HANDLE
7122 */
7123 form = le32_to_cpu(pReq->PageAddress);
7124 if (ioc_status == MPI_IOCSTATUS_CONFIG_INVALID_PAGE) {
7125 if (page_type == MPI_CONFIG_EXTPAGETYPE_SAS_DEVICE ||
7126 page_type == MPI_CONFIG_EXTPAGETYPE_SAS_EXPANDER ||
7127 page_type == MPI_CONFIG_EXTPAGETYPE_ENCLOSURE) {
7128 if ((form >> MPI_SAS_DEVICE_PGAD_FORM_SHIFT) ==
7129 MPI_SAS_DEVICE_PGAD_FORM_GET_NEXT_HANDLE)
7130 return;
7131 }
7132 if (page_type == MPI_CONFIG_PAGETYPE_FC_DEVICE)
7133 if ((form & MPI_FC_DEVICE_PGAD_FORM_MASK) ==
7134 MPI_FC_DEVICE_PGAD_FORM_NEXT_DID)
7135 return;
7136 }
7137
7138 snprintf(extend_desc, EVENT_DESCR_STR_SZ,
7139 "type=%02Xh, page=%02Xh, action=%02Xh, form=%08Xh",
7140 page_type, pReq->Header.PageNumber, pReq->Action, form);
7141
7142 switch (ioc_status) {
7143
7144 case MPI_IOCSTATUS_CONFIG_INVALID_ACTION: /* 0x0020 */
7145 desc = "Config Page Invalid Action";
7146 break;
7147
7148 case MPI_IOCSTATUS_CONFIG_INVALID_TYPE: /* 0x0021 */
7149 desc = "Config Page Invalid Type";
7150 break;
7151
7152 case MPI_IOCSTATUS_CONFIG_INVALID_PAGE: /* 0x0022 */
7153 desc = "Config Page Invalid Page";
7154 break;
7155
7156 case MPI_IOCSTATUS_CONFIG_INVALID_DATA: /* 0x0023 */
7157 desc = "Config Page Invalid Data";
7158 break;
7159
7160 case MPI_IOCSTATUS_CONFIG_NO_DEFAULTS: /* 0x0024 */
7161 desc = "Config Page No Defaults";
7162 break;
7163
7164 case MPI_IOCSTATUS_CONFIG_CANT_COMMIT: /* 0x0025 */
7165 desc = "Config Page Can't Commit";
7166 break;
7167 }
7168
7169 if (!desc)
7170 return;
7171
7172 dreplyprintk(ioc, printk(MYIOC_s_DEBUG_FMT "IOCStatus(0x%04X): %s: %s\n",
7173 ioc->name, ioc_status, desc, extend_desc));
7174 }
7175
7176 /**
7177 * mpt_iocstatus_info - IOCSTATUS information returned from IOC.
7178 * @ioc: Pointer to MPT_ADAPTER structure
7179 * @ioc_status: U32 IOCStatus word from IOC
7180 * @mf: Pointer to MPT request frame
7181 *
7182 * Refer to lsi/mpi.h.
7183 **/
7184 static void
7185 mpt_iocstatus_info(MPT_ADAPTER *ioc, u32 ioc_status, MPT_FRAME_HDR *mf)
7186 {
7187 u32 status = ioc_status & MPI_IOCSTATUS_MASK;
7188 char *desc = NULL;
7189
7190 switch (status) {
7191
7192 /****************************************************************************/
7193 /* Common IOCStatus values for all replies */
7194 /****************************************************************************/
7195
7196 case MPI_IOCSTATUS_INVALID_FUNCTION: /* 0x0001 */
7197 desc = "Invalid Function";
7198 break;
7199
7200 case MPI_IOCSTATUS_BUSY: /* 0x0002 */
7201 desc = "Busy";
7202 break;
7203
7204 case MPI_IOCSTATUS_INVALID_SGL: /* 0x0003 */
7205 desc = "Invalid SGL";
7206 break;
7207
7208 case MPI_IOCSTATUS_INTERNAL_ERROR: /* 0x0004 */
7209 desc = "Internal Error";
7210 break;
7211
7212 case MPI_IOCSTATUS_RESERVED: /* 0x0005 */
7213 desc = "Reserved";
7214 break;
7215
7216 case MPI_IOCSTATUS_INSUFFICIENT_RESOURCES: /* 0x0006 */
7217 desc = "Insufficient Resources";
7218 break;
7219
7220 case MPI_IOCSTATUS_INVALID_FIELD: /* 0x0007 */
7221 desc = "Invalid Field";
7222 break;
7223
7224 case MPI_IOCSTATUS_INVALID_STATE: /* 0x0008 */
7225 desc = "Invalid State";
7226 break;
7227
7228 /****************************************************************************/
7229 /* Config IOCStatus values */
7230 /****************************************************************************/
7231
7232 case MPI_IOCSTATUS_CONFIG_INVALID_ACTION: /* 0x0020 */
7233 case MPI_IOCSTATUS_CONFIG_INVALID_TYPE: /* 0x0021 */
7234 case MPI_IOCSTATUS_CONFIG_INVALID_PAGE: /* 0x0022 */
7235 case MPI_IOCSTATUS_CONFIG_INVALID_DATA: /* 0x0023 */
7236 case MPI_IOCSTATUS_CONFIG_NO_DEFAULTS: /* 0x0024 */
7237 case MPI_IOCSTATUS_CONFIG_CANT_COMMIT: /* 0x0025 */
7238 mpt_iocstatus_info_config(ioc, status, mf);
7239 break;
7240
7241 /****************************************************************************/
7242 /* SCSIIO Reply (SPI, FCP, SAS) initiator values */
7243 /* */
7244 /* Look at mptscsih_iocstatus_info_scsiio in mptscsih.c */
7245 /* */
7246 /****************************************************************************/
7247
7248 case MPI_IOCSTATUS_SCSI_RECOVERED_ERROR: /* 0x0040 */
7249 case MPI_IOCSTATUS_SCSI_DATA_UNDERRUN: /* 0x0045 */
7250 case MPI_IOCSTATUS_SCSI_INVALID_BUS: /* 0x0041 */
7251 case MPI_IOCSTATUS_SCSI_INVALID_TARGETID: /* 0x0042 */
7252 case MPI_IOCSTATUS_SCSI_DEVICE_NOT_THERE: /* 0x0043 */
7253 case MPI_IOCSTATUS_SCSI_DATA_OVERRUN: /* 0x0044 */
7254 case MPI_IOCSTATUS_SCSI_IO_DATA_ERROR: /* 0x0046 */
7255 case MPI_IOCSTATUS_SCSI_PROTOCOL_ERROR: /* 0x0047 */
7256 case MPI_IOCSTATUS_SCSI_TASK_TERMINATED: /* 0x0048 */
7257 case MPI_IOCSTATUS_SCSI_RESIDUAL_MISMATCH: /* 0x0049 */
7258 case MPI_IOCSTATUS_SCSI_TASK_MGMT_FAILED: /* 0x004A */
7259 case MPI_IOCSTATUS_SCSI_IOC_TERMINATED: /* 0x004B */
7260 case MPI_IOCSTATUS_SCSI_EXT_TERMINATED: /* 0x004C */
7261 break;
7262
7263 /****************************************************************************/
7264 /* SCSI Target values */
7265 /****************************************************************************/
7266
7267 case MPI_IOCSTATUS_TARGET_PRIORITY_IO: /* 0x0060 */
7268 desc = "Target: Priority IO";
7269 break;
7270
7271 case MPI_IOCSTATUS_TARGET_INVALID_PORT: /* 0x0061 */
7272 desc = "Target: Invalid Port";
7273 break;
7274
7275 case MPI_IOCSTATUS_TARGET_INVALID_IO_INDEX: /* 0x0062 */
7276 desc = "Target Invalid IO Index:";
7277 break;
7278
7279 case MPI_IOCSTATUS_TARGET_ABORTED: /* 0x0063 */
7280 desc = "Target: Aborted";
7281 break;
7282
7283 case MPI_IOCSTATUS_TARGET_NO_CONN_RETRYABLE: /* 0x0064 */
7284 desc = "Target: No Conn Retryable";
7285 break;
7286
7287 case MPI_IOCSTATUS_TARGET_NO_CONNECTION: /* 0x0065 */
7288 desc = "Target: No Connection";
7289 break;
7290
7291 case MPI_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH: /* 0x006A */
7292 desc = "Target: Transfer Count Mismatch";
7293 break;
7294
7295 case MPI_IOCSTATUS_TARGET_STS_DATA_NOT_SENT: /* 0x006B */
7296 desc = "Target: STS Data not Sent";
7297 break;
7298
7299 case MPI_IOCSTATUS_TARGET_DATA_OFFSET_ERROR: /* 0x006D */
7300 desc = "Target: Data Offset Error";
7301 break;
7302
7303 case MPI_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA: /* 0x006E */
7304 desc = "Target: Too Much Write Data";
7305 break;
7306
7307 case MPI_IOCSTATUS_TARGET_IU_TOO_SHORT: /* 0x006F */
7308 desc = "Target: IU Too Short";
7309 break;
7310
7311 case MPI_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT: /* 0x0070 */
7312 desc = "Target: ACK NAK Timeout";
7313 break;
7314
7315 case MPI_IOCSTATUS_TARGET_NAK_RECEIVED: /* 0x0071 */
7316 desc = "Target: Nak Received";
7317 break;
7318
7319 /****************************************************************************/
7320 /* Fibre Channel Direct Access values */
7321 /****************************************************************************/
7322
7323 case MPI_IOCSTATUS_FC_ABORTED: /* 0x0066 */
7324 desc = "FC: Aborted";
7325 break;
7326
7327 case MPI_IOCSTATUS_FC_RX_ID_INVALID: /* 0x0067 */
7328 desc = "FC: RX ID Invalid";
7329 break;
7330
7331 case MPI_IOCSTATUS_FC_DID_INVALID: /* 0x0068 */
7332 desc = "FC: DID Invalid";
7333 break;
7334
7335 case MPI_IOCSTATUS_FC_NODE_LOGGED_OUT: /* 0x0069 */
7336 desc = "FC: Node Logged Out";
7337 break;
7338
7339 case MPI_IOCSTATUS_FC_EXCHANGE_CANCELED: /* 0x006C */
7340 desc = "FC: Exchange Canceled";
7341 break;
7342
7343 /****************************************************************************/
7344 /* LAN values */
7345 /****************************************************************************/
7346
7347 case MPI_IOCSTATUS_LAN_DEVICE_NOT_FOUND: /* 0x0080 */
7348 desc = "LAN: Device not Found";
7349 break;
7350
7351 case MPI_IOCSTATUS_LAN_DEVICE_FAILURE: /* 0x0081 */
7352 desc = "LAN: Device Failure";
7353 break;
7354
7355 case MPI_IOCSTATUS_LAN_TRANSMIT_ERROR: /* 0x0082 */
7356 desc = "LAN: Transmit Error";
7357 break;
7358
7359 case MPI_IOCSTATUS_LAN_TRANSMIT_ABORTED: /* 0x0083 */
7360 desc = "LAN: Transmit Aborted";
7361 break;
7362
7363 case MPI_IOCSTATUS_LAN_RECEIVE_ERROR: /* 0x0084 */
7364 desc = "LAN: Receive Error";
7365 break;
7366
7367 case MPI_IOCSTATUS_LAN_RECEIVE_ABORTED: /* 0x0085 */
7368 desc = "LAN: Receive Aborted";
7369 break;
7370
7371 case MPI_IOCSTATUS_LAN_PARTIAL_PACKET: /* 0x0086 */
7372 desc = "LAN: Partial Packet";
7373 break;
7374
7375 case MPI_IOCSTATUS_LAN_CANCELED: /* 0x0087 */
7376 desc = "LAN: Canceled";
7377 break;
7378
7379 /****************************************************************************/
7380 /* Serial Attached SCSI values */
7381 /****************************************************************************/
7382
7383 case MPI_IOCSTATUS_SAS_SMP_REQUEST_FAILED: /* 0x0090 */
7384 desc = "SAS: SMP Request Failed";
7385 break;
7386
7387 case MPI_IOCSTATUS_SAS_SMP_DATA_OVERRUN: /* 0x0090 */
7388 desc = "SAS: SMP Data Overrun";
7389 break;
7390
7391 default:
7392 desc = "Others";
7393 break;
7394 }
7395
7396 if (!desc)
7397 return;
7398
7399 dreplyprintk(ioc, printk(MYIOC_s_DEBUG_FMT "IOCStatus(0x%04X): %s\n",
7400 ioc->name, status, desc));
7401 }
7402
7403 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
7404 EXPORT_SYMBOL(mpt_attach);
7405 EXPORT_SYMBOL(mpt_detach);
7406 #ifdef CONFIG_PM
7407 EXPORT_SYMBOL(mpt_resume);
7408 EXPORT_SYMBOL(mpt_suspend);
7409 #endif
7410 EXPORT_SYMBOL(ioc_list);
7411 EXPORT_SYMBOL(mpt_proc_root_dir);
7412 EXPORT_SYMBOL(mpt_register);
7413 EXPORT_SYMBOL(mpt_deregister);
7414 EXPORT_SYMBOL(mpt_event_register);
7415 EXPORT_SYMBOL(mpt_event_deregister);
7416 EXPORT_SYMBOL(mpt_reset_register);
7417 EXPORT_SYMBOL(mpt_reset_deregister);
7418 EXPORT_SYMBOL(mpt_device_driver_register);
7419 EXPORT_SYMBOL(mpt_device_driver_deregister);
7420 EXPORT_SYMBOL(mpt_get_msg_frame);
7421 EXPORT_SYMBOL(mpt_put_msg_frame);
7422 EXPORT_SYMBOL(mpt_put_msg_frame_hi_pri);
7423 EXPORT_SYMBOL(mpt_free_msg_frame);
7424 EXPORT_SYMBOL(mpt_add_sge);
7425 EXPORT_SYMBOL(mpt_send_handshake_request);
7426 EXPORT_SYMBOL(mpt_verify_adapter);
7427 EXPORT_SYMBOL(mpt_GetIocState);
7428 EXPORT_SYMBOL(mpt_print_ioc_summary);
7429 EXPORT_SYMBOL(mpt_HardResetHandler);
7430 EXPORT_SYMBOL(mpt_config);
7431 EXPORT_SYMBOL(mpt_findImVolumes);
7432 EXPORT_SYMBOL(mpt_alloc_fw_memory);
7433 EXPORT_SYMBOL(mpt_free_fw_memory);
7434 EXPORT_SYMBOL(mptbase_sas_persist_operation);
7435 EXPORT_SYMBOL(mpt_raid_phys_disk_pg0);
7436
7437 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
7438 /**
7439 * fusion_init - Fusion MPT base driver initialization routine.
7440 *
7441 * Returns 0 for success, non-zero for failure.
7442 */
7443 static int __init
7444 fusion_init(void)
7445 {
7446 u8 cb_idx;
7447
7448 show_mptmod_ver(my_NAME, my_VERSION);
7449 printk(KERN_INFO COPYRIGHT "\n");
7450
7451 for (cb_idx = 0; cb_idx < MPT_MAX_PROTOCOL_DRIVERS; cb_idx++) {
7452 MptCallbacks[cb_idx] = NULL;
7453 MptDriverClass[cb_idx] = MPTUNKNOWN_DRIVER;
7454 MptEvHandlers[cb_idx] = NULL;
7455 MptResetHandlers[cb_idx] = NULL;
7456 }
7457
7458 /* Register ourselves (mptbase) in order to facilitate
7459 * EventNotification handling.
7460 */
7461 mpt_base_index = mpt_register(mpt_base_reply, MPTBASE_DRIVER);
7462
7463 /* Register for hard reset handling callbacks.
7464 */
7465 mpt_reset_register(mpt_base_index, mpt_ioc_reset);
7466
7467 #ifdef CONFIG_PROC_FS
7468 (void) procmpt_create();
7469 #endif
7470 return 0;
7471 }
7472
7473 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
7474 /**
7475 * fusion_exit - Perform driver unload cleanup.
7476 *
7477 * This routine frees all resources associated with each MPT adapter
7478 * and removes all %MPT_PROCFS_MPTBASEDIR entries.
7479 */
7480 static void __exit
7481 fusion_exit(void)
7482 {
7483
7484 mpt_reset_deregister(mpt_base_index);
7485
7486 #ifdef CONFIG_PROC_FS
7487 procmpt_destroy();
7488 #endif
7489 }
7490
7491 module_init(fusion_init);
7492 module_exit(fusion_exit);
Support for the Chinese Samsung S3C2440 based development boards