2 * NOTE: this file will be removed in a future kernel release, it is
3 * provided as a courtesy copy of user-space code that relies on the
4 * old (pre-rename) symbols and constants.
8 * Copyright (C) 2008-2009, Thomas Gleixner <tglx@linutronix.de>
9 * Copyright (C) 2008-2009, Red Hat, Inc., Ingo Molnar
10 * Copyright (C) 2008-2009, Red Hat, Inc., Peter Zijlstra
12 * Data type definitions, declarations, prototypes.
14 * Started by: Thomas Gleixner and Ingo Molnar
16 * For licencing details see kernel-base/COPYING
18 #ifndef _LINUX_PERF_COUNTER_H
19 #define _LINUX_PERF_COUNTER_H
21 #include <linux/types.h>
22 #include <linux/ioctl.h>
23 #include <asm/byteorder.h>
26 * User-space ABI bits:
33 PERF_TYPE_HARDWARE
= 0,
34 PERF_TYPE_SOFTWARE
= 1,
35 PERF_TYPE_TRACEPOINT
= 2,
36 PERF_TYPE_HW_CACHE
= 3,
39 PERF_TYPE_MAX
, /* non-ABI */
43 * Generalized performance counter event types, used by the
44 * attr.event_id parameter of the sys_perf_counter_open()
49 * Common hardware events, generalized by the kernel:
51 PERF_COUNT_HW_CPU_CYCLES
= 0,
52 PERF_COUNT_HW_INSTRUCTIONS
= 1,
53 PERF_COUNT_HW_CACHE_REFERENCES
= 2,
54 PERF_COUNT_HW_CACHE_MISSES
= 3,
55 PERF_COUNT_HW_BRANCH_INSTRUCTIONS
= 4,
56 PERF_COUNT_HW_BRANCH_MISSES
= 5,
57 PERF_COUNT_HW_BUS_CYCLES
= 6,
59 PERF_COUNT_HW_MAX
, /* non-ABI */
63 * Generalized hardware cache counters:
65 * { L1-D, L1-I, LLC, ITLB, DTLB, BPU } x
66 * { read, write, prefetch } x
67 * { accesses, misses }
69 enum perf_hw_cache_id
{
70 PERF_COUNT_HW_CACHE_L1D
= 0,
71 PERF_COUNT_HW_CACHE_L1I
= 1,
72 PERF_COUNT_HW_CACHE_LL
= 2,
73 PERF_COUNT_HW_CACHE_DTLB
= 3,
74 PERF_COUNT_HW_CACHE_ITLB
= 4,
75 PERF_COUNT_HW_CACHE_BPU
= 5,
77 PERF_COUNT_HW_CACHE_MAX
, /* non-ABI */
80 enum perf_hw_cache_op_id
{
81 PERF_COUNT_HW_CACHE_OP_READ
= 0,
82 PERF_COUNT_HW_CACHE_OP_WRITE
= 1,
83 PERF_COUNT_HW_CACHE_OP_PREFETCH
= 2,
85 PERF_COUNT_HW_CACHE_OP_MAX
, /* non-ABI */
88 enum perf_hw_cache_op_result_id
{
89 PERF_COUNT_HW_CACHE_RESULT_ACCESS
= 0,
90 PERF_COUNT_HW_CACHE_RESULT_MISS
= 1,
92 PERF_COUNT_HW_CACHE_RESULT_MAX
, /* non-ABI */
96 * Special "software" counters provided by the kernel, even if the hardware
97 * does not support performance counters. These counters measure various
98 * physical and sw events of the kernel (and allow the profiling of them as
102 PERF_COUNT_SW_CPU_CLOCK
= 0,
103 PERF_COUNT_SW_TASK_CLOCK
= 1,
104 PERF_COUNT_SW_PAGE_FAULTS
= 2,
105 PERF_COUNT_SW_CONTEXT_SWITCHES
= 3,
106 PERF_COUNT_SW_CPU_MIGRATIONS
= 4,
107 PERF_COUNT_SW_PAGE_FAULTS_MIN
= 5,
108 PERF_COUNT_SW_PAGE_FAULTS_MAJ
= 6,
110 PERF_COUNT_SW_MAX
, /* non-ABI */
114 * Bits that can be set in attr.sample_type to request information
115 * in the overflow packets.
117 enum perf_counter_sample_format
{
118 PERF_SAMPLE_IP
= 1U << 0,
119 PERF_SAMPLE_TID
= 1U << 1,
120 PERF_SAMPLE_TIME
= 1U << 2,
121 PERF_SAMPLE_ADDR
= 1U << 3,
122 PERF_SAMPLE_READ
= 1U << 4,
123 PERF_SAMPLE_CALLCHAIN
= 1U << 5,
124 PERF_SAMPLE_ID
= 1U << 6,
125 PERF_SAMPLE_CPU
= 1U << 7,
126 PERF_SAMPLE_PERIOD
= 1U << 8,
127 PERF_SAMPLE_STREAM_ID
= 1U << 9,
128 PERF_SAMPLE_RAW
= 1U << 10,
130 PERF_SAMPLE_MAX
= 1U << 11, /* non-ABI */
134 * The format of the data returned by read() on a perf counter fd,
135 * as specified by attr.read_format:
137 * struct read_format {
139 * { u64 time_enabled; } && PERF_FORMAT_ENABLED
140 * { u64 time_running; } && PERF_FORMAT_RUNNING
141 * { u64 id; } && PERF_FORMAT_ID
142 * } && !PERF_FORMAT_GROUP
145 * { u64 time_enabled; } && PERF_FORMAT_ENABLED
146 * { u64 time_running; } && PERF_FORMAT_RUNNING
148 * { u64 id; } && PERF_FORMAT_ID
150 * } && PERF_FORMAT_GROUP
153 enum perf_counter_read_format
{
154 PERF_FORMAT_TOTAL_TIME_ENABLED
= 1U << 0,
155 PERF_FORMAT_TOTAL_TIME_RUNNING
= 1U << 1,
156 PERF_FORMAT_ID
= 1U << 2,
157 PERF_FORMAT_GROUP
= 1U << 3,
159 PERF_FORMAT_MAX
= 1U << 4, /* non-ABI */
162 #define PERF_ATTR_SIZE_VER0 64 /* sizeof first published struct */
165 * Hardware event to monitor via a performance monitoring counter:
167 struct perf_counter_attr
{
170 * Major type: hardware/software/tracepoint/etc.
175 * Size of the attr structure, for fwd/bwd compat.
180 * Type specific configuration information.
192 __u64 disabled
: 1, /* off by default */
193 inherit
: 1, /* children inherit it */
194 pinned
: 1, /* must always be on PMU */
195 exclusive
: 1, /* only group on PMU */
196 exclude_user
: 1, /* don't count user */
197 exclude_kernel
: 1, /* ditto kernel */
198 exclude_hv
: 1, /* ditto hypervisor */
199 exclude_idle
: 1, /* don't count when idle */
200 mmap
: 1, /* include mmap data */
201 comm
: 1, /* include comm data */
202 freq
: 1, /* use freq, not period */
203 inherit_stat
: 1, /* per task counts */
204 enable_on_exec
: 1, /* next exec enables */
205 task
: 1, /* trace fork/exit */
206 watermark
: 1, /* wakeup_watermark */
211 __u32 wakeup_events
; /* wakeup every n events */
212 __u32 wakeup_watermark
; /* bytes before wakeup */
220 * Ioctls that can be done on a perf counter fd:
222 #define PERF_COUNTER_IOC_ENABLE _IO ('$', 0)
223 #define PERF_COUNTER_IOC_DISABLE _IO ('$', 1)
224 #define PERF_COUNTER_IOC_REFRESH _IO ('$', 2)
225 #define PERF_COUNTER_IOC_RESET _IO ('$', 3)
226 #define PERF_COUNTER_IOC_PERIOD _IOW('$', 4, u64)
227 #define PERF_COUNTER_IOC_SET_OUTPUT _IO ('$', 5)
229 enum perf_counter_ioc_flags
{
230 PERF_IOC_FLAG_GROUP
= 1U << 0,
234 * Structure of the page that can be mapped via mmap
236 struct perf_counter_mmap_page
{
237 __u32 version
; /* version number of this structure */
238 __u32 compat_version
; /* lowest version this is compat with */
241 * Bits needed to read the hw counters in user-space.
251 * count = pmc_read(pc->index - 1);
252 * count += pc->offset;
257 * } while (pc->lock != seq);
259 * NOTE: for obvious reason this only works on self-monitoring
262 __u32 lock
; /* seqlock for synchronization */
263 __u32 index
; /* hardware counter identifier */
264 __s64 offset
; /* add to hardware counter value */
265 __u64 time_enabled
; /* time counter active */
266 __u64 time_running
; /* time counter on cpu */
269 * Hole for extension of the self monitor capabilities
272 __u64 __reserved
[123]; /* align to 1k */
275 * Control data for the mmap() data buffer.
277 * User-space reading the @data_head value should issue an rmb(), on
278 * SMP capable platforms, after reading this value -- see
279 * perf_counter_wakeup().
281 * When the mapping is PROT_WRITE the @data_tail value should be
282 * written by userspace to reflect the last read data. In this case
283 * the kernel will not over-write unread data.
285 __u64 data_head
; /* head in the data section */
286 __u64 data_tail
; /* user-space written tail */
289 #define PERF_EVENT_MISC_CPUMODE_MASK (3 << 0)
290 #define PERF_EVENT_MISC_CPUMODE_UNKNOWN (0 << 0)
291 #define PERF_EVENT_MISC_KERNEL (1 << 0)
292 #define PERF_EVENT_MISC_USER (2 << 0)
293 #define PERF_EVENT_MISC_HYPERVISOR (3 << 0)
295 struct perf_event_header
{
301 enum perf_event_type
{
304 * The MMAP events record the PROT_EXEC mappings so that we can
305 * correlate userspace IPs to code. They have the following structure:
308 * struct perf_event_header header;
321 * struct perf_event_header header;
330 * struct perf_event_header header;
340 * struct perf_event_header header;
350 * struct perf_event_header header;
356 PERF_EVENT_THROTTLE
= 5,
357 PERF_EVENT_UNTHROTTLE
= 6,
361 * struct perf_event_header header;
364 * { u64 time; } && PERF_SAMPLE_TIME
371 * struct perf_event_header header;
374 * struct read_format values;
381 * struct perf_event_header header;
383 * { u64 ip; } && PERF_SAMPLE_IP
384 * { u32 pid, tid; } && PERF_SAMPLE_TID
385 * { u64 time; } && PERF_SAMPLE_TIME
386 * { u64 addr; } && PERF_SAMPLE_ADDR
387 * { u64 id; } && PERF_SAMPLE_ID
388 * { u64 stream_id;} && PERF_SAMPLE_STREAM_ID
389 * { u32 cpu, res; } && PERF_SAMPLE_CPU
390 * { u64 period; } && PERF_SAMPLE_PERIOD
392 * { struct read_format values; } && PERF_SAMPLE_READ
395 * u64 ips[nr]; } && PERF_SAMPLE_CALLCHAIN
398 * # The RAW record below is opaque data wrt the ABI
400 * # That is, the ABI doesn't make any promises wrt to
401 * # the stability of its content, it may vary depending
402 * # on event, hardware, kernel version and phase of
405 * # In other words, PERF_SAMPLE_RAW contents are not an ABI.
409 * char data[size];}&& PERF_SAMPLE_RAW
412 PERF_EVENT_SAMPLE
= 9,
414 PERF_EVENT_MAX
, /* non-ABI */
417 enum perf_callchain_context
{
418 PERF_CONTEXT_HV
= (__u64
)-32,
419 PERF_CONTEXT_KERNEL
= (__u64
)-128,
420 PERF_CONTEXT_USER
= (__u64
)-512,
422 PERF_CONTEXT_GUEST
= (__u64
)-2048,
423 PERF_CONTEXT_GUEST_KERNEL
= (__u64
)-2176,
424 PERF_CONTEXT_GUEST_USER
= (__u64
)-2560,
426 PERF_CONTEXT_MAX
= (__u64
)-4095,
429 #define PERF_FLAG_FD_NO_GROUP (1U << 0)
430 #define PERF_FLAG_FD_OUTPUT (1U << 1)
433 * In case some app still references the old symbols:
436 #define __NR_perf_counter_open __NR_perf_event_open
438 #define PR_TASK_PERF_COUNTERS_DISABLE PR_TASK_PERF_EVENTS_DISABLE
439 #define PR_TASK_PERF_COUNTERS_ENABLE PR_TASK_PERF_EVENTS_ENABLE
441 #endif /* _LINUX_PERF_COUNTER_H */