arch/ppc/platforms/prep_setup.c

   1 /*
   2  *  Copyright (C) 1995  Linus Torvalds
   3  *  Adapted from 'alpha' version by Gary Thomas
   4  *  Modified by Cort Dougan (cort@cs.nmt.edu)
   5  *
   6  * Support for PReP (Motorola MTX/MVME)
   7  * by Troy Benjegerdes (hozer@drgw.net)
   8  */
   9
  10 /*
  11  * bootup setup stuff..
  12  */
  13
  14 #include <linux/delay.h>
  15 #include <linux/module.h>
  16 #include <linux/errno.h>
  17 #include <linux/sched.h>
  18 #include <linux/kernel.h>
  19 #include <linux/mm.h>
  20 #include <linux/stddef.h>
  21 #include <linux/unistd.h>
  22 #include <linux/ptrace.h>
  23 #include <linux/slab.h>
  24 #include <linux/user.h>
  25 #include <linux/a.out.h>
  26 #include <linux/screen_info.h>
  27 #include <linux/major.h>
  28 #include <linux/interrupt.h>
  29 #include <linux/reboot.h>
  30 #include <linux/init.h>
  31 #include <linux/initrd.h>
  32 #include <linux/ioport.h>
  33 #include <linux/console.h>
  34 #include <linux/timex.h>
  35 #include <linux/pci.h>
  36 #include <linux/ide.h>
  37 #include <linux/seq_file.h>
  38 #include <linux/root_dev.h>
  39
  40 #include <asm/sections.h>
  41 #include <asm/mmu.h>
  42 #include <asm/processor.h>
  43 #include <asm/residual.h>
  44 #include <asm/io.h>
  45 #include <asm/pgtable.h>
  46 #include <asm/cache.h>
  47 #include <asm/dma.h>
  48 #include <asm/machdep.h>
  49 #include <asm/mc146818rtc.h>
  50 #include <asm/mk48t59.h>
  51 #include <asm/prep_nvram.h>
  52 #include <asm/raven.h>
  53 #include <asm/vga.h>
  54 #include <asm/time.h>
  55 #include <asm/mpc10x.h>
  56 #include <asm/i8259.h>
  57 #include <asm/open_pic.h>
  58 #include <asm/pci-bridge.h>
  59 #include <asm/todc.h>
  60
  61 /* prep registers for L2 */
  62 #define CACHECRBA       0x80000823      /* Cache configuration register address */
  63 #define L2CACHE_MASK    0x03    /* Mask for 2 L2 Cache bits */
  64 #define L2CACHE_512KB   0x00    /* 512KB */
  65 #define L2CACHE_256KB   0x01    /* 256KB */
  66 #define L2CACHE_1MB     0x02    /* 1MB */
  67 #define L2CACHE_NONE    0x03    /* NONE */
  68 #define L2CACHE_PARITY  0x08    /* Mask for L2 Cache Parity Protected bit */
  69
  70 TODC_ALLOC();
  71
  72 extern unsigned char prep_nvram_read_val(int addr);
  73 extern void prep_nvram_write_val(int addr,
  74                                  unsigned char val);
  75 extern unsigned char rs_nvram_read_val(int addr);
  76 extern void rs_nvram_write_val(int addr,
  77                                  unsigned char val);
  78 extern void ibm_prep_init(void);
  79
  80 extern void prep_find_bridges(void);
  81
  82 int _prep_type;
  83
  84 extern void prep_residual_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi);
  85 extern void prep_sandalfoot_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi);
  86 extern void prep_thinkpad_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi);
  87 extern void prep_carolina_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi);
  88 extern void prep_tiger1_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi);
  89
  90
  91 #define cached_21       (((char *)(ppc_cached_irq_mask))[3])
  92 #define cached_A1       (((char *)(ppc_cached_irq_mask))[2])
  93
  94 #ifdef CONFIG_SOUND_CS4232
  95 long ppc_cs4232_dma, ppc_cs4232_dma2;
  96 #endif
  97
  98 extern PTE *Hash, *Hash_end;
  99 extern unsigned long Hash_size, Hash_mask;
 100 extern int probingmem;
 101 extern unsigned long loops_per_jiffy;
 102
 103 #ifdef CONFIG_SOUND_CS4232
 104 EXPORT_SYMBOL(ppc_cs4232_dma);
 105 EXPORT_SYMBOL(ppc_cs4232_dma2);
 106 #endif
 107
 108 /* useful ISA ports */
 109 #define PREP_SYSCTL     0x81c
 110 /* present in the IBM reference design; possibly identical in Mot boxes: */
 111 #define PREP_IBM_SIMM_ID        0x803   /* SIMM size: 32 or 8 MiB */
 112 #define PREP_IBM_SIMM_PRESENCE  0x804
 113 #define PREP_IBM_EQUIPMENT      0x80c
 114 #define PREP_IBM_L2INFO 0x80d
 115 #define PREP_IBM_PM1    0x82a   /* power management register 1 */
 116 #define PREP_IBM_PLANAR 0x852   /* planar ID - identifies the motherboard */
 117 #define PREP_IBM_DISP   0x8c0   /* 4-digit LED display */
 118
 119 /* Equipment Present Register masks: */
 120 #define PREP_IBM_EQUIPMENT_RESERVED     0x80
 121 #define PREP_IBM_EQUIPMENT_SCSIFUSE     0x40
 122 #define PREP_IBM_EQUIPMENT_L2_COPYBACK  0x08
 123 #define PREP_IBM_EQUIPMENT_L2_256       0x04
 124 #define PREP_IBM_EQUIPMENT_CPU  0x02
 125 #define PREP_IBM_EQUIPMENT_L2   0x01
 126
 127 /* planar ID values: */
 128 /* Sandalfoot/Sandalbow (6015/7020) */
 129 #define PREP_IBM_SANDALFOOT     0xfc
 130 /* Woodfield, Thinkpad 850/860 (6042/7249) */
 131 #define PREP_IBM_THINKPAD       0xff /* planar ID unimplemented */
 132 /* PowerSeries 830/850 (6050/6070) */
 133 #define PREP_IBM_CAROLINA_IDE_0 0xf0
 134 #define PREP_IBM_CAROLINA_IDE_1 0xf1
 135 #define PREP_IBM_CAROLINA_IDE_2 0xf2
 136 #define PREP_IBM_CAROLINA_IDE_3 0xf3
 137 /* 7248-43P */
 138 #define PREP_IBM_CAROLINA_SCSI_0        0xf4
 139 #define PREP_IBM_CAROLINA_SCSI_1        0xf5
 140 #define PREP_IBM_CAROLINA_SCSI_2        0xf6
 141 #define PREP_IBM_CAROLINA_SCSI_3        0xf7 /* missing from Carolina Tech Spec */
 142 /* Tiger1 (7043-140) */
 143 #define PREP_IBM_TIGER1_133             0xd1
 144 #define PREP_IBM_TIGER1_166             0xd2
 145 #define PREP_IBM_TIGER1_180             0xd3
 146 #define PREP_IBM_TIGER1_xxx             0xd4 /* unknown, but probably exists */
 147 #define PREP_IBM_TIGER1_333             0xd5 /* missing from Tiger Tech Spec */
 148
 149 /* setup_ibm_pci:
 150  *      set Motherboard_map_name, Motherboard_map, Motherboard_routes.
 151  *      return 8259 edge/level masks.
 152  */
 153 void (*setup_ibm_pci)(char *irq_lo, char *irq_hi);
 154
 155 extern char *Motherboard_map_name; /* for use in *_cpuinfo */
 156
 157 /*
 158  * As found in the PReP reference implementation.
 159  * Used by Thinkpad, Sandalfoot (6015/7020), and all Motorola PReP.
 160  */
 161 static void __init
 162 prep_gen_enable_l2(void)
 163 {
 164         outb(inb(PREP_SYSCTL) | 0x3, PREP_SYSCTL);
 165 }
 166
 167 /* Used by Carolina and Tiger1 */
 168 static void __init
 169 prep_carolina_enable_l2(void)
 170 {
 171         outb(inb(PREP_SYSCTL) | 0xc0, PREP_SYSCTL);
 172 }
 173
 174 /* cpuinfo code common to all IBM PReP */
 175 static void
 176 prep_ibm_cpuinfo(struct seq_file *m)
 177 {
 178         unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT);
 179
 180         seq_printf(m, "machine\t\t: PReP %s\n", Motherboard_map_name);
 181
 182         seq_printf(m, "upgrade cpu\t: ");
 183         if (equip_reg & PREP_IBM_EQUIPMENT_CPU) {
 184                 seq_printf(m, "not ");
 185         }
 186         seq_printf(m, "present\n");
 187
 188         /* print info about the SCSI fuse */
 189         seq_printf(m, "scsi fuse\t: ");
 190         if (equip_reg & PREP_IBM_EQUIPMENT_SCSIFUSE)
 191                 seq_printf(m, "ok");
 192         else
 193                 seq_printf(m, "bad");
 194         seq_printf(m, "\n");
 195
 196         /* print info about SIMMs */
 197         if (have_residual_data) {
 198                 int i;
 199                 seq_printf(m, "simms\t\t: ");
 200                 for (i = 0; (res->ActualNumMemories) && (i < MAX_MEMS); i++) {
 201                         if (res->Memories[i].SIMMSize != 0)
 202                                 seq_printf(m, "%d:%ldMiB ", i,
 203                                         (res->Memories[i].SIMMSize > 1024) ?
 204                                         res->Memories[i].SIMMSize>>20 :
 205                                         res->Memories[i].SIMMSize);
 206                 }
 207                 seq_printf(m, "\n");
 208         }
 209 }
 210
 211 static int
 212 prep_gen_cpuinfo(struct seq_file *m)
 213 {
 214         prep_ibm_cpuinfo(m);
 215         return 0;
 216 }
 217
 218 static int
 219 prep_sandalfoot_cpuinfo(struct seq_file *m)
 220 {
 221         unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT);
 222
 223         prep_ibm_cpuinfo(m);
 224
 225         /* report amount and type of L2 cache present */
 226         seq_printf(m, "L2 cache\t: ");
 227         if (equip_reg & PREP_IBM_EQUIPMENT_L2) {
 228                 seq_printf(m, "not present");
 229         } else {
 230                 if (equip_reg & PREP_IBM_EQUIPMENT_L2_256)
 231                         seq_printf(m, "256KiB");
 232                 else
 233                         seq_printf(m, "unknown size");
 234
 235                 if (equip_reg & PREP_IBM_EQUIPMENT_L2_COPYBACK)
 236                         seq_printf(m, ", copy-back");
 237                 else
 238                         seq_printf(m, ", write-through");
 239         }
 240         seq_printf(m, "\n");
 241
 242         return 0;
 243 }
 244
 245 static int
 246 prep_thinkpad_cpuinfo(struct seq_file *m)
 247 {
 248         unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT);
 249         char *cpubus_speed, *pci_speed;
 250
 251         prep_ibm_cpuinfo(m);
 252
 253         /* report amount and type of L2 cache present */
 254         seq_printf(m, "l2 cache\t: ");
 255         if ((equip_reg & 0x1) == 0) {
 256                 switch ((equip_reg & 0xc) >> 2) {
 257                         case 0x0:
 258                                 seq_printf(m, "128KiB look-aside 2-way write-through\n");
 259                                 break;
 260                         case 0x1:
 261                                 seq_printf(m, "512KiB look-aside direct-mapped write-back\n");
 262                                 break;
 263                         case 0x2:
 264                                 seq_printf(m, "256KiB look-aside 2-way write-through\n");
 265                                 break;
 266                         case 0x3:
 267                                 seq_printf(m, "256KiB look-aside direct-mapped write-back\n");
 268                                 break;
 269                 }
 270         } else {
 271                 seq_printf(m, "not present\n");
 272         }
 273
 274         /* report bus speeds because we can */
 275         if ((equip_reg & 0x80) == 0) {
 276                 switch ((equip_reg & 0x30) >> 4) {
 277                         case 0x1:
 278                                 cpubus_speed = "50";
 279                                 pci_speed = "25";
 280                                 break;
 281                         case 0x3:
 282                                 cpubus_speed = "66";
 283                                 pci_speed = "33";
 284                                 break;
 285                         default:
 286                                 cpubus_speed = "unknown";
 287                                 pci_speed = "unknown";
 288                                 break;
 289                 }
 290         } else {
 291                 switch ((equip_reg & 0x30) >> 4) {
 292                         case 0x1:
 293                                 cpubus_speed = "25";
 294                                 pci_speed = "25";
 295                                 break;
 296                         case 0x2:
 297                                 cpubus_speed = "60";
 298                                 pci_speed = "30";
 299                                 break;
 300                         case 0x3:
 301                                 cpubus_speed = "33";
 302                                 pci_speed = "33";
 303                                 break;
 304                         default:
 305                                 cpubus_speed = "unknown";
 306                                 pci_speed = "unknown";
 307                                 break;
 308                 }
 309         }
 310         seq_printf(m, "60x bus\t\t: %sMHz\n", cpubus_speed);
 311         seq_printf(m, "pci bus\t\t: %sMHz\n", pci_speed);
 312
 313         return 0;
 314 }
 315
 316 static int
 317 prep_carolina_cpuinfo(struct seq_file *m)
 318 {
 319         unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT);
 320
 321         prep_ibm_cpuinfo(m);
 322
 323         /* report amount and type of L2 cache present */
 324         seq_printf(m, "l2 cache\t: ");
 325         if ((equip_reg & 0x1) == 0) {
 326                 unsigned int l2_reg = inb(PREP_IBM_L2INFO);
 327
 328                 /* L2 size */
 329                 if ((l2_reg & 0x60) == 0)
 330                         seq_printf(m, "256KiB");
 331                 else if ((l2_reg & 0x60) == 0x20)
 332                         seq_printf(m, "512KiB");
 333                 else
 334                         seq_printf(m, "unknown size");
 335
 336                 /* L2 type */
 337                 if ((l2_reg & 0x3) == 0)
 338                         seq_printf(m, ", async");
 339                 else if ((l2_reg & 0x3) == 1)
 340                         seq_printf(m, ", sync");
 341                 else
 342                         seq_printf(m, ", unknown type");
 343
 344                 seq_printf(m, "\n");
 345         } else {
 346                 seq_printf(m, "not present\n");
 347         }
 348
 349         return 0;
 350 }
 351
 352 static int
 353 prep_tiger1_cpuinfo(struct seq_file *m)
 354 {
 355         unsigned int l2_reg = inb(PREP_IBM_L2INFO);
 356
 357         prep_ibm_cpuinfo(m);
 358
 359         /* report amount and type of L2 cache present */
 360         seq_printf(m, "l2 cache\t: ");
 361         if ((l2_reg & 0xf) == 0xf) {
 362                 seq_printf(m, "not present\n");
 363         } else {
 364                 if (l2_reg & 0x8)
 365                         seq_printf(m, "async, ");
 366                 else
 367                         seq_printf(m, "sync burst, ");
 368
 369                 if (l2_reg & 0x4)
 370                         seq_printf(m, "parity, ");
 371                 else
 372                         seq_printf(m, "no parity, ");
 373
 374                 switch (l2_reg & 0x3) {
 375                         case 0x0:
 376                                 seq_printf(m, "256KiB\n");
 377                                 break;
 378                         case 0x1:
 379                                 seq_printf(m, "512KiB\n");
 380                                 break;
 381                         case 0x2:
 382                                 seq_printf(m, "1MiB\n");
 383                                 break;
 384                         default:
 385                                 seq_printf(m, "unknown size\n");
 386                                 break;
 387                 }
 388         }
 389
 390         return 0;
 391 }
 392
 393
 394 /* Used by all Motorola PReP */
 395 static int
 396 prep_mot_cpuinfo(struct seq_file *m)
 397 {
 398         unsigned int cachew = *((unsigned char *)CACHECRBA);
 399
 400         seq_printf(m, "machine\t\t: PReP %s\n", Motherboard_map_name);
 401
 402         /* report amount and type of L2 cache present */
 403         seq_printf(m, "l2 cache\t: ");
 404         switch (cachew & L2CACHE_MASK) {
 405                 case L2CACHE_512KB:
 406                         seq_printf(m, "512KiB");
 407                         break;
 408                 case L2CACHE_256KB:
 409                         seq_printf(m, "256KiB");
 410                         break;
 411                 case L2CACHE_1MB:
 412                         seq_printf(m, "1MiB");
 413                         break;
 414                 case L2CACHE_NONE:
 415                         seq_printf(m, "none\n");
 416                         goto no_l2;
 417                         break;
 418                 default:
 419                         seq_printf(m, "%x\n", cachew);
 420         }
 421
 422         seq_printf(m, ", parity %s",
 423                         (cachew & L2CACHE_PARITY)? "enabled" : "disabled");
 424
 425         seq_printf(m, " SRAM:");
 426
 427         switch ( ((cachew & 0xf0) >> 4) & ~(0x3) ) {
 428                 case 1: seq_printf(m, "synchronous, parity, flow-through\n");
 429                                 break;
 430                 case 2: seq_printf(m, "asynchronous, no parity\n");
 431                                 break;
 432                 case 3: seq_printf(m, "asynchronous, parity\n");
 433                                 break;
 434                 default:seq_printf(m, "synchronous, pipelined, no parity\n");
 435                                 break;
 436         }
 437
 438 no_l2:
 439         /* print info about SIMMs */
 440         if (have_residual_data) {
 441                 int i;
 442                 seq_printf(m, "simms\t\t: ");
 443                 for (i = 0; (res->ActualNumMemories) && (i < MAX_MEMS); i++) {
 444                         if (res->Memories[i].SIMMSize != 0)
 445                                 seq_printf(m, "%d:%ldM ", i,
 446                                         (res->Memories[i].SIMMSize > 1024) ?
 447                                         res->Memories[i].SIMMSize>>20 :
 448                                         res->Memories[i].SIMMSize);
 449                 }
 450                 seq_printf(m, "\n");
 451         }
 452
 453         return 0;
 454 }
 455
 456 static void
 457 prep_restart(char *cmd)
 458 {
 459 #define PREP_SP92       0x92    /* Special Port 92 */
 460         local_irq_disable(); /* no interrupts */
 461
 462         /* set exception prefix high - to the prom */
 463         _nmask_and_or_msr(0, MSR_IP);
 464
 465         /* make sure bit 0 (reset) is a 0 */
 466         outb( inb(PREP_SP92) & ~1L , PREP_SP92);
 467         /* signal a reset to system control port A - soft reset */
 468         outb( inb(PREP_SP92) | 1 , PREP_SP92);
 469
 470         while ( 1 ) ;
 471         /* not reached */
 472 #undef PREP_SP92
 473 }
 474
 475 static void
 476 prep_halt(void)
 477 {
 478         local_irq_disable(); /* no interrupts */
 479
 480         /* set exception prefix high - to the prom */
 481         _nmask_and_or_msr(0, MSR_IP);
 482
 483         while ( 1 ) ;
 484         /* not reached */
 485 }
 486
 487 /* Carrera is the power manager in the Thinkpads. Unfortunately not much is
 488  * known about it, so we can't power down.
 489  */
 490 static void
 491 prep_carrera_poweroff(void)
 492 {
 493         prep_halt();
 494 }
 495
 496 /*
 497  * On most IBM PReP's, power management is handled by a Signetics 87c750
 498  * behind the Utah component on the ISA bus. To access the 750 you must write
 499  * a series of nibbles to port 0x82a (decoded by the Utah). This is described
 500  * somewhat in the IBM Carolina Technical Specification.
 501  * -Hollis
 502  */
 503 static void
 504 utah_sig87c750_setbit(unsigned int bytenum, unsigned int bitnum, int value)
 505 {
 506         /*
 507          * byte1: 0 0 0 1 0  d  a5 a4
 508          * byte2: 0 0 0 1 a3 a2 a1 a0
 509          *
 510          * d = the bit's value, enabled or disabled
 511          * (a5 a4 a3) = the byte number, minus 20
 512          * (a2 a1 a0) = the bit number
 513          *
 514          * example: set the 5th bit of byte 21 (21.5)
 515          *     a5 a4 a3 = 001 (byte 1)
 516          *     a2 a1 a0 = 101 (bit 5)
 517          *
 518          *     byte1 = 0001 0100 (0x14)
 519          *     byte2 = 0001 1101 (0x1d)
 520          */
 521         unsigned char byte1=0x10, byte2=0x10;
 522
 523         /* the 750's '20.0' is accessed as '0.0' through Utah (which adds 20) */
 524         bytenum -= 20;
 525
 526         byte1 |= (!!value) << 2;                /* set d */
 527         byte1 |= (bytenum >> 1) & 0x3;  /* set a5, a4 */
 528
 529         byte2 |= (bytenum & 0x1) << 3;  /* set a3 */
 530         byte2 |= bitnum & 0x7;                  /* set a2, a1, a0 */
 531
 532         outb(byte1, PREP_IBM_PM1);      /* first nibble */
 533         mb();
 534         udelay(100);                            /* important: let controller recover */
 535
 536         outb(byte2, PREP_IBM_PM1);      /* second nibble */
 537         mb();
 538         udelay(100);                            /* important: let controller recover */
 539 }
 540
 541 static void
 542 prep_sig750_poweroff(void)
 543 {
 544         /* tweak the power manager found in most IBM PRePs (except Thinkpads) */
 545
 546         local_irq_disable();
 547         /* set exception prefix high - to the prom */
 548         _nmask_and_or_msr(0, MSR_IP);
 549
 550         utah_sig87c750_setbit(21, 5, 1); /* set bit 21.5, "PMEXEC_OFF" */
 551
 552         while (1) ;
 553         /* not reached */
 554 }
 555
 556 static int
 557 prep_show_percpuinfo(struct seq_file *m, int i)
 558 {
 559         /* PREP's without residual data will give incorrect values here */
 560         seq_printf(m, "clock\t\t: ");
 561         if (have_residual_data)
 562                 seq_printf(m, "%ldMHz\n",
 563                            (res->VitalProductData.ProcessorHz > 1024) ?
 564                            res->VitalProductData.ProcessorHz / 1000000 :
 565                            res->VitalProductData.ProcessorHz);
 566         else
 567                 seq_printf(m, "???\n");
 568
 569         return 0;
 570 }
 571
 572 #ifdef CONFIG_SOUND_CS4232
 573 static long __init masktoint(unsigned int i)
 574 {
 575         int t = -1;
 576         while (i >> ++t)
 577                 ;
 578         return (t-1);
 579 }
 580
 581 /*
 582  * ppc_cs4232_dma and ppc_cs4232_dma2 are used in include/asm/dma.h
 583  * to distinguish sound dma-channels from others. This is because
 584  * blocksize on 16 bit dma-channels 5,6,7 is 128k, but
 585  * the cs4232.c uses 64k like on 8 bit dma-channels 0,1,2,3
 586  */
 587
 588 static void __init prep_init_sound(void)
 589 {
 590         PPC_DEVICE *audiodevice = NULL;
 591
 592         /*
 593          * Get the needed resource information from residual data.
 594          *
 595          */
 596         if (have_residual_data)
 597                 audiodevice = residual_find_device(~0, NULL,
 598                                 MultimediaController, AudioController, -1, 0);
 599
 600         if (audiodevice != NULL) {
 601                 PnP_TAG_PACKET *pkt;
 602
 603                 pkt = PnP_find_packet((unsigned char *)&res->DevicePnPHeap[audiodevice->AllocatedOffset],
 604                                 S5_Packet, 0);
 605                 if (pkt != NULL)
 606                         ppc_cs4232_dma = masktoint(pkt->S5_Pack.DMAMask);
 607                 pkt = PnP_find_packet((unsigned char*)&res->DevicePnPHeap[audiodevice->AllocatedOffset],
 608                                 S5_Packet, 1);
 609                 if (pkt != NULL)
 610                         ppc_cs4232_dma2 = masktoint(pkt->S5_Pack.DMAMask);
 611         }
 612
 613         /*
 614          * These are the PReP specs' defaults for the cs4231.  We use these
 615          * as fallback incase we don't have residual data.
 616          * At least the IBM Thinkpad 850 with IDE DMA Channels at 6 and 7
 617          * will use the other values.
 618          */
 619         if (audiodevice == NULL) {
 620                 switch (_prep_type) {
 621                 case _PREP_IBM:
 622                         ppc_cs4232_dma = 1;
 623                         ppc_cs4232_dma2 = -1;
 624                         break;
 625                 default:
 626                         ppc_cs4232_dma = 6;
 627                         ppc_cs4232_dma2 = 7;
 628                 }
 629         }
 630
 631         /*
 632          * Find a way to push this information to the cs4232 driver
 633          * Give it out with printk, when not in cmd_line?
 634          * Append it to cmd_line and boot_command_line?
 635          * Format is cs4232=io,irq,dma,dma2
 636          */
 637 }
 638 #endif /* CONFIG_SOUND_CS4232 */
 639
 640 /*
 641  * Fill out screen_info according to the residual data. This allows us to use
 642  * at least vesafb.
 643  */
 644 static void __init
 645 prep_init_vesa(void)
 646 {
 647 #if     (defined(CONFIG_FB_VGA16) || defined(CONFIG_FB_VGA16_MODULE) || \
 648          defined(CONFIG_FB_VESA))
 649         PPC_DEVICE *vgadev = NULL;
 650
 651         if (have_residual_data)
 652                 vgadev = residual_find_device(~0, NULL, DisplayController,
 653                                                         SVGAController, -1, 0);
 654
 655         if (vgadev != NULL) {
 656                 PnP_TAG_PACKET *pkt;
 657
 658                 pkt = PnP_find_large_vendor_packet(
 659                                 (unsigned char *)&res->DevicePnPHeap[vgadev->AllocatedOffset],
 660                                 0x04, 0); /* 0x04 = Display Tag */
 661                 if (pkt != NULL) {
 662                         unsigned char *ptr = (unsigned char *)pkt;
 663
 664                         if (ptr[4]) {
 665                                 /* graphics mode */
 666                                 screen_info.orig_video_isVGA = VIDEO_TYPE_VLFB;
 667
 668                                 screen_info.lfb_depth = ptr[4] * 8;
 669
 670                                 screen_info.lfb_width = swab16(*(short *)(ptr+6));
 671                                 screen_info.lfb_height = swab16(*(short *)(ptr+8));
 672                                 screen_info.lfb_linelength = swab16(*(short *)(ptr+10));
 673
 674                                 screen_info.lfb_base = swab32(*(long *)(ptr+12));
 675                                 screen_info.lfb_size = swab32(*(long *)(ptr+20)) / 65536;
 676                         }
 677                 }
 678         }
 679 #endif
 680 }
 681
 682 /*
 683  * Set DBAT 2 to access 0x80000000 so early progress messages will work
 684  */
 685 static __inline__ void
 686 prep_set_bat(void)
 687 {
 688         /* wait for all outstanding memory access to complete */
 689         mb();
 690
 691         /* setup DBATs */
 692         mtspr(SPRN_DBAT2U, 0x80001ffe);
 693         mtspr(SPRN_DBAT2L, 0x8000002a);
 694
 695         /* wait for updates */
 696         mb();
 697 }
 698
 699 /*
 700  * IBM 3-digit status LED
 701  */
 702 static unsigned int ibm_statusled_base;
 703
 704 static void
 705 ibm_statusled_progress(char *s, unsigned short hex);
 706
 707 static int
 708 ibm_statusled_panic(struct notifier_block *dummy1, unsigned long dummy2,
 709                     void * dummy3)
 710 {
 711         ibm_statusled_progress(NULL, 0x505); /* SOS */
 712         return NOTIFY_DONE;
 713 }
 714
 715 static struct notifier_block ibm_statusled_block = {
 716         ibm_statusled_panic,
 717         NULL,
 718         INT_MAX /* try to do it first */
 719 };
 720
 721 static void
 722 ibm_statusled_progress(char *s, unsigned short hex)
 723 {
 724         static int notifier_installed;
 725         /*
 726          * Progress uses 4 digits and we have only 3.  So, we map 0xffff to
 727          * 0xfff for display switch off.  Out of range values are mapped to
 728          * 0xeff, as I'm told 0xf00 and above are reserved for hardware codes.
 729          * Install the panic notifier when the display is first switched off.
 730          */
 731         if (hex == 0xffff) {
 732                 hex = 0xfff;
 733                 if (!notifier_installed) {
 734                         ++notifier_installed;
 735                         atomic_notifier_chain_register(&panic_notifier_list,
 736                                                 &ibm_statusled_block);
 737                 }
 738         }
 739         else
 740                 if (hex > 0xfff)
 741                         hex = 0xeff;
 742
 743         mb();
 744         outw(hex, ibm_statusled_base);
 745 }
 746
 747 static void __init
 748 ibm_statusled_init(void)
 749 {
 750         /*
 751          * The IBM 3-digit LED display is specified in the residual data
 752          * as an operator panel device, type "System Status LED".  Find
 753          * that device and determine its address.  We validate all the
 754          * other parameters on the off-chance another, similar device
 755          * exists.
 756          */
 757         if (have_residual_data) {
 758                 PPC_DEVICE *led;
 759                 PnP_TAG_PACKET *pkt;
 760
 761                 led = residual_find_device(~0, NULL, SystemPeripheral,
 762                                            OperatorPanel, SystemStatusLED, 0);
 763                 if (!led)
 764                         return;
 765
 766                 pkt = PnP_find_packet((unsigned char *)
 767                        &res->DevicePnPHeap[led->AllocatedOffset], S8_Packet, 0);
 768                 if (!pkt)
 769                         return;
 770
 771                 if (pkt->S8_Pack.IOInfo != ISAAddr16bit)
 772                         return;
 773                 if (*(unsigned short *)pkt->S8_Pack.RangeMin !=
 774                     *(unsigned short *)pkt->S8_Pack.RangeMax)
 775                         return;
 776                 if (pkt->S8_Pack.IOAlign != 2)
 777                         return;
 778                 if (pkt->S8_Pack.IONum != 2)
 779                         return;
 780
 781                 ibm_statusled_base = ld_le16((unsigned short *)
 782                                              (pkt->S8_Pack.RangeMin));
 783                 ppc_md.progress = ibm_statusled_progress;
 784         }
 785 }
 786
 787 static void __init
 788 prep_setup_arch(void)
 789 {
 790         unsigned char reg;
 791         int is_ide=0;
 792
 793         /* init to some ~sane value until calibrate_delay() runs */
 794         loops_per_jiffy = 50000000;
 795
 796         /* Lookup PCI host bridges */
 797         prep_find_bridges();
 798
 799         /* Set up floppy in PS/2 mode */
 800         outb(0x09, SIO_CONFIG_RA);
 801         reg = inb(SIO_CONFIG_RD);
 802         reg = (reg & 0x3F) | 0x40;
 803         outb(reg, SIO_CONFIG_RD);
 804         outb(reg, SIO_CONFIG_RD);       /* Have to write twice to change! */
 805
 806         switch ( _prep_type )
 807         {
 808         case _PREP_IBM:
 809                 reg = inb(PREP_IBM_PLANAR);
 810                 printk(KERN_INFO "IBM planar ID: %02x", reg);
 811                 switch (reg) {
 812                         case PREP_IBM_SANDALFOOT:
 813                                 prep_gen_enable_l2();
 814                                 setup_ibm_pci = prep_sandalfoot_setup_pci;
 815                                 ppc_md.power_off = prep_sig750_poweroff;
 816                                 ppc_md.show_cpuinfo = prep_sandalfoot_cpuinfo;
 817                                 break;
 818                         case PREP_IBM_THINKPAD:
 819                                 prep_gen_enable_l2();
 820                                 setup_ibm_pci = prep_thinkpad_setup_pci;
 821                                 ppc_md.power_off = prep_carrera_poweroff;
 822                                 ppc_md.show_cpuinfo = prep_thinkpad_cpuinfo;
 823                                 break;
 824                         default:
 825                                 if (have_residual_data) {
 826                                         prep_gen_enable_l2();
 827                                         setup_ibm_pci = prep_residual_setup_pci;
 828                                         ppc_md.power_off = prep_halt;
 829                                         ppc_md.show_cpuinfo = prep_gen_cpuinfo;
 830                                         break;
 831                                 }
 832                                 else
 833                                         printk(" - unknown! Assuming Carolina");
 834                                         /* fall through */
 835                         case PREP_IBM_CAROLINA_IDE_0:
 836                         case PREP_IBM_CAROLINA_IDE_1:
 837                         case PREP_IBM_CAROLINA_IDE_2:
 838                         case PREP_IBM_CAROLINA_IDE_3:
 839                                 is_ide = 1;
 840                         case PREP_IBM_CAROLINA_SCSI_0:
 841                         case PREP_IBM_CAROLINA_SCSI_1:
 842                         case PREP_IBM_CAROLINA_SCSI_2:
 843                         case PREP_IBM_CAROLINA_SCSI_3:
 844                                 prep_carolina_enable_l2();
 845                                 setup_ibm_pci = prep_carolina_setup_pci;
 846                                 ppc_md.power_off = prep_sig750_poweroff;
 847                                 ppc_md.show_cpuinfo = prep_carolina_cpuinfo;
 848                                 break;
 849                         case PREP_IBM_TIGER1_133:
 850                         case PREP_IBM_TIGER1_166:
 851                         case PREP_IBM_TIGER1_180:
 852                         case PREP_IBM_TIGER1_xxx:
 853                         case PREP_IBM_TIGER1_333:
 854                                 prep_carolina_enable_l2();
 855                                 setup_ibm_pci = prep_tiger1_setup_pci;
 856                                 ppc_md.power_off = prep_sig750_poweroff;
 857                                 ppc_md.show_cpuinfo = prep_tiger1_cpuinfo;
 858                                 break;
 859                 }
 860                 printk("\n");
 861
 862                 /* default root device */
 863                 if (is_ide)
 864                         ROOT_DEV = MKDEV(IDE0_MAJOR, 3);
 865                 else
 866                         ROOT_DEV = MKDEV(SCSI_DISK0_MAJOR, 3);
 867
 868                 break;
 869         case _PREP_Motorola:
 870                 prep_gen_enable_l2();
 871                 ppc_md.power_off = prep_halt;
 872                 ppc_md.show_cpuinfo = prep_mot_cpuinfo;
 873
 874 #ifdef CONFIG_BLK_DEV_INITRD
 875                 if (initrd_start)
 876                         ROOT_DEV = Root_RAM0;
 877                 else
 878 #endif
 879 #ifdef CONFIG_ROOT_NFS
 880                         ROOT_DEV = Root_NFS;
 881 #else
 882                         ROOT_DEV = Root_SDA2;
 883 #endif
 884                 break;
 885         }
 886
 887         /* Read in NVRAM data */
 888         init_prep_nvram();
 889
 890         /* if no bootargs, look in NVRAM */
 891         if ( cmd_line[0] == '\0' ) {
 892                 char *bootargs;
 893                  bootargs = prep_nvram_get_var("bootargs");
 894                  if (bootargs != NULL) {
 895                          strcpy(cmd_line, bootargs);
 896                          /* again.. */
 897                          strcpy(boot_command_line, cmd_line);
 898                 }
 899         }
 900
 901 #ifdef CONFIG_SOUND_CS4232
 902         prep_init_sound();
 903 #endif /* CONFIG_SOUND_CS4232 */
 904
 905         prep_init_vesa();
 906
 907         switch (_prep_type) {
 908         case _PREP_Motorola:
 909                 raven_init();
 910                 break;
 911         case _PREP_IBM:
 912                 ibm_prep_init();
 913                 break;
 914         }
 915
 916 #ifdef CONFIG_VGA_CONSOLE
 917         /* vgacon.c needs to know where we mapped IO memory in io_block_mapping() */
 918         vgacon_remap_base = 0xf0000000;
 919         conswitchp = &vga_con;
 920 #endif
 921 }
 922
 923 /*
 924  * First, see if we can get this information from the residual data.
 925  * This is important on some IBM PReP systems.  If we cannot, we let the
 926  * TODC code handle doing this.
 927  */
 928 static void __init
 929 prep_calibrate_decr(void)
 930 {
 931         if (have_residual_data) {
 932                 unsigned long freq, divisor = 4;
 933
 934                 if ( res->VitalProductData.ProcessorBusHz ) {
 935                         freq = res->VitalProductData.ProcessorBusHz;
 936                         printk("time_init: decrementer frequency = %lu.%.6lu MHz\n",
 937                                         (freq/divisor)/1000000,
 938                                         (freq/divisor)%1000000);
 939                         tb_to_us = mulhwu_scale_factor(freq/divisor, 1000000);
 940                         tb_ticks_per_jiffy = freq / HZ / divisor;
 941                 }
 942         }
 943         else
 944                 todc_calibrate_decr();
 945 }
 946
 947 static void __init
 948 prep_init_IRQ(void)
 949 {
 950         unsigned int pci_viddid, pci_did;
 951
 952         if (OpenPIC_Addr != NULL) {
 953                 openpic_init(NUM_8259_INTERRUPTS);
 954                 /* We have a cascade on OpenPIC IRQ 0, Linux IRQ 16 */
 955                 openpic_hookup_cascade(NUM_8259_INTERRUPTS, "82c59 cascade",
 956                                        i8259_irq);
 957         }
 958
 959         if (have_residual_data) {
 960                 i8259_init(residual_isapic_addr(), 0);
 961                 return;
 962         }
 963
 964         /* If we have a Raven PCI bridge or a Hawk PCI bridge / Memory
 965          * controller, we poll (as they have a different int-ack address). */
 966         early_read_config_dword(NULL, 0, 0, PCI_VENDOR_ID, &pci_viddid);
 967         pci_did = (pci_viddid & 0xffff0000) >> 16;
 968         if (((pci_viddid & 0xffff) == PCI_VENDOR_ID_MOTOROLA)
 969                         && ((pci_did == PCI_DEVICE_ID_MOTOROLA_RAVEN)
 970                                 || (pci_did == PCI_DEVICE_ID_MOTOROLA_HAWK)))
 971                 i8259_init(0, 0);
 972         else
 973                 /* PCI interrupt ack address given in section 6.1.8 of the
 974                  * PReP specification. */
 975                 i8259_init(MPC10X_MAPA_PCI_INTACK_ADDR, 0);
 976 }
 977
 978 #if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
 979 /*
 980  * IDE stuff.
 981  */
 982 static int
 983 prep_ide_default_irq(unsigned long base)
 984 {
 985         switch (base) {
 986                 case 0x1f0: return 13;
 987                 case 0x170: return 13;
 988                 case 0x1e8: return 11;
 989                 case 0x168: return 10;
 990                 case 0xfff0: return 14;         /* MCP(N)750 ide0 */
 991                 case 0xffe0: return 15;         /* MCP(N)750 ide1 */
 992                 default: return 0;
 993         }
 994 }
 995
 996 static unsigned long
 997 prep_ide_default_io_base(int index)
 998 {
 999         switch (index) {
1000                 case 0: return 0x1f0;
1001                 case 1: return 0x170;
1002                 case 2: return 0x1e8;
1003                 case 3: return 0x168;
1004                 default:
1005                         return 0;
1006         }
1007 }
1008 #endif
1009
1010 #ifdef CONFIG_SMP
1011 /* PReP (MTX) support */
1012 static int __init
1013 smp_prep_probe(void)
1014 {
1015         extern int mot_multi;
1016
1017         if (mot_multi) {
1018                 openpic_request_IPIs();
1019                 smp_hw_index[1] = 1;
1020                 return 2;
1021         }
1022
1023         return 1;
1024 }
1025
1026 static void __init
1027 smp_prep_kick_cpu(int nr)
1028 {
1029         *(unsigned long *)KERNELBASE = nr;
1030         asm volatile("dcbf 0,%0"::"r"(KERNELBASE):"memory");
1031         printk("CPU1 released, waiting\n");
1032 }
1033
1034 static void __init
1035 smp_prep_setup_cpu(int cpu_nr)
1036 {
1037         if (OpenPIC_Addr)
1038                 do_openpic_setup_cpu();
1039 }
1040
1041 static struct smp_ops_t prep_smp_ops = {
1042         smp_openpic_message_pass,
1043         smp_prep_probe,
1044         smp_prep_kick_cpu,
1045         smp_prep_setup_cpu,
1046         .give_timebase = smp_generic_give_timebase,
1047         .take_timebase = smp_generic_take_timebase,
1048 };
1049 #endif /* CONFIG_SMP */
1050
1051 /*
1052  * Setup the bat mappings we're going to load that cover
1053  * the io areas.  RAM was mapped by mapin_ram().
1054  * -- Cort
1055  */
1056 static void __init
1057 prep_map_io(void)
1058 {
1059         io_block_mapping(0x80000000, PREP_ISA_IO_BASE, 0x10000000, _PAGE_IO);
1060         io_block_mapping(0xf0000000, PREP_ISA_MEM_BASE, 0x08000000, _PAGE_IO);
1061 }
1062
1063 static int __init
1064 prep_request_io(void)
1065 {
1066 #ifdef CONFIG_NVRAM
1067         request_region(PREP_NVRAM_AS0, 0x8, "nvram");
1068 #endif
1069         request_region(0x00,0x20,"dma1");
1070         request_region(0x40,0x20,"timer");
1071         request_region(0x80,0x10,"dma page reg");
1072         request_region(0xc0,0x20,"dma2");
1073
1074         return 0;
1075 }
1076
1077 device_initcall(prep_request_io);
1078
1079 void __init
1080 prep_init(unsigned long r3, unsigned long r4, unsigned long r5,
1081                 unsigned long r6, unsigned long r7)
1082 {
1083 #ifdef CONFIG_PREP_RESIDUAL
1084         /* make a copy of residual data */
1085         if ( r3 ) {
1086                 memcpy((void *)res,(void *)(r3+KERNELBASE),
1087                          sizeof(RESIDUAL));
1088         }
1089 #endif
1090
1091         isa_io_base = PREP_ISA_IO_BASE;
1092         isa_mem_base = PREP_ISA_MEM_BASE;
1093         pci_dram_offset = PREP_PCI_DRAM_OFFSET;
1094         ISA_DMA_THRESHOLD = 0x00ffffff;
1095         DMA_MODE_READ = 0x44;
1096         DMA_MODE_WRITE = 0x48;
1097         ppc_do_canonicalize_irqs = 1;
1098
1099         /* figure out what kind of prep workstation we are */
1100         if (have_residual_data) {
1101                 if ( !strncmp(res->VitalProductData.PrintableModel,"IBM",3) )
1102                         _prep_type = _PREP_IBM;
1103                 else
1104                         _prep_type = _PREP_Motorola;
1105         }
1106         else {
1107                 /* assume motorola if no residual (netboot?) */
1108                 _prep_type = _PREP_Motorola;
1109         }
1110
1111 #ifdef CONFIG_PREP_RESIDUAL
1112         /* Switch off all residual data processing if the user requests it */
1113         if (strstr(cmd_line, "noresidual") != NULL)
1114                         res = NULL;
1115 #endif
1116
1117         /* Initialise progress early to get maximum benefit */
1118         prep_set_bat();
1119         ibm_statusled_init();
1120
1121         ppc_md.setup_arch     = prep_setup_arch;
1122         ppc_md.show_percpuinfo = prep_show_percpuinfo;
1123         ppc_md.show_cpuinfo   = NULL; /* set in prep_setup_arch() */
1124         ppc_md.init_IRQ       = prep_init_IRQ;
1125         /* this gets changed later on if we have an OpenPIC -- Cort */
1126         ppc_md.get_irq        = i8259_irq;
1127
1128         ppc_md.phys_mem_access_prot = pci_phys_mem_access_prot;
1129
1130         ppc_md.restart        = prep_restart;
1131         ppc_md.power_off      = NULL; /* set in prep_setup_arch() */
1132         ppc_md.halt           = prep_halt;
1133
1134         ppc_md.nvram_read_val = prep_nvram_read_val;
1135         ppc_md.nvram_write_val = prep_nvram_write_val;
1136
1137         ppc_md.time_init      = todc_time_init;
1138         if (_prep_type == _PREP_IBM) {
1139                 ppc_md.rtc_read_val = todc_mc146818_read_val;
1140                 ppc_md.rtc_write_val = todc_mc146818_write_val;
1141                 TODC_INIT(TODC_TYPE_MC146818, RTC_PORT(0), NULL, RTC_PORT(1),
1142                                 8);
1143         } else {
1144                 TODC_INIT(TODC_TYPE_MK48T59, PREP_NVRAM_AS0, PREP_NVRAM_AS1,
1145                                 PREP_NVRAM_DATA, 8);
1146         }
1147
1148         ppc_md.calibrate_decr = prep_calibrate_decr;
1149         ppc_md.set_rtc_time   = todc_set_rtc_time;
1150         ppc_md.get_rtc_time   = todc_get_rtc_time;
1151
1152         ppc_md.setup_io_mappings = prep_map_io;
1153
1154 #if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
1155         ppc_ide_md.default_irq = prep_ide_default_irq;
1156         ppc_ide_md.default_io_base = prep_ide_default_io_base;
1157 #endif
1158
1159 #ifdef CONFIG_SMP
1160         smp_ops                  = &prep_smp_ops;
1161 #endif /* CONFIG_SMP */
1162 }