2 * $Id: proc.c,v 1.13 1998/05/12 07:36:07 mj Exp $
4 * Procfs interface for the PCI bus.
6 * Copyright (c) 1997--1999 Martin Mares <mj@ucw.cz>
9 #include <linux/init.h>
10 #include <linux/pci.h>
11 #include <linux/module.h>
12 #include <linux/proc_fs.h>
13 #include <linux/seq_file.h>
14 #include <linux/smp_lock.h>
15 #include <linux/capability.h>
16 #include <asm/uaccess.h>
17 #include <asm/byteorder.h>
20 static int proc_initialized
; /* = 0 */
23 proc_bus_pci_lseek(struct file
*file
, loff_t off
, int whence
)
26 struct inode
*inode
= file
->f_path
.dentry
->d_inode
;
28 mutex_lock(&inode
->i_mutex
);
34 new = file
->f_pos
+ off
;
37 new = inode
->i_size
+ off
;
40 if (new < 0 || new > inode
->i_size
)
44 mutex_unlock(&inode
->i_mutex
);
49 proc_bus_pci_read(struct file
*file
, char __user
*buf
, size_t nbytes
, loff_t
*ppos
)
51 const struct inode
*ino
= file
->f_path
.dentry
->d_inode
;
52 const struct proc_dir_entry
*dp
= PDE(ino
);
53 struct pci_dev
*dev
= dp
->data
;
54 unsigned int pos
= *ppos
;
55 unsigned int cnt
, size
;
58 * Normal users can read only the standardized portion of the
59 * configuration space as several chips lock up when trying to read
60 * undefined locations (think of Intel PIIX4 as a typical example).
63 if (capable(CAP_SYS_ADMIN
))
65 else if (dev
->hdr_type
== PCI_HEADER_TYPE_CARDBUS
)
74 if (pos
+ nbytes
> size
)
78 if (!access_ok(VERIFY_WRITE
, buf
, cnt
))
81 if ((pos
& 1) && cnt
) {
83 pci_user_read_config_byte(dev
, pos
, &val
);
90 if ((pos
& 3) && cnt
> 2) {
92 pci_user_read_config_word(dev
, pos
, &val
);
93 __put_user(cpu_to_le16(val
), (unsigned short __user
*) buf
);
101 pci_user_read_config_dword(dev
, pos
, &val
);
102 __put_user(cpu_to_le32(val
), (unsigned int __user
*) buf
);
110 pci_user_read_config_word(dev
, pos
, &val
);
111 __put_user(cpu_to_le16(val
), (unsigned short __user
*) buf
);
119 pci_user_read_config_byte(dev
, pos
, &val
);
120 __put_user(val
, buf
);
131 proc_bus_pci_write(struct file
*file
, const char __user
*buf
, size_t nbytes
, loff_t
*ppos
)
133 struct inode
*ino
= file
->f_path
.dentry
->d_inode
;
134 const struct proc_dir_entry
*dp
= PDE(ino
);
135 struct pci_dev
*dev
= dp
->data
;
144 if (pos
+ nbytes
> size
)
148 if (!access_ok(VERIFY_READ
, buf
, cnt
))
151 if ((pos
& 1) && cnt
) {
153 __get_user(val
, buf
);
154 pci_user_write_config_byte(dev
, pos
, val
);
160 if ((pos
& 3) && cnt
> 2) {
162 __get_user(val
, (unsigned short __user
*) buf
);
163 pci_user_write_config_word(dev
, pos
, le16_to_cpu(val
));
171 __get_user(val
, (unsigned int __user
*) buf
);
172 pci_user_write_config_dword(dev
, pos
, le32_to_cpu(val
));
180 __get_user(val
, (unsigned short __user
*) buf
);
181 pci_user_write_config_word(dev
, pos
, le16_to_cpu(val
));
189 __get_user(val
, buf
);
190 pci_user_write_config_byte(dev
, pos
, val
);
197 i_size_write(ino
, dp
->size
);
201 struct pci_filp_private
{
202 enum pci_mmap_state mmap_state
;
206 static long proc_bus_pci_ioctl(struct file
*file
, unsigned int cmd
,
209 const struct proc_dir_entry
*dp
= PDE(file
->f_dentry
->d_inode
);
210 struct pci_dev
*dev
= dp
->data
;
212 struct pci_filp_private
*fpriv
= file
->private_data
;
213 #endif /* HAVE_PCI_MMAP */
219 case PCIIOC_CONTROLLER
:
220 ret
= pci_domain_nr(dev
->bus
);
224 case PCIIOC_MMAP_IS_IO
:
225 fpriv
->mmap_state
= pci_mmap_io
;
228 case PCIIOC_MMAP_IS_MEM
:
229 fpriv
->mmap_state
= pci_mmap_mem
;
232 case PCIIOC_WRITE_COMBINE
:
234 fpriv
->write_combine
= 1;
236 fpriv
->write_combine
= 0;
239 #endif /* HAVE_PCI_MMAP */
251 static int proc_bus_pci_mmap(struct file
*file
, struct vm_area_struct
*vma
)
253 struct inode
*inode
= file
->f_path
.dentry
->d_inode
;
254 const struct proc_dir_entry
*dp
= PDE(inode
);
255 struct pci_dev
*dev
= dp
->data
;
256 struct pci_filp_private
*fpriv
= file
->private_data
;
259 if (!capable(CAP_SYS_RAWIO
))
262 ret
= pci_mmap_page_range(dev
, vma
,
264 fpriv
->write_combine
);
271 static int proc_bus_pci_open(struct inode
*inode
, struct file
*file
)
273 struct pci_filp_private
*fpriv
= kmalloc(sizeof(*fpriv
), GFP_KERNEL
);
278 fpriv
->mmap_state
= pci_mmap_io
;
279 fpriv
->write_combine
= 0;
281 file
->private_data
= fpriv
;
286 static int proc_bus_pci_release(struct inode
*inode
, struct file
*file
)
288 kfree(file
->private_data
);
289 file
->private_data
= NULL
;
293 #endif /* HAVE_PCI_MMAP */
295 static const struct file_operations proc_bus_pci_operations
= {
296 .owner
= THIS_MODULE
,
297 .llseek
= proc_bus_pci_lseek
,
298 .read
= proc_bus_pci_read
,
299 .write
= proc_bus_pci_write
,
300 .unlocked_ioctl
= proc_bus_pci_ioctl
,
302 .open
= proc_bus_pci_open
,
303 .release
= proc_bus_pci_release
,
304 .mmap
= proc_bus_pci_mmap
,
305 #ifdef HAVE_ARCH_PCI_GET_UNMAPPED_AREA
306 .get_unmapped_area
= get_pci_unmapped_area
,
307 #endif /* HAVE_ARCH_PCI_GET_UNMAPPED_AREA */
308 #endif /* HAVE_PCI_MMAP */
312 static void *pci_seq_start(struct seq_file
*m
, loff_t
*pos
)
314 struct pci_dev
*dev
= NULL
;
317 for_each_pci_dev(dev
) {
324 static void *pci_seq_next(struct seq_file
*m
, void *v
, loff_t
*pos
)
326 struct pci_dev
*dev
= v
;
329 dev
= pci_get_device(PCI_ANY_ID
, PCI_ANY_ID
, dev
);
333 static void pci_seq_stop(struct seq_file
*m
, void *v
)
336 struct pci_dev
*dev
= v
;
341 static int show_device(struct seq_file
*m
, void *v
)
343 const struct pci_dev
*dev
= v
;
344 const struct pci_driver
*drv
;
350 drv
= pci_dev_driver(dev
);
351 seq_printf(m
, "%02x%02x\t%04x%04x\t%x",
357 /* Here should be 7 and not PCI_NUM_RESOURCES as we need to preserve compatibility */
358 for (i
=0; i
<7; i
++) {
359 resource_size_t start
, end
;
360 pci_resource_to_user(dev
, i
, &dev
->resource
[i
], &start
, &end
);
361 seq_printf(m
, "\t%16llx",
362 (unsigned long long)(start
|
363 (dev
->resource
[i
].flags
& PCI_REGION_FLAG_MASK
)));
365 for (i
=0; i
<7; i
++) {
366 resource_size_t start
, end
;
367 pci_resource_to_user(dev
, i
, &dev
->resource
[i
], &start
, &end
);
368 seq_printf(m
, "\t%16llx",
369 dev
->resource
[i
].start
< dev
->resource
[i
].end
?
370 (unsigned long long)(end
- start
) + 1 : 0);
374 seq_printf(m
, "%s", drv
->name
);
379 static const struct seq_operations proc_bus_pci_devices_op
= {
380 .start
= pci_seq_start
,
381 .next
= pci_seq_next
,
382 .stop
= pci_seq_stop
,
386 static struct proc_dir_entry
*proc_bus_pci_dir
;
388 int pci_proc_attach_device(struct pci_dev
*dev
)
390 struct pci_bus
*bus
= dev
->bus
;
391 struct proc_dir_entry
*e
;
394 if (!proc_initialized
)
398 if (pci_proc_domain(bus
)) {
399 sprintf(name
, "%04x:%02x", pci_domain_nr(bus
),
402 sprintf(name
, "%02x", bus
->number
);
404 bus
->procdir
= proc_mkdir(name
, proc_bus_pci_dir
);
409 sprintf(name
, "%02x.%x", PCI_SLOT(dev
->devfn
), PCI_FUNC(dev
->devfn
));
410 e
= proc_create_data(name
, S_IFREG
| S_IRUGO
| S_IWUSR
, bus
->procdir
,
411 &proc_bus_pci_operations
, dev
);
414 e
->size
= dev
->cfg_size
;
420 int pci_proc_detach_device(struct pci_dev
*dev
)
422 struct proc_dir_entry
*e
;
424 if ((e
= dev
->procent
)) {
425 if (atomic_read(&e
->count
) > 1)
427 remove_proc_entry(e
->name
, dev
->bus
->procdir
);
434 int pci_proc_attach_bus(struct pci_bus
* bus
)
436 struct proc_dir_entry
*de
= bus
->procdir
;
438 if (!proc_initialized
)
443 sprintf(name
, "%02x", bus
->number
);
444 de
= bus
->procdir
= proc_mkdir(name
, proc_bus_pci_dir
);
452 int pci_proc_detach_bus(struct pci_bus
* bus
)
454 struct proc_dir_entry
*de
= bus
->procdir
;
456 remove_proc_entry(de
->name
, proc_bus_pci_dir
);
460 static int proc_bus_pci_dev_open(struct inode
*inode
, struct file
*file
)
462 return seq_open(file
, &proc_bus_pci_devices_op
);
464 static const struct file_operations proc_bus_pci_dev_operations
= {
465 .owner
= THIS_MODULE
,
466 .open
= proc_bus_pci_dev_open
,
469 .release
= seq_release
,
472 static int __init
pci_proc_init(void)
474 struct pci_dev
*dev
= NULL
;
475 proc_bus_pci_dir
= proc_mkdir("bus/pci", NULL
);
476 proc_create("devices", 0, proc_bus_pci_dir
,
477 &proc_bus_pci_dev_operations
);
478 proc_initialized
= 1;
479 while ((dev
= pci_get_device(PCI_ANY_ID
, PCI_ANY_ID
, dev
)) != NULL
) {
480 pci_proc_attach_device(dev
);
485 __initcall(pci_proc_init
);